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Merge remote-tracking branch 'origin/NR_UE_MCS_improvements' into integration_2023_w36

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This commit is contained in:
Robert Schmidt
2023-09-08 15:09:19 +02:00
parent 0226dc76cb 30c401e0fa
commit bb7174997b
10 changed files with 116 additions and 106 deletions
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openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+18 -7
View File
@@ -100,17 +100,23 @@ static bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue,
LOG_D(PHY, "DLSCH %d in error\n", rdata->dlsch_id);
}
uint32_t tbs;
if (dlsch->dlsch_config.targetCodeRate > 0)
tbs = dlsch->dlsch_config.TBS;
else
tbs = harq_process->tb_size;
// if all segments are done
if (last) {
kpiStructure.nb_total++;
kpiStructure.blockSize = dlsch->dlsch_config.TBS;
kpiStructure.blockSize = tbs;
kpiStructure.dl_mcs = dlsch->dlsch_config.mcs;
kpiStructure.nofRBs = dlsch->dlsch_config.number_rbs;
if (*num_seg_ok == harq_process->C) {
if (harq_process->C > 1) {
/* check global CRC */
int A = dlsch->dlsch_config.TBS;
int A = tbs;
int crc_length = A > 3824 ? 3 : 2;
int crc_type = A > 3824 ? CRC24_A : CRC16;
if (!check_crc(b, A + crc_length * 8, crc_type)) {
@@ -149,9 +155,8 @@ static bool nr_ue_postDecode(PHY_VARS_NR_UE *phy_vars_ue,
}
return true; //stop
}
else
{
return false; //not last one
else {
return false; //not last one
}
}
@@ -292,7 +297,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t harq_pid,
int b_size,
uint8_t b[b_size]) {
uint32_t A,E;
uint32_t E;
uint32_t G;
uint32_t ret,offset;
uint32_t r,r_offset=0,Kr=8424,Kr_bytes;
@@ -355,7 +360,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
}
*/
nb_rb = dlsch->dlsch_config.number_rbs;
A = dlsch->dlsch_config.TBS;
uint32_t A;
if (dlsch->dlsch_config.targetCodeRate > 0) {
A = dlsch->dlsch_config.TBS;
harq_process->tb_size = A;
}
else
A = harq_process->tb_size;
ret = dlsch->max_ldpc_iterations + 1;
dlsch->last_iteration_cnt = ret;
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, dmrs_length, dlsch->dlsch_config.qamModOrder,dlsch->Nl);
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+1
View File
@@ -213,6 +213,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS* frame_parms,
uint8_t harq_pid,
uint32_t tb_size,
unsigned int G);
/*! \brief Perform PUSCH scrambling. TS 38.211 V15.4.0 subclause 6.3.1.1
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+4 -2
View File
@@ -93,6 +93,8 @@ typedef struct {
uint8_t BG;
// LDPC lifting size
uint32_t Z;
// TB size
uint32_t tb_size;
} NR_UL_UE_HARQ_t;
typedef struct {
@@ -115,8 +117,6 @@ typedef struct {
uint8_t Ndi;
/// DLSCH status flag indicating
SCH_status_t status;
/// Transport block size
uint32_t TBS;
/// The payload + CRC size in bits
uint32_t B;
/// Pointers to transport block segments
@@ -144,6 +144,8 @@ typedef struct {
/// Used for computing LDPC decoder R
int llrLen;
decode_abort_t abort_decode;
// TB size
uint32_t tb_size;
} NR_DL_UE_HARQ_t;
typedef struct {
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c
+4 -3
View File
@@ -45,8 +45,9 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS* frame_parms,
uint8_t harq_pid,
unsigned int G) {
uint32_t tb_size,
unsigned int G)
{
start_meas(&ue->ulsch_encoding_stats);
/////////////////////////parameters and variables initialization/////////////////////////
@@ -55,7 +56,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
unsigned int crc = 1;
NR_UL_UE_HARQ_t *harq_process = &ue->ul_harq_processes[harq_pid];
uint16_t nb_rb = ulsch->pusch_pdu.rb_size;
uint32_t A = ulsch->pusch_pdu.pusch_data.tb_size<<3;
uint32_t A = tb_size << 3;
uint32_t *pz = &harq_process->Z;
uint8_t mod_order = ulsch->pusch_pdu.qam_mod_order;
uint16_t Kr=0;
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+12 -2
View File
@@ -131,6 +131,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
NR_UL_UE_HARQ_t *harq_process_ul_ue = &UE->ul_harq_processes[harq_pid];
const nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch_ue->pusch_pdu;
uint32_t tb_size;
// MCS > limit -> retransmission
// Take TB size from previois transmission
if (pusch_pdu->target_code_rate == 0)
tb_size = harq_process_ul_ue->tb_size;
else {
tb_size = pusch_pdu->pusch_data.tb_size;
harq_process_ul_ue->tb_size = tb_size;
}
int start_symbol = pusch_pdu->start_symbol_index;
uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos;
uint8_t number_of_symbols = pusch_pdu->nr_of_symbols;
@@ -170,10 +180,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
trace_NRpdu(DIRECTION_UPLINK,
harq_process_ul_ue->a,
pusch_pdu->pusch_data.tb_size,
tb_size,
WS_C_RNTI, rnti, frame, slot, 0, 0);
if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G) == -1)
if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, tb_size, G) == -1)
return;
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+4 -4
View File
@@ -132,7 +132,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
dl_harq0 = &ue->dl_harq_processes[0][dlsch0->dlsch_config.harq_process_nbr];
trace_NRpdu(DIRECTION_DOWNLINK,
b,
dlsch0->dlsch_config.TBS / 8,
dl_harq0->tb_size / 8,
t,
dlsch0->rnti,
proc->frame_rx,
@@ -148,7 +148,7 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.harq_pid = dlsch0->dlsch_config.harq_process_nbr;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.ack_nack = dl_harq0->ack;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu = b;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu_length = dlsch0->dlsch_config.TBS / 8;
rx_ind->rx_indication_body[n_pdus - 1].pdsch_pdu.pdu_length = dl_harq0->tb_size / 8;
}
if(dlsch1) {
AssertFatal(1==0,"Second codeword currently not supported\n");
@@ -764,7 +764,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, NULL);
nr_fill_rx_indication(&rx_ind, ind_type, ue, &dlsch[0], NULL, number_pdus, proc, NULL, p_b);
LOG_D(PHY, "DL PDU length in bits: %d, in bytes: %d \n", dlsch[0].dlsch_config.TBS, dlsch[0].dlsch_config.TBS / 8);
LOG_D(PHY, "DL PDU length in bits: %d, in bytes: %d \n", dl_harq0->tb_size, dl_harq0->tb_size / 8);
stop_meas(&ue->dlsch_decoding_stats);
if (cpumeas(CPUMEAS_GETSTATE)) {
@@ -814,7 +814,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
LOG_D(PHY, "AbsSubframe %d.%d --> ldpc Decoding for CW1 %5.3f\n",
frame_rx%1024, nr_slot_rx,(ue->dlsch_decoding_stats.p_time)/(cpuf*1000.0));
}
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch[1].dlsch_config.TBS);
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dl_harq1->tb_size);
}
// send to mac
openair1/SIMULATION/NR_PHY/ulschsim.c
+1 -1
View File
@@ -522,7 +522,7 @@ int main(int argc, char **argv)
unsigned int G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, Nl);
if (input_fd == NULL) {
nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G);
nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, TBS>>3, G);
}
printf("\n");
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+45 -42
View File
@@ -2401,55 +2401,58 @@ void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
// the following tables contain 10 times the value reported in 214 (in line with SCF specification and to avoid fractional values)
//Table 5.1.3.1-1 of 38.214
static const uint16_t Table_51311[29][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260},
static const uint16_t Table_51311[32][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260},
{2, 6020}, {2, 6790}, {4, 3400}, {4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160},
{4, 6580}, {6, 4380}, {6, 4660}, {6, 5170}, {6, 5670}, {6, 6160}, {6, 6660}, {6, 7190},
{6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480}};
{6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480}, {2, 0}, {4, 0}, {6, 0}};
//Table 5.1.3.1-2 of 38.214
// Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
static const uint16_t Table_51312[28][2] = {{2, 1200}, {2, 1930}, {2, 3080}, {2, 4490}, {2, 6020}, {4, 3780}, {4, 4340},
static const uint16_t Table_51312[32][2] = {{2, 1200}, {2, 1930}, {2, 3080}, {2, 4490}, {2, 6020}, {4, 3780}, {4, 4340},
{4, 4900}, {4, 5530}, {4, 6160}, {4, 6580}, {6, 4660}, {6, 5170}, {6, 5670},
{6, 6160}, {6, 6660}, {6, 7190}, {6, 7720}, {6, 8220}, {6, 8730}, {8, 6825},
{8, 7110}, {8, 7540}, {8, 7970}, {8, 8410}, {8, 8850}, {8, 9165}, {8, 9480}};
{8, 7110}, {8, 7540}, {8, 7970}, {8, 8410}, {8, 8850}, {8, 9165}, {8, 9480},
{2, 0}, {4, 0}, {6, 0}, {8, 0}};
//Table 5.1.3.1-3 of 38.214
static const uint16_t Table_51313[29][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200}, {2, 1570},
static const uint16_t Table_51313[32][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200}, {2, 1570},
{2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260}, {2, 6020}, {4, 3400},
{4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160}, {6, 4380}, {6, 4660}, {6, 5170},
{6, 5670}, {6, 6160}, {6, 6660}, {6, 7190}, {6, 7720}};
{6, 5670}, {6, 6160}, {6, 6660}, {6, 7190}, {6, 7720}, {2, 0}, {4, 0}, {6, 0}};
static const uint16_t Table_61411[28][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490},
static const uint16_t Table_61411[32][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490},
{2, 5260}, {2, 6020}, {2, 6790}, {4, 3400}, {4, 3780}, {4, 4340}, {4, 4900},
{4, 5530}, {4, 6160}, {4, 6580}, {6, 4660}, {6, 5170}, {6, 5670}, {6, 6160},
{6, 6660}, {6, 7190}, {6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480}};
{6, 6660}, {6, 7190}, {6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480},
{2, 0}, {2, 0}, {4, 0}, {6, 0}};
static const uint16_t Table_61412[28][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200},
static const uint16_t Table_61412[32][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200},
{2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260},
{2, 6020}, {2, 6790}, {4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160},
{4, 6580}, {4, 6990}, {4, 7720}, {6, 5670}, {6, 6160}, {6, 6660}, {6, 7720}};
{4, 6580}, {4, 6990}, {4, 7720}, {6, 5670}, {6, 6160}, {6, 6660}, {6, 7720},
{2, 0}, {2, 0}, {4, 0}, {6, 0}};
uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51311[Imcs][0]);
break;
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51312[Imcs][0]);
break;
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51313[Imcs][0]);
@@ -2464,24 +2467,24 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51311[Imcs][1]);
break;
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51312[Imcs][1]);
break;
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51313[Imcs][1]);
@@ -2496,40 +2499,40 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51311[Imcs][0]);
break;
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51312[Imcs][0]);
break;
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51313[Imcs][0]);
break;
case 3:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_61411[Imcs][0]);
break;
case 4:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_61412[Imcs][0]);
@@ -2544,40 +2547,40 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) {
case 0:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51311[Imcs][1]);
break;
case 1:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51312[Imcs][1]);
break;
case 2:
if (Imcs > 28) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_51313[Imcs][1]);
break;
case 3:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_61411[Imcs][1]);
break;
case 4:
if (Imcs > 27) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs);
if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,31])\n", Imcs);
return 0;
}
return (Table_61412[Imcs][1]);
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+16 -29
View File
@@ -683,28 +683,24 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->mcs_table = (pdsch_config) ? ((pdsch_config->mcs_Table) ? (*pdsch_config->mcs_Table + 1) : 0) : 0;
/* MCS */
dlsch_config_pdu_1_0->mcs = dci->mcs;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dlsch_config_pdu_1_0->mcs > 28) {
LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_0->mcs);
return -1;
}
dlsch_config_pdu_1_0->qamModOrder = nr_get_Qm_dl(dlsch_config_pdu_1_0->mcs, dlsch_config_pdu_1_0->mcs_table);
int R = nr_get_code_rate_dl(dlsch_config_pdu_1_0->mcs, dlsch_config_pdu_1_0->mcs_table);
dlsch_config_pdu_1_0->targetCodeRate = R;
if (dlsch_config_pdu_1_0->targetCodeRate == 0 || dlsch_config_pdu_1_0->qamModOrder == 0) {
if (dlsch_config_pdu_1_0->qamModOrder == 0) {
LOG_W(MAC, "Invalid code rate or Mod order, likely due to unexpected DL DCI.\n");
return -1;
}
int nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
int nb_re_dmrs = ((dlsch_config_pdu_1_0->dmrsConfigType == NFAPI_NR_DMRS_TYPE1) ? 6:4)*dlsch_config_pdu_1_0->n_dmrs_cdm_groups;
dlsch_config_pdu_1_0->TBS = nr_compute_tbs(dlsch_config_pdu_1_0->qamModOrder,
R,
dlsch_config_pdu_1_0->number_rbs,
dlsch_config_pdu_1_0->number_symbols,
nb_re_dmrs*get_num_dmrs(dlsch_config_pdu_1_0->dlDmrsSymbPos),
nb_rb_oh, 0, 1);
if (R > 0)
dlsch_config_pdu_1_0->TBS = nr_compute_tbs(dlsch_config_pdu_1_0->qamModOrder,
R,
dlsch_config_pdu_1_0->number_rbs,
dlsch_config_pdu_1_0->number_symbols,
nb_re_dmrs*get_num_dmrs(dlsch_config_pdu_1_0->dlDmrsSymbPos),
nb_rb_oh, 0, 1);
int bw_tbslbrm;
if (current_DL_BWP->initial_BWPSize > 0)
@@ -907,22 +903,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->zp_csi_rs_trigger = dci->zp_csi_rs_trigger.val;
/* MCS (for transport block 1)*/
dlsch_config_pdu_1_1->mcs = dci->mcs;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dlsch_config_pdu_1_1->mcs > 28) {
LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->mcs);
return -1;
}
/* NDI (for transport block 1)*/
dlsch_config_pdu_1_1->ndi = dci->ndi;
/* RV (for transport block 1)*/
dlsch_config_pdu_1_1->rv = dci->rv;
/* MCS (for transport block 2)*/
dlsch_config_pdu_1_1->tb2_mcs = dci->mcs2.val;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dlsch_config_pdu_1_1->tb2_mcs > 28) {
LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_1->tb2_mcs);
return -1;
}
/* NDI (for transport block 2)*/
dlsch_config_pdu_1_1->tb2_ndi = dci->ndi2.val;
/* RV (for transport block 2)*/
@@ -1108,7 +1094,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->qamModOrder = nr_get_Qm_dl(dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table);
int R = nr_get_code_rate_dl(dlsch_config_pdu_1_1->mcs, dlsch_config_pdu_1_1->mcs_table);
dlsch_config_pdu_1_1->targetCodeRate = R;
if (dlsch_config_pdu_1_1->targetCodeRate == 0 || dlsch_config_pdu_1_1->qamModOrder == 0) {
if (dlsch_config_pdu_1_1->qamModOrder == 0) {
LOG_W(MAC, "Invalid code rate or Mod order, likely due to unexpected DL DCI.\n");
return -1;
}
@@ -1118,12 +1104,13 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
}
int nb_rb_oh = 0; // it was not computed at UE side even before and set to 0 in nr_compute_tbs
int nb_re_dmrs = ((dmrs_type == NULL) ? 6:4)*dlsch_config_pdu_1_1->n_dmrs_cdm_groups;
dlsch_config_pdu_1_1->TBS = nr_compute_tbs(dlsch_config_pdu_1_1->qamModOrder,
R,
dlsch_config_pdu_1_1->number_rbs,
dlsch_config_pdu_1_1->number_symbols,
nb_re_dmrs*get_num_dmrs(dlsch_config_pdu_1_1->dlDmrsSymbPos),
nb_rb_oh, 0, Nl);
if (R > 0)
dlsch_config_pdu_1_1->TBS = nr_compute_tbs(dlsch_config_pdu_1_1->qamModOrder,
R,
dlsch_config_pdu_1_1->number_rbs,
dlsch_config_pdu_1_1->number_symbols,
nb_re_dmrs*get_num_dmrs(dlsch_config_pdu_1_1->dlDmrsSymbPos),
nb_rb_oh, 0, Nl);
// TBS_LBRM according to section 5.4.2.1 of 38.212
long *maxMIMO_Layers = current_DL_BWP->pdsch_servingcellconfig->ext1->maxMIMO_Layers;
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+11 -16
View File
@@ -533,12 +533,6 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->bwp_start = current_UL_BWP->BWPStart;
pusch_config_pdu->bwp_size = current_UL_BWP->BWPSize;
// Basic sanity check for MCS value to check for a false or erroneous DCI
if (dci->mcs > 28) {
LOG_W(NR_MAC, "MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", dci->mcs);
return -1;
}
/* Transform precoding */
pusch_config_pdu->transform_precoding = get_transformPrecoding(current_UL_BWP, *dci_format, 0);
@@ -715,8 +709,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->target_code_rate = R;
pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table);
if (pusch_config_pdu->target_code_rate == 0 || pusch_config_pdu->qam_mod_order == 0) {
LOG_W(NR_MAC, "In %s: Invalid code rate or Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n", __FUNCTION__);
if (pusch_config_pdu->qam_mod_order == 0) {
LOG_W(NR_MAC, "Invalid Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n");
return -1;
}
@@ -730,14 +724,15 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
nb_dmrs_re_per_rb = ((pusch_config_pdu->dmrs_config_type == pusch_dmrs_type1) ? 6:4)*pusch_config_pdu->num_dmrs_cdm_grps_no_data;
// Compute TBS
pusch_config_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_config_pdu->qam_mod_order,
R,
pusch_config_pdu->rb_size,
pusch_config_pdu->nr_of_symbols,
nb_dmrs_re_per_rb*number_dmrs_symbols,
N_PRB_oh,
0, // TBR to verify tb scaling
pusch_config_pdu->nrOfLayers)>>3;
if (R > 0)
pusch_config_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_config_pdu->qam_mod_order,
R,
pusch_config_pdu->rb_size,
pusch_config_pdu->nr_of_symbols,
nb_dmrs_re_per_rb*number_dmrs_symbols,
N_PRB_oh,
0, // TBR to verify tb scaling
pusch_config_pdu->nrOfLayers)>>3;
return 0;
}