some improvements from review
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@@ -1159,7 +1159,7 @@ int pnf_phy_ul_dci_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7,
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if (req->numPdus > 0) {
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for (int i=0; i<req->numPdus; i++) {
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if (req->ul_dci_pdu_list[i].PDUType == 0) // only possible value 0: PDCCH PDU
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if (req->ul_dci_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE) // only possible value 0: PDCCH PDU
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msgTx->ul_pdcch_pdu[i] = req->ul_dci_pdu_list[i];
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else
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LOG_E(PHY,"[PNF] UL_DCI_REQ sfn_slot:%d PDU[%d] - unknown pdu type:%d\n", NFAPI_SFNSLOT2DEC(req->SFN, req->Slot), req->numPdus-1, req->ul_dci_pdu_list[req->numPdus-1].PDUType);
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@@ -1243,8 +1243,7 @@ int pnf_phy_dl_tti_req(gNB_L1_rxtx_proc_t *proc, nfapi_pnf_p7_config_t *pnf_p7,
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processingData_L1tx_t *msgTx = (processingData_L1tx_t *)NotifiedFifoData(res);
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if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE) {
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// we trust the scheduler sends only one PDCCH PDU per slot
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msgTx->pdcch_pdu[i] = dl_tti_pdu_list[i].pdcch_pdu; // fills the last received PDCCH PDU
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msgTx->pdcch_pdu[i] = dl_tti_pdu_list[i].pdcch_pdu; // copies all the received PDCCH PDUs
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}
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else if (dl_tti_pdu_list[i].PDUType == NFAPI_NR_DL_TTI_SSB_PDU_TYPE) {
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//NFAPI_TRACE(NFAPI_TRACE_INFO, "%s() PDU:%d BCH: pdu_index:%u pdu_length:%d sdu_length:%d BCH_SDU:%x,%x,%x\n", __FUNCTION__, i, pdu_index, bch_pdu->bch_pdu_rel8.length, tx_request_pdu[sfn][sf][pdu_index]->segments[0].segment_length, sdu[0], sdu[1], sdu[2]);
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@@ -641,14 +641,16 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
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bwpd = (void*)CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP;
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genericParameters = &scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
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}
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else
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AssertFatal(1==0,"Either initial BWP or active BWP should always be present\n");
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sched_ctrl->search_space = get_searchspace(scc, bwpd, target_ss);
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sched_ctrl->coreset = get_coreset(Mod_idP, scc, bwpd, sched_ctrl->search_space, target_ss);
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UE_info->UE_sched_ctrl[UE_id].sched_pdcch = set_pdcch_structure(RC.nrmac[Mod_idP],
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sched_ctrl->search_space,
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sched_ctrl->coreset,
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scc,
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genericParameters,
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NULL);
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sched_ctrl->sched_pdcch = set_pdcch_structure(RC.nrmac[Mod_idP],
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sched_ctrl->search_space,
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sched_ctrl->coreset,
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scc,
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genericParameters,
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NULL);
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sched_ctrl->maxL = 2;
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}
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}
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@@ -830,14 +830,15 @@ void pf_dl(module_id_t module_id,
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if (ps->time_domain_allocation != tda)
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nr_set_pdsch_semi_static(scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, bwpd, tda, f, ps);
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const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
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// Freq-demain allocation
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while (rbStart < bwpSize &&
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!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
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!(rballoc_mask[rbStart]&slbitmap))
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rbStart++;
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uint16_t max_rbSize = 1;
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while (rbStart + max_rbSize < bwpSize &&
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(rballoc_mask[rbStart + max_rbSize]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
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(rballoc_mask[rbStart + max_rbSize]&slbitmap))
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max_rbSize++;
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sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
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@@ -861,7 +862,7 @@ void pf_dl(module_id_t module_id,
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/* transmissions: directly allocate */
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n_rb_sched -= sched_pdsch->rbSize;
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for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
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rballoc_mask[rb + sched_pdsch->rbStart] -= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
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rballoc_mask[rb + sched_pdsch->rbStart] -= slbitmap;
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}
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}
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@@ -896,6 +897,7 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
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scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,
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MAX_BWP_SIZE);
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const uint16_t slbitmap = SL_to_bitmap(startSymbolIndex, nrOfSymbols);
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uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
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uint16_t rballoc_mask[bwpSize];
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int n_rb_sched = 0;
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@@ -904,8 +906,8 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
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// if any RB in vrb_map is blocked (1), the current RBG will be 0
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rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols
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// if all the pdsch symbols are free
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if((rballoc_mask[i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) ==
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SL_to_bitmap(startSymbolIndex, nrOfSymbols))
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if((rballoc_mask[i]&slbitmap) ==
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slbitmap)
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n_rb_sched++;
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}
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@@ -298,12 +298,12 @@ void nr_preprocessor_phytest(module_id_t module_id,
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while (true) {
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/* advance to first free RB */
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while (rbStart < bwpSize &&
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(vrb_map[rbStart + BWPStart]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)))
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(vrb_map[rbStart + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
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rbStart++;
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rbSize = 1;
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/* iterate until we are at target_dl_bw or no available RBs */
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while (rbStart + rbSize < bwpSize &&
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!(vrb_map[rbStart + rbSize + BWPStart]&(((1<<ps->nrOfSymbols)-1)<<ps->startSymbolIndex)) &&
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!(vrb_map[rbStart + rbSize + BWPStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) &&
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rbSize < target_dl_bw)
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rbSize++;
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/* found target_dl_bw? */
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@@ -293,6 +293,19 @@ NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac,
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}
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int cce_to_reg_interleaving(const int R, int k, int n_shift, const int C, int L, const int N_regs) {
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int f; // interleaving function
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if(R==0)
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f = k;
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else {
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int c = k/R;
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int r = k%R;
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f = (r*C + c + n_shift)%(N_regs/L);
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}
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return f;
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}
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uint8_t find_pdcch_candidate(gNB_MAC_INST *mac,
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int cc_id,
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int aggregation,
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@@ -310,34 +323,26 @@ uint8_t find_pdcch_candidate(gNB_MAC_INST *mac,
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return -1;
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}
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int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol
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int N_symb = coreset->duration; // nb of coreset symbols
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int N_regs = N_rb*N_symb; // nb of REGs per coreset
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int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset
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int L = pdcch->RegBundleSize;
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int R = pdcch->InterleaverSize;
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int n_shift = pdcch->ShiftIndex;
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int C = R>0 ? N_regs/(L*R) : 0;
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int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle
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const int N_rb = pdcch->n_rb; // nb of rbs of coreset per symbol
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const int N_symb = coreset->duration; // nb of coreset symbols
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const int N_regs = N_rb*N_symb; // nb of REGs per coreset
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const int N_cces = N_regs / NR_NB_REG_PER_CCE; // nb of cces in coreset
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const int R = pdcch->InterleaverSize;
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const int L = pdcch->RegBundleSize;
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const int C = R>0 ? N_regs/(L*R) : 0;
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const int B_rb = L/N_symb; // nb of RBs occupied by each REG bundle
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int first_cce;
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bool taken = false; // flag if the resource for a given candidate are taken
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// loop over all the available candidates
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// this implements TS 38.211 Sec. 7.3.2.2
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for(int m=next_cand; m<nr_of_candidates; m++) { // loop over candidates
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first_cce = aggregation * (( Y + CEILIDIV((m*N_cces),(aggregation*nr_of_candidates)) + N_ci ) % CEILIDIV(N_cces,aggregation));
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for (int j=first_cce; (j<first_cce+aggregation) && !taken; j++) { // loop over CCEs
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for (int k=6*j/L; (k<(6*j/L+6/L)) && !taken; k++) { // loop over REG bundles
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int f; // interleaving function
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if(R==0)
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f = k;
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else {
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int c = k/R;
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int r = k%R;
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f = (r*C + c + n_shift)%(N_regs/L);
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}
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int f = cce_to_reg_interleaving(R, k, pdcch->ShiftIndex, C, L, N_regs);
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for(int rb=0; rb<B_rb; rb++) { // loop over the RBs of the bundle
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if(vrb_map[pdcch->BWPStart + f*B_rb + rb]&(((1<<N_symb)-1)<<pdcch->StartSymbolIndex)) {
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if(vrb_map[pdcch->BWPStart + f*B_rb + rb]&SL_to_bitmap(pdcch->StartSymbolIndex,N_symb)) {
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taken = true;
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break;
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}
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