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Noise power estimation and MMSE computation for DL at UE side

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This commit is contained in:
rmagueta
2024-05-03 15:07:26 +01:00
parent f5dccc2a59
commit bcbf9287ba
5 changed files with 106 additions and 59 deletions
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openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+28 -5
View File
@@ -1087,7 +1087,8 @@ void NFAPI_NR_DMRS_TYPE1_linear_interp(NR_DL_FRAME_PARMS *frame_parms,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch,
int8_t delta,
delay_t *delay)
delay_t *delay,
uint32_t *nvar)
{
c16_t *dl_ch0 = dl_ch;
int re_offset = bwp_start_subcarrier % frame_parms->ofdm_symbol_size;
@@ -1095,6 +1096,9 @@ void NFAPI_NR_DMRS_TYPE1_linear_interp(NR_DL_FRAME_PARMS *frame_parms,
c16_t dl_ls_est[frame_parms->ofdm_symbol_size] __attribute__((aligned(32)));
memset(dl_ls_est, 0, sizeof(dl_ls_est));
int nest_count = 0;
uint64_t noise_amp2 = 0;
for (int pilot_cnt = 0; pilot_cnt < 6 * nb_rb_pdsch; pilot_cnt++) {
if (pilot_cnt % 2 == 0) {
c16_t ch = c16mulShift(*pil, rxF[re_offset], 15);
@@ -1150,6 +1154,12 @@ void NFAPI_NR_DMRS_TYPE1_linear_interp(NR_DL_FRAME_PARMS *frame_parms,
c16_t *dl_inv_delay_table = frame_parms->delay_table[inv_delay_idx];
for (int k = 0; k < 12 * nb_rb_pdsch; k++) {
dl_ch[k] = c16mulShift(dl_ch[k], dl_inv_delay_table[k], 8);
noise_amp2 += c16amp2(c16sub(dl_ls_est[k], dl_ch[k]));
nest_count++;
}
if (nvar && nest_count > 0) {
*nvar = (uint32_t)(noise_amp2 / (nest_count * frame_parms->nb_antennas_rx));
}
}
@@ -1245,7 +1255,8 @@ void NFAPI_NR_DMRS_TYPE2_linear_interp(NR_DL_FRAME_PARMS *frame_parms,
unsigned short nb_rb_pdsch,
int8_t delta,
unsigned short p,
delay_t *delay)
delay_t *delay,
uint32_t *nvar)
{
int re_offset = bwp_start_subcarrier % frame_parms->ofdm_symbol_size;
c16_t *dl_ch0 = dl_ch;
@@ -1253,6 +1264,9 @@ void NFAPI_NR_DMRS_TYPE2_linear_interp(NR_DL_FRAME_PARMS *frame_parms,
c16_t dl_ls_est[frame_parms->ofdm_symbol_size] __attribute__((aligned(32)));
memset(dl_ls_est, 0, sizeof(dl_ls_est));
int nest_count = 0;
uint64_t noise_amp2 = 0;
for (int pilot_cnt = 0; pilot_cnt < 4 * nb_rb_pdsch; pilot_cnt += 2) {
c16_t ch_l = c16mulShift(*pil, rxF[re_offset], 15);
#ifdef DEBUG_PDSCH
@@ -1301,6 +1315,12 @@ void NFAPI_NR_DMRS_TYPE2_linear_interp(NR_DL_FRAME_PARMS *frame_parms,
c16_t *dl_inv_delay_table = frame_parms->delay_table[inv_delay_idx];
for (int k = 0; k < 12 * nb_rb_pdsch; k++) {
dl_ch[k] = c16mulShift(dl_ch[k], dl_inv_delay_table[k], 8);
noise_amp2 += c16amp2(c16sub(dl_ls_est[k], dl_ch[k]));
nest_count++;
}
if (nvar && nest_count > 0) {
*nvar = (uint32_t)(noise_amp2 / (nest_count * frame_parms->nb_antennas_rx));
}
}
@@ -1402,7 +1422,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size],
int rxdataFsize,
c16_t rxdataF[][rxdataFsize])
c16_t rxdataF[][rxdataFsize],
uint32_t *nvar)
{
int gNB_id = proc->gNB_id;
int Ns = proc->nr_slot_rx;
@@ -1456,7 +1477,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
bwp_start_subcarrier,
nb_rb_pdsch,
delta,
&delay);
&delay,
nvar);
} else if (config_type == NFAPI_NR_DMRS_TYPE2 && ue->chest_freq == 0) {
NFAPI_NR_DMRS_TYPE2_linear_interp(&ue->frame_parms,
@@ -1467,7 +1489,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
nb_rb_pdsch,
delta,
p,
&delay);
&delay,
nvar);
} else if (config_type == NFAPI_NR_DMRS_TYPE1) {
NFAPI_NR_DMRS_TYPE1_average_prb(&ue->frame_parms,
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
+2 -1
View File
@@ -93,7 +93,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint32_t pdsch_est_size,
int32_t dl_ch_estimates[][pdsch_est_size],
int rxdataFsize,
c16_t rxdataF[][rxdataFsize]);
c16_t rxdataF[][rxdataFsize],
uint32_t *nvar);
int nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
PHY_VARS_NR_UE *ue,
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
+62 -49
View File
@@ -82,20 +82,21 @@ unsigned char offset_mumimo_llr_drange[29][3]={{8,8,8},{7,7,7},{7,7,7},{7,7,7},{
#define print_ints(s,x) printf("%s = %d %d %d %d\n",s,(x)[0],(x)[1],(x)[2],(x)[3])
#define print_shorts(s,x) printf("%s = [%d+j*%d, %d+j*%d, %d+j*%d, %d+j*%d]\n",s,(x)[0],(x)[1],(x)[2],(x)[3],(x)[4],(x)[5],(x)[6],(x)[7])
/* compute H_h_H matrix inversion up to 4x4 matrices */
uint8_t nr_zero_forcing_rx(uint32_t rx_size_symbol,
unsigned char n_rx,
unsigned char n_tx,//number of layer
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol],
unsigned short nb_rb,
unsigned char mod_order,
int shift,
unsigned char symbol,
int length);
/* compute the MMSE up to 4x4 matrices */
static void nr_dlsch_mmse(uint32_t rx_size_symbol,
unsigned char n_rx,
unsigned char n_tx, // number of layer
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol],
unsigned short nb_rb,
unsigned char mod_order,
int shift,
unsigned char symbol,
int length,
uint32_t noise_var);
/* Apply layer demapping */
static void nr_dlsch_layer_demapping(int16_t *llr_cw[2],
@@ -259,7 +260,8 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
c16_t ptrs_phase_per_slot[][NR_SYMBOLS_PER_SLOT],
int32_t ptrs_re_per_slot[][NR_SYMBOLS_PER_SLOT],
int G)
int G,
uint32_t nvar)
{
const int nl = dlsch[0].Nl;
const int matrixSz = ue->frame_parms.nb_antennas_rx * nl;
@@ -529,26 +531,27 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
symbol,
nb_rb_pdsch,
nb_re_pdsch);
if (nl >= 2) // Apply zero forcing for 2, 3, and 4 Tx layers
nr_zero_forcing_rx(rx_size_symbol,
n_rx,
nl,
rxdataF_comp,
dl_ch_mag,
dl_ch_magb,
dl_ch_magr,
dl_ch_estimates_ext,
nb_rb_pdsch,
dlsch_config->qamModOrder,
*log2_maxh,
symbol,
nb_re_pdsch);
if (nl >= 2) // Apply MMSE for 2, 3, and 4 Tx layers
nr_dlsch_mmse(rx_size_symbol,
n_rx,
nl,
rxdataF_comp,
dl_ch_mag,
dl_ch_magb,
dl_ch_magr,
dl_ch_estimates_ext,
nb_rb_pdsch,
dlsch_config->qamModOrder,
*log2_maxh,
symbol,
nb_re_pdsch,
nvar);
}
if (meas_enabled) {
stop_meas(&meas);
LOG_D(PHY,
"[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine and zero forcing %5.2f \n",
"[AbsSFN %u.%d] Slot%d Symbol %d: Channel Combine and MMSE %5.2f \n",
frame,
nr_slot_rx,
slot,
@@ -1650,23 +1653,23 @@ void nr_conjch0_mult_ch1(int *ch0,
simde_m_empty();
}
/* Zero Forcing Rx function: up to 4 layers
*
*
* */
uint8_t nr_zero_forcing_rx(uint32_t rx_size_symbol,
unsigned char n_rx,
unsigned char n_tx,//number of layer
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol],
unsigned short nb_rb,
unsigned char mod_order,
int shift,
unsigned char symbol,
int length)
/*
* MMSE Rx function: up to 4 layers
*/
static void nr_dlsch_mmse(uint32_t rx_size_symbol,
unsigned char n_rx,
unsigned char n_tx, // number of layer
int32_t rxdataF_comp[][n_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
int32_t dl_ch_mag[][n_rx][rx_size_symbol],
int32_t dl_ch_magb[][n_rx][rx_size_symbol],
int32_t dl_ch_magr[][n_rx][rx_size_symbol],
int32_t dl_ch_estimates_ext[][rx_size_symbol],
unsigned short nb_rb,
unsigned char mod_order,
int shift,
unsigned char symbol,
int length,
uint32_t noise_var)
{
int *ch0r, *ch0c;
uint32_t nb_rb_0 = length/12 + ((length%12)?1:0);
@@ -1698,6 +1701,18 @@ uint8_t nr_zero_forcing_rx(uint32_t rx_size_symbol,
}
}
// Add noise_var such that: H^h * H + noise_var * I
if (noise_var != 0) {
simde__m128i nvar_128i = simde_mm_set1_epi32(noise_var >> 3);
for (int p = 0; p < n_tx; p++) {
simde__m128i *conjH_H_128i = (simde__m128i *)conjH_H_elements[0][p][p];
for (int k = 0; k < 3 * nb_rb_0; k++) {
conjH_H_128i[0] = simde_mm_add_epi32(conjH_H_128i[0], nvar_128i);
conjH_H_128i++;
}
}
}
//Compute the inverse and determinant of the H^*H matrix
//Allocate the inverse matrix
c16_t *inv_H_h_H[n_tx][n_tx];
@@ -1795,8 +1810,6 @@ uint8_t nr_zero_forcing_rx(uint32_t rx_size_symbol,
dl_ch_mag128r_0 += 1;
}
}
return 0;
}
static void nr_dlsch_layer_demapping(int16_t *llr_cw[2],
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+3 -2
View File
@@ -406,13 +406,14 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
uint32_t dl_valid_re[NR_SYMBOLS_PER_SLOT],
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP],
uint32_t llr_offset[NR_SYMBOLS_PER_SLOT],
int32_t *log2_maxhrx_size_symbol,
int32_t *log2_maxh,
int rx_size_symbol,
int nbRx,
int32_t rxdataF_comp[][nbRx][rx_size_symbol * NR_SYMBOLS_PER_SLOT],
c16_t ptrs_phase_per_slot[][NR_SYMBOLS_PER_SLOT],
int32_t ptrs_re_per_slot[][NR_SYMBOLS_PER_SLOT],
int G);
int G,
uint32_t nvar);
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t slot);
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+11 -2
View File
@@ -528,10 +528,13 @@ static int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
__attribute__((aligned(32))) int32_t rxdataF_comp[dlsch[0].Nl][ue->frame_parms.nb_antennas_rx][rx_size_symbol * NR_SYMBOLS_PER_SLOT];
memset(rxdataF_comp, 0, sizeof(rxdataF_comp));
uint32_t nvar = 0;
for (int m = dlschCfg->start_symbol; m < (dlschCfg->start_symbol + dlschCfg->number_symbols); m++) {
if (dlschCfg->dlDmrsSymbPos & (1 << m)) {
for (int nl = 0; nl < dlsch0->Nl; nl++) { //for MIMO Config: it shall loop over no_layers
LOG_D(PHY,"PDSCH Channel estimation layer %d, slot %d, symbol %d\n", nl, nr_slot_rx, m);
uint32_t nvar_tmp = 0;
nr_pdsch_channel_estimation(ue,
proc,
nl,
@@ -547,7 +550,9 @@ static int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
pdsch_est_size,
pdsch_dl_ch_estimates,
ue->frame_parms.samples_per_slot_wCP,
rxdataF);
rxdataF,
&nvar_tmp);
nvar += nvar_tmp;
#if 0
///LOG_M: the channel estimation
int nr_frame_rx = proc->frame_rx;
@@ -561,6 +566,9 @@ static int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
}
}
}
nvar /= (dlschCfg->number_symbols * dlsch0->Nl * ue->frame_parms.nb_antennas_rx);
nr_ue_measurement_procedures(2, ue, proc, &dlsch[0], pdsch_est_size, pdsch_dl_ch_estimates);
if (ue->chest_time == 1) { // averaging time domain channel estimates
@@ -618,7 +626,8 @@ static int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
rxdataF_comp,
ptrs_phase_per_slot,
ptrs_re_per_slot,
G)
G,
nvar)
< 0)
return -1;