Merge remote-tracking branch 'origin/develop-sib1-update' into integration_2021_wk05
This commit is contained in:
@@ -102,8 +102,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
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LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb);
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LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
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// DMRS length is per OFDM symbol
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uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)?
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(n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
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uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
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uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
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LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType);
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dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
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@@ -164,62 +163,81 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
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printf("i %d mod_dci %d %d\n", i, mod_dci[i<<1], mod_dci[(i<<1)+1] );
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#endif
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/// Resource mapping
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if (cset_start_sc >= frame_parms.ofdm_symbol_size)
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cset_start_sc -= frame_parms.ofdm_symbol_size;
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/*Reorder REG list for a freq first mapping*/
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uint8_t reg_idx0 = pdcch_pdu_rel15->dci_pdu.CceIndex[d]*NR_NB_REG_PER_CCE;
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uint8_t nb_regs = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*NR_NB_REG_PER_CCE;
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// Get cce_list indices by reg_idx in ascending order
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int reg_list_index = 0;
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int reg_list_order[NR_MAX_PDCCH_AGG_LEVEL] = {};
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for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
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for(int p2 = 0; p2 < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; p2++) {
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if(gNB->cce_list[d][p2].reg_list[0].reg_idx == p * NR_NB_REG_PER_CCE) {
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reg_list_order[reg_list_index] = p2;
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reg_list_index++;
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break;
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}
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}
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}
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/*Mapping the encoded DCI along with the DMRS */
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for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) {
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k = cset_start_sc + (12*reg_idx/cset_nsymb);
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if (k >= frame_parms.ofdm_symbol_size)
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k -= frame_parms.ofdm_symbol_size;
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l = cset_start_symb + ((reg_idx/cset_nsymb)%cset_nsymb);
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// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
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if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
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dmrs_idx = (reg_idx/cset_nsymb)*3;
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else
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dmrs_idx = ((reg_idx/cset_nsymb)+rb_offset)*3;
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k_prime = 0;
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for (int m=0; m<NR_NB_SC_PER_RB; m++) {
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if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
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//if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
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((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
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((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
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for (int cce_count = 0; cce_count < pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]; cce_count ++) {
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int8_t cce_idx = reg_list_order[cce_count];
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for (int reg_in_cce_idx = 0; reg_in_cce_idx < NR_NB_REG_PER_CCE; reg_in_cce_idx++) {
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k = cset_start_sc + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].start_sc_idx;
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if (k >= frame_parms.ofdm_symbol_size)
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k -= frame_parms.ofdm_symbol_size;
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l = cset_start_symb + gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].symb_idx;
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// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
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if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
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dmrs_idx =gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx * 3;
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else
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dmrs_idx = (gNB->cce_list[d][cce_idx].reg_list[reg_in_cce_idx].reg_idx + rb_offset) * 3;
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k_prime = 0;
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for (int m = 0; m < NR_NB_SC_PER_RB; m++) {
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if (m == (k_prime << 2) + 1) { // DMRS if not already mapped
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((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] =
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(amp * mod_dmrs[l][dmrs_idx << 1]) >> 15;
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((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
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(amp * mod_dmrs[l][(dmrs_idx << 1) + 1]) >> 15;
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#ifdef DEBUG_PDCCH_DMRS
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printf("PDCCH DMRS: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
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((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
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#endif
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dmrs_idx++;
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//}
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k_prime++;
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} else { // DCI payload
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((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dci[dci_idx<<1]) >> 15;
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((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dci[(dci_idx<<1) + 1]) >> 15;
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dmrs_idx++;
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k_prime++;
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} else { // DCI payload
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((int16_t *) txdataF)[(l * frame_parms.ofdm_symbol_size + k) << 1] = (amp * mod_dci[dci_idx << 1]) >> 15;
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((int16_t *) txdataF)[((l * frame_parms.ofdm_symbol_size + k) << 1) + 1] =
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(amp * mod_dci[(dci_idx << 1) + 1]) >> 15;
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#ifdef DEBUG_DCI
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printf("PDCCH: l %d position %d => (%d,%d)\n",l,k,((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1],
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((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
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#endif
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dci_idx++;
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}
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k++;
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if (k >= frame_parms.ofdm_symbol_size)
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k -= frame_parms.ofdm_symbol_size;
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} // m
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} // reg_idx
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dci_idx++;
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}
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k++;
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if (k >= frame_parms.ofdm_symbol_size)
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k -= frame_parms.ofdm_symbol_size;
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} // m
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} // reg_in_cce_idx
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} // cce_count
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LOG_I(PHY, "DCI: payloadSize = %d | payload = %llx\n",
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*pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload);
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@@ -81,12 +81,14 @@
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void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
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uint32_t *z,
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NR_DL_FRAME_PARMS *frame_parms,
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uint8_t coreset_time_dur,
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uint32_t coreset_nbr_rb,
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uint8_t reg_bundle_size_L,
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uint8_t coreset_interleaver_size_R,
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uint8_t n_shift) {
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uint8_t n_shift,
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uint8_t number_of_candidates,
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uint16_t *CCE,
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uint8_t *L) {
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/*
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* This function will do demapping and deinterleaving from llr containing demodulated symbols
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* Demapping will regroup in REG and bundles
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@@ -122,35 +124,61 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
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| REG 0 (bundle 0) bundle 0 bundle 0
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*/
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int c=0,r=0;
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uint16_t bundle_j=0, f_bundle_j=0,f_reg=0;
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uint32_t coreset_C=0;
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int c = 0, r = 0;
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uint16_t bundle_j = 0, f_bundle_j = 0, f_reg = 0;
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uint32_t coreset_C = 0;
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uint16_t index_z, index_llr;
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int coreset_interleaved = 0;
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if (reg_bundle_size_L!=0) { // interleaving will be done only if reg_bundle_size_L != 0
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coreset_interleaved=1;
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coreset_C = (uint32_t)((coreset_nbr_rb * coreset_time_dur)/ (coreset_interleaver_size_R*reg_bundle_size_L));
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if (reg_bundle_size_L != 0) { // interleaving will be done only if reg_bundle_size_L != 0
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coreset_interleaved = 1;
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coreset_C = (uint32_t) ((coreset_nbr_rb * coreset_time_dur) / (coreset_interleaver_size_R * reg_bundle_size_L));
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} else {
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reg_bundle_size_L=6;
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reg_bundle_size_L = 6;
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}
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for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
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if ((reg%reg_bundle_size_L) == 0) {
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int f_bundle_j_list[NR_MAX_PDCCH_AGG_LEVEL] = {};
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for (int reg = 0; reg < ((coreset_nbr_rb * coreset_time_dur)); reg++) {
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if ((reg % reg_bundle_size_L) == 0) {
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if (r == coreset_interleaver_size_R) {
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r=0;
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r = 0;
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c++;
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}
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bundle_j = (c*coreset_interleaver_size_R)+r;
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f_bundle_j = ((r*coreset_C)+c+n_shift)%((coreset_nbr_rb*coreset_time_dur)/reg_bundle_size_L);
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bundle_j = (c * coreset_interleaver_size_R) + r;
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f_bundle_j = ((r * coreset_C) + c + n_shift) % ((coreset_nbr_rb * coreset_time_dur) / reg_bundle_size_L);
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if (coreset_interleaved==0) f_bundle_j=bundle_j;
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if (coreset_interleaved == 0) f_bundle_j = bundle_j;
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f_bundle_j_list[reg / 6] = f_bundle_j;
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LOG_DNL("[r=%d,c=%d] bundle_j(%d) interleaved at f_bundle_j(%d)\n",r,c,bundle_j,f_bundle_j);
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}
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if ((reg % reg_bundle_size_L) == 0) r++;
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}
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f_reg = (f_bundle_j*reg_bundle_size_L)+(reg%reg_bundle_size_L);
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// Get cce_list indices by reg_idx in ascending order
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int f_bundle_j_list_id = 0;
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int f_bundle_j_list_ord[NR_MAX_PDCCH_AGG_LEVEL] = {};
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for (int c_id = 0; c_id < number_of_candidates; c_id++ ) {
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f_bundle_j_list_id = CCE[c_id];
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for (int p = 0; p < NR_MAX_PDCCH_AGG_LEVEL; p++) {
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for (int p2 = CCE[c_id]; p2 < CCE[c_id] + L[c_id]; p2++) {
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if (f_bundle_j_list[p2] == p) {
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f_bundle_j_list_ord[f_bundle_j_list_id] = p;
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f_bundle_j_list_id++;
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break;
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}
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}
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}
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}
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for(int reg=0; reg<((coreset_nbr_rb*coreset_time_dur)); reg++) {
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f_reg = (f_bundle_j_list_ord[reg/6]*reg_bundle_size_L)+(reg%reg_bundle_size_L);
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index_z = 9*reg;
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index_llr = 9*((uint16_t)floor(f_reg/coreset_time_dur)+((f_reg%coreset_time_dur)*(coreset_nbr_rb)));
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@@ -386,14 +414,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
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rxF=NULL;
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// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
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if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
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if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
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//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
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rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
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LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
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c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
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}
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if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
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if (((c_rb + n_BWP_start) >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
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// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
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// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
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rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
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@@ -406,7 +434,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
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//#endif
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}
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if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
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if (((c_rb + n_BWP_start) < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
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//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
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rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
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#ifdef NR_PDCCH_DCI_DEBUG
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@@ -415,7 +443,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
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#endif
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}
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if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
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if (((c_rb + n_BWP_start) > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
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// number of RBs is odd and c_rb is higher than half system bandwidth + 1
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// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
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rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
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@@ -425,7 +453,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
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#endif
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}
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if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
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if (((c_rb + n_BWP_start) == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
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// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
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// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
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rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
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@@ -760,12 +788,14 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
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LOG_D(PHY,"we enter nr_pdcch_demapping_deinterleaving()\n");
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nr_pdcch_demapping_deinterleaving((uint32_t *) pdcch_vars->llr,
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(uint32_t *) pdcch_vars->e_rx,
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frame_parms,
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rel15->coreset.duration,
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n_rb,
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rel15->coreset.RegBundleSize,
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rel15->coreset.InterleaverSize,
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rel15->coreset.ShiftIndex);
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rel15->coreset.ShiftIndex,
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rel15->number_of_candidates,
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rel15->CCE,
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rel15->L);
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/*
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nr_pdcch_unscrambling(rel15->rnti,
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frame_parms,
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@@ -89,7 +89,7 @@
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#define NR_MAX_NUM_BWP 4
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#define NR_MAX_PDCCH_AGG_LEVEL 16
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#define NR_MAX_PDCCH_AGG_LEVEL 16 // 3GPP TS 38.211 V15.8 Section 7.3.2 Table 7.3.2.1-1: Supported PDCCH aggregation levels
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#define NR_MAX_CSET_DURATION 3
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#define NR_MAX_NB_RBG 18
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