addressing additional review and some wrong allocation
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@@ -512,7 +512,6 @@ void init_eNB_afterRU(void) {
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gNB = RC.gNB[inst];
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phy_init_nr_gNB(gNB,0,0);
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init_codebook_gNB(gNB);
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// map antennas and PRACH signals to gNB RX
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if (0) AssertFatal(gNB->num_RU>0,"Number of RU attached to gNB %d is zero\n",gNB->Mod_id);
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+23
-11
@@ -144,8 +144,8 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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//Table 5.2.2.2.1-5:
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//Codebook for 1-layer CSI reporting using antenna ports 3000 to 2999+PCSI-RS
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int pmiq_size = N1*O1*N2*O2*4+1;
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mat[0] = (int32_t **)malloc16(pmiq_size*sizeof(int32_t *));
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gNB->pmiq_size[0] = N1*O1*N2*O2*4+1;
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mat[0] = (int32_t **)malloc16(gNB->pmiq_size[0]*sizeof(int32_t *));
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//pmi=0 corresponds to unit matrix
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mat[0][0] = (int32_t *)calloc(2*N1*N2,sizeof(int32_t));
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@@ -202,19 +202,19 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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//Compute the code book size for generating 2 layers out of Tx antenna ports
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//pmi_size is computed as follows
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pmiq_size = 1;//1 for unity matrix
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gNB->pmiq_size[1] = 1;//1 for unity matrix
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for(int llb=0; llb<N1*O1; llb++) { //i_1_1
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for (int mmb=0; mmb<N2*O2; mmb++) { //i_1_2
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for(int ll=0; ll<N1*O1; ll++) { //i_1_1
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for (int mm=0; mm<N2*O2; mm++) { //i_1_2
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for (int nn=0; nn<2; nn++) {
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if((llb != ll) || (mmb != mm) || ((N1 == 1) && (N2 == 1))) pmiq_size += 1;
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if((llb != ll) || (mmb != mm) || ((N1 == 1) && (N2 == 1))) gNB->pmiq_size[1] += 1;
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}
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}
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}
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}
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}
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mat[1] = (int32_t **)malloc16(pmiq_size*sizeof(int32_t *));
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mat[1] = (int32_t **)malloc16(gNB->pmiq_size[1]*sizeof(int32_t *));
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//pmi=0 corresponds to unit matrix
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mat[1][0] = (int32_t *)calloc((2*N1*N2)*(2),sizeof(int32_t));
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@@ -287,19 +287,19 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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if(max_mimo_layers>=3) {
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//pmi_size is computed as follows
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pmiq_size = 1;//unity matrix
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gNB->pmiq_size[2] = 1;//unity matrix
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for(int llb=0; llb<N1*O1; llb++) { //i_1_1
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for (int mmb=0; mmb<N2*O2; mmb++) { //i_1_2
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for(int ll=0; ll<N1*O1; ll++) { //i_1_1
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for (int mm=0; mm<N2*O2; mm++) { //i_1_2
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for (int nn=0; nn<2; nn++) {
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if((llb != ll) || (mmb != mm)) pmiq_size += 1;
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if((llb != ll) || (mmb != mm)) gNB->pmiq_size[2] += 1;
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}
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}
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}
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}
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}
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mat[2] = (int32_t **)malloc16(pmiq_size*sizeof(int32_t *));
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mat[2] = (int32_t **)malloc16(gNB->pmiq_size[2]*sizeof(int32_t *));
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//pmi=0 corresponds to unit matrix
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mat[2][0] = (int32_t *)calloc((2*N1*N2)*(3),sizeof(int32_t));
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for(int j_col=0; j_col<3; j_col++) { //3 layers
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@@ -376,20 +376,20 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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//Codebook for 4-layer CSI reporting using antenna ports 3000 to 2999+PCSI-RS
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if(max_mimo_layers>=4) {
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//pmi_size is computed as follows
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pmiq_size = 1;//unity matrix
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gNB->pmiq_size[3] = 1;//unity matrix
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for(int llb=0; llb<N1*O1; llb++) { //i_1_1
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for (int mmb=0; mmb<N2*O2; mmb++) { //i_1_2
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for(int ll=0; ll<N1*O1; ll++) { //i_1_1
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for (int mm=0; mm<N2*O2; mm++) { //i_1_2
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for (int nn=0; nn<2; nn++) {
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if((llb != ll) || (mmb != mm)) pmiq_size += 1;
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if((llb != ll) || (mmb != mm)) gNB->pmiq_size[3] += 1;
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}
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}
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}
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}
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}
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mat[3] = (int32_t **)malloc16(pmiq_size*sizeof(int32_t *));
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mat[3] = (int32_t **)malloc16(gNB->pmiq_size[3]*sizeof(int32_t *));
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//pmi=0 corresponds to unit matrix
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mat[3][0] = (int32_t *)calloc((2*N1*N2)*(4),sizeof(int32_t));
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for(int j_col=0; j_col<4; j_col++) { //4 layers
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@@ -509,6 +509,9 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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init_scrambling_luts();
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init_pucch2_luts();
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load_nrLDPClib(NULL);
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init_codebook_gNB(gNB);
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// PBCH DMRS gold sequences generation
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nr_init_pbch_dmrs(gNB);
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//PDCCH DMRS init
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@@ -706,6 +709,15 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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const int max_ul_mimo_layers = 4; // taken from phy_init_nr_gNB()
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const int n_buf = Prx * max_ul_mimo_layers;
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int max_dl_mimo_layers =(fp->nb_antennas_tx<NR_MAX_NB_LAYERS) ? fp->nb_antennas_tx : NR_MAX_NB_LAYERS;
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for (int nl = 0; nl < max_dl_mimo_layers; nl++) {
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for(int size = 0; size < gNB->pmiq_size[nl]; size++) {
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free_and_zero(gNB->nr_mimo_precoding_matrix[nl][size]);
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}
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free_and_zero(gNB->nr_mimo_precoding_matrix[nl]);
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}
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free_and_zero(gNB->nr_mimo_precoding_matrix);
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uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++)
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@@ -59,7 +59,6 @@ void phy_init_nr_ue_PDSCH(NR_UE_PDSCH *const pdsch,
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const NR_DL_FRAME_PARMS *const fp) {
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AssertFatal( pdsch, "pdsch==0" );
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//pdsch->layer_llr[0] = (int16_t *)malloc16_clear( (8*(3*8*6144))*sizeof(int16_t) );
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pdsch->llr128 = (int16_t **)malloc16_clear( sizeof(int16_t *) );
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// FIXME! no further allocation for (int16_t*)pdsch->llr128 !!! expect SIGSEGV
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// FK, 11-3-2015: this is only as a temporary pointer, no memory is stored there
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@@ -130,8 +129,10 @@ void phy_term_nr_ue__PDSCH(NR_UE_PDSCH* pdsch, const NR_DL_FRAME_PARMS *const fp
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free_and_zero(pdsch->rho[i]);
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}
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free_and_zero(pdsch->pmi_ext);
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free_and_zero(pdsch->llr[0]);
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free_and_zero(pdsch->layer_llr[0]);
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for (int i=0; i<NR_MAX_NB_CODEWORDS; i++)
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free_and_zero(pdsch->llr[i]);
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for (int i=0; i<NR_MAX_NB_LAYERS; i++)
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free_and_zero(pdsch->layer_llr[i]);
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free_and_zero(pdsch->llr128);
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free_and_zero(pdsch->rxdataF_ext);
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free_and_zero(pdsch->rxdataF_uespec_pilots);
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@@ -426,13 +427,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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pbch_vars[gNB_id]->decoded_output = (uint8_t *)malloc16_clear(64);
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}
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// initialization for the last instance of pdsch_vars (used for MU-MIMO)
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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ue->pdsch_vars[th_id][gNB_id] = malloc16_clear(sizeof(NR_UE_PDSCH));
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ue->pdsch_vars[th_id][gNB_id]->llr[1] = malloc16_clear((8*(3*8*8448))*sizeof(int16_t));
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ue->pdsch_vars[th_id][gNB_id]->layer_llr[1] = malloc16_clear((8*(3*8*8448))*sizeof(int16_t));
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}
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ue->sinr_CQI_dB = (double *) malloc16_clear( fp->N_RB_DL*12*sizeof(double) );
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ue->init_averaging = 1;
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@@ -517,8 +511,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr_shifts);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr[1]);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->layer_llr[1]);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr128_2ndstream);
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phy_term_nr_ue__PDSCH(ue->pdsch_vars[th_id][gNB_id], fp);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]);
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@@ -594,13 +586,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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free_and_zero(ue->prach_vars[gNB_id]);
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}
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const int gNB_id = ue->n_connected_gNB;
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for (int th_id = 0; th_id < RX_NB_TH_MAX; th_id++) {
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->llr[1]);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]->layer_llr[1]);
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free_and_zero(ue->pdsch_vars[th_id][gNB_id]);
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}
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free_and_zero(ue->sinr_CQI_dB);
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}
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@@ -807,6 +807,7 @@ typedef struct PHY_VARS_gNB_s {
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/// second dimension: PMI [0,...,CodeSize-1[
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/// third dimension: [i_rows*noOfLayers+j_col], i_rows=0,...pdsch_AntennaPorts-1 and j_col=0,...,noOfLayers-1
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int32_t ***nr_mimo_precoding_matrix;
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int pmiq_size[NR_MAX_NB_LAYERS];
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/// PUSCH DMRS
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uint32_t ****nr_gold_pusch_dmrs;
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@@ -785,9 +785,9 @@ int main(int argc, char **argv)
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prepare_scd(scd);
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rrc_pdsch_AntennaPorts_t pdsch_AntennaPorts;
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pdsch_AntennaPorts.N1 = n_tx;
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pdsch_AntennaPorts.N1 = n_tx>1 ? n_tx>>1 : 1;
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pdsch_AntennaPorts.N2 = 1;
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pdsch_AntennaPorts.XP = 1;
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pdsch_AntennaPorts.XP = n_tx>1 ? 2 : 1;
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gNB->ap_N1 = pdsch_AntennaPorts.N1;
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gNB->ap_N2 = pdsch_AntennaPorts.N2;
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gNB->ap_XP = pdsch_AntennaPorts.XP;
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@@ -819,7 +819,6 @@ int main(int argc, char **argv)
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// rrc_mac_config_req_gNB
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gNB_mac->pre_processor_dl = nr_dlsim_preprocessor;
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phy_init_nr_gNB(gNB,0,1);
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init_codebook_gNB(gNB);
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N_RB_DL = gNB->frame_parms.N_RB_DL;
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NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info;
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UE_info->num_UEs=1;
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@@ -146,9 +146,9 @@ typedef enum {
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{GNB_CONFIG_STRING_LOCAL_S_PORTD, NULL, 0, uptr:NULL, defuintval:50001, TYPE_UINT, 0}, \
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{GNB_CONFIG_STRING_REMOTE_S_PORTD, NULL, 0, uptr:NULL, defuintval:50001, TYPE_UINT, 0}, \
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{GNB_CONFIG_STRING_SSBSUBCARRIEROFFSET, NULL, 0, iptr:NULL, defintval:31, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N1, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N2, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_XP, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N1, "horiz. log. antenna ports", 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_N2, "vert. log. antenna ports", 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PDSCHANTENNAPORTS_XP, "XP log. antenna ports", 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_PUSCHANTENNAPORTS, NULL, 0, iptr:NULL, defintval:1, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_SIB1TDA, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
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{GNB_CONFIG_STRING_DOCSIRS, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
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