updates to UL (DFTs for 10/20 MHz), Ndi toggling, DCI structures
git-svn-id: http://svn.eurecom.fr/openair4G/trunk@4600 818b1a75-f10b-46b9-bf7c-635c3b92a50f
This commit is contained in:
@@ -185,8 +185,9 @@ void sub_block_deinterleaving_turbo(uint32_t D,int16_t *d,int16_t *w) {
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k++;k2++;k2++;
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}
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}
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if (ND>0)
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d[2] = LTE_NULL;//d[(3*D)+2];
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// if (ND>0)
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// d[2] = LTE_NULL;//d[(3*D)+2];
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}
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@@ -476,19 +477,19 @@ uint32_t lte_rate_matching_turbo(uint32_t RTC,
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k=0;
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for (;(ind<Ncb)&&(k<E);ind++) {
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e2[k]=w[ind];
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// e2[k]=w[ind];
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#ifdef RM_DEBUG_TX
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printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
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#endif
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if (w[ind] != LTE_NULL) k++;
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if (w[ind] != LTE_NULL) e2[k++]=w[ind];
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}
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while(k<E) {
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for (ind=0;(ind<Ncb)&&(k<E);ind++) {
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e2[k] = w[ind];
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// e2[k] = w[ind];
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#ifdef RM_DEBUG_TX
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printf("RM_TX k%d Ind: %d (%d)\n",k,ind,w[ind]);
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#endif
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if (w[ind] != LTE_NULL) k++;
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if (w[ind] != LTE_NULL) e2[k++]=w[ind];
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}
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}
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/*
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@@ -1963,7 +1963,7 @@ u8 get_num_pdcch_symbols(u8 num_dci,
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// compute numCCE
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for (i=0;i<num_dci;i++) {
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// printf("dci %d => %d\n",i,dci_alloc[i].L);
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// printf("dci %d => %d\n",i,dci_alloc[i].L);
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numCCE += (1<<(dci_alloc[i].L));
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}
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@@ -2017,11 +2017,6 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
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mod_sym_t *y[2];
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mod_sym_t *wbar[2];
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#ifdef IFFT_FPGA
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u8 qpsk_table_offset = 0;
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u8 qpsk_table_offset2 = 0;
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#endif
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int nushiftmod3 = frame_parms->nushift%3;
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int Msymb2;
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@@ -2129,7 +2124,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
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e_ptr = e;
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if (frame_parms->mode1_flag) { //SISO
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#ifndef IFFT_FPGA
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for (i=0;i<Msymb2;i++) {
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//((s16*)(&(y[0][i])))[0] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
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//((s16*)(&(y[1][i])))[0] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
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@@ -2144,25 +2139,10 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
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e_ptr++;
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}
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#else
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for (i=0;i<Msymb2;i++) {
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qpsk_table_offset = MOD_TABLE_QPSK_OFFSET;
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if (*e_ptr == 1)
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qpsk_table_offset+=2;
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e_ptr++;
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if (*e_ptr == 1)
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qpsk_table_offset+=1;
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e_ptr++;
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y[0][i] = (mod_sym_t) qpsk_table_offset;
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y[1][i] = (mod_sym_t) qpsk_table_offset;
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}
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#endif
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}
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else { //ALAMOUTI
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#ifndef IFFT_FPGA
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for (i=0;i<Msymb2;i+=2) {
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#ifdef DEBUG_DCI_ENCODING
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@@ -2187,49 +2167,6 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
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((s16*)&y[1][i+1])[1] = -((s16*)&y[0][i])[1];
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}
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#else
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for (i=0;i<Msymb2;i+=2) {
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#ifdef DEBUG_DCI_ENCODING
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LOG_I(PHY," PDCCH Modulation: Symbol %d : REG %d/%d\n",i,i>>2,Msymb2>>2);
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#endif
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qpsk_table_offset = MOD_TABLE_QPSK_OFFSET; //x0
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qpsk_table_offset2 = MOD_TABLE_QPSK_OFFSET; //x0*
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if (*e_ptr == 1) { //real
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qpsk_table_offset+=2;
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qpsk_table_offset2+=2;
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}
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e_ptr++;
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if (*e_ptr == 1) //imag
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qpsk_table_offset+=1;
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else
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qpsk_table_offset2+=1;
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e_ptr++;
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y[0][i] = (mod_sym_t) qpsk_table_offset; // x0
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y[1][i+1] = (mod_sym_t) qpsk_table_offset2; // x0*
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qpsk_table_offset = MOD_TABLE_QPSK_OFFSET; //-x1*
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qpsk_table_offset2 = MOD_TABLE_QPSK_OFFSET; //x1
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if (*e_ptr == 1) // flipping bit for real part of symbol means taking -x1*
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qpsk_table_offset2+=2;
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else
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qpsk_table_offset+=2;
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e_ptr++;
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if (*e_ptr == 1) {
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qpsk_table_offset+=1;
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qpsk_table_offset2+=1;
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}
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e_ptr++;
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y[1][i] = (mod_sym_t) qpsk_table_offset; // -x1*
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y[0][i+1] = (mod_sym_t) qpsk_table_offset2; // x1
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}
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#endif
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}
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@@ -2243,23 +2180,14 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
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mprime=0;
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nsymb = (frame_parms->Ncp==0) ? 14:12;
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#ifdef IFFT_FPGA
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re_offset = frame_parms->N_RB_DL*12/2;
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#else
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re_offset = frame_parms->first_carrier_offset;
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#endif
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// This is the REG allocation algorithm from 36-211, second part of Section 6.8.5
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// printf("DCI : txdataF %p (0 %p)\n",&txdataF[0][512*14*subframe],&txdataF[0][0]);
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// printf("DCI (SF %d) : txdataF %p (0 %p)\n",subframe,&txdataF[0][512*14*subframe],&txdataF[0][0]);
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for (kprime=0;kprime<frame_parms->N_RB_DL*12;kprime++) {
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for (lprime=0;lprime<num_pdcch_symbols;lprime++) {
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#ifdef IFFT_FPGA
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symbol_offset = (u32)frame_parms->N_RB_DL*12*(lprime+(subframe*nsymb));
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#else
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symbol_offset = (u32)frame_parms->ofdm_symbol_size*(lprime+(subframe*nsymb));
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#endif
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@@ -2353,14 +2281,8 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
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} //lprime loop
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re_offset++;
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#ifdef IFFT_FPGA
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if (re_offset == (frame_parms->N_RB_DL*12))
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re_offset = 0;
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#else
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if (re_offset == (frame_parms->ofdm_symbol_size))
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re_offset = 1;
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#endif
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} // kprime loop
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return(num_pdcch_symbols);
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}
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@@ -100,9 +100,7 @@ typedef struct DCI0_1_5MHz_TDD_1_6 DCI0_1_5MHz_TDD_1_6_t;
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/// DCI Format Type 1A (1.5 MHz, TDD, frame 1-6, 24 bits)
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struct DCI1A_1_5MHz_TDD_1_6 {
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/// padding
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uint32_t padding:8;
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/// SRS request bit
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uint32_t srs_req:1;
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uint32_t padding:9;
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/// Downlink Assignment Index
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uint32_t dai:2;
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/// Power Control
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@@ -212,9 +210,7 @@ typedef struct DCI0_10MHz_TDD_1_6 DCI0_10MHz_TDD_1_6_t;
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/// DCI Format Type 1A (10 MHz, TDD, frame 1-6, 30 bits)
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struct DCI1A_10MHz_TDD_1_6 {
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/// padding
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uint32_t padding:2;
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/// SRS request bit
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uint32_t srs_req:1;
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uint32_t padding:3;
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/// Downlink Assignment Index
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uint32_t dai:2;
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/// Power Control
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@@ -243,7 +239,7 @@ typedef struct DCI1A_10MHz_TDD_1_6 DCI1A_10MHz_TDD_1_6_t;
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struct DCI0_20MHz_TDD_1_6 {
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/// Padding
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uint32_t padding:2;
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/// CQI Request
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/// CQI request
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uint32_t cqi_req:1;
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/// DAI
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uint32_t dai:2;
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@@ -268,8 +264,7 @@ typedef struct DCI0_20MHz_TDD_1_6 DCI0_20MHz_TDD_1_6_t;
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/// DCI Format Type 1A (20 MHz, TDD, frame 1-6, 27 bits)
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struct DCI1A_20MHz_TDD_1_6 {
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/// SRS request bit
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uint32_t srs_req:1;
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uint32_t padding:1;
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/// Downlink Assignment Index
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uint32_t dai:2;
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/// Power Control
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@@ -321,9 +316,7 @@ typedef struct DCI0_1_5MHz_FDD DCI0_1_5MHz_FDD_t;
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struct DCI1A_1_5MHz_FDD {
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/// padding
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uint32_t padding:11;
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/// Downlink Assignment Index
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uint32_t srs_req:1;
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uint32_t padding:12;
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/// Power Control
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uint32_t TPC:2;
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/// Redundancy version
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@@ -374,9 +367,7 @@ typedef struct DCI0_5MHz_FDD DCI0_5MHz_FDD_t;
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struct DCI1A_5MHz_FDD {
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/// padding
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uint32_t padding:7;
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/// Downlink Assignment Index
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uint32_t srs_req:1;
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uint32_t padding:8;
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/// Power Control
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uint32_t TPC:2;
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/// Redundancy version
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@@ -428,9 +419,7 @@ typedef struct DCI0_10MHz_FDD DCI0_10MHz_FDD_t;
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struct DCI1A_10MHz_FDD {
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/// padding
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uint32_t padding:5;
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/// Downlink Assignment Index
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uint32_t srs_req:1;
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uint32_t padding:6;
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/// Power Control
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uint32_t TPC:2;
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/// Redundancy version
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@@ -480,9 +469,7 @@ typedef struct DCI0_20MHz_FDD DCI0_20MHz_FDD_t;
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struct DCI1A_20MHz_FDD {
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/// padding
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uint32_t padding:3;
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/// Downlink Assignment Index
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uint32_t srs_req:1;
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uint32_t padding:4;
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/// Power Control
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uint32_t TPC:2;
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/// Redundancy version
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File diff suppressed because it is too large
Load Diff
@@ -88,8 +88,6 @@ typedef enum {
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typedef struct {
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/// Flag indicating that this DLSCH is active (i.e. not the first round)
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uint8_t Ndi;
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/// Status Flag indicating for this DLSCH (idle,active,disabled)
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SCH_status_t status;
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/// Transport block size
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@@ -131,8 +129,12 @@ typedef struct {
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} LTE_DL_eNB_HARQ_t;
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typedef struct {
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/// Indicator of first transmission
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uint8_t first_tx;
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/// Last Ndi received for this process on DCI (used for C-RNTI only)
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uint8_t DCINdi;
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/// Flag indicating that this ULSCH has a new packet (start of new round)
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uint8_t Ndi;
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// uint8_t Ndi;
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/// Status Flag indicating for this ULSCH (idle,active,disabled)
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SCH_status_t status;
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/// Subframe scheduling indicator (i.e. Transmission opportunity indicator)
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@@ -325,8 +327,6 @@ typedef struct {
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uint8_t dci_alloc;
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/// Flag indicating that this ULSCH has been allocated by a RAR (otherwise it is a retransmission based on PHICH NAK or DCI)
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uint8_t rar_alloc;
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/// Flag indicating that this ULSCH has new data
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uint8_t Ndi;
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/// Status Flag indicating for this ULSCH (idle,active,disabled)
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SCH_status_t status;
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/// Subframe scheduling indicator (i.e. Transmission opportunity indicator)
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@@ -463,8 +463,10 @@ typedef struct {
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} LTE_eNB_ULSCH_t;
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typedef struct {
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/// Flag indicating that this DLSCH has a new transport block
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uint8_t Ndi;
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/// Indicator of first transmission
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uint8_t first_tx;
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/// Last Ndi received for this process on DCI (used for C-RNTI only)
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uint8_t DCINdi;
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/// DLSCH status flag indicating
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SCH_status_t status;
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/// Transport block size
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@@ -141,6 +141,7 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,unsigne
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MAX_DLSCH_PAYLOAD_BYTES/bw_scaling,bw_scaling, i,dlsch->harq_processes[i]);
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if (dlsch->harq_processes[i]) {
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bzero(dlsch->harq_processes[i],sizeof(LTE_DL_eNB_HARQ_t));
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// dlsch->harq_processes[i]->first_tx=1;
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dlsch->harq_processes[i]->b = (unsigned char*)malloc16(MAX_DLSCH_PAYLOAD_BYTES/bw_scaling);
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if (dlsch->harq_processes[i]->b) {
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bzero(dlsch->harq_processes[i]->b,MAX_DLSCH_PAYLOAD_BYTES/bw_scaling);
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@@ -202,7 +203,7 @@ void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch, u8 abstraction_flag) {
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for (i=0;i<Mdlharq;i++) {
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if (dlsch->harq_processes[i]) {
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dlsch->harq_processes[i]->Ndi = 0;
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// dlsch->harq_processes[i]->Ndi = 0;
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dlsch->harq_processes[i]->status = 0;
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dlsch->harq_processes[i]->round = 0;
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if (abstraction_flag==0) {
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@@ -245,7 +246,8 @@ int dlsch_encoding(unsigned char *a,
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G = get_G(frame_parms,nb_rb,dlsch->rb_alloc,mod_order,num_pdcch_symbols,frame,subframe);
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if (dlsch->harq_processes[harq_pid]->Ndi == 1) { // this is a new packet
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// if (dlsch->harq_processes[harq_pid]->Ndi == 1) { // this is a new packet
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if (dlsch->harq_processes[harq_pid]->round == 0) { // this is a new packet
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/*
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int i;
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@@ -382,7 +384,8 @@ void dlsch_encoding_emul(PHY_VARS_eNB *phy_vars_eNB,
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unsigned char harq_pid = dlsch->current_harq_pid;
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unsigned short i;
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if (dlsch->harq_processes[harq_pid]->Ndi == 1) {
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// if (dlsch->harq_processes[harq_pid]->Ndi == 1) {
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if (dlsch->harq_processes[harq_pid]->round == 0) {
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memcpy(dlsch->harq_processes[harq_pid]->b,
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DLSCH_pdu,
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dlsch->harq_processes[harq_pid]->TBS>>3);
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@@ -111,6 +111,7 @@ LTE_UE_DLSCH_t *new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint8_t max_turbo_ite
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dlsch->harq_processes[i] = (LTE_DL_UE_HARQ_t *)malloc16(sizeof(LTE_DL_UE_HARQ_t));
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if (dlsch->harq_processes[i]) {
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memset(dlsch->harq_processes[i],0,sizeof(LTE_DL_UE_HARQ_t));
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dlsch->harq_processes[i]->first_tx=1;
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dlsch->harq_processes[i]->b = (uint8_t*)malloc16(MAX_DLSCH_PAYLOAD_BYTES/bw_scaling);
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if (dlsch->harq_processes[i]->b)
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memset(dlsch->harq_processes[i]->b,0,MAX_DLSCH_PAYLOAD_BYTES/bw_scaling);
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@@ -235,7 +236,7 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
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// msg("DLSCH Decoding, harq_pid %d Ndi %d\n",harq_pid,harq_process->Ndi);
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if (harq_process->Ndi == 1) {
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if (harq_process->round == 0) {
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// This is a new packet, so compute quantities regarding segmentation
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harq_process->B = A+24;
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lte_segmentation(NULL,
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@@ -309,7 +310,7 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
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dlsch->Mdlharq,
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dlsch->Kmimo,
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harq_process->rvidx,
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harq_process->Ndi,
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(harq_process->round==0)?1:0,
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get_Qm(harq_process->mcs),
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harq_process->Nl,
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r,
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@@ -718,7 +719,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
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dlsch_ue->harq_ack[subframe].ack = 1;
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dlsch_ue->harq_ack[subframe].harq_id = harq_pid;
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dlsch_ue->harq_ack[subframe].send_harq_status = 1;
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if (dlsch_ue->harq_processes[harq_pid]->Ndi == 1)
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if (dlsch_ue->harq_processes[harq_pid]->round == 0)
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memcpy(dlsch_ue->harq_processes[harq_pid]->b,
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dlsch_eNB->harq_processes[harq_pid]->b,
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dlsch_ue->harq_processes[harq_pid]->TBS>>3);
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@@ -746,7 +747,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
|
||||
dlsch_ue->harq_ack[subframe].ack = 1;
|
||||
dlsch_ue->harq_ack[subframe].harq_id = harq_pid;
|
||||
dlsch_ue->harq_ack[subframe].send_harq_status = 1;
|
||||
if (dlsch_ue->harq_processes[harq_pid]->Ndi == 1)
|
||||
if (dlsch_ue->harq_processes[harq_pid]->round == 0)
|
||||
memcpy(dlsch_eNB->harq_processes[harq_pid]->b,dlsch_ue->harq_processes[harq_pid]->b,dlsch_ue->harq_processes[harq_pid]->TBS>>3);
|
||||
break;
|
||||
default:
|
||||
|
||||
@@ -1258,7 +1258,7 @@ void rx_phich(PHY_VARS_UE *phy_vars_ue,
|
||||
&phy_vars_ue->ulsch_ue_Msg3_frame[eNB_id],
|
||||
&phy_vars_ue->ulsch_ue_Msg3_subframe[eNB_id]);
|
||||
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
|
||||
ulsch->harq_processes[harq_pid]->Ndi = 0;
|
||||
// ulsch->harq_processes[harq_pid]->Ndi = 0;
|
||||
ulsch->harq_processes[harq_pid]->round++;
|
||||
ulsch->harq_processes[harq_pid]->rvidx = rv_table[ulsch->harq_processes[harq_pid]->round&3];
|
||||
if (ulsch->harq_processes[harq_pid]->round>=phy_vars_ue->lte_frame_parms.maxHARQ_Msg3Tx) {
|
||||
@@ -1279,7 +1279,7 @@ void rx_phich(PHY_VARS_UE *phy_vars_ue,
|
||||
ngroup_PHICH);
|
||||
//#endif
|
||||
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
|
||||
ulsch->harq_processes[harq_pid]->Ndi = 0;
|
||||
// ulsch->harq_processes[harq_pid]->Ndi = 0;
|
||||
ulsch->harq_processes[harq_pid]->round++;
|
||||
ulsch->harq_processes[harq_pid]->rvidx = rv_table[ulsch->harq_processes[harq_pid]->round&3];
|
||||
}
|
||||
@@ -1400,7 +1400,7 @@ void generate_phich_top(PHY_VARS_eNB *phy_vars_eNB,
|
||||
LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d, subframe %d : PHICH ACK / (no format0 DCI) Setting subframe_scheduling_flag\n",
|
||||
phy_vars_eNB->Mod_id,harq_pid,phy_vars_eNB->frame,subframe);
|
||||
ulsch_eNB[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
|
||||
ulsch_eNB[UE_id]->harq_processes[harq_pid]->Ndi = 0;
|
||||
// ulsch_eNB[UE_id]->harq_processes[harq_pid]->Ndi = 0;
|
||||
// ulsch_eNB[UE_id]->harq_processes[harq_pid]->round++; //this is already done in phy_procedures
|
||||
ulsch_eNB[UE_id]->harq_processes[harq_pid]->rvidx = rv_table[ulsch_eNB[UE_id]->harq_processes[harq_pid]->round&3];
|
||||
}
|
||||
|
||||
@@ -62,13 +62,8 @@ void generate_pilots(PHY_VARS_eNB *phy_vars_eNB,
|
||||
|
||||
|
||||
|
||||
#ifdef IFFT_FPGA
|
||||
tti_offset = tti*frame_parms->N_RB_DL*12*Nsymb;
|
||||
samples_per_symbol = frame_parms->N_RB_DL*12;
|
||||
#else
|
||||
tti_offset = tti*frame_parms->ofdm_symbol_size*Nsymb;
|
||||
samples_per_symbol = frame_parms->ofdm_symbol_size;
|
||||
#endif
|
||||
slot_offset = (tti*2)%20;
|
||||
|
||||
// printf("tti %d : offset %d (slot %d)\n",tti,tti_offset,slot_offset);
|
||||
@@ -191,13 +186,8 @@ int generate_pilots_slot(PHY_VARS_eNB *phy_vars_eNB,
|
||||
second_pilot = (frame_parms->Ncp==0)?4:3;
|
||||
|
||||
|
||||
#ifdef IFFT_FPGA
|
||||
slot_offset = slot*frame_parms->N_RB_DL*12*Nsymb;
|
||||
samples_per_symbol = frame_parms->N_RB_DL*12;
|
||||
#else
|
||||
slot_offset = slot*frame_parms->ofdm_symbol_size*Nsymb;
|
||||
samples_per_symbol = frame_parms->ofdm_symbol_size;
|
||||
#endif
|
||||
|
||||
// printf("tti %d : offset %d (slot %d)\n",tti,tti_offset,slot_offset);
|
||||
//Generate Pilots
|
||||
|
||||
@@ -149,7 +149,7 @@ void fill_eNB_dlsch_MCH(PHY_VARS_eNB *phy_vars_eNB,int mcs,int ndi,int rvidx) {
|
||||
LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_eNB->lte_frame_parms;
|
||||
|
||||
dlsch->harq_processes[0]->mcs = mcs;
|
||||
dlsch->harq_processes[0]->Ndi = ndi;
|
||||
// dlsch->harq_processes[0]->Ndi = ndi;
|
||||
dlsch->harq_processes[0]->rvidx = rvidx;
|
||||
dlsch->harq_processes[0]->Nl = 1;
|
||||
dlsch->harq_processes[0]->TBS = TBStable[get_I_TBS(dlsch->harq_processes[0]->mcs)][frame_parms->N_RB_DL-1];
|
||||
@@ -183,7 +183,7 @@ void fill_UE_dlsch_MCH(PHY_VARS_UE *phy_vars_ue,int mcs,int ndi,int rvidx,int eN
|
||||
|
||||
dlsch->harq_processes[0]->mcs = mcs;
|
||||
dlsch->harq_processes[0]->rvidx = rvidx;
|
||||
dlsch->harq_processes[0]->Ndi = ndi;
|
||||
// dlsch->harq_processes[0]->Ndi = ndi;
|
||||
dlsch->harq_processes[0]->Nl = 1;
|
||||
dlsch->harq_processes[0]->TBS = TBStable[get_I_TBS(dlsch->harq_processes[0]->mcs)][frame_parms->N_RB_DL-1];
|
||||
dlsch->current_harq_pid = 0;
|
||||
|
||||
@@ -111,7 +111,7 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
||||
ulsch->harq_processes[harq_pid]->rar_alloc = 1;
|
||||
ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT[rballoc];
|
||||
ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc];
|
||||
ulsch->harq_processes[harq_pid]->Ndi = 1;
|
||||
// ulsch->harq_processes[harq_pid]->Ndi = 1;
|
||||
|
||||
cqireq = rar[3]&1;
|
||||
if (cqireq==1){
|
||||
@@ -133,7 +133,7 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
||||
|
||||
ulsch->Nsymb_pusch = 12-(frame_parms->Ncp<<1);
|
||||
ulsch->rnti = (((uint16_t)rar[4])<<8)+rar[5];
|
||||
if (ulsch->harq_processes[harq_pid]->Ndi == 1) {
|
||||
if (ulsch->harq_processes[harq_pid]->round == 0) {
|
||||
ulsch->harq_processes[harq_pid]->status = ACTIVE;
|
||||
ulsch->harq_processes[harq_pid]->rvidx = 0;
|
||||
ulsch->harq_processes[harq_pid]->mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
|
||||
@@ -152,7 +152,7 @@ int generate_eNB_ulsch_params_from_rar(unsigned char *rar_pdu,
|
||||
msg("ulsch ra (eNB): NBRB %d\n",ulsch->harq_processes[harq_pid]->nb_rb);
|
||||
msg("ulsch ra (eNB): rballoc %x\n",ulsch->harq_processes[harq_pid]->first_rb);
|
||||
msg("ulsch ra (eNB): harq_pid %d\n",harq_pid);
|
||||
msg("ulsch ra (eNB): Ndi %d\n",ulsch->harq_processes[harq_pid]->Ndi);
|
||||
msg("ulsch ra (eNB): round %d\n",ulsch->harq_processes[harq_pid]->round);
|
||||
msg("ulsch ra (eNB): TBS %d\n",ulsch->harq_processes[harq_pid]->TBS);
|
||||
msg("ulsch ra (eNB): mcs %d\n",ulsch->harq_processes[harq_pid]->mcs);
|
||||
msg("ulsch ra (eNB): Or1 %d\n",ulsch->Or1);
|
||||
@@ -176,14 +176,14 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *phy_vars_ue,
|
||||
// int current_dlsch_cqi = phy_vars_ue->current_dlsch_cqi[eNB_id];
|
||||
|
||||
uint8_t *rar = (uint8_t *)(rar_pdu+1);
|
||||
uint8_t harq_pid = subframe2harq_pid(frame_parms,phy_vars_ue->frame,subframe);
|
||||
uint8_t harq_pid = subframe2harq_pid(frame_parms,((subframe==0)?1:0) + phy_vars_ue->frame,subframe);
|
||||
uint16_t rballoc;
|
||||
uint8_t cqireq;
|
||||
double sinr_eff;
|
||||
uint16_t *RIV2nb_rb_LUT, *RIV2first_rb_LUT;
|
||||
uint16_t RIV_max;
|
||||
|
||||
LOG_D(PHY,"[eNB][RAPROC] generate_ue_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",subframe,harq_pid);
|
||||
LOG_D(PHY,"[eNB][RAPROC] Frame %d: generate_ue_ulsch_params_from_rar: subframe %d (harq_pid %d)\n",phy_vars_ue->frame,subframe,harq_pid);
|
||||
|
||||
switch (frame_parms->N_RB_DL) {
|
||||
case 6:
|
||||
@@ -232,8 +232,8 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *phy_vars_ue,
|
||||
return(-1);
|
||||
}
|
||||
|
||||
ulsch->harq_processes[harq_pid]->Ndi = 1;
|
||||
if (ulsch->harq_processes[harq_pid]->Ndi == 1)
|
||||
// ulsch->harq_processes[harq_pid]->Ndi = 1;
|
||||
if (ulsch->harq_processes[harq_pid]->round == 0)
|
||||
ulsch->harq_processes[harq_pid]->status = ACTIVE;
|
||||
|
||||
if (cqireq==1) {
|
||||
@@ -275,7 +275,7 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *phy_vars_ue,
|
||||
ulsch->Nsymb_pusch = 12-(frame_parms->Ncp<<1);
|
||||
ulsch->rnti = (((uint16_t)rar[4])<<8)+rar[5]; //rar->t_crnti;
|
||||
|
||||
if (ulsch->harq_processes[harq_pid]->Ndi == 1) {
|
||||
if (ulsch->harq_processes[harq_pid]->round == 0) {
|
||||
ulsch->harq_processes[harq_pid]->status = ACTIVE;
|
||||
ulsch->harq_processes[harq_pid]->rvidx = 0;
|
||||
ulsch->harq_processes[harq_pid]->mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
|
||||
@@ -300,10 +300,11 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *phy_vars_ue,
|
||||
|
||||
|
||||
//#ifdef DEBUG_RAR
|
||||
msg("ulsch ra (UE): harq_pid %d\n",harq_pid);
|
||||
msg("ulsch ra (UE): NBRB %d\n",ulsch->harq_processes[harq_pid]->nb_rb);
|
||||
msg("ulsch ra (UE): first_rb %x\n",ulsch->harq_processes[harq_pid]->first_rb);
|
||||
msg("ulsch ra (UE): nb_rb %d\n",ulsch->harq_processes[harq_pid]->nb_rb);
|
||||
msg("ulsch ra (UE): Ndi %d\n",ulsch->harq_processes[harq_pid]->Ndi);
|
||||
msg("ulsch ra (UE): round %d\n",ulsch->harq_processes[harq_pid]->round);
|
||||
msg("ulsch ra (UE): TBS %d\n",ulsch->harq_processes[harq_pid]->TBS);
|
||||
msg("ulsch ra (UE): mcs %d\n",ulsch->harq_processes[harq_pid]->mcs);
|
||||
msg("ulsch ra (UE): TPC %d\n",ulsch->harq_processes[harq_pid]->TPC);
|
||||
|
||||
@@ -287,18 +287,18 @@ u32 ulsch_encoding(u8 *a,
|
||||
ulsch->harq_processes[harq_pid]->control_only = 0;
|
||||
|
||||
#ifdef DEBUG_ULSCH_CODING
|
||||
msg("[PHY][UE] ULSCH coding : A %d, Qm %d, mcs %d, harq_pid %d, Ndi %d, RV %d\n",
|
||||
msg("[PHY][UE] ULSCH coding : A %d, Qm %d, mcs %d, harq_pid %d, round %d, RV %d\n",
|
||||
ulsch->harq_processes[harq_pid]->TBS,
|
||||
Q_m,
|
||||
ulsch->harq_processes[harq_pid]->mcs,
|
||||
harq_pid,
|
||||
ulsch->harq_processes[harq_pid]->Ndi,
|
||||
ulsch->harq_processes[harq_pid]->round,
|
||||
ulsch->harq_processes[harq_pid]->rvidx);
|
||||
|
||||
for (i=0;i<ulsch->harq_processes[harq_pid]->O_ACK;i++)
|
||||
msg("ulsch_coding: O_ACK[%d] %d\n",i,ulsch->o_ACK[i]);
|
||||
msg("ulsch_coding: o_ACK[%d] %d\n",i,ulsch->o_ACK[i]);
|
||||
for (i=0;i<ulsch->O_RI;i++)
|
||||
msg("ulsch_coding: O_RI[%d] %d\n",i,ulsch->o_RI[i]);
|
||||
msg("ulsch_coding: o_RI[%d] %d\n",i,ulsch->o_RI[i]);
|
||||
msg("ulsch_coding: O=%d\n",ulsch->O);
|
||||
|
||||
for (i=0;i<1+((8+ulsch->O)/8);i++) {
|
||||
@@ -311,7 +311,7 @@ u32 ulsch_encoding(u8 *a,
|
||||
print_CQI(ulsch->o,HLC_subband_cqi_rank1_2A,0);
|
||||
#endif
|
||||
|
||||
if (ulsch->harq_processes[harq_pid]->Ndi == 1) { // this is a new packet
|
||||
if (ulsch->harq_processes[harq_pid]->round == 0) { // this is a new packet
|
||||
|
||||
start_meas(seg_stats);
|
||||
// Add 24-bit crc (polynomial A) to payload
|
||||
|
||||
@@ -174,7 +174,7 @@ void clean_eNb_ulsch(LTE_eNB_ULSCH_t *ulsch, uint8_t abstraction_flag) {
|
||||
ulsch->rnti = 0;
|
||||
for (i=0;i<Mdlharq;i++) {
|
||||
if (ulsch->harq_processes[i]) {
|
||||
ulsch->harq_processes[i]->Ndi = 0;
|
||||
// ulsch->harq_processes[i]->Ndi = 0;
|
||||
ulsch->harq_processes[i]->status = 0;
|
||||
ulsch->harq_processes[i]->subframe_scheduling_flag = 0;
|
||||
//ulsch->harq_processes[i]->phich_active = 0; //this will be done later after transmission of PHICH
|
||||
@@ -294,9 +294,9 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
|
||||
|
||||
#ifdef DEBUG_ULSCH_DECODING
|
||||
LOG_D(PHY,"ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): Ndi %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
|
||||
LOG_D(PHY,"ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
|
||||
frame_parms->Nid_cell,ulsch->rnti,x2,
|
||||
ulsch->harq_processes[harq_pid]->Ndi,
|
||||
ulsch->harq_processes[harq_pid]->round,
|
||||
ulsch->harq_processes[harq_pid]->rvidx,
|
||||
ulsch->harq_processes[harq_pid]->mcs,
|
||||
ulsch->O_RI,
|
||||
@@ -305,7 +305,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
subframe);
|
||||
#endif
|
||||
|
||||
if (ulsch->harq_processes[harq_pid]->Ndi == 1) {
|
||||
if (ulsch->harq_processes[harq_pid]->round == 0) {
|
||||
// This is a new packet, so compute quantities regarding segmentation
|
||||
ulsch->harq_processes[harq_pid]->B = A+24;
|
||||
lte_segmentation(NULL,
|
||||
@@ -331,10 +331,10 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
}
|
||||
if (sumKr==0) {
|
||||
LOG_N(PHY,"[eNB %d] ulsch_decoding.c: FATAL sumKr is 0!\n",phy_vars_eNB->Mod_id);
|
||||
LOG_D(PHY,"ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): harq_pid %d Ndi %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
|
||||
LOG_D(PHY,"ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): harq_pid %d round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
|
||||
frame_parms->Nid_cell,ulsch->rnti,x2,
|
||||
harq_pid,
|
||||
ulsch->harq_processes[harq_pid]->Ndi,
|
||||
ulsch->harq_processes[harq_pid]->round,
|
||||
ulsch->harq_processes[harq_pid]->rvidx,
|
||||
ulsch->harq_processes[harq_pid]->mcs,
|
||||
ulsch->O_RI,
|
||||
@@ -407,7 +407,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
|
||||
Q_CQI = Q_m * Qprime;
|
||||
#ifdef DEBUG_ULSCH_DECODING
|
||||
printf("ulsch_decoding.c: G %d, Q_RI %d, Q_CQI %d (L %d, Or1 %d)\n",G,Q_RI,Q_CQI,L,ulsch->Or1);
|
||||
printf("ulsch_decoding.c: G %d, Q_RI %d, Q_CQI %d (L %d, Or1 %d) O_ACK %d\n",G,Q_RI,Q_CQI,L,ulsch->Or1,ulsch->harq_processes[harq_pid]->O_ACK);
|
||||
#endif
|
||||
Qprime_CQI = Qprime;
|
||||
|
||||
@@ -768,7 +768,8 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
if (y[q+(Q_m*((r*Cmux) + columnset[j]))]!=0)
|
||||
ulsch->q_ACK[(q+(Q_m*i))%len_ACK] += y[q+(Q_m*((r*Cmux) + columnset[j]))];
|
||||
#ifdef DEBUG_ULSCH_DECODING
|
||||
LOG_D(PHY,"ACK %d => %d (%d,%d,%d)\n",(q+(Q_m*i))%len_ACK,ulsch->q_ACK[(q+(Q_m*i))%len_ACK],q+(Q_m*((r*Cmux) + columnset[j])),r,columnset[j]);
|
||||
// LOG_D(PHY,"ACK %d => %d (%d,%d,%d)\n",(q+(Q_m*i))%len_ACK,ulsch->q_ACK[(q+(Q_m*i))%len_ACK],q+(Q_m*((r*Cmux) + columnset[j])),r,columnset[j]);
|
||||
printf("ACK %d => %d (%d,%d,%d)\n",(q+(Q_m*i))%len_ACK,ulsch->q_ACK[(q+(Q_m*i))%len_ACK],q+(Q_m*((r*Cmux) + columnset[j])),r,columnset[j]);
|
||||
#endif
|
||||
y[q+(Q_m*((r*Cmux) + columnset[j]))]=0; // NULL LLRs in ACK positions
|
||||
}
|
||||
@@ -874,6 +875,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
#endif
|
||||
|
||||
}
|
||||
// write_output("/tmp/ulsch_e.m","ulsch_e",ulsch->e,iprime,1,0);
|
||||
break;
|
||||
case 4:
|
||||
for (iprime=0;iprime<(Hprime-Qprime_CQI)<<2;) {
|
||||
@@ -1161,7 +1163,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
ulsch->Mdlharq,
|
||||
1,
|
||||
ulsch->harq_processes[harq_pid]->rvidx,
|
||||
ulsch->harq_processes[harq_pid]->Ndi,
|
||||
(ulsch->harq_processes[harq_pid]->round==0)?1:0, // clear
|
||||
get_Qm_ul(ulsch->harq_processes[harq_pid]->mcs),
|
||||
1,
|
||||
r,
|
||||
@@ -1181,14 +1183,14 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
|
||||
&ulsch->harq_processes[harq_pid]->d[r][96],
|
||||
ulsch->harq_processes[harq_pid]->w[r]);
|
||||
stop_meas(&phy_vars_eNB->ulsch_deinterleaving_stats);
|
||||
/*
|
||||
|
||||
#ifdef DEBUG_ULSCH_DECODING
|
||||
msg("decoder input(segment %d) :",r);
|
||||
for (i=0;i<(3*8*Kr_bytes)+12;i++)
|
||||
msg("%d : %d\n",i,ulsch->harq_processes[harq_pid]->d[r][96+i]);
|
||||
msg("\n");
|
||||
#endif
|
||||
*/
|
||||
|
||||
}
|
||||
|
||||
#ifdef OMP
|
||||
|
||||
@@ -247,14 +247,94 @@ void lte_idft(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *z, uint16_t Msc_PUSCH) {
|
||||
break;
|
||||
case 288:
|
||||
dft288(idft_in0,idft_out0,1);
|
||||
dft288(idft_in1,idft_out1,1);
|
||||
dft288(idft_in1,idft_out1,1);
|
||||
dft288(idft_in2,idft_out2,1);
|
||||
break;
|
||||
case 300:
|
||||
case 300:
|
||||
dft300(idft_in0,idft_out0,1);
|
||||
dft300(idft_in1,idft_out1,1);
|
||||
dft300(idft_in2,idft_out2,1);
|
||||
break;
|
||||
case 324:
|
||||
dft324((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft324((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft324((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 360:
|
||||
dft360((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft360((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft360((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 384:
|
||||
dft384((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft384((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft384((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 432:
|
||||
dft432((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft432((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft432((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 480:
|
||||
dft480((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft480((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft480((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 540:
|
||||
dft540((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft540((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft540((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 576:
|
||||
dft576((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft576((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft576((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 600:
|
||||
dft600((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft600((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft600((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 648:
|
||||
dft648((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft648((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft648((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 720:
|
||||
dft720((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft720((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft720((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 864:
|
||||
dft864((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft864((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft864((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 900:
|
||||
dft900((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft900((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft900((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 960:
|
||||
dft960((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft960((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft960((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 972:
|
||||
dft972((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft972((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft972((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 1080:
|
||||
dft1080((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft1080((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft1080((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 1152:
|
||||
dft1152((int16_t*)idft_in0,(int16_t*)idft_out0,1);
|
||||
dft1152((int16_t*)idft_in1,(int16_t*)idft_out1,1);
|
||||
dft1152((int16_t*)idft_in2,(int16_t*)idft_out2,1);
|
||||
break;
|
||||
case 1200:
|
||||
dft1200(idft_in0,idft_out0,1);
|
||||
dft1200(idft_in1,idft_out1,1);
|
||||
|
||||
@@ -202,6 +202,86 @@ void dft_lte(mod_sym_t *z,mod_sym_t *d, int32_t Msc_PUSCH, uint8_t Nsymb) {
|
||||
dft300((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft300((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 324:
|
||||
dft324((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft324((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft324((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 360:
|
||||
dft360((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft360((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft360((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 384:
|
||||
dft384((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft384((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft384((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 432:
|
||||
dft432((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft432((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft432((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 480:
|
||||
dft480((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft480((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft480((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 540:
|
||||
dft540((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft540((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft540((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 576:
|
||||
dft576((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft576((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft576((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 600:
|
||||
dft600((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft600((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft600((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 648:
|
||||
dft648((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft648((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft648((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 720:
|
||||
dft720((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft720((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft720((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 864:
|
||||
dft864((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft864((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft864((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 900:
|
||||
dft900((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft900((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft900((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 960:
|
||||
dft960((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft960((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft960((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 972:
|
||||
dft972((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft972((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft972((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 1080:
|
||||
dft1080((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft1080((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft1080((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 1152:
|
||||
dft1152((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft1152((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
dft1152((int16_t*)dft_in2,(int16_t*)dft_out2,1);
|
||||
break;
|
||||
case 1200:
|
||||
dft1200((int16_t*)dft_in0,(int16_t*)dft_out0,1);
|
||||
dft1200((int16_t*)dft_in1,(int16_t*)dft_out1,1);
|
||||
@@ -344,6 +424,7 @@ void ulsch_modulation(mod_sym_t **txdataF,
|
||||
// Modulation
|
||||
|
||||
Msymb = G/Q_m;
|
||||
|
||||
if(ulsch->cooperation_flag == 2)
|
||||
// For Distributed Alamouti Scheme in Collabrative Communication
|
||||
{
|
||||
@@ -491,8 +572,8 @@ void ulsch_modulation(mod_sym_t **txdataF,
|
||||
|
||||
((int16_t*)&ulsch->d[i])[0] = (ulsch->b_tilde[j] == 1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
((int16_t*)&ulsch->d[i])[1] = (ulsch->b_tilde[j+1] == 1)? (-gain_lin_QPSK) : gain_lin_QPSK;
|
||||
// if (i<Msc_PUSCH)
|
||||
// msg("input %d (%p): %d,%d\n", i,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
|
||||
// if (i<Msc_PUSCH)
|
||||
// msg("input %d/%d Msc_PUSCH %d (%p): %d,%d\n", i,Msymb,Msc_PUSCH,&ulsch->d[i],((int16_t*)&ulsch->d[i])[0],((int16_t*)&ulsch->d[i])[1]);
|
||||
|
||||
break;
|
||||
|
||||
|
||||
@@ -555,6 +555,22 @@ void dft216(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft240(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft288(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft300(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft324(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft360(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft384(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft432(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft480(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft540(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft576(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft600(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft648(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft720(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft864(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft900(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft960(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft972(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft1080(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft1152(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
void dft1200(int16_t *x,int16_t *y,u8 scale_flag);
|
||||
|
||||
void dft64(int16_t *x,int16_t *y,int scale);
|
||||
|
||||
@@ -4139,7 +4139,7 @@ void dft192(int16_t *x,int16_t *y,unsigned char scale_flag){
|
||||
if (scale_flag==1) {
|
||||
norm128 = _mm_set1_epi16(dft_norm_table[11]);
|
||||
|
||||
for (i=0;i<216;i++) {
|
||||
for (i=0;i<192;i++) {
|
||||
y128[i] = _mm_slli_epi16(_mm_mulhi_epi16(y128[i],norm128),1);
|
||||
}
|
||||
}
|
||||
@@ -5379,12 +5379,12 @@ void dft324(int16_t *x,int16_t *y,unsigned char scale_flag){ // 108 x 3
|
||||
x2128[i+216] = x128[j+2];
|
||||
}
|
||||
|
||||
dft96((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
dft96((int16_t *)(x2128+108),(int16_t *)(ytmp128+108),1);
|
||||
dft96((int16_t *)(x2128+216),(int16_t *)(ytmp128+216),1);
|
||||
dft108((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
dft108((int16_t *)(x2128+108),(int16_t *)(ytmp128+108),1);
|
||||
dft108((int16_t *)(x2128+216),(int16_t *)(ytmp128+216),1);
|
||||
|
||||
bfly3_tw1(ytmp128,ytmp128+108,ytmp128+216,y128,y128+108,y128+216);
|
||||
for (i=1,j=0;i<96;i++,j++) {
|
||||
for (i=1,j=0;i<108;i++,j++) {
|
||||
bfly3(ytmp128+i,
|
||||
ytmp128+108+i,
|
||||
ytmp128+216+i,
|
||||
@@ -6905,11 +6905,11 @@ void dft480(int16_t *x,int16_t *y,unsigned char scale_flag){ // 120 x 4
|
||||
|
||||
|
||||
|
||||
for (i=0,j=0;i<240;i++,j+=4) {
|
||||
for (i=0,j=0;i<120;i++,j+=4) {
|
||||
x2128[i] = x128[j];
|
||||
x2128[i+240] = x128[j+1];
|
||||
x2128[i+480] = x128[j+2];
|
||||
x2128[i+720] = x128[j+3];
|
||||
x2128[i+120] = x128[j+1];
|
||||
x2128[i+240] = x128[j+2];
|
||||
x2128[i+360] = x128[j+3];
|
||||
}
|
||||
|
||||
dft120((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
@@ -7401,7 +7401,7 @@ end
|
||||
i=i+2;
|
||||
fprintf(fd,"%d,%d,%d,%d,%d,%d,%d,%d};\n",twb2(i),twb2(i+1),twb2(i),twb2(i+1),twb2(i),twb2(i+1),twb2(i),twb2(i+1));
|
||||
fclose(fd);
|
||||
*/
|
||||
*/
|
||||
static int16_t twa576[191*2*4] = {32765,-358,32765,-358,32765,-358,32765,-358,
|
||||
32759,-715,32759,-715,32759,-715,32759,-715,
|
||||
32749,-1073,32749,-1073,32749,-1073,32749,-1073,
|
||||
@@ -7801,12 +7801,14 @@ void dft576(int16_t *x,int16_t *y,unsigned char scale_flag){ // 192 x 3
|
||||
x2128[i+192] = x128[j+1];
|
||||
x2128[i+384] = x128[j+2];
|
||||
}
|
||||
|
||||
|
||||
dft192((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
dft192((int16_t *)(x2128+192),(int16_t *)(ytmp128+192),1);
|
||||
dft192((int16_t *)(x2128+384),(int16_t *)(ytmp128+384),1);
|
||||
|
||||
|
||||
bfly3_tw1(ytmp128,ytmp128+192,ytmp128+384,y128,y128+192,y128+384);
|
||||
|
||||
for (i=1,j=0;i<192;i++,j++) {
|
||||
bfly3(ytmp128+i,
|
||||
ytmp128+192+i,
|
||||
@@ -7816,8 +7818,7 @@ void dft576(int16_t *x,int16_t *y,unsigned char scale_flag){ // 192 x 3
|
||||
y128+384+i,
|
||||
twa128+j,
|
||||
twb128+j);
|
||||
}
|
||||
|
||||
}
|
||||
if (scale_flag==1) {
|
||||
norm128 = _mm_set1_epi16(dft_norm_table[14]);
|
||||
|
||||
@@ -7828,7 +7829,6 @@ void dft576(int16_t *x,int16_t *y,unsigned char scale_flag){ // 192 x 3
|
||||
|
||||
_mm_empty();
|
||||
_m_empty();
|
||||
|
||||
};
|
||||
|
||||
/* Twiddles generated with
|
||||
@@ -8659,9 +8659,9 @@ void dft648(int16_t *x,int16_t *y,unsigned char scale_flag){ // 216 x 3
|
||||
x2128[i+432] = x128[j+2];
|
||||
}
|
||||
|
||||
dft96((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
dft96((int16_t *)(x2128+216),(int16_t *)(ytmp128+216),1);
|
||||
dft96((int16_t *)(x2128+432),(int16_t *)(ytmp128+432),1);
|
||||
dft216((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
dft216((int16_t *)(x2128+216),(int16_t *)(ytmp128+216),1);
|
||||
dft216((int16_t *)(x2128+432),(int16_t *)(ytmp128+432),1);
|
||||
|
||||
bfly3_tw1(ytmp128,ytmp128+216,ytmp128+432,y128,y128+216,y128+432);
|
||||
for (i=1,j=0;i<216;i++,j++) {
|
||||
@@ -9929,7 +9929,7 @@ void dft864(int16_t *x,int16_t *y,unsigned char scale_flag){ // 288 x 3
|
||||
for (i=0,j=0;i<288;i++,j+=3) {
|
||||
x2128[i] = x128[j];
|
||||
x2128[i+288] = x128[j+1];
|
||||
x2128[i+288] = x128[j+2];
|
||||
x2128[i+576] = x128[j+2];
|
||||
}
|
||||
|
||||
dft288((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
@@ -12911,7 +12911,7 @@ void dft1080(int16_t *x,int16_t *y,unsigned char scale_flag){ // 360 x 3
|
||||
for (i=0,j=0;i<360;i++,j+=3) {
|
||||
x2128[i] = x128[j];
|
||||
x2128[i+360] = x128[j+1];
|
||||
x2128[i+360] = x128[j+2];
|
||||
x2128[i+720] = x128[j+2];
|
||||
}
|
||||
|
||||
dft360((int16_t *)x2128,(int16_t *)ytmp128,1);
|
||||
|
||||
@@ -152,7 +152,7 @@ u8 get_Msg3_harq_pid(LTE_DL_FRAME_PARMS *frame_parms,
|
||||
u32 ul_frame;
|
||||
|
||||
if (frame_parms->frame_type ==FDD) {
|
||||
ul_subframe = (current_subframe>4) ? (current_subframe-4) : (current_subframe+6);
|
||||
ul_subframe = (current_subframe>3) ? (current_subframe-4) : (current_subframe+6);
|
||||
ul_frame = (current_subframe>3) ? (frame+1) : frame;
|
||||
}
|
||||
else {
|
||||
|
||||
@@ -1054,9 +1054,9 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
|
||||
if (next_slot == 0) {
|
||||
|
||||
// First half of PSS/SSS (FDD)
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == 0) {
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
|
||||
generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
|
||||
4*AMP,
|
||||
AMP,
|
||||
&phy_vars_eNB->lte_frame_parms,
|
||||
(phy_vars_eNB->lte_frame_parms.Ncp==0) ? 6 : 5,
|
||||
next_slot);
|
||||
@@ -1169,10 +1169,10 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
|
||||
|
||||
if (abstraction_flag==0) {
|
||||
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == 1) {
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == TDD) {
|
||||
// printf("Generating PSS (frame %d, subframe %d)\n",phy_vars_eNB->frame,next_slot>>1);
|
||||
generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
|
||||
4*AMP,
|
||||
AMP,
|
||||
&phy_vars_eNB->lte_frame_parms,
|
||||
2,
|
||||
next_slot);
|
||||
@@ -1185,9 +1185,9 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
|
||||
|
||||
if (abstraction_flag==0) {
|
||||
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == 0) {
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
|
||||
generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
|
||||
4*AMP,
|
||||
AMP,
|
||||
&phy_vars_eNB->lte_frame_parms,
|
||||
(phy_vars_eNB->lte_frame_parms.Ncp==0) ? 6 : 5,
|
||||
next_slot);
|
||||
@@ -1221,7 +1221,7 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == 1) {
|
||||
// printf("Generating PSS (frame %d, subframe %d)\n",phy_vars_eNB->frame,next_slot>>1);
|
||||
generate_pss(phy_vars_eNB->lte_eNB_common_vars.txdataF[sect_id],
|
||||
4*AMP,
|
||||
AMP,
|
||||
&phy_vars_eNB->lte_frame_parms,
|
||||
2,
|
||||
next_slot);
|
||||
@@ -1818,7 +1818,7 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
|
||||
|
||||
|
||||
#ifdef DEBUG_PHY_PROC
|
||||
LOG_I(PHY,"[eNB %d][PDSCH %x/%d] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %d, G %d, nb_rb %d, mcs %d, pmi_alloc %x, Ndi %d, rv %d (round %d)\n",
|
||||
LOG_I(PHY,"[eNB %d][PDSCH %x/%d] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %d, G %d, nb_rb %d, mcs %d, pmi_alloc %x, rv %d (round %d)\n",
|
||||
phy_vars_eNB->Mod_id, phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->rnti,harq_pid,
|
||||
phy_vars_eNB->frame, next_slot>>1, input_buffer_length,
|
||||
get_G(&phy_vars_eNB->lte_frame_parms,
|
||||
@@ -1828,14 +1828,13 @@ void phy_procedures_eNB_TX(unsigned char next_slot,PHY_VARS_eNB *phy_vars_eNB,u8
|
||||
num_pdcch_symbols,phy_vars_eNB->frame,next_slot>>1),
|
||||
phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->nb_rb,
|
||||
phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->harq_processes[harq_pid]->mcs,
|
||||
pmi2hex_2Ar1(phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->pmi_alloc),
|
||||
phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->harq_processes[harq_pid]->Ndi,
|
||||
pmi2hex_2Ar1(phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->pmi_alloc),
|
||||
phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->harq_processes[harq_pid]->rvidx,
|
||||
phy_vars_eNB->dlsch_eNB[(u8)UE_id][0]->harq_processes[harq_pid]->round);
|
||||
#endif
|
||||
|
||||
phy_vars_eNB->eNB_UE_stats[(u8)UE_id].dlsch_sliding_cnt++;
|
||||
if (phy_vars_eNB->dlsch_eNB[(u32)UE_id][0]->harq_processes[harq_pid]->Ndi == 1) {
|
||||
if (phy_vars_eNB->dlsch_eNB[(u32)UE_id][0]->harq_processes[harq_pid]->round == 0) {
|
||||
|
||||
phy_vars_eNB->eNB_UE_stats[(u32)UE_id].dlsch_trials[0]++;
|
||||
|
||||
@@ -2674,12 +2673,11 @@ void phy_procedures_eNB_RX(unsigned char last_slot,PHY_VARS_eNB *phy_vars_eNB,u8
|
||||
phy_vars_eNB->ulsch_eNB[i]->cyclicShift = (phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->n_DMRS2 + phy_vars_eNB->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift + nPRS)%12;
|
||||
|
||||
#ifdef DEBUG_PHY_PROC
|
||||
LOG_I(PHY,"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, Ndi %d, first_rb %d, nb_rb %d, mcs %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
|
||||
LOG_I(PHY,"[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, mcs %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
|
||||
phy_vars_eNB->Mod_id,harq_pid,frame,last_slot>>1,
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->dci_alloc,
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->rar_alloc,
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round,
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->Ndi,
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->first_rb,
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->nb_rb,
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->mcs,
|
||||
|
||||
@@ -270,7 +270,7 @@ void phy_reset_ue(u8 Mod_id,u8 eNB_index) {
|
||||
for(k=0;k<NUMBER_OF_HARQ_PID_MAX && phy_vars_ue->ulsch_ue[i]->harq_processes[k];k++) {
|
||||
phy_vars_ue->ulsch_ue[i]->harq_processes[k]->status = SCH_IDLE;
|
||||
//Set NDIs for all UL HARQs to 0
|
||||
phy_vars_ue->ulsch_ue[i]->harq_processes[k]->Ndi = 0;
|
||||
// phy_vars_ue->ulsch_ue[i]->harq_processes[k]->Ndi = 0;
|
||||
|
||||
}
|
||||
}
|
||||
@@ -300,8 +300,10 @@ void ra_succeeded(u8 Mod_id,u8 eNB_index) {
|
||||
PHY_vars_UE_g[Mod_id]->UE_mode[eNB_index] = PUSCH;
|
||||
|
||||
for (i=0;i<8;i++) {
|
||||
if (PHY_vars_UE_g[Mod_id]->ulsch_ue[eNB_index]->harq_processes[i])
|
||||
if (PHY_vars_UE_g[Mod_id]->ulsch_ue[eNB_index]->harq_processes[i]) {
|
||||
PHY_vars_UE_g[Mod_id]->ulsch_ue[eNB_index]->harq_processes[i]->status=IDLE;
|
||||
PHY_vars_UE_g[Mod_id]->dlsch_ue[eNB_index][0]->harq_processes[i]->round=0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -702,7 +704,7 @@ void phy_procedures_UE_TX(u8 next_slot,PHY_VARS_UE *phy_vars_ue,u8 eNB_id,u8 abs
|
||||
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
|
||||
#endif
|
||||
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d harq pid %d, Po_PUSCH : %d dBm\n",
|
||||
phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame,next_slot>>1,harq_pid, phy_vars_ue->tx_power_dBm);
|
||||
phy_vars_ue->Mod_id,harq_pid,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1,harq_pid, phy_vars_ue->tx_power_dBm);
|
||||
|
||||
// deactivate service request
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
|
||||
@@ -723,11 +725,10 @@ void phy_procedures_UE_TX(u8 next_slot,PHY_VARS_UE *phy_vars_ue,u8 eNB_id,u8 abs
|
||||
|
||||
|
||||
#ifdef DEBUG_PHY_PROC
|
||||
LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d Generating PUSCH : first_rb %d, nb_rb %d, round %d, Ndi %d, mcs %d, rv %d, cyclic_shift %d (cyclic_shift_common %d,n_DMRS2 %d,n_PRS %d), ACK (%d,%d), O_ACK %d\n",
|
||||
phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame,next_slot>>1,
|
||||
LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d Generating PUSCH : first_rb %d, nb_rb %d, round %d, mcs %d, rv %d, cyclic_shift %d (cyclic_shift_common %d,n_DMRS2 %d,n_PRS %d), ACK (%d,%d), O_ACK %d\n",
|
||||
phy_vars_ue->Mod_id,harq_pid,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1,
|
||||
first_rb,nb_rb,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->Ndi,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->mcs,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->rvidx,
|
||||
(frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift+
|
||||
@@ -765,10 +766,10 @@ void phy_procedures_UE_TX(u8 next_slot,PHY_VARS_UE *phy_vars_ue,u8 eNB_id,u8 abs
|
||||
// debug_LOG_D(PHY,"[UE %d] Frame %d, Subframe %d ulsch harq_pid %d : O %d, O_ACK %d, O_RI %d, TBS %d\n",phy_vars_ue->Mod_id,phy_vars_ue->frame,next_slot>>1,harq_pid,phy_vars_ue->ulsch_ue[eNB_id]->O,phy_vars_ue->ulsch_ue[eNB_id]->O_ACK,phy_vars_ue->ulsch_ue[eNB_id]->O_RI,phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TBS);
|
||||
//#endif
|
||||
if (Msg3_flag == 1) {
|
||||
LOG_I(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d next slot %d Generating (RRCConnectionRequest) Msg3 (nb_rb %d, first_rb %d, Ndi %d, rvidx %d) Msg3: %x.%x.%x|%x.%x.%x.%x.%x.%x\n",phy_vars_ue->Mod_id,phy_vars_ue->frame,next_slot>>1, next_slot,
|
||||
LOG_I(PHY,"[UE %d][RAPROC] Frame %d, Subframe %d next slot %d Generating (RRCConnectionRequest) Msg3 (nb_rb %d, first_rb %d, round %d, rvidx %d) Msg3: %x.%x.%x|%x.%x.%x.%x.%x.%x\n",phy_vars_ue->Mod_id,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1, next_slot,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->nb_rb,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->first_rb,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->Ndi,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->rvidx,
|
||||
phy_vars_ue->prach_resources[eNB_id]->Msg3[0],
|
||||
phy_vars_ue->prach_resources[eNB_id]->Msg3[1],
|
||||
@@ -810,7 +811,7 @@ void phy_procedures_UE_TX(u8 next_slot,PHY_VARS_UE *phy_vars_ue,u8 eNB_id,u8 abs
|
||||
|
||||
#ifdef OPENAIR2
|
||||
// LOG_D(PHY,"[UE %d] ULSCH : Searching for MAC SDUs\n",phy_vars_ue->Mod_id);
|
||||
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->Ndi==1) {
|
||||
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round==0) {
|
||||
//if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
|
||||
access_mode=SCHEDULED_ACCESS;
|
||||
mac_xface->ue_get_sdu(phy_vars_ue->Mod_id,
|
||||
@@ -896,7 +897,7 @@ void phy_procedures_UE_TX(u8 next_slot,PHY_VARS_UE *phy_vars_ue,u8 eNB_id,u8 abs
|
||||
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
|
||||
#endif
|
||||
LOG_I(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d, generating PUSCH, Po_PUSCH: %d dBm, amp %d\n",
|
||||
phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame,next_slot>>1,phy_vars_ue->tx_power_dBm,
|
||||
phy_vars_ue->Mod_id,harq_pid,(((next_slot>>1)==0)?1:0)+phy_vars_ue->frame,next_slot>>1,phy_vars_ue->tx_power_dBm,
|
||||
#ifdef EXMIMO
|
||||
get_tx_amp(phy_vars_ue->tx_power_dBm,phy_vars_ue->tx_power_max_dBm)
|
||||
#else
|
||||
@@ -1874,7 +1875,7 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag =0;
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->status = IDLE;
|
||||
phy_vars_ue->ulsch_ue_Msg3_active[eNB_id] = 0;
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->Ndi = 1;
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round = 0;
|
||||
LOG_D(PHY,"Msg3 inactive\n");
|
||||
/* Phich is not abstracted for the moment
|
||||
if (PHY_vars_eNB_g[i]->ulsch_eNB[(u32)UE_id]->harq_processes[harq_pid]->phich_ACK==0) { // NAK
|
||||
@@ -2013,6 +2014,7 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
|
||||
|
||||
#ifdef DEBUG_PHY_PROC
|
||||
LOG_D(PHY,"[UE %d] Generated UE DLSCH C_RNTI format %d\n",phy_vars_ue->Mod_id,dci_alloc_rx[i].format);
|
||||
dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
|
||||
#endif
|
||||
|
||||
// we received a CRNTI, so we're in PUSCH
|
||||
@@ -2411,7 +2413,7 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
|
||||
phy_vars_ue->Mod_id,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
||||
harq_pid,
|
||||
phy_vars_ue->frame,last_slot>>1);
|
||||
phy_vars_ue->frame,((last_slot>>1)==0)?9:(last_slot>>1)-1);
|
||||
#endif
|
||||
|
||||
if (phy_vars_ue->dlsch_ue[eNB_id][0]) {
|
||||
@@ -2456,7 +2458,7 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
|
||||
#ifdef DEBUG_PHY_PROC
|
||||
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d DLSCH in error (rv %d,mcs %d)\n",
|
||||
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
||||
harq_pid,phy_vars_ue->frame,last_slot>>1,
|
||||
harq_pid,phy_vars_ue->frame,((last_slot>>1)==0)?9:(last_slot>>1)-1,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs);
|
||||
|
||||
@@ -2467,7 +2469,7 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
|
||||
else {
|
||||
LOG_I(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d: Received DLSCH (rv %d,mcs %d,TBS %d)\n",
|
||||
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
|
||||
harq_pid,phy_vars_ue->frame,last_slot>>1,
|
||||
harq_pid,phy_vars_ue->frame,((last_slot>>1)==0)?9:(last_slot>>1)-1,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->TBS);
|
||||
@@ -2499,7 +2501,7 @@ int lte_ue_pdcch_procedures(u8 eNB_id,u8 last_slot, PHY_VARS_UE *phy_vars_ue,u8
|
||||
LOG_I(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d: PDSCH/DLSCH decoding iter %d (mcs %d, rv %d, TBS %d)\n",
|
||||
phy_vars_ue->Mod_id,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,harq_pid,
|
||||
phy_vars_ue->frame,last_slot>>1,ret,
|
||||
phy_vars_ue->frame,((last_slot>>1)==0)?9:(last_slot>>1)-1,ret,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
|
||||
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->TBS);
|
||||
|
||||
+11
-11
@@ -94,8 +94,8 @@ void pusch_power_cntl(PHY_VARS_UE *phy_vars_ue,u8 subframe,u8 eNB_id,u8 j, u8 ab
|
||||
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH += (mac_xface->get_Po_NOMINAL_PUSCH(phy_vars_ue->Mod_id) + PL);
|
||||
|
||||
LOG_I(PHY,"[UE %d][RAPROC] frame %d, subframe %d: Msg3 Po_PUSCH %d dBm (%d,%d,%d,%d,%d)\n",
|
||||
phy_vars_ue->Mod_id,phy_vars_ue->frame,subframe,phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH,
|
||||
LOG_D(PHY,"[UE %d][RAPROC] frame %d, subframe %d: Msg3 Po_PUSCH %d dBm (%d,%d,%d,%d,%d)\n",
|
||||
phy_vars_ue->Mod_id,((subframe==0)?1:0)+phy_vars_ue->frame,subframe,phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH,
|
||||
100*mac_xface->get_Po_NOMINAL_PUSCH(phy_vars_ue->Mod_id),
|
||||
hundred_times_log10_NPRB[nb_rb-1],
|
||||
100*PL,
|
||||
@@ -116,15 +116,15 @@ void pusch_power_cntl(PHY_VARS_UE *phy_vars_ue,u8 subframe,u8 eNB_id,u8 j, u8 ab
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->PHR = 40;
|
||||
|
||||
LOG_D(PHY,"[UE %d][PUSCH %d] frame %d, subframe %d: Po_PUSCH %d dBm : Po_NOMINAL_PUSCH %d,log10(NPRB) %f,PHR %d, PL %d, alpha*PL %f,delta_IF %f,f_pusch %d\n",
|
||||
phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame,subframe,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH,
|
||||
phy_vars_ue->lte_frame_parms.ul_power_control_config_common.p0_NominalPUSCH,
|
||||
hundred_times_log10_NPRB[nb_rb-1]/100.0,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->PHR,
|
||||
PL,
|
||||
alpha_lut[phy_vars_ue->lte_frame_parms.ul_power_control_config_common.alpha]*PL/100.0,
|
||||
get_hundred_times_delta_IF(phy_vars_ue,eNB_id,harq_pid)/100.0,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->f_pusch);
|
||||
phy_vars_ue->Mod_id,harq_pid,((subframe==0)?1:0) + phy_vars_ue->frame,subframe,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH,
|
||||
phy_vars_ue->lte_frame_parms.ul_power_control_config_common.p0_NominalPUSCH,
|
||||
hundred_times_log10_NPRB[nb_rb-1]/100.0,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->PHR,
|
||||
PL,
|
||||
alpha_lut[phy_vars_ue->lte_frame_parms.ul_power_control_config_common.alpha]*PL/100.0,
|
||||
get_hundred_times_delta_IF(phy_vars_ue,eNB_id,harq_pid)/100.0,
|
||||
phy_vars_ue->ulsch_ue[eNB_id]->f_pusch);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
@@ -10,7 +10,7 @@ OPENAIR1_TOP = $(OPENAIR1_DIR)
|
||||
OPENAIR2_TOP = $(OPENAIR2_DIR)
|
||||
OPENAIR3 = $(OPENAIR3_DIR)
|
||||
|
||||
CFLAGS = -g -O2 -Wno-strict-aliasing -rdynamic -Wall -DPHYSIM -DNODE_RG -DUSER_MODE -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TXRX=2 -DNB_ANTENNAS_TX=2 -DPHY_CONTEXT=1 $(CPUFLAGS) -DMALLOC_CHECK_=1 # -Wno-packed-bitfield-compat
|
||||
CFLAGS = -g -O2 -Wno-strict-aliasing -rdynamic -Wall -DPHYSIM -DNODE_RG -DUSER_MODE -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TXRX=2 -DNB_ANTENNAS_TX=2 -DPHY_CONTEXT=1 $(CPUFLAGS) -DMALLOC_CHECK_=1 -DENABLE_VCD_FIFO # -Wno-packed-bitfield-compat
|
||||
|
||||
|
||||
# DCI Debug
|
||||
|
||||
@@ -1294,7 +1294,7 @@ int main(int argc, char **argv) {
|
||||
if (common_flag == 0) {
|
||||
|
||||
if (round == 0) { // First round, set Ndi to 1 and rv to floor(round
|
||||
PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->Ndi = 1;
|
||||
//PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->Ndi = 1;
|
||||
PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->rvidx = round&3;
|
||||
if (PHY_vars_eNB->lte_frame_parms.frame_type == TDD) {
|
||||
|
||||
@@ -1368,7 +1368,7 @@ int main(int argc, char **argv) {
|
||||
}
|
||||
}
|
||||
else { // set Ndi to 0
|
||||
PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->Ndi = 0;
|
||||
//PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->Ndi = 0;
|
||||
PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->rvidx = round&3;
|
||||
|
||||
if (PHY_vars_eNB->lte_frame_parms.frame_type == TDD) {
|
||||
@@ -1481,7 +1481,7 @@ int main(int argc, char **argv) {
|
||||
tbs,
|
||||
get_Qm(PHY_vars_eNB->dlsch_eNB[k][0]->harq_processes[0]->mcs),
|
||||
num_pdcch_symbols,
|
||||
PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->Ndi);
|
||||
PHY_vars_eNB->dlsch_eNB[0][0]->harq_processes[0]->round);
|
||||
|
||||
// use the PMI from previous trial
|
||||
if (DLSCH_alloc_pdu2_1E[0].tpmi == 5) {
|
||||
|
||||
@@ -1,33 +1,35 @@
|
||||
set(0, 'DefaultLineMarkerSize', 10);
|
||||
set(0, 'Defaultaxesfontsize', 14);
|
||||
set(0, 'DefaultLineLineWidth', 2);
|
||||
plot_style = {'b-o';'r-x';'g-d';'y-*';'k-s'};
|
||||
|
||||
SNR = -5:0.2:2.8;
|
||||
C = zeros(length(SNR),4);
|
||||
filebase = 'pdcch_fdd_10_siso_awgn_ic_format0';
|
||||
|
||||
figure(1)
|
||||
hold off
|
||||
for L=0:3
|
||||
fid = fopen(sprintf('%s_L%d.txt',filebase,L),'r');
|
||||
[A,c]=fscanf(fid,'SNR %f : n_errors_ul = %d/%d (%f)\n');
|
||||
fclose(fid);
|
||||
|
||||
B = reshape(A,4,40).';
|
||||
C(:,L+1) = B(:,4);
|
||||
|
||||
semilogy(B(:,1),B(:,4),plot_style{L+1})
|
||||
hold on
|
||||
|
||||
legend_str{L+1} = sprintf('L=%d',L);
|
||||
end
|
||||
|
||||
%%
|
||||
h = legend(legend_str);
|
||||
set(h,'Fontsize',14);
|
||||
title(filebase,'Fontsize',16,'Interpreter','none')
|
||||
xlabel('SNR','Fontsize',14)
|
||||
ylabel('BLER','Fontsize',14)
|
||||
grid on
|
||||
saveas(gcf, filebase, 'eps');
|
||||
set(0, 'DefaultLineMarkerSize', 10);
|
||||
set(0, 'Defaultaxesfontsize', 14);
|
||||
set(0, 'DefaultLineLineWidth', 2);
|
||||
plot_style = {'b-o';'r-x';'g-d';'y-*';'k-s'};
|
||||
|
||||
SNR = -5:0.2:2.8;
|
||||
C = zeros(length(SNR),4);
|
||||
filebase = 'pdcch_fdd_5_siso_awgn_format0';
|
||||
|
||||
figure(1)
|
||||
hold off
|
||||
for L=0:3
|
||||
printf("Opening %s\n",sprintf('%s_L%d.txt',filebase,L));
|
||||
fid = fopen(sprintf('%s_L%d.txt',filebase,L),'r');
|
||||
printf("fid %d\n",fid);
|
||||
[A,c]=fscanf(fid,'SNR %f : n_errors_ul = %d/%d (%f)\n');
|
||||
fclose(fid);
|
||||
|
||||
B = reshape(A,4,40).';
|
||||
C(:,L+1) = B(:,4);
|
||||
|
||||
semilogy(B(:,1),B(:,4),plot_style{L+1})
|
||||
hold on
|
||||
|
||||
legend_str{L+1} = sprintf('L=%d',L);
|
||||
end
|
||||
|
||||
%%
|
||||
h = legend(legend_str);
|
||||
set(h,'Fontsize',14);
|
||||
title(filebase,'Fontsize',16,'Interpreter','none')
|
||||
xlabel('SNR','Fontsize',14)
|
||||
ylabel('BLER','Fontsize',14)
|
||||
grid on
|
||||
saveas(gcf, filebase, 'eps');
|
||||
|
||||
@@ -7,9 +7,7 @@
|
||||
#include "PHY/defs.h"
|
||||
#include "PHY/vars.h"
|
||||
#include "MAC_INTERFACE/vars.h"
|
||||
#ifdef IFFT_FPGA
|
||||
#include "PHY/LTE_REFSIG/mod_table.h"
|
||||
#endif
|
||||
|
||||
#ifdef EMOS
|
||||
#include "SCHED/phy_procedures_emos.h"
|
||||
#endif
|
||||
@@ -24,7 +22,7 @@
|
||||
#include "PHY/TOOLS/lte_phy_scope.h"
|
||||
#endif
|
||||
|
||||
#define BW 10.0
|
||||
|
||||
#define N_TRIALS 100
|
||||
|
||||
PHY_VARS_eNB *PHY_vars_eNB,*PHY_vars_eNB1,*PHY_vars_eNB2;
|
||||
@@ -62,7 +60,7 @@ void lte_param_init(unsigned char N_tx, unsigned char N_rx,unsigned char transmi
|
||||
lte_frame_parms->nb_antennas_tx_eNB = N_tx;
|
||||
lte_frame_parms->nb_antennas_tx = N_tx;
|
||||
lte_frame_parms->nb_antennas_rx = N_rx;
|
||||
lte_frame_parms->phich_config_common.phich_resource = oneSixth; //half
|
||||
lte_frame_parms->phich_config_common.phich_resource = one;//oneSixth; //half
|
||||
lte_frame_parms->tdd_config = tdd_config;
|
||||
lte_frame_parms->frame_type = frame_type;
|
||||
|
||||
@@ -426,7 +424,7 @@ DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,u8 log2L, u8 log2Lcommon, u
|
||||
break;
|
||||
}
|
||||
}
|
||||
/*
|
||||
|
||||
// add common dci
|
||||
DCI_pdu.dci_alloc[0].dci_length = BCCH_pdu_size_bits;
|
||||
DCI_pdu.dci_alloc[0].L = log2Lcommon;
|
||||
@@ -444,13 +442,13 @@ DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,u8 log2L, u8 log2Lcommon, u
|
||||
DCI_pdu.dci_alloc[1].ra_flag = 0;
|
||||
memcpy((void*)&DCI_pdu.dci_alloc[1].dci_pdu[0], &DLSCH_alloc_pdu[0], dci_length_bytes);
|
||||
DCI_pdu.Num_ue_spec_dci++;
|
||||
*/
|
||||
|
||||
|
||||
DCI_pdu.dci_alloc[0].dci_length = UL_pdu_size_bits;
|
||||
DCI_pdu.dci_alloc[0].L = log2L;
|
||||
DCI_pdu.dci_alloc[0].rnti = rnti;
|
||||
DCI_pdu.dci_alloc[0].format = format0;
|
||||
DCI_pdu.dci_alloc[0].ra_flag = 0;
|
||||
DCI_pdu.dci_alloc[2].dci_length = UL_pdu_size_bits;
|
||||
DCI_pdu.dci_alloc[2].L = log2L;
|
||||
DCI_pdu.dci_alloc[2].rnti = rnti;
|
||||
DCI_pdu.dci_alloc[2].format = format0;
|
||||
DCI_pdu.dci_alloc[2].ra_flag = 0;
|
||||
memcpy((void*)&DCI_pdu.dci_alloc[0].dci_pdu[0], &UL_alloc_pdu[0], UL_pdu_size_bytes);
|
||||
DCI_pdu.Num_ue_spec_dci++;
|
||||
|
||||
@@ -462,6 +460,8 @@ DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,u8 log2L, u8 log2Lcommon, u
|
||||
return(&DCI_pdu);
|
||||
}
|
||||
|
||||
extern int QPSK[4],QPSK2[4];
|
||||
|
||||
int main(int argc, char **argv) {
|
||||
|
||||
char c;
|
||||
@@ -469,9 +469,7 @@ int main(int argc, char **argv) {
|
||||
int i,l,aa;
|
||||
double sigma2, sigma2_dB=0,SNR,snr0=-2.0,snr1;
|
||||
//mod_sym_t **txdataF;
|
||||
#ifdef IFFT_FPGA
|
||||
int **txdataF2;
|
||||
#endif
|
||||
|
||||
int **txdata;
|
||||
double **s_re,**s_im,**r_re,**r_im;
|
||||
double iqim=0.0;
|
||||
@@ -519,10 +517,13 @@ int main(int argc, char **argv) {
|
||||
|
||||
u8 num_phich_interf = 0;
|
||||
lte_frame_type_t frame_type=TDD;
|
||||
|
||||
int re_offset;
|
||||
uint32_t *txptr;
|
||||
int aarx;
|
||||
#ifdef PERFECT_CE
|
||||
int k, aarx;
|
||||
int k;
|
||||
#endif
|
||||
double BW=5.0;
|
||||
|
||||
number_of_cards = 1;
|
||||
openair_daq_vars.rx_rf_mode = 1;
|
||||
@@ -752,23 +753,7 @@ int main(int argc, char **argv) {
|
||||
frame_parms = &PHY_vars_eNB->lte_frame_parms;
|
||||
get_dci(frame_parms, log2L, log2Lcommon, format_selector, n_rnti);
|
||||
|
||||
#ifdef IFFT_FPGA
|
||||
txdata = (int **)malloc16(2*sizeof(int*));
|
||||
txdata[0] = (int *)malloc16(FRAME_LENGTH_BYTES);
|
||||
txdata[1] = (int *)malloc16(FRAME_LENGTH_BYTES);
|
||||
|
||||
bzero(txdata[0],FRAME_LENGTH_BYTES);
|
||||
bzero(txdata[1],FRAME_LENGTH_BYTES);
|
||||
|
||||
txdataF2 = (int **)malloc16(2*sizeof(int*));
|
||||
txdataF2[0] = (int *)malloc16(FRAME_LENGTH_BYTES_NO_PREFIX);
|
||||
txdataF2[1] = (int *)malloc16(FRAME_LENGTH_BYTES_NO_PREFIX);
|
||||
|
||||
bzero(txdataF2[0],FRAME_LENGTH_BYTES_NO_PREFIX);
|
||||
bzero(txdataF2[1],FRAME_LENGTH_BYTES_NO_PREFIX);
|
||||
#else
|
||||
txdata = PHY_vars_eNB->lte_eNB_common_vars.txdata[eNb_id];
|
||||
#endif
|
||||
|
||||
s_re = malloc(2*sizeof(double*));
|
||||
s_im = malloc(2*sizeof(double*));
|
||||
@@ -781,6 +766,21 @@ int main(int argc, char **argv) {
|
||||
subframe,NUMBER_OF_OFDM_CARRIERS,
|
||||
PHY_vars_eNB->lte_frame_parms.Ncp,PHY_vars_eNB->lte_frame_parms.samples_per_tti,nsymb);
|
||||
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
BW = 1.25;
|
||||
break;
|
||||
case 25:
|
||||
BW = 5.00;
|
||||
break;
|
||||
case 50:
|
||||
BW = 10.00;
|
||||
break;
|
||||
case 100:
|
||||
BW = 20.00;
|
||||
break;
|
||||
}
|
||||
|
||||
eNB2UE = new_channel_desc_scm(PHY_vars_eNB->lte_frame_parms.nb_antennas_tx_eNB,
|
||||
PHY_vars_UE->lte_frame_parms.nb_antennas_rx,
|
||||
channel_model,
|
||||
@@ -855,15 +855,23 @@ int main(int argc, char **argv) {
|
||||
|
||||
for (trial=0; trial<n_frames; trial++) {
|
||||
|
||||
|
||||
|
||||
// printf("DCI (SF %d): txdataF %p (0 %p)\n",subframe,&PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][512*14*subframe],&PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][0]);
|
||||
for (aa=0; aa<PHY_vars_eNB->lte_frame_parms.nb_antennas_tx_eNB;aa++) {
|
||||
#ifdef IFFT_FPGA
|
||||
memset(&PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][0],0,NUMBER_OF_USEFUL_CARRIERS*NUMBER_OF_SYMBOLS_PER_FRAME*sizeof(mod_sym_t));
|
||||
#else
|
||||
memset(&PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][0],0,FRAME_LENGTH_COMPLEX_SAMPLES_NO_PREFIX*sizeof(mod_sym_t));
|
||||
#endif
|
||||
memset(&PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][0],0,FRAME_LENGTH_COMPLEX_SAMPLES_NO_PREFIX*sizeof(mod_sym_t));
|
||||
|
||||
|
||||
re_offset = PHY_vars_eNB->lte_frame_parms.first_carrier_offset;
|
||||
txptr = (uint32_t*)&PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][subframe*PHY_vars_eNB->lte_frame_parms.samples_per_tti];
|
||||
for (i=0;i<PHY_vars_eNB->lte_frame_parms.N_RB_DL*6;i++) {
|
||||
txptr[re_offset++] = QPSK[taus()&3];
|
||||
//printf("%i => %d,%d\n",re_offset-1,*(s16_t*)&txptr[re_offset-1],*(1+(s16_t*)&txptr[re_offset-1]));
|
||||
}
|
||||
re_offset=1; //skip DC
|
||||
for (i=0;i<PHY_vars_eNB->lte_frame_parms.N_RB_DL*6;i++)
|
||||
txptr[re_offset++] = QPSK[taus()&3];
|
||||
}
|
||||
|
||||
|
||||
generate_pilots_slot(PHY_vars_eNB,
|
||||
PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id],
|
||||
1024,
|
||||
@@ -874,12 +882,7 @@ int main(int argc, char **argv) {
|
||||
1024,
|
||||
(subframe*2)+1,
|
||||
0);
|
||||
/*
|
||||
generate_pilots(PHY_vars_eNB,
|
||||
PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id],
|
||||
1024,
|
||||
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
|
||||
*/
|
||||
|
||||
|
||||
if (input_fd == NULL) {
|
||||
numCCE=0;
|
||||
@@ -924,8 +927,10 @@ int main(int argc, char **argv) {
|
||||
if (n_frames==1)
|
||||
printf("dci %d: rnti 0x%x, format %d, L %d, nCCE %d/%d dci_length %d\n",i,DCI_pdu.dci_alloc[i].rnti, DCI_pdu.dci_alloc[i].format,
|
||||
DCI_pdu.dci_alloc[i].L, DCI_pdu.dci_alloc[i].nCCE, DCI_pdu.nCCE, DCI_pdu.dci_alloc[i].dci_length);
|
||||
if (DCI_pdu.dci_alloc[i].nCCE==-1)
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
|
||||
num_pdcch_symbols = generate_dci_top(DCI_pdu.Num_ue_spec_dci,
|
||||
DCI_pdu.Num_common_dci,
|
||||
DCI_pdu.dci_alloc,
|
||||
@@ -934,7 +939,7 @@ int main(int argc, char **argv) {
|
||||
&PHY_vars_eNB->lte_frame_parms,
|
||||
PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id],
|
||||
subframe);
|
||||
|
||||
|
||||
if (n_frames==1)
|
||||
printf("num_pdcch_symbols at TX %d\n",num_pdcch_symbols);
|
||||
|
||||
@@ -987,55 +992,11 @@ int main(int argc, char **argv) {
|
||||
}
|
||||
|
||||
// write_output("pilotsF.m","rsF",txdataF[0],lte_PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size,1,1);
|
||||
#ifdef IFFT_FPGA
|
||||
if (n_frames==1) {
|
||||
write_output("txsigF0.m","txsF0", PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][0],12*PHY_vars_UE->lte_frame_parms.N_RB_DL*120,1,4);
|
||||
if (PHY_vars_eNB->lte_frame_parms.nb_antennas_tx_eNB > 1)
|
||||
write_output("txsigF1.m","txsF1", PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][1],12*PHY_vars_UE->lte_frame_parms.N_RB_DL*120,1,4);
|
||||
}
|
||||
|
||||
// do talbe lookup and write results to txdataF2
|
||||
for (aa=0;aa<PHY_vars_eNB->lte_frame_parms.nb_antennas_tx_eNB;aa++) {
|
||||
l = 0;
|
||||
for (i=0;i<FRAME_LENGTH_COMPLEX_SAMPLES_NO_PREFIX;i++)
|
||||
if ((i%512>=1) && (i%512<=150))
|
||||
txdataF2[aa][i] = ((int*)mod_table)[PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][l++]];
|
||||
else if (i%512>=362)
|
||||
txdataF2[aa][i] = ((int*)mod_table)[PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][aa][l++]];
|
||||
else
|
||||
txdataF2[aa][i] = 0;
|
||||
//printf("l=%d\n",l);
|
||||
}
|
||||
if (n_frames==1) {
|
||||
write_output("txsigF20.m","txsF20", txdataF2[0],FRAME_LENGTH_COMPLEX_SAMPLES_NO_PREFIX,1,1);
|
||||
//write_output("txsigF21.m","txsF21", txdataF2[1],FRAME_LENGTH_COMPLEX_SAMPLES_NO_PREFIX,1,1);
|
||||
}
|
||||
|
||||
tx_lev=0;
|
||||
|
||||
for (aa=0; aa<PHY_vars_eNB->lte_frame_parms.nb_antennas_tx_eNB; aa++) {
|
||||
|
||||
if (PHY_vars_eNB->lte_frame_parms.Ncp == 1)
|
||||
PHY_ofdm_mod(&txdataF2[aa][subframe*nsymb*PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size], // input
|
||||
&txdata[aa][subframe*PHY_vars_eNB->lte_frame_parms.samples_per_tti], // output
|
||||
PHY_vars_eNB->lte_frame_parms.log2_symbol_size, // log2_fft_size
|
||||
2*nsymb, // number of symbols
|
||||
PHY_vars_eNB->lte_frame_parms.nb_prefix_samples, // number of prefix samples
|
||||
PHY_vars_eNB->lte_frame_parms.twiddle_ifft, // IFFT twiddle factors
|
||||
PHY_vars_eNB->lte_frame_parms.rev, // bit-reversal permutation
|
||||
CYCLIC_PREFIX);
|
||||
else {
|
||||
normal_prefix_mod(&txdataF2[aa][subframe*nsymb*PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size],
|
||||
&txdata[aa][subframe*PHY_vars_eNB->lte_frame_parms.samples_per_tti],2*nsymb,frame_parms);
|
||||
}
|
||||
tx_lev += signal_energy(&txdata[aa][subframe*PHY_vars_eNB->lte_frame_parms.samples_per_tti],
|
||||
PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size);
|
||||
}
|
||||
#else
|
||||
if (n_frames==1)
|
||||
write_output("txsigF0.m","txsF0", PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][0],2*nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX,1,1);
|
||||
write_output("txsigF0.m","txsF0", PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][0],4*nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX,1,1);
|
||||
if (PHY_vars_eNB->lte_frame_parms.nb_antennas_tx_eNB > 1)
|
||||
write_output("txsigF1.m","txsF1", PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][1],2*nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX,1,1);
|
||||
write_output("txsigF1.m","txsF1", PHY_vars_eNB->lte_eNB_common_vars.txdataF[eNb_id][1],4*nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES_NO_PREFIX,1,1);
|
||||
|
||||
tx_lev = 0;
|
||||
|
||||
@@ -1061,8 +1022,6 @@ int main(int argc, char **argv) {
|
||||
tx_lev += signal_energy(&txdata[aa][subframe*PHY_vars_eNB->lte_frame_parms.samples_per_tti],
|
||||
PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
tx_lev_dB = (unsigned int) dB_fixed(tx_lev);
|
||||
}
|
||||
@@ -1076,8 +1035,16 @@ int main(int argc, char **argv) {
|
||||
s_im[aa][i] = ((double)(((short *)txdata[aa]))[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + (i<<1)+1]);
|
||||
}
|
||||
else {
|
||||
r_re[aa][i] = ((double)(((short *)txdata[aa]))[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + (i<<1)]);
|
||||
r_im[aa][i] = ((double)(((short *)txdata[aa]))[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + (i<<1)+1]);
|
||||
for (aarx=0;aarx<PHY_vars_UE->lte_frame_parms.nb_antennas_rx;aarx++) {
|
||||
if (aa==0) {
|
||||
r_re[aarx][i] = ((double)(((short *)txdata[aa]))[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + (i<<1)]);
|
||||
r_im[aarx][i] = ((double)(((short *)txdata[aa]))[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + (i<<1)+1]);
|
||||
}
|
||||
else {
|
||||
r_re[aarx][i] += ((double)(((short *)txdata[aa]))[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + (i<<1)]);
|
||||
r_im[aarx][i] += ((double)(((short *)txdata[aa]))[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + (i<<1)+1]);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1101,7 +1068,7 @@ int main(int argc, char **argv) {
|
||||
sigma2 = pow(10,sigma2_dB/10);
|
||||
// printf("Sigma2 %f (sigma2_dB %f)\n",sigma2,sigma2_dB);
|
||||
for (i=0; i<2*nsymb*OFDM_SYMBOL_SIZE_COMPLEX_SAMPLES; i++) {
|
||||
for (aa=0;aa<PHY_vars_eNB->lte_frame_parms.nb_antennas_rx;aa++) {
|
||||
for (aa=0;aa<PHY_vars_UE->lte_frame_parms.nb_antennas_rx;aa++) {
|
||||
|
||||
((short*) PHY_vars_UE->lte_ue_common_vars.rxdata[aa])[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + 2*i] = (short) (.667*(r_re[aa][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0)));
|
||||
((short*) PHY_vars_UE->lte_ue_common_vars.rxdata[aa])[(2*subframe*PHY_vars_UE->lte_frame_parms.samples_per_tti) + 2*i+1] = (short) (.667*(r_im[aa][i] + (iqim*r_re[aa][i]) + sqrt(sigma2/2)*gaussdouble(0.0,1.0)));
|
||||
@@ -1180,7 +1147,7 @@ int main(int argc, char **argv) {
|
||||
|
||||
if (is_phich_subframe(&PHY_vars_UE->lte_frame_parms,subframe)) {
|
||||
PHY_vars_UE->ulsch_ue[0]->harq_processes[phich_subframe_to_harq_pid(&PHY_vars_UE->lte_frame_parms,0,subframe)]->status = ACTIVE;
|
||||
PHY_vars_UE->ulsch_ue[0]->harq_processes[phich_subframe_to_harq_pid(&PHY_vars_UE->lte_frame_parms,0,subframe)]->Ndi = 1;
|
||||
//PHY_vars_UE->ulsch_ue[0]->harq_processes[phich_subframe_to_harq_pid(&PHY_vars_UE->lte_frame_parms,0,subframe)]->Ndi = 1;
|
||||
rx_phich(PHY_vars_UE,
|
||||
subframe,
|
||||
0);
|
||||
@@ -1237,20 +1204,21 @@ int main(int argc, char **argv) {
|
||||
if (PHY_vars_UE->lte_ue_pdcch_vars[0]->num_pdcch_symbols != num_pdcch_symbols)
|
||||
n_errors_cfi++;
|
||||
|
||||
|
||||
/*
|
||||
if (is_phich_subframe(&PHY_vars_UE->lte_frame_parms,subframe))
|
||||
if (PHY_vars_UE->ulsch_ue[0]->harq_processes[phich_subframe_to_harq_pid(&PHY_vars_UE->lte_frame_parms, PHY_vars_UE->frame, subframe)]->Ndi != phich_ACK)
|
||||
n_errors_hi++;
|
||||
*/
|
||||
|
||||
if (n_errors_cfi > 0)
|
||||
if (n_errors_cfi > 10)
|
||||
break;
|
||||
}
|
||||
|
||||
} // symbol loop
|
||||
|
||||
if (n_errors_cfi > 0)
|
||||
if (n_errors_cfi > 100)
|
||||
break;
|
||||
if ((n_errors_ul>100) && (n_errors_dl>100) && (n_errors_common>100))
|
||||
if ((n_errors_ul>1000) && (n_errors_dl>1000) && (n_errors_common>1000))
|
||||
break;
|
||||
|
||||
#ifdef XFORMS
|
||||
@@ -1275,6 +1243,10 @@ int main(int argc, char **argv) {
|
||||
write_output("txsig1.m","txs1", txdata[1],FRAME_LENGTH_COMPLEX_SAMPLES,1,1);
|
||||
write_output("rxsig0.m","rxs0", PHY_vars_UE->lte_ue_common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
|
||||
write_output("rxsigF0.m","rxsF0", PHY_vars_UE->lte_ue_common_vars.rxdataF[0],NUMBER_OF_OFDM_CARRIERS*2*((frame_parms->Ncp==0)?14:12),2,1);
|
||||
if (n_rx>1) {
|
||||
write_output("rxsig1.m","rxs1", PHY_vars_UE->lte_ue_common_vars.rxdata[1],10*frame_parms->samples_per_tti,1,1);
|
||||
write_output("rxsigF1.m","rxsF1", PHY_vars_UE->lte_ue_common_vars.rxdataF[1],NUMBER_OF_OFDM_CARRIERS*2*((frame_parms->Ncp==0)?14:12),2,1);
|
||||
}
|
||||
write_output("H00.m","h00",&(PHY_vars_UE->lte_ue_common_vars.dl_ch_estimates[0][0][0]),((frame_parms->Ncp==0)?7:6)*(PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size),1,1);
|
||||
if (n_tx==2)
|
||||
write_output("H10.m","h10",&(PHY_vars_UE->lte_ue_common_vars.dl_ch_estimates[0][2][0]),((frame_parms->Ncp==0)?7:6)*(PHY_vars_eNB->lte_frame_parms.ofdm_symbol_size),1,1);
|
||||
@@ -1283,15 +1255,6 @@ int main(int argc, char **argv) {
|
||||
write_output("pdcch_rxF_llr.m","pdcch_llr",PHY_vars_UE->lte_ue_pdcch_vars[eNb_id]->llr,2400,1,4);
|
||||
}
|
||||
|
||||
#ifdef IFFT_FPGA
|
||||
free(txdataF2[0]);
|
||||
free(txdataF2[1]);
|
||||
free(txdataF2);
|
||||
free(txdata[0]);
|
||||
free(txdata[1]);
|
||||
free(txdata);
|
||||
#endif
|
||||
|
||||
for (i=0;i<2;i++) {
|
||||
free(s_re[i]);
|
||||
free(s_im[i]);
|
||||
|
||||
@@ -798,15 +798,15 @@ int main(int argc, char **argv) {
|
||||
// printf("Trial %d : Round %d ",trials,round);
|
||||
round_trials[round]++;
|
||||
if (round == 0) {
|
||||
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->Ndi = 1;
|
||||
//PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->Ndi = 1;
|
||||
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->rvidx = round>>1;
|
||||
PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->Ndi = 1;
|
||||
//PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->Ndi = 1;
|
||||
PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->rvidx = round>>1;
|
||||
}
|
||||
else {
|
||||
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->Ndi = 0;
|
||||
//PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->Ndi = 0;
|
||||
PHY_vars_eNB->ulsch_eNB[0]->harq_processes[harq_pid]->rvidx = round>>1;
|
||||
PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->Ndi = 0;
|
||||
//PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->Ndi = 0;
|
||||
PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->rvidx = round>>1;
|
||||
}
|
||||
|
||||
|
||||
@@ -467,7 +467,10 @@ typedef struct{
|
||||
typedef struct{
|
||||
/// C-RNTI of UE
|
||||
u16 rnti;
|
||||
|
||||
/// NDI from last scheduling
|
||||
uint8_t oldNDI[8];
|
||||
/// NDI from last UL scheduling
|
||||
uint8_t oldNDI_UL[8];
|
||||
/// Flag to indicate UL has been scheduled at least once
|
||||
int ul_active;
|
||||
|
||||
|
||||
@@ -385,11 +385,15 @@ u8 find_num_active_UEs_in_cbagroup(unsigned char Mod_id, unsigned char group_id)
|
||||
}
|
||||
#endif
|
||||
s8 add_new_ue(unsigned char Mod_id, u16 rnti) {
|
||||
unsigned char i;
|
||||
int i,j;
|
||||
|
||||
for (i=0;i<NUMBER_OF_UE_MAX;i++) {
|
||||
if (eNB_mac_inst[Mod_id].UE_template[i].rnti==0) {
|
||||
eNB_mac_inst[Mod_id].UE_template[i].rnti=rnti;
|
||||
for (j=0;j<8;j++) {
|
||||
eNB_mac_inst[Mod_id].UE_template[i].oldNDI[j]=1;
|
||||
eNB_mac_inst[Mod_id].UE_template[i].oldNDI_UL[j]=1;
|
||||
}
|
||||
eNB_ulsch_info[Mod_id][i].status = S_UL_WAITING;
|
||||
eNB_dlsch_info[Mod_id][i].status = S_UL_WAITING;
|
||||
LOG_D(MAC,"[eNB] Add UE_id %d : rnti %x\n",i,eNB_mac_inst[Mod_id].UE_template[i].rnti);
|
||||
@@ -1629,6 +1633,7 @@ void schedule_RA(unsigned char Mod_id,u32 frame, unsigned char subframe,unsigned
|
||||
|
||||
// Compute MCS for 3 PRB
|
||||
msg4_header = 1+6+1; // CR header, CR CE, SDU header
|
||||
|
||||
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
||||
|
||||
switch (mac_xface->lte_frame_parms->N_RB_DL) {
|
||||
@@ -2206,23 +2211,14 @@ void schedule_ulsch_rnti(u8 Mod_id, unsigned char cooperation_flag, u32 frame, u
|
||||
cqi_req = 1;
|
||||
|
||||
if (round > 0) {
|
||||
ndi = 0; // if round != 0, it means the data is not new. ndi:new data indicator
|
||||
ndi = eNB_mac_inst[Mod_id].UE_template[UE_id].oldNDI_UL[harq_pid];
|
||||
mcs = (round&3) + 28; //not correct for round==4!
|
||||
}
|
||||
else {
|
||||
ndi = 1;
|
||||
}
|
||||
//if ((frame&1)==0) {
|
||||
|
||||
// choose this later based on Power Headroom
|
||||
if (ndi == 1) {// set mcs for first round
|
||||
ndi = 1-eNB_mac_inst[Mod_id].UE_template[UE_id].oldNDI_UL[harq_pid];
|
||||
eNB_mac_inst[Mod_id].UE_template[UE_id].oldNDI_UL[harq_pid]=ndi;
|
||||
mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
}
|
||||
else { // increment RV
|
||||
if ((round&3)==0)
|
||||
mcs = openair_daq_vars.target_ue_ul_mcs; // same as inital transmission
|
||||
else
|
||||
mcs = (round&3) + 28; //not correct for round==4!
|
||||
}
|
||||
|
||||
LOG_D(MAC,"[eNB %d] ULSCH scheduler: Ndi %d, mcs %d\n",Mod_id,ndi,mcs);
|
||||
|
||||
@@ -2232,7 +2228,7 @@ void schedule_ulsch_rnti(u8 Mod_id, unsigned char cooperation_flag, u32 frame, u
|
||||
((next_ue-1)*4),//openair_daq_vars.ue_ul_nb_rb),
|
||||
4);//openair_daq_vars.ue_ul_nb_rb);
|
||||
}
|
||||
else if ((ndi==1) && (mcs < 29)) {
|
||||
else if ((round==0) && (mcs < 29)) {
|
||||
rb_table_index = 1;
|
||||
TBS = mac_xface->get_TBS_UL(mcs,rb_table[rb_table_index]);
|
||||
buffer_occupancy = ((eNB_mac_inst[Mod_id].UE_template[UE_id].bsr_info[LCGID0] == 0) &&
|
||||
@@ -2680,6 +2676,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
BCCH_alloc_pdu,
|
||||
@@ -2697,6 +2694,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
BCCH_alloc_pdu,
|
||||
@@ -2714,6 +2712,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
BCCH_alloc_pdu,
|
||||
@@ -2731,6 +2730,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
BCCH_alloc_pdu,
|
||||
@@ -2752,6 +2752,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
@@ -2770,6 +2771,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
@@ -2788,6 +2790,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
@@ -2806,6 +2809,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rv = 1;
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->harq_pid = 0;
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->TPC = 1;
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->padding = 0;
|
||||
|
||||
rballoc |= mac_xface->get_rballoc(0,((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc);
|
||||
add_common_dci(DCI_pdu,
|
||||
@@ -2853,6 +2857,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2865,7 +2870,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2878,7 +2883,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2891,7 +2896,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2904,7 +2909,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2921,6 +2926,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_1_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_1_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_1_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_1_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_1_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_1_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2933,6 +2939,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_UL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2945,6 +2952,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_10MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_10MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_10MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_10MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_10MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_10MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -2957,6 +2965,7 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
((DCI1A_20MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->mcs=0;
|
||||
((DCI1A_20MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_20MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_20MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_20MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(mac_xface->lte_frame_parms->N_RB_DL,first_rb,4);
|
||||
rballoc |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_20MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu1[0])->rballoc);
|
||||
@@ -3124,9 +3133,9 @@ void fill_DLSCH_dci(unsigned char Mod_id,u32 frame, unsigned char subframe,u32 R
|
||||
if (round>0) {
|
||||
// we have to schedule a retransmission
|
||||
if (mac_xface->lte_frame_parms->frame_type == TDD)
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu2[0])->ndi=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
||||
else
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu2[0])->ndi=0;
|
||||
((DCI1A_5MHz_FDD_t*)&eNB_mac_inst[Mod_id].RA_template[i].RA_alloc_pdu2[0])->ndi=1;
|
||||
// randomize frequency allocation for RA
|
||||
while (1) {
|
||||
first_rb = (unsigned char)(taus()%(mac_xface->lte_frame_parms->N_RB_DL-4));
|
||||
@@ -3628,14 +3637,14 @@ void schedule_ue_spec(unsigned char Mod_id,
|
||||
switch (mac_xface->lte_frame_parms->N_RB_DL) {
|
||||
case 6:
|
||||
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",Mod_id,harq_pid,round,(eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1),((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->mcs);
|
||||
}
|
||||
else {
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rv = round&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",Mod_id,harq_pid,round,((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->mcs);
|
||||
@@ -3644,14 +3653,14 @@ void schedule_ue_spec(unsigned char Mod_id,
|
||||
break;
|
||||
case 25:
|
||||
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",Mod_id,harq_pid,round,(eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1),((DCI1_5MHz_TDD_t*)DLSCH_dci)->mcs);
|
||||
}
|
||||
else {
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv = round&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",Mod_id,harq_pid,round,((DCI1_5MHz_FDD_t*)DLSCH_dci)->mcs);
|
||||
@@ -3660,14 +3669,14 @@ void schedule_ue_spec(unsigned char Mod_id,
|
||||
break;
|
||||
case 50:
|
||||
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",Mod_id,harq_pid,round,(eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1),((DCI1_10MHz_TDD_t*)DLSCH_dci)->mcs);
|
||||
}
|
||||
else {
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_10MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->rv = round&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",Mod_id,harq_pid,round,((DCI1_10MHz_FDD_t*)DLSCH_dci)->mcs);
|
||||
@@ -3676,14 +3685,14 @@ void schedule_ue_spec(unsigned char Mod_id,
|
||||
break;
|
||||
case 100:
|
||||
if (mac_xface->lte_frame_parms->frame_type == TDD) {
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, dai %d, mcs %d\n",Mod_id,harq_pid,round,(eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1),((DCI1_20MHz_TDD_t*)DLSCH_dci)->mcs);
|
||||
}
|
||||
else {
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
// ((DCI1_20MHz_FDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->rv = round&3;
|
||||
LOG_D(MAC,"[eNB %d] Retransmission : harq_pid %d, round %d, mcs %d\n",Mod_id,harq_pid,round,((DCI1_20MHz_FDD_t*)DLSCH_dci)->mcs);
|
||||
@@ -4018,35 +4027,36 @@ void schedule_ue_spec(unsigned char Mod_id,
|
||||
case 6:
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
break;
|
||||
case 25:
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
LOG_D(MAC,"Format1 DCI: harq_pid %d, ndi %d\n",harq_pid,((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi);
|
||||
break;
|
||||
case 50:
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->rv = 0;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
break;
|
||||
case 100:
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->rv = 0;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
break;
|
||||
default:
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = 0;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->dai = (eNB_mac_inst[Mod_id].UE_template[next_ue].DAI-1)&3;
|
||||
break;
|
||||
@@ -4057,31 +4067,31 @@ void schedule_ue_spec(unsigned char Mod_id,
|
||||
case 6:
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
|
||||
break;
|
||||
case 25:
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
|
||||
break;
|
||||
case 50:
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->rv = 0;
|
||||
break;
|
||||
case 100:
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->rv = 0;
|
||||
break;
|
||||
default:
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1;
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->ndi = 1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rv = 0;
|
||||
break;
|
||||
}
|
||||
@@ -4127,9 +4137,10 @@ void schedule_ue_spec(unsigned char Mod_id,
|
||||
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->tpmi = 5;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
|
||||
// Toggle NDI for next time
|
||||
LOG_D(MAC,"Frame %d, subframe %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",frame,subframe,next_ue,
|
||||
eNB_mac_inst[Mod_id].UE_template[next_ue].rnti,harq_pid,eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid]);
|
||||
eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid]=1-eNB_mac_inst[Mod_id].UE_template[next_ue].oldNDI[harq_pid];
|
||||
}
|
||||
|
||||
else { // There is no data from RLC or MAC header, so don't schedule
|
||||
@@ -4414,9 +4425,10 @@ void eNB_dlsch_ulsch_scheduler(u8 Mod_id,u8 cooperation_flag, u32 frame, u8 subf
|
||||
}
|
||||
else {
|
||||
if (mac_xface->lte_frame_parms->frame_type == FDD) { //FDD
|
||||
schedule_RA(Mod_id,frame,subframe,0,&nprb,&nCCE);
|
||||
// schedule_ulsch(Mod_id,cooperation_flag,subframe,&nCCE,calibration_flag);
|
||||
// schedule_ue_spec(Mod_id,subframe,nprb,&nCCE,mbsfn_status);
|
||||
// fill_DLSCH_dci(Mod_id,subframe,RBalloc,0,mbsfn_status);
|
||||
fill_DLSCH_dci(Mod_id,frame,subframe,RBalloc,1,mbsfn_status);
|
||||
}
|
||||
}
|
||||
break;
|
||||
@@ -4429,9 +4441,9 @@ void eNB_dlsch_ulsch_scheduler(u8 Mod_id,u8 cooperation_flag, u32 frame, u8 subf
|
||||
schedule_SI(Mod_id,frame,&nprb,&nCCE);
|
||||
//schedule_RA(Mod_id,frame,subframe,5,&nprb,&nCCE);
|
||||
if ((mac_xface->lte_frame_parms->frame_type == FDD) ) {
|
||||
schedule_RA(Mod_id,frame,subframe,1,&nprb,&nCCE);
|
||||
// schedule_RA(Mod_id,frame,subframe,1,&nprb,&nCCE);
|
||||
//schedule_ulsch(Mod_id,cooperation_flag,subframe,&nCCE);
|
||||
fill_DLSCH_dci(Mod_id,frame,subframe,RBalloc,1,mbsfn_status);
|
||||
fill_DLSCH_dci(Mod_id,frame,subframe,RBalloc,0,mbsfn_status);
|
||||
|
||||
}
|
||||
else if ((mac_xface->lte_frame_parms->tdd_config == 0) || // TDD Config 0
|
||||
|
||||
Reference in New Issue
Block a user