refactoring nr_generate_Msg3_retransmission
replacing if(X) logic with if(!X) logic
This commit is contained in:
@@ -813,186 +813,186 @@ static void nr_generate_Msg3_retransmission(module_id_t module_idP,
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const int sched_frame = (frame + (slot + K2) / slots_frame) % MAX_FRAME_NUMBER;
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const int sched_slot = (slot + K2) % slots_frame;
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if (is_dl_slot(slot, &nr_mac->frame_structure) && is_ul_slot(sched_slot, &nr_mac->frame_structure)) {
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NR_beam_alloc_t beam_ul = beam_allocation_procedure(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame);
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if (beam_ul.idx < 0)
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return;
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NR_beam_alloc_t beam_dci = beam_allocation_procedure(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame);
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if (beam_dci.idx < 0) {
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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return;
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}
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int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size);
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uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul.idx][buffer_index * MAX_BWP_SIZE];
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if (!is_dl_slot(slot, &nr_mac->frame_structure) || !is_ul_slot(sched_slot, &nr_mac->frame_structure))
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return;
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NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, 1);
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int num_dmrs_symb = count_bits64_with_mask(dmrs_info.ul_dmrs_symb_pos, tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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int TBS = 0, mcsindex = 0, R = 0, Qm = 0;
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while(TBS < 7) { // TBS for msg3 is 7 bytes (except for RRCResumeRequest1 currently not implemented)
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mcsindex++;
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AssertFatal(mcsindex <= 28, "Exceeding MCS limit for Msg3\n");
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R = nr_get_code_rate_ul(mcsindex, ul_bwp->mcs_table);
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Qm = nr_get_Qm_ul(mcsindex, ul_bwp->mcs_table);
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TBS = nr_compute_tbs(Qm,
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R,
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ra->msg3_nb_rb,
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tda_info.nrOfSymbols,
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num_dmrs_symb * 12, // nb dmrs set for no data in dmrs symbol
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0, //nb_rb_oh
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0, // to verify tb scaling
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1) >> 3;
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}
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NR_sched_pusch_t sched_pusch = {
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.bwp_info = get_pusch_bwp_start_size(UE),
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.tb_size = TBS,
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.rbSize = ra->msg3_nb_rb,
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.R = R,
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.Qm = Qm,
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.mcs = mcsindex,
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.nrOfLayers = 1,
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.tda_info = tda_info,
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.dmrs_info = dmrs_info,
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};
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int rbStart = 0;
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for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (sched_pusch.bwp_info.bwpSize - ra->msg3_nb_rb)); i++) {
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if (vrb_map_UL[rbStart + sched_pusch.bwp_info.bwpStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) {
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rbStart += i;
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i = 0;
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}
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}
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if (rbStart > (sched_pusch.bwp_info.bwpSize - ra->msg3_nb_rb)) {
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// cannot find free vrb_map for msg3 retransmission in this slot
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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reset_beam_status(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
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return;
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}
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sched_pusch.rbStart = rbStart;
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LOG_I(NR_MAC,
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"%4d%2d: RA RNTI %04x CC_id %d Scheduling retransmission of Msg3 in (%d,%d)\n",
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frame,
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slot,
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UE->rnti,
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CC_id,
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sched_frame,
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sched_slot);
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buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->UL_tti_req_ahead_size);
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nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[CC_id][buffer_index];
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AssertFatal(future_ul_tti_req->SFN == sched_frame
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&& future_ul_tti_req->Slot == sched_slot,
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"future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
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future_ul_tti_req->SFN,
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future_ul_tti_req->Slot,
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sched_frame,
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sched_slot);
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AssertFatal(future_ul_tti_req->n_pdus <
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sizeof(future_ul_tti_req->pdus_list) / sizeof(future_ul_tti_req->pdus_list[0]),
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"Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req,
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UE,
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scc,
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&sched_pusch,
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get_transformPrecoding(ul_bwp, NR_UL_DCI_FORMAT_0_0, 0),
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0,
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ra->msg3_round,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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UE->rnti,
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nr_mac->beam_info.beam_mode);
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future_ul_tti_req->n_pdus += 1;
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// generation of DCI 0_0 to schedule msg3 retransmission
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid];
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if (!pdcch_pdu_rel15) {
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nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus];
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memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t));
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ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
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ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
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pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
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ul_dci_req->numPdus += 1;
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, &UE->UE_sched_ctrl.sched_pdcch);
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nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
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}
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int aggregation_level;
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int CCEIndex = get_cce_index(nr_mac,
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CC_id, slot, 0,
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&aggregation_level,
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beam_dci.idx,
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ss,
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coreset,
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&UE->UE_sched_ctrl.sched_pdcch,
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0);
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if (CCEIndex < 0) {
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LOG_E(NR_MAC, "UE %04x cannot find free CCE!\n", UE->rnti);
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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reset_beam_status(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
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return;
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}
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// Fill PDCCH DL DCI PDU
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const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
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nfapi_nr_dl_dci_pdu_t *dci_pdu =
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prepare_dci_pdu(pdcch_pdu_rel15, scc, ss, coreset, aggregation_level, CCEIndex, fapi_beam, UE->rnti);
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pdcch_pdu_rel15->numDlDci++;
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dci_pdu_rel15_t uldci_payload = {0};
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config_uldci(sc_info,
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pusch_pdu,
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&uldci_payload,
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NULL,
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NULL,
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ra->Msg3_tda_id,
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ra->msg3_TPC,
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1, // Not toggling NDI in msg3 retransmissions
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ul_bwp,
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ss->searchSpaceType->present);
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// Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR
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ra->msg3_TPC = 1;
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fill_dci_pdu_rel15(sc_info,
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&UE->current_DL_BWP,
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ul_bwp,
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dci_pdu,
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&uldci_payload,
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NR_UL_DCI_FORMAT_0_0,
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TYPE_TC_RNTI_,
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ss,
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coreset,
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0, // parameter not needed for DCI 0_0
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nr_mac->cset0_bwp_size);
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// Mark the corresponding RBs as used
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fill_pdcch_vrb_map(nr_mac,
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CC_id,
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&UE->UE_sched_ctrl.sched_pdcch,
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CCEIndex,
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aggregation_level,
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beam_dci.idx);
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for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
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vrb_map_UL[rbStart + sched_pusch.bwp_info.bwpStart + rb] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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}
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// Restart RA contention resolution timer in Msg3 retransmission slot (current slot + K2)
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// 3GPP TS 38.321 Section 5.1.5 Contention Resolution
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start_ra_contention_resolution_timer(
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ra,
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scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer,
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K2,
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ul_bwp->scs);
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// reset state to wait msg3
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ra->ra_state = nrRA_WAIT_Msg3;
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ra->Msg3_frame = sched_frame;
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ra->Msg3_slot = sched_slot;
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NR_beam_alloc_t beam_ul = beam_allocation_procedure(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame);
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if (beam_ul.idx < 0)
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return;
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NR_beam_alloc_t beam_dci = beam_allocation_procedure(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame);
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if (beam_dci.idx < 0) {
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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return;
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}
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int buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->vrb_map_UL_size);
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uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[beam_ul.idx][buffer_index * MAX_BWP_SIZE];
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NR_pusch_dmrs_t dmrs_info = get_ul_dmrs_params(scc, ul_bwp, &tda_info, 1);
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int num_dmrs_symb = count_bits64_with_mask(dmrs_info.ul_dmrs_symb_pos, tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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int TBS = 0, mcsindex = 0, R = 0, Qm = 0;
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while(TBS < 7) { // TBS for msg3 is 7 bytes (except for RRCResumeRequest1 currently not implemented)
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mcsindex++;
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AssertFatal(mcsindex <= 28, "Exceeding MCS limit for Msg3\n");
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R = nr_get_code_rate_ul(mcsindex, ul_bwp->mcs_table);
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Qm = nr_get_Qm_ul(mcsindex, ul_bwp->mcs_table);
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TBS = nr_compute_tbs(Qm,
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R,
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ra->msg3_nb_rb,
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tda_info.nrOfSymbols,
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num_dmrs_symb * 12, // nb dmrs set for no data in dmrs symbol
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0, //nb_rb_oh
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0, // to verify tb scaling
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1) >> 3;
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}
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NR_sched_pusch_t sched_pusch = {
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.bwp_info = get_pusch_bwp_start_size(UE),
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.tb_size = TBS,
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.rbSize = ra->msg3_nb_rb,
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.R = R,
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.Qm = Qm,
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.mcs = mcsindex,
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.nrOfLayers = 1,
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.tda_info = tda_info,
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.dmrs_info = dmrs_info,
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};
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int rbStart = 0;
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for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (sched_pusch.bwp_info.bwpSize - ra->msg3_nb_rb)); i++) {
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if (vrb_map_UL[rbStart + sched_pusch.bwp_info.bwpStart + i] & SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols)) {
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rbStart += i;
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i = 0;
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}
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}
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if (rbStart > (sched_pusch.bwp_info.bwpSize - ra->msg3_nb_rb)) {
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// cannot find free vrb_map for msg3 retransmission in this slot
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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reset_beam_status(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
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return;
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}
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sched_pusch.rbStart = rbStart;
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LOG_I(NR_MAC,
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"%4d%2d: RA RNTI %04x CC_id %d Scheduling retransmission of Msg3 in (%d,%d)\n",
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frame,
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slot,
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UE->rnti,
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CC_id,
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sched_frame,
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sched_slot);
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buffer_index = ul_buffer_index(sched_frame, sched_slot, slots_frame, nr_mac->UL_tti_req_ahead_size);
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nfapi_nr_ul_tti_request_t *future_ul_tti_req = &nr_mac->UL_tti_req_ahead[CC_id][buffer_index];
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AssertFatal(future_ul_tti_req->SFN == sched_frame
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&& future_ul_tti_req->Slot == sched_slot,
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"future UL_tti_req's frame.slot %d.%d does not match PUSCH %d.%d\n",
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future_ul_tti_req->SFN,
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future_ul_tti_req->Slot,
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sched_frame,
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sched_slot);
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AssertFatal(future_ul_tti_req->n_pdus <
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sizeof(future_ul_tti_req->pdus_list) / sizeof(future_ul_tti_req->pdus_list[0]),
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"Invalid future_ul_tti_req->n_pdus %d\n", future_ul_tti_req->n_pdus);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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nfapi_nr_pusch_pdu_t *pusch_pdu = prepare_pusch_pdu(future_ul_tti_req,
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UE,
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scc,
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&sched_pusch,
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get_transformPrecoding(ul_bwp, NR_UL_DCI_FORMAT_0_0, 0),
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0,
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ra->msg3_round,
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ul_bwp->pusch_Config && ul_bwp->pusch_Config->frequencyHopping,
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UE->rnti,
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nr_mac->beam_info.beam_mode);
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future_ul_tti_req->n_pdus += 1;
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// generation of DCI 0_0 to schedule msg3 retransmission
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid];
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if (!pdcch_pdu_rel15) {
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nfapi_nr_ul_dci_request_pdus_t *ul_dci_request_pdu = &ul_dci_req->ul_dci_pdu_list[ul_dci_req->numPdus];
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memset(ul_dci_request_pdu, 0, sizeof(nfapi_nr_ul_dci_request_pdus_t));
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ul_dci_request_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
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ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
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pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
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ul_dci_req->numPdus += 1;
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, &UE->UE_sched_ctrl.sched_pdcch);
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nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
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}
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int aggregation_level;
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int CCEIndex = get_cce_index(nr_mac,
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CC_id, slot, 0,
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&aggregation_level,
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beam_dci.idx,
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ss,
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coreset,
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&UE->UE_sched_ctrl.sched_pdcch,
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0);
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if (CCEIndex < 0) {
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LOG_E(NR_MAC, "UE %04x cannot find free CCE!\n", UE->rnti);
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reset_beam_status(&nr_mac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_frame, beam_ul.new_beam);
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reset_beam_status(&nr_mac->beam_info, frame, slot, UE->UE_beam_index, slots_frame, beam_dci.new_beam);
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return;
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}
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// Fill PDCCH DL DCI PDU
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const uint16_t fapi_beam = convert_to_fapi_beam(UE->UE_beam_index, nr_mac->beam_info.beam_mode);
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nfapi_nr_dl_dci_pdu_t *dci_pdu =
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prepare_dci_pdu(pdcch_pdu_rel15, scc, ss, coreset, aggregation_level, CCEIndex, fapi_beam, UE->rnti);
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pdcch_pdu_rel15->numDlDci++;
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dci_pdu_rel15_t uldci_payload = {0};
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config_uldci(sc_info,
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pusch_pdu,
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&uldci_payload,
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NULL,
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NULL,
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ra->Msg3_tda_id,
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ra->msg3_TPC,
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1, // Not toggling NDI in msg3 retransmissions
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ul_bwp,
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ss->searchSpaceType->present);
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// Reset TPC to 0 dB to not request new gain multiple times before computing new value for SNR
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ra->msg3_TPC = 1;
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fill_dci_pdu_rel15(sc_info,
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&UE->current_DL_BWP,
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ul_bwp,
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dci_pdu,
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&uldci_payload,
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NR_UL_DCI_FORMAT_0_0,
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TYPE_TC_RNTI_,
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ss,
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coreset,
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0, // parameter not needed for DCI 0_0
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nr_mac->cset0_bwp_size);
|
||||
|
||||
// Mark the corresponding RBs as used
|
||||
fill_pdcch_vrb_map(nr_mac,
|
||||
CC_id,
|
||||
&UE->UE_sched_ctrl.sched_pdcch,
|
||||
CCEIndex,
|
||||
aggregation_level,
|
||||
beam_dci.idx);
|
||||
|
||||
for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
|
||||
vrb_map_UL[rbStart + sched_pusch.bwp_info.bwpStart + rb] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
|
||||
}
|
||||
|
||||
// Restart RA contention resolution timer in Msg3 retransmission slot (current slot + K2)
|
||||
// 3GPP TS 38.321 Section 5.1.5 Contention Resolution
|
||||
start_ra_contention_resolution_timer(
|
||||
ra,
|
||||
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ra_ContentionResolutionTimer,
|
||||
K2,
|
||||
ul_bwp->scs);
|
||||
|
||||
// reset state to wait msg3
|
||||
ra->ra_state = nrRA_WAIT_Msg3;
|
||||
ra->Msg3_frame = sched_frame;
|
||||
ra->Msg3_slot = sched_slot;
|
||||
}
|
||||
|
||||
static bool get_feasible_msg3_tda(const NR_ServingCellConfigCommon_t *scc,
|
||||
|
||||
Reference in New Issue
Block a user