gNB runs with rfsimulator.
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@@ -144,4 +144,5 @@ void SLIV2SL(int SLIV,int *S,int *L) {
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*L=15-SLIVdiv14;
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*S=13-SLIVmod14;
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}
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}
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@@ -329,33 +329,25 @@ int configure_fapi_dl_Tx(int Mod_idP,
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dlsch_pdu_rel15->VRBtoPRBMapping = 1; // non-interleaved, check if this is ok for initialBWP
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// choose shortest PDSCH
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int startSymbolAndLength=0;
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int StartSymbolIndex,NrOfSymbols=14,k0=0;
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int StartSymbolIndex_tmp,NrOfSymbols_tmp=2;
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int time_domain_assignment=0;
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int time_domain_assignment=2;
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int StartSymbolIndex,NrOfSymbols;
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for (int i=0;
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i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
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i++) {
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startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
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SLIV2SL(startSymbolAndLength,&StartSymbolIndex_tmp,&NrOfSymbols_tmp);
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if (NrOfSymbols_tmp > NrOfSymbols) {
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NrOfSymbols = NrOfSymbols_tmp;
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StartSymbolIndex = StartSymbolIndex_tmp;
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k0 = *bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
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time_domain_assignment = i;
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}
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}
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dlsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
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dlsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
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dlsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
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scc->dmrs_TypeA_Position,
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NrOfSymbols);
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AssertFatal(time_domain_assignment<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count,"time_domain_assignment %d>=%d\n",time_domain_assignment,bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count);
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startSymbolAndLength = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->startSymbolAndLength;
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SLIV2SL(startSymbolAndLength,&StartSymbolIndex,&NrOfSymbols);
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dlsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
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dlsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
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// k0 = *bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
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dlsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
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scc->dmrs_TypeA_Position,
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dlsch_pdu_rel15->NrOfSymbols);
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dci_pdu_rel15_t dci_pdu_rel15;
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dci_pdu_rel15.frequency_domain_assignment = PRBalloc_to_locationandbandwidth0(dlsch_pdu_rel15->rbStart,
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dlsch_pdu_rel15->rbSize,
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NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275));
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dci_pdu_rel15.time_domain_assignment = 3; // row index used here instead of SLIV;
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dci_pdu_rel15.time_domain_assignment = time_domain_assignment; // row index used here instead of SLIV;
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dci_pdu_rel15.vrb_to_prb_mapping = 1;
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dci_pdu_rel15.mcs = dlsch_pdu_rel15->mcsIndex[0];
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dci_pdu_rel15.tb_scaling = 1;
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@@ -384,36 +376,42 @@ int configure_fapi_dl_Tx(int Mod_idP,
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scc,
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bwp);
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pdcch_pdu_rel15->numDlDci = 1;
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pdcch_pdu_rel15->AggregationLevel[0] = 4;
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pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0];
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pdcch_pdu_rel15->CceIndex[0] = 0;
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pdcch_pdu_rel15->beta_PDCCH_1_0[0]=0;
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pdcch_pdu_rel15->powerControlOffsetSS[0]=1;
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int dci_formats[pdcch_pdu_rel15->numDlDci];
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int rnti_types[pdcch_pdu_rel15->numDlDci];
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dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
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rnti_types[0] = NR_RNTI_C;
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pdcch_pdu_rel15->numDlDci = 1;
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pdcch_pdu_rel15->AggregationLevel[0] = 4;
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pdcch_pdu_rel15->RNTI[0]=UE_list->rnti[0];
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pdcch_pdu_rel15->CceIndex[0] = 0;
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pdcch_pdu_rel15->beta_PDCCH_1_0[0]=0;
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pdcch_pdu_rel15->powerControlOffsetSS[0]=1;
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fill_dci_pdu_rel15(&dci_pdu_rel15,pdcch_pdu_rel15,dci_formats,rnti_types);
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int dci_formats[pdcch_pdu_rel15->numDlDci];
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int rnti_types[pdcch_pdu_rel15->numDlDci];
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LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \
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coreset params: FreqDomainResource %llx, n_symb %d \n \
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ss params : first symb %d\n",
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dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
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rnti_types[0] = NR_RNTI_C;
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for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++)
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pdcch_pdu_rel15->PayloadSizeBits[i]=nr_dci_size(dci_formats[i],rnti_types[i],dlsch_pdu_rel15->BWPSize);
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fill_dci_pdu_rel15(pdcch_pdu_rel15,&dci_pdu_rel15,dci_formats,rnti_types);
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LOG_I(MAC, "DCI params: rnti %d, rnti_type %d, dci_format %d\n \
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coreset params: FreqDomainResource %llx, start_symbol %d n_symb %d\n",
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pdcch_pdu_rel15->RNTI[0],
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rnti_types[0],
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dci_formats[0],
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(unsigned long long)pdcch_pdu_rel15->FreqDomainResource,
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pdcch_pdu_rel15->StartSymbolIndex);
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pdcch_pdu_rel15->StartSymbolIndex,
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pdcch_pdu_rel15->DurationSymbols);
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int x_Overhead = 0; // should be 0 for initialBWP
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nr_get_tbs_dl(&dl_config_dlsch_pdu->dlsch_pdu,
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x_Overhead);
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// Hardcode it for now
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TBS = dl_config_dlsch_pdu->dlsch_pdu.dlsch_pdu_rel15.TBSize[0];
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LOG_I(MAC, "DLSCH PDU: start PRB %d n_PRB %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d TBS: %d\n",
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LOG_I(MAC, "DLSCH PDU: start PRB %d n_PRB %d startSymbolAndLength %d start symbol %d nb_symbols %d nb_layers %d nb_codewords %d mcs %d TBS: %d\n",
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dlsch_pdu_rel15->rbStart,
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dlsch_pdu_rel15->rbSize,
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startSymbolAndLength,
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dlsch_pdu_rel15->StartSymbolIndex,
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dlsch_pdu_rel15->NrOfSymbols,
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dlsch_pdu_rel15->nrOfLayers,
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@@ -599,7 +597,7 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
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}
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TBS_bytes = configure_fapi_dl_Tx(module_idP,dl_req, TX_req,
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nr_mac->pdu_index);
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nr_mac->pdu_index[CC_id]);
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#if defined(ENABLE_MAC_PAYLOAD_DEBUG)
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LOG_I(MAC, "Printing first 10 payload bytes at the gNB side, Frame: %d, slot: %d, , TBS size: %d \n \n", frameP, slotP, TBS_bytes);
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@@ -485,6 +485,8 @@ void nr_configure_pdcch(nfapi_nr_dl_config_pdcch_pdu_rel15_t* pdcch_pdu,
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}
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}
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void fill_dci_pdu_rel15(nfapi_nr_dl_config_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
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dci_pdu_rel15_t *dci_pdu_rel15,
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int *dci_formats,
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@@ -147,4 +147,8 @@ int get_num_dmrs(uint16_t dmrs_mask );
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int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols);
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uint16_t nr_dci_size(nr_dci_format_t format,
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nr_rnti_type_t rnti_type,
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uint16_t N_RB);
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#endif /*__LAYER2_NR_MAC_PROTO_H__*/
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@@ -368,3 +368,92 @@ int get_num_dmrs(uint16_t dmrs_mask ) {
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return(num_dmrs);
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}
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uint16_t nr_dci_size(nr_dci_format_t format,
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nr_rnti_type_t rnti_type,
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uint16_t N_RB) {
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uint16_t size = 0;
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switch(format) {
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/*Only sizes for 0_0 and 1_0 are correct at the moment*/
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case NR_UL_DCI_FORMAT_0_0:
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/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
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size += 20;
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size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
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size += nr_dci_size(NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB) - size; // Padding to match 1_0 size
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// UL/SUL indicator assumed to be 0
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break;
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case NR_UL_DCI_FORMAT_0_1:
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/// fixed: Format identifier 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2, SRS request 2 --17
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size += 17;
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// Carrier indicator
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// UL/SUL indicator
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// BWP Indicator
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// Freq domain assignment
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// Time domain assignment
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// VRB to PRB mapping
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// Frequency Hopping flag
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// 1st DAI
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// 2nd DAI
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// SRS resource indicator
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// Precoding info and number of layers
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// Antenna ports
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// CSI request
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// CBGTI
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// PTRS - DMRS association
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// beta offset indicator
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// DMRS sequence init
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break;
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case NR_DL_DCI_FORMAT_1_0:
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/// fixed: Format identifier 1, VRB2PRB 1, MCS 5, NDI 1, RV 2, HARQ PID 4, DAI 2, PUCCH TPC 2, PUCCH RInd 3, PDSCH to HARQ TInd 3 Time Domain assgnmt 4 -- 28
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size += 28;
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size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment
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break;
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case NR_DL_DCI_FORMAT_1_1:
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// Carrier indicator
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size += 1; // Format identifier
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// BWP Indicator
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// Freq domain assignment
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// Time domain assignment
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// VRB to PRB mapping
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// PRB bundling size indicator
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// Rate matching indicator
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// ZP CSI-RS trigger
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/// TB1- MCS 5, NDI 1, RV 2
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size += 8;
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// TB2
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size += 4 ; // HARQ PID
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// DAI
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size += 2; // TPC PUCCH
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size += 3; // PUCCH resource indicator
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size += 3; // PDSCH to HARQ timing indicator
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// Antenna ports
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// Tx Config Indication
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size += 2; // SRS request
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// CBGTI
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// CBGFI
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size += 1; // DMRS sequence init
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break;
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case NR_DL_DCI_FORMAT_2_0:
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break;
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case NR_DL_DCI_FORMAT_2_1:
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break;
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case NR_DL_DCI_FORMAT_2_2:
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break;
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case NR_DL_DCI_FORMAT_2_3:
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break;
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default:
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AssertFatal(1==0, "Invalid NR DCI format %d\n", format);
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}
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return size;
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}
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