Merge branch 'ru_rau_enhancement' of http://gitlab.eurecom.fr/oai/openairinterface5g into ru_rau_enhancement

Conflicts:
	targets/RT/USER/lte-ru.c
This commit is contained in:
Raymond Knopp
2018-06-06 08:12:41 +02:00
76 changed files with 3626 additions and 1046 deletions
+4 -1
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@@ -242,6 +242,7 @@ add_boolean_option(UE_DEBUG_TRACE False "Activate UE debug trace")
add_boolean_option(UE_TIMING_TRACE False "Activate UE timing trace")
add_boolean_option(DISABLE_LOG_X False "Deactivate all LOG_* macros")
add_boolean_option(USRP_REC_PLAY False "Enable USRP record playback mode")
add_boolean_option(UE_NAS_USE_TUN False "Enable UE NAS TUN device instead of ue_ip.ko")
add_boolean_option(DEBUG_CONSOLE False "makes debugging easier, disables stdout/stderr buffering")
@@ -280,7 +281,7 @@ set(protobuf_generated_dir ${OPENAIR_BIN_DIR})
# RRC
######
add_list2_option(RRC_ASN1_VERSION "Rel10" "ASN.1 version of RRC interface" "Rel8" "Rel10" "CBA")
add_list2_option(RRC_ASN1_VERSION "Rel14" "ASN.1 version of RRC interface" "Rel8" "Rel10" "Rel14" "CBA")
if (${RRC_ASN1_VERSION} STREQUAL "Rel8")
set (RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/LITE/MESSAGES/asn1c/ASN1_files/EUTRA-RRC-Definitions-86.asn)
@@ -1365,6 +1366,7 @@ set (MAC_SRC
${MAC_DIR}/eNB_scheduler_bch.c
${MAC_DIR}/eNB_scheduler_primitives.c
${MAC_DIR}/eNB_scheduler_RA.c
${MAC_DIR}/eNB_scheduler_phytest.c
${MAC_DIR}/pre_processor.c
${MAC_DIR}/config.c
${MAC_DIR}/config_ue.c
@@ -2238,6 +2240,7 @@ foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim pr
${XFORMS_SOURCE}
${T_SOURCE}
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (${myExe}
+21 -8
View File
@@ -67,6 +67,7 @@ UE_TIMING_TRACE="False"
DISABLE_LOG_X="False"
USRP_REC_PLAY="False"
BUILD_ECLIPSE=0
UE_NAS_USE_TUN="False"
trap handle_ctrl_c INT
function print_help() {
@@ -156,6 +157,8 @@ Options
Build eclipse project files. Paths are auto corrected by fixprj.sh
--usrp-recplay
Build for I/Q record-playback modes
--ue-nas-use-tun
Use TUN devices for the UEs instead of ue_ip.ko
Usage (first build):
oaisim (eNB + UE): ./build_oai -I --oaisim -x --install-system-files
Eurecom EXMIMO + COTS UE : ./build_oai -I --eNB -x --install-system-files
@@ -347,6 +350,10 @@ function main() {
USRP_REC_PLAY="True"
echo_info "Enabling USRP record playback mode"
shift 1;;
--ue-nas-use-tun)
UE_NAS_USE_TUN="True"
echo_info "Enabling UE NAS TUN device usage instead of ue_ip.ko"
shift 1;;
-h | --help)
print_help
exit 1;;
@@ -626,12 +633,17 @@ function main() {
if [ "$SIMUS_PHY" = "1" ] ; then
# lte unitary simulators compilation
echo_info "Compiling unitary tests simulators"
simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim"
# TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim
#simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim"
simlist="dlsim ulsim"
for f in $simlist ; do
compilations \
lte-simulators $f \
$f $dbin/$f.$REL
done
compilations \
lte-simulators coding \
libcoding.so $dbin/libcoding.so
fi
# Core simulators
@@ -680,13 +692,6 @@ function main() {
oaisim_build_dir=oaisim_build_oai
oaisim_exec=oaisim
fi
# mandatory shared lib
compilations \
$oaisim_build_dir $config_libconfig_shlib \
lib$config_libconfig_shlib.so $dbin/lib$config_libconfig_shlib.so
compilations \
$oaisim_build_dir coding \
libcoding.so $dbin/libcoding.so
echo_info "Compiling $oaisim_exec ($oaisim_build_dir)"
cmake_file=$DIR/$oaisim_build_dir/CMakeLists.txt
@@ -698,6 +703,7 @@ function main() {
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
echo "set ( T_TRACER $T_TRACER )" >> $cmake_file
echo "set ( UE_NAS_USE_TUN $UE_NAS_USE_TUN )" >> $cmake_file
echo 'include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)' >> $cmake_file
[ "$CLEAN" = "1" ] && rm -rf $DIR/$oaisim_build_dir/build
mkdir -p $DIR/$oaisim_build_dir/build
@@ -706,6 +712,13 @@ function main() {
compilations \
$oaisim_build_dir $oaisim_exec \
$oaisim_exec $dbin/$oaisim_exec.$REL
compilations \
$oaisim_build_dir $config_libconfig_shlib \
lib$config_libconfig_shlib.so $dbin/lib$config_libconfig_shlib.so
compilations \
$oaisim_build_dir coding \
libcoding.so $dbin/libcoding.so
if [ "$NOS1" != "1" ] ; then
+1 -1
View File
@@ -210,7 +210,7 @@ install_protobuf_from_source(){
#cd protobuf-2.6.1/
rm -rf /tmp/protobuf-cpp-3.3.0.tar.gz* /tmp/protobuf-3.3.0
wget https://github.com/google/protobuf/releases/download/v3.3.0/protobuf-cpp-3.3.0.tar.gz
tar -xzvf protobuf-cpp-3.3.0.tar.gz --owner $USER --group $USER --no-same-owner
tar -xzvf protobuf-cpp-3.3.0.tar.gz --owner $USER --group $(groups | cut -d" " -f1) --no-same-owner
cd protobuf-3.3.0/
./configure
echo "Compiling protobuf"
@@ -130,6 +130,7 @@ int config_libconfig_get(paramdef_t *cfgoptions,int numoptions, char *prefix )
{
case TYPE_STRING:
printf("call config_lookup_string for '%s' %p\n", cfgpath, &(libconfig_privdata.cfg)); fflush(stdout);
if ( config_lookup_string(&(libconfig_privdata.cfg),cfgpath, (const char **)&str)) {
if ( cfgoptions[i].numelt > 0 && str != NULL && strlen(str) >= cfgoptions[i].numelt ) {
fprintf(stderr,"[LIBCONFIG] %s: %s exceeds maximum length of %i bytes, value truncated\n",
+1 -1
View File
@@ -32,7 +32,7 @@ typedef struct {
#define VCD_NUM_FUNCTIONS 187
/* number of VCD variables (to be kept up to date! see in T_messages.txt) */
#define VCD_NUM_VARIABLES 128
#define VCD_NUM_VARIABLES 131
/* first VCD function (to be kept up to date! see in T_messages.txt) */
#define VCD_FIRST_FUNCTION ((uintptr_t)T_VCD_FUNCTION_RT_SLEEP)
+12
View File
@@ -1442,6 +1442,18 @@ ID = VCD_VARIABLE_UE0_TRX_WRITE_NS_MISSING
DESC = VCD variable UE0_TRX_WRITE_NS_MISSING
GROUP = ALL:VCD:UE:VCD_VARIABLE
FORMAT = ulong,value
ID = VCD_VARIABLE_CPUID_ENB_THREAD_RXTX
DESC = VCD variable CPUID_ENB_THREAD_RXTX
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
ID = VCD_VARIABLE_CPUID_RU_THREAD
DESC = VCD variable CPUID_RU_THREAD
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
ID = VCD_VARIABLE_CPUID_RU_THREAD_TX
DESC = VCD variable CPUID_RU_THREAD_TX
GROUP = ALL:VCD:ENB:VCD_VARIABLE
FORMAT = ulong,value
#functions
+28 -8
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@@ -72,6 +72,9 @@ const int itti_debug = (ITTI_DEBUG_ISSUES | ITTI_DEBUG_MP_STATISTICS);
/* Global message size */
#define MESSAGE_SIZE(mESSAGEiD) (sizeof(MessageHeader) + itti_desc.messages_info[mESSAGEiD].size)
extern int emulate_rf;
typedef enum task_state_s {
TASK_STATE_NOT_CONFIGURED, TASK_STATE_STARTING, TASK_STATE_READY, TASK_STATE_ENDED, TASK_STATE_MAX,
} task_state_t;
@@ -325,8 +328,11 @@ int itti_send_msg_to_task(task_id_t destination_task_id, instance_t instance, Me
/* Increment the global message number */
message_number = itti_increment_message_number ();
#if 0
/* itti dump is disabled */
itti_dump_queue_message (origin_task_id, message_number, message, itti_desc.messages_info[message_id].name,
sizeof(MessageHeader) + message->ittiMsgHeader.ittiMsgSize);
#endif
if (destination_task_id != TASK_UNKNOWN) {
@@ -339,14 +345,16 @@ int itti_send_msg_to_task(task_id_t destination_task_id, instance_t instance, Me
destination_task_id,
itti_get_task_name(destination_task_id));
} else {
/* We cannot send a message if the task is not running */
AssertFatal (itti_desc.threads[destination_thread_id].task_state == TASK_STATE_READY,
"Task %s Cannot send message %s (%d) to thread %d, it is not in ready state (%d)!\n",
itti_get_task_name(origin_task_id),
itti_desc.messages_info[message_id].name,
message_id,
destination_thread_id,
itti_desc.threads[destination_thread_id].task_state);
if(!emulate_rf){
/* We cannot send a message if the task is not running */
AssertFatal (itti_desc.threads[destination_thread_id].task_state == TASK_STATE_READY,
"Task %s Cannot send message %s (%d) to thread %d, it is not in ready state (%d)!\n",
itti_get_task_name(origin_task_id),
itti_desc.messages_info[message_id].name,
message_id,
destination_thread_id,
itti_desc.threads[destination_thread_id].task_state);
}
/* Allocate new list element */
new = (message_list_t *) itti_malloc (origin_task_id, destination_task_id, sizeof(struct message_list_s));
@@ -421,8 +429,11 @@ int itti_try_send_msg_to_task(task_id_t destination_task_id, instance_t instance
/* Increment the global message number */
message_number = itti_increment_message_number ();
#if 0
/* itti dump is disabled */
itti_dump_queue_message (origin_task_id, message_number, message, itti_desc.messages_info[message_id].name,
sizeof(MessageHeader) + message->ittiMsgHeader.ittiMsgSize);
#endif
if (destination_task_id != TASK_UNKNOWN) {
@@ -716,8 +727,11 @@ void itti_mark_task_ready(task_id_t task_id)
AssertFatal (thread_id < itti_desc.thread_max, "Thread id (%d) is out of range (%d)!\n", thread_id, itti_desc.thread_max);
#if 0
/* itti dump is disabled */
/* Register the thread in itti dump */
itti_dump_thread_use_ring_buffer();
#endif
/* Mark the thread as using LFDS queue */
lfds611_queue_use(itti_desc.tasks[task_id].message_queue);
@@ -848,7 +862,10 @@ int itti_init(task_id_t task_max, thread_id_t thread_max, MessagesIds messages_i
itti_desc.wait_tasks = 0;
itti_desc.created_tasks = 0;
itti_desc.ready_tasks = 0;
#if 0
/* itti dump is disabled */
itti_dump_init (messages_definition_xml, dump_file_name);
#endif
CHECK_INIT_RETURN(timer_init ());
@@ -915,7 +932,10 @@ void itti_wait_tasks_end(void)
exit (0);
}
#if 0
/* itti dump is disabled */
itti_dump_exit();
#endif
}
void itti_send_terminate_message(task_id_t task_id)
+2 -2
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@@ -201,8 +201,8 @@ void oai_create_enb(void) {
eNB->CC_id = bodge_counter;
eNB->abstraction_flag = 0;
eNB->single_thread_flag = 0;//single_thread_flag;
eNB->td = ulsch_decoding_data;//(single_thread_flag==1) ? ulsch_decoding_data_2thread : ulsch_decoding_data;
eNB->te = dlsch_encoding;//(single_thread_flag==1) ? dlsch_encoding_2threads : dlsch_encoding;
eNB->td = ulsch_decoding_data_all;//(single_thread_flag==1) ? ulsch_decoding_data_2thread : ulsch_decoding_data;
eNB->te = dlsch_encoding_all;//(single_thread_flag==1) ? dlsch_encoding_2threads : dlsch_encoding;
RC.nb_CC[bodge_counter] = 1;
+1
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@@ -738,6 +738,7 @@ void phy_config_cba_rnti (module_id_t Mod_id,int CC_id,eNB_flag_t eNB_flag, uin
}
}
int phy_init_lte_eNB(PHY_VARS_eNB *eNB,
unsigned char is_secondary_eNB,
unsigned char abstraction_flag)
+9
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@@ -92,6 +92,15 @@ int lte_sync_time_eNB_emul(PHY_VARS_eNB *phy_vars_eNb,
uint8_t sect_id,
int32_t *sync_val);
int ru_sync_time_init(RU_t *ru);
int ru_sync_time(RU_t *ru,
int64_t *lev,
int64_t *avg);
void ru_sync_time_free(RU_t *ru);
/*!
\brief This function performs channel estimation including frequency and temporal interpolation
\param phy_vars_ue Pointer to UE PHY variables
+118
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@@ -479,6 +479,65 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
}
int ru_sync_time_init(RU_t *ru) // LTE_UE_COMMON *common_vars
{
int16_t dmrs[2048];
int16_t *dmrsp[2] = {dmrs,NULL};
ru->dmrssync = (int16_t*)malloc16_clear(ru->frame_parms.N_RB_DL*2*sizeof(int16_t));
generate_drs_pusch(NULL,NULL,
&ru->frame_parms,
(int32_t**)dmrsp,
0,
AMP,
0,
0,
ru->frame_parms.N_RB_DL,
0);
switch (ru->frame_parms.N_RB_DL) {
case 6:
idft128(dmrs, /// complex input
ru->dmrssync, /// complex output
1);
break;
case 25:
idft512(dmrs,
ru->dmrssync, /// complex output
1);
break;
case 50:
idft1024(dmrs,
ru->dmrssync, /// complex output
1);
break;
case 75:
idft1536(dmrs,
ru->dmrssync,
1); /// complex output
break;
case 100:
idft2048(dmrs,
ru->dmrssync, /// complex output
1);
break;
default:
AssertFatal(1==0,"Unsupported N_RB_DL %d\n",ru->frame_parms.N_RB_DL);
break;
}
return(0);
}
void ru_sync_time_free(RU_t *ru) {
AssertFatal(ru->dmrssync!=NULL,"ru->dmrssync is NULL\n");
free(ru->dmrssync);
}
//#define DEBUG_PHY
int lte_sync_time_eNB(int32_t **rxdata, ///rx data in time domain
@@ -570,3 +629,62 @@ int lte_sync_time_eNB(int32_t **rxdata, ///rx data in time domain
}
int ru_sync_time(RU_t *ru,
int64_t *lev,
int64_t *avg)
{
LTE_DL_FRAME_PARMS *frame_parms = &ru->frame_parms;
// perform a time domain correlation using the oversampled sync sequence
int length = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
// circular copy of beginning to end of rxdata buffer. Note: buffer should be big enough upon calling this function
for (int ar=0;ar<ru->nb_rx;ar++) memcpy((void*)&ru->common.rxdata[ar][2*length],
(void*)&ru->common.rxdata[ar][0],
frame_parms->ofdm_symbol_size);
int32_t tmp0;
int32_t magtmp0,maxlev0=0;
int maxpos0=0;
int64_t avg0=0;
int32_t result;
for (int n=0; n<length; n+=4) {
tmp0 = 0;
//calculate dot product of primary_synch0_time and rxdata[ar][n] (ar=0..nb_ant_rx) and store the sum in temp[n];
for (int ar=0; ar<ru->nb_rx; ar++) {
result = dot_product(ru->dmrssync,
(int16_t*) &ru->common.rxdata[ar][n],
frame_parms->ofdm_symbol_size,
11);
((int16_t*)&tmp0)[0] += ((int16_t*) &result)[0];
((int16_t*)&tmp0)[1] += ((int16_t*) &result)[1];
}
// tmpi holds <synchi,rx0>+<synci,rx1>+...+<synchi,rx_{nbrx-1}>
magtmp0 = abs32(tmp0);
// this does max |tmp0(n)|^2 and argmax |tmp0(n)|^2
if (magtmp0>maxlev0) { maxlev0 = magtmp0; maxpos0 = n; }
avg0 += magtmp0;
}
avg0/=(length/4);
int dmrsoffset = 2*(frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples) + frame_parms->nb_prefix_samples0;
if ((int64_t)maxlev0 > (5*avg0)) {*lev = maxlev0; *avg=avg0; return((length+maxpos0-dmrsoffset)%length);}
return(-1);
}
+2 -1
View File
@@ -2276,7 +2276,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
/* clear all bits, the above code may generate too much false detections
* (not sure about this, to be checked somehow)
*/
// memset(e, 0, DCI_BITS_MAX);
//memset(e, 0, DCI_BITS_MAX);
e_ptr = e;
@@ -2298,6 +2298,7 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
#endif
if (dci_alloc[i].firstCCE>=0) {
//printf("generate DCI .%d rnti %d length %d\n", subframe, dci_alloc[i].rnti, dci_alloc[i].dci_length);
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
e+(72*dci_alloc[i].firstCCE),
dci_alloc[i].dci_length,
+10
View File
@@ -2183,6 +2183,7 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
#endif
//printf("DCI %d.%d rnti %d harq %d TBS %d\n", frame, subframe, rel8->rnti, rel8->harq_process, dlsch0_harq->TBS);
#if T_TRACER
if (dlsch0->active)
T(T_ENB_PHY_DLSCH_UE_DCI, T_INT(0), T_INT(frame), T_INT(subframe),
@@ -5063,9 +5064,18 @@ void compute_llr_offset(LTE_DL_FRAME_PARMS *frame_parms,
LOG_D(PHY,"Data Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, data_re);
/*
LOG_I(PHY,"Granted Re subframe %d / symbol %d => %d (%d RBs)\n", subframe, symbol_mod, granted_re,dlsch0_harq->nb_rb);
LOG_I(PHY,"Pbch/PSS/SSS Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, pbch_pss_sss_re);
LOG_I(PHY,"CRS Re Per PRB subframe %d / symbol %d => %d \n", subframe, symbol_mod, crs_re);
LOG_I(PHY,"Data Re subframe %d / symbol %d => %d \n", subframe, symbol_mod, data_re);
LOG_D(PHY,"Data Re subframe %d-symbol %d => llr length %d, llr offset %d \n", subframe, symbol,
pdsch_vars->llr_length[symbol], pdsch_vars->llr_offset[symbol]);
*/
}
}
void prepare_dl_decoding_format1_1A(DCI_format_t dci_format,
+242 -62
View File
@@ -42,6 +42,7 @@
#include "UTIL/LOG/vcd_signal_dumper.h"
#include "UTIL/LOG/log.h"
#include <syscall.h>
#include "targets/RT/USER/rt_wrapper.h"
//#define DEBUG_DLSCH_CODING
//#define DEBUG_DLSCH_FREE 1
@@ -52,7 +53,13 @@
((pilots==1)&&(first_pilot==0)&&(((re<3))||((re>5)&&(re<9)))) \
*/
#define is_not_pilot(pilots,first_pilot,re) (1)
/*extern void thread_top_init(char *thread_name,
int affinity,
uint64_t runtime,
uint64_t deadline,
uint64_t period);*/
extern int codingw;
void free_eNB_dlsch(LTE_eNB_DLSCH_t *dlsch)
{
@@ -244,11 +251,15 @@ void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch)
}
int dlsch_encoding_2threads0(te_params *tep) {
LTE_eNB_DLSCH_t *dlsch = tep->dlsch;
unsigned int G = tep->G;
unsigned char harq_pid = tep->harq_pid;
unsigned int total_worker = tep->total_worker;
unsigned int current_worker = tep->current_worker;
unsigned short iind;
@@ -261,7 +272,7 @@ int dlsch_encoding_2threads0(te_params *tep) {
if (dlsch->harq_processes[harq_pid]->round == 0) { // this is a new packet
for (r=0; r<dlsch->harq_processes[harq_pid]->C>>1; r++) {
for (r=(dlsch->harq_processes[harq_pid]->C/(total_worker+1))*current_worker; r<(dlsch->harq_processes[harq_pid]->C/(total_worker+1))*(current_worker+1); r++) {
if (r<dlsch->harq_processes[harq_pid]->Cminus)
Kr = dlsch->harq_processes[harq_pid]->Kminus;
@@ -304,21 +315,34 @@ int dlsch_encoding_2threads0(te_params *tep) {
// Fill in the "e"-sequence from 36-212, V8.6 2009-03, p. 16-17 (for each "e") and concatenate the
// outputs for each code segment, see Section 5.1.5 p.20
for (r=0; r<dlsch->harq_processes[harq_pid]->C>>1; r++) {
r_offset += lte_rate_matching_turbo(dlsch->harq_processes[harq_pid]->RTC[r],
G, //G
dlsch->harq_processes[harq_pid]->w[r],
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->C, // C
dlsch->Nsoft, // Nsoft,
dlsch->Mdlharq,
dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx,
dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl,
r,
nb_rb);
// m); // r
for (r=0,r_offset=0; r<(dlsch->harq_processes[harq_pid]->C/(total_worker+1))*(current_worker+1); r++) {
if(r<(dlsch->harq_processes[harq_pid]->C/(total_worker+1))*(current_worker)){
int Nl=dlsch->harq_processes[harq_pid]->Nl;
int Qm=dlsch->harq_processes[harq_pid]->Qm;
int C = dlsch->harq_processes[harq_pid]->C;
int Gp = G/Nl/Qm;
int GpmodC = Gp%C;
if (r < (C-(GpmodC)))
r_offset += Nl*Qm * (Gp/C);
else
r_offset += Nl*Qm * ((GpmodC==0?0:1) + (Gp/C));
}
else{
r_offset += lte_rate_matching_turbo(dlsch->harq_processes[harq_pid]->RTC[r],
G, //G
dlsch->harq_processes[harq_pid]->w[r],
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->C, // C
dlsch->Nsoft, // Nsoft,
dlsch->Mdlharq,
dlsch->Kmimo,
dlsch->harq_processes[harq_pid]->rvidx,
dlsch->harq_processes[harq_pid]->Qm,
dlsch->harq_processes[harq_pid]->Nl,
r,
nb_rb);
// m); // r
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING_W, VCD_FUNCTION_OUT);
@@ -326,32 +350,46 @@ int dlsch_encoding_2threads0(te_params *tep) {
return(0);
}
extern int oai_exit;
void *te_thread(void *param) {
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
thread_top_init("te_thread",1,200000,250000,500000);
pthread_setname_np( pthread_self(),"te processing");
LOG_I(PHY,"thread te created id=%ld", syscall(__NR_gettid));
LOG_I(PHY,"thread te created id=%ld\n", syscall(__NR_gettid));
eNB_proc_t *proc = &((te_params *)param)->eNB->proc;
te_params *tep = (te_params *)param;
//wait_sync("te_thread");
while (!oai_exit) {
if (wait_on_condition(&tep->mutex_te,&tep->cond_te,&tep->instance_cnt_te,"te thread")<0) break;
if(oai_exit) break;
if (wait_on_condition(&proc->mutex_te,&proc->cond_te,&proc->instance_cnt_te,"te thread")<0) break;
dlsch_encoding_2threads0(tep);
dlsch_encoding_2threads0((te_params*)param);
if (release_thread(&tep->mutex_te,&tep->instance_cnt_te,"te thread")<0) break;
if (release_thread(&proc->mutex_te,&proc->instance_cnt_te,"te thread")<0) break;
if (pthread_cond_signal(&proc->cond_te) != 0) {
if (pthread_cond_signal(&tep->cond_te) != 0) {
printf("[eNB] ERROR pthread_cond_signal for te thread exit\n");
exit_fun( "ERROR pthread_cond_signal" );
return(NULL);
}
/*if(opp_enabled == 1 && te_wakeup_stats0->diff_now>50*3000){
print_meas_now(te_wakeup_stats0,"coding_wakeup",stderr);
printf("te_thread0 delay for waking up in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->subframe_rx);
}*/
}
return(NULL);
}
int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
unsigned char *a,
uint8_t num_pdcch_symbols,
@@ -360,9 +398,16 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
uint8_t subframe,
time_stats_t *rm_stats,
time_stats_t *te_stats,
time_stats_t *i_stats)
time_stats_t *te_wait_stats,
time_stats_t *te_main_stats,
time_stats_t *te_wakeup_stats0,
time_stats_t *te_wakeup_stats1,
time_stats_t *i_stats,
int worker_num)
{
//start_meas(&eNB->dlsch_turbo_encoding_preperation_stats);
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
eNB_proc_t *proc = &eNB->proc;
unsigned int G;
@@ -382,19 +427,22 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
mod_order = dlsch->harq_processes[harq_pid]->Qm;
G = get_G(frame_parms,nb_rb,dlsch->harq_processes[harq_pid]->rb_alloc,mod_order,dlsch->harq_processes[harq_pid]->Nl,num_pdcch_symbols,frame,subframe,dlsch->harq_processes[harq_pid]->mimo_mode==TM7?7:0);
if (dlsch->harq_processes[harq_pid]->round == 0) { // this is a new packet
start_meas(&eNB->dlsch_turbo_encoding_preperation_stats);
// Add 24-bit crc (polynomial A) to payload
crc = crc24a(a,
A)>>8;
stop_meas(&eNB->dlsch_turbo_encoding_preperation_stats);
a[A>>3] = ((uint8_t*)&crc)[2];
a[1+(A>>3)] = ((uint8_t*)&crc)[1];
a[2+(A>>3)] = ((uint8_t*)&crc)[0];
dlsch->harq_processes[harq_pid]->B = A+24;
memcpy(dlsch->harq_processes[harq_pid]->b,a,(A/8)+4);
//stop_meas(&eNB->dlsch_turbo_encoding_preperation_stats);
start_meas(&eNB->dlsch_turbo_encoding_segmentation_stats);
if (lte_segmentation(dlsch->harq_processes[harq_pid]->b,
dlsch->harq_processes[harq_pid]->c,
dlsch->harq_processes[harq_pid]->B,
@@ -406,34 +454,41 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
&dlsch->harq_processes[harq_pid]->F)<0)
return(-1);
if (proc->instance_cnt_te==0) {
printf("[eNB] TE thread busy\n");
exit_fun("TE thread busy");
pthread_mutex_unlock( &proc->mutex_te );
return(-1);
stop_meas(&eNB->dlsch_turbo_encoding_segmentation_stats);
start_meas(&eNB->dlsch_turbo_encoding_signal_stats);
for(int i=0;i<worker_num;i++)
{
proc->tep[i].eNB = eNB;
proc->tep[i].dlsch = dlsch;
proc->tep[i].G = G;
proc->tep[i].harq_pid = harq_pid;
proc->tep[i].total_worker = worker_num;
proc->tep[i].current_worker = i;
pthread_mutex_lock( &proc->tep[i].mutex_te );
if (proc->tep[i].instance_cnt_te==0) {
printf("[eNB] TE thread busy\n");
exit_fun("TE thread busy");
pthread_mutex_unlock( &proc->tep[i].mutex_te );
return(-1);
}
++proc->tep[i].instance_cnt_te;
// wakeup worker to do segments
if (pthread_cond_signal(&proc->tep[i].cond_te) != 0) {
printf("[eNB] ERROR pthread_cond_signal for te thread %d exit\n",i);
exit_fun( "ERROR pthread_cond_signal" );
return (-1);
}
pthread_mutex_unlock( &proc->tep[i].mutex_te );
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_OUT);
++proc->instance_cnt_te;
proc->tep.eNB = eNB;
proc->tep.dlsch = dlsch;
proc->tep.G = G;
proc->tep.harq_pid = harq_pid;
// wakeup worker to do second half segments
if (pthread_cond_signal(&proc->cond_te) != 0) {
printf("[eNB] ERROR pthread_cond_signal for te thread exit\n");
exit_fun( "ERROR pthread_cond_signal" );
return (-1);
}
pthread_mutex_unlock( &proc->mutex_te );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_IN);
for (r=dlsch->harq_processes[harq_pid]->C>>1; r<dlsch->harq_processes[harq_pid]->C; r++) {
stop_meas(&eNB->dlsch_turbo_encoding_signal_stats);
start_meas(te_main_stats);
for (r=(dlsch->harq_processes[harq_pid]->C/(worker_num+1))*worker_num; r<dlsch->harq_processes[harq_pid]->C; r++) {
if (r<dlsch->harq_processes[harq_pid]->Cminus)
Kr = dlsch->harq_processes[harq_pid]->Kminus;
@@ -478,15 +533,18 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
}
else {
proc->tep.eNB = eNB;
proc->tep.dlsch = dlsch;
proc->tep.G = G;
// wakeup worker to do second half segments
if (pthread_cond_signal(&proc->cond_te) != 0) {
for(int i=0;i<worker_num;i++)
{
proc->tep[i].eNB = eNB;
proc->tep[i].dlsch = dlsch;
proc->tep[i].G = G;
proc->tep[i].total_worker = worker_num;
proc->tep[i].current_worker = i;
if (pthread_cond_signal(&proc->tep[i].cond_te) != 0) {
printf("[eNB] ERROR pthread_cond_signal for te thread exit\n");
exit_fun( "ERROR pthread_cond_signal" );
return (-1);
}
}
}
@@ -496,7 +554,7 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
for (r=0,r_offset=0; r<dlsch->harq_processes[harq_pid]->C; r++) {
// get information for E for the segments that are handled by the worker thread
if (r<(dlsch->harq_processes[harq_pid]->C>>1)) {
if (r<(dlsch->harq_processes[harq_pid]->C/(worker_num+1))*worker_num) {
int Nl=dlsch->harq_processes[harq_pid]->Nl;
int Qm=dlsch->harq_processes[harq_pid]->Qm;
int C = dlsch->harq_processes[harq_pid]->C;
@@ -526,16 +584,138 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
stop_meas(rm_stats);
}
}
stop_meas(te_main_stats);
// wait for worker to finish
wait_on_busy_condition(&proc->mutex_te,&proc->cond_te,&proc->instance_cnt_te,"te thread");
start_meas(te_wait_stats);
if(worker_num == 1)
{
wait_on_busy_condition(&proc->tep[0].mutex_te,&proc->tep[0].cond_te,&proc->tep[0].instance_cnt_te,"te thread 0");
}
else if(worker_num == 2)
{
wait_on_busy_condition(&proc->tep[0].mutex_te,&proc->tep[0].cond_te,&proc->tep[0].instance_cnt_te,"te thread 0");
wait_on_busy_condition(&proc->tep[1].mutex_te,&proc->tep[1].cond_te,&proc->tep[1].instance_cnt_te,"te thread 1");
}
else
{
wait_on_busy_condition(&proc->tep[0].mutex_te,&proc->tep[0].cond_te,&proc->tep[0].instance_cnt_te,"te thread 0");
wait_on_busy_condition(&proc->tep[1].mutex_te,&proc->tep[1].cond_te,&proc->tep[1].instance_cnt_te,"te thread 1");
wait_on_busy_condition(&proc->tep[2].mutex_te,&proc->tep[2].cond_te,&proc->tep[2].instance_cnt_te,"te thread 2");
}
stop_meas(te_wait_stats);
/*if(opp_enabled == 1 && te_wait_stats->diff_now>100*3000){
print_meas_now(te_wait_stats,"coding_wait",stderr);
printf("coding delay in wait on codition in frame_rx: %d \n",proc->frame_rx);
}*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_OUT);
return(0);
}
int dlsch_encoding_all(PHY_VARS_eNB *eNB,
unsigned char *a,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch,
int frame,
uint8_t subframe,
time_stats_t *rm_stats,
time_stats_t *te_stats,
time_stats_t *te_wait_stats,
time_stats_t *te_main_stats,
time_stats_t *te_wakeup_stats0,
time_stats_t *te_wakeup_stats1,
time_stats_t *i_stats)
{
int encoding_return = 0;
unsigned int L,C,B;
B = dlsch->harq_processes[dlsch->harq_ids[subframe]]->B;
if(B<=6144)
{
L=0;
C=1;
}
else
{
L=24;
C = B/(6144-L);
if((6144-L)*C < B)
{
C = C+1;
}
}
if(C >= 8 && get_nprocs()>=16 && codingw)//one main three worker
{
encoding_return =
dlsch_encoding_2threads(eNB,
a,
num_pdcch_symbols,
dlsch,
frame,
subframe,
rm_stats,
te_stats,
te_wait_stats,
te_main_stats,
te_wakeup_stats0,
te_wakeup_stats1,
i_stats,
3);
}
else if(C >= 6 && get_nprocs()>=8 && codingw)//one main two worker
{
encoding_return =
dlsch_encoding_2threads(eNB,
a,
num_pdcch_symbols,
dlsch,
frame,
subframe,
rm_stats,
te_stats,
te_wait_stats,
te_main_stats,
te_wakeup_stats0,
te_wakeup_stats1,
i_stats,
2);
}
else if(C >= 4 && get_nprocs()>=4 && codingw)//one main one worker
{
encoding_return =
dlsch_encoding_2threads(eNB,
a,
num_pdcch_symbols,
dlsch,
frame,
subframe,
rm_stats,
te_stats,
te_wait_stats,
te_main_stats,
te_wakeup_stats0,
te_wakeup_stats1,
i_stats,
1);
}
else
{
encoding_return =
dlsch_encoding(eNB,
a,
num_pdcch_symbols,
dlsch,
frame,
subframe,
rm_stats,
te_stats,
i_stats);
}
return encoding_return;
}
int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned char *a,
@@ -850,7 +850,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
pdsch_vars[eNB_id]->llr_offset[symbol],
(int16_t*)pdsch_vars[eNB_id]->llr[0],
pllr_symbol_cw0);
switch (dlsch0_harq->Qm) {
case 2 :
if ((rx_type==rx_standard) || (codeword_TB1 == -1)) {
+216 -13
View File
@@ -38,7 +38,8 @@
#include "defs.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
//#define DEBUG_DLSCH_MODULATION 1
//#define DEBUG_DLSCH_MODULATION
#define NEW_ALLOC_RE
//#define is_not_pilot(pilots,re,nushift,use2ndpilots) ((pilots==0) || ((re!=nushift) && (re!=nushift+6)&&((re!=nushift+3)||(use2ndpilots==1))&&((re!=nushift+9)||(use2ndpilots==1)))?1:0)
@@ -120,6 +121,17 @@ void generate_16qam_table(void)
}
}
void generate_qpsk_table(void)
{
int a,index;
for (a=-1; a<=1; a+=2) {
index = (1+a)/2;
qpsk_table[index] = -a*QPSK;
}
}
@@ -157,6 +169,158 @@ void layer1prec2A(int32_t *antenna0_sample, int32_t *antenna1_sample, uint8_t pr
uint32_t FOUR[2]={0,4};
uint32_t TWO[2]={0,2};
int allocate_REs_in_RB_no_pilots_QPSK_siso(PHY_VARS_eNB* phy_vars_eNB,
int **txdataF,
uint32_t *jj,
uint32_t *jj2,
uint16_t re_offset,
uint32_t symbol_offset,
LTE_DL_eNB_HARQ_t *dlsch0_harq,
LTE_DL_eNB_HARQ_t *dlsch1_harq,
uint8_t pilots,
int16_t amp,
uint8_t precoder_index,
int16_t *qam_table_s0,
int16_t *qam_table_s1,
uint32_t *re_allocated,
uint8_t skip_dc,
uint8_t skip_half,
uint8_t lprime,
uint8_t mprime,
uint8_t Ns,
int *P1_SHIFT,
int *P2_SHIFT)
{
LTE_DL_FRAME_PARMS *frame_parms = &phy_vars_eNB->frame_parms;
uint8_t *x0 = dlsch0_harq->e;
uint32_t qpsk_table_offset_re = 0;
uint32_t qpsk_table_offset_im = 0;
uint32_t tti_offset;
uint8_t re;
uint8_t *x0p;
if (skip_dc == 0) {
for (x0p=&x0[*jj],tti_offset=symbol_offset+re_offset,re=0;
re<12;
re++,x0p+=2,tti_offset++) {
qpsk_table_offset_re=x0p[0];
qpsk_table_offset_im=x0p[1];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qpsk_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qpsk_table_offset_im];
}
}
else {
// 1st half of PRB
for (x0p=&x0[*jj],tti_offset=symbol_offset+re_offset,re=0;
re<6;
re++,x0p+=2,tti_offset++) {
qpsk_table_offset_re=x0p[0];
qpsk_table_offset_im=x0p[1];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qpsk_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qpsk_table_offset_im];
}
// 2nd half of PRB
for (tti_offset=symbol_offset+re_offset-frame_parms->ofdm_symbol_size+7;
re<12;
re++,x0p+=2,tti_offset++) {
qpsk_table_offset_re=x0p[0];
qpsk_table_offset_im=x0p[1];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qpsk_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qpsk_table_offset_im];
}
}
*re_allocated = *re_allocated + 12;
*jj=*jj + 24;
return(0);
}
int allocate_REs_in_RB_pilots_QPSK_siso(PHY_VARS_eNB* phy_vars_eNB,
int **txdataF,
uint32_t *jj,
uint32_t *jj2,
uint16_t re_offset,
uint32_t symbol_offset,
LTE_DL_eNB_HARQ_t *dlsch0_harq,
LTE_DL_eNB_HARQ_t *dlsch1_harq,
uint8_t pilots,
int16_t amp,
uint8_t precoder_index,
int16_t *qam_table_s0,
int16_t *qam_table_s1,
uint32_t *re_allocated,
uint8_t skip_dc,
uint8_t skip_half,
uint8_t lprime,
uint8_t mprime,
uint8_t Ns,
int *P1_SHIFT,
int *P2_SHIFT)
{
LTE_DL_FRAME_PARMS *frame_parms=&phy_vars_eNB->frame_parms;
uint8_t *x0 = dlsch0_harq->e;
uint32_t qpsk_table_offset_re = 0;
uint32_t qpsk_table_offset_im = 0;
uint32_t tti_offset;
uint8_t re;
uint8_t *x0p;
if (skip_dc == 0) {
// printf("pilots: P1_SHIFT[0] %d\n",P1_SHIFT[0]);
for (x0p=&x0[*jj],tti_offset=symbol_offset+re_offset+P1_SHIFT[0],re=P1_SHIFT[0];
re<12;
x0p+=2) {
qpsk_table_offset_re=x0p[0];
qpsk_table_offset_im=x0p[1];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qpsk_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qpsk_table_offset_im];
// printf("pilots: re %d, tti_offset %d, P1_SHIFT %d\n",re,tti_offset,P1_SHIFT[re+1]);
tti_offset+=P1_SHIFT[re+1];
re+=P1_SHIFT[re+1];
}
}
else {
for (x0p=&x0[*jj],tti_offset=symbol_offset+re_offset+P1_SHIFT[0],re=P1_SHIFT[0];
re<6;
x0p+=2) {
qpsk_table_offset_re+=x0p[0];
qpsk_table_offset_im+=x0p[1];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qpsk_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qpsk_table_offset_im];
tti_offset+=P1_SHIFT[re+1];
re+=P1_SHIFT[re+1];
}
for (tti_offset=symbol_offset+re_offset-frame_parms->ofdm_symbol_size+6+P1_SHIFT[6];
re<12;
x0p+=2) {
qpsk_table_offset_re+=x0p[0];
qpsk_table_offset_im+=x0p[1];
((int16_t *)&txdataF[0][tti_offset])[0]=qam_table_s0[qpsk_table_offset_re];
((int16_t *)&txdataF[0][tti_offset])[1]=qam_table_s0[qpsk_table_offset_im];
tti_offset+=P1_SHIFT[re+1];
re+=P1_SHIFT[re+1];
}
}
*re_allocated = *re_allocated + 10;
*jj=*jj + 20;
return(0);
}
int allocate_REs_in_RB_no_pilots_16QAM_siso(PHY_VARS_eNB* phy_vars_eNB,
int **txdataF,
uint32_t *jj,
@@ -2011,11 +2175,11 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
uint8_t mod_order0 = 0;
uint8_t mod_order1 = 0;
int16_t amp_rho_a, amp_rho_b;
int16_t qam16_table_a0[4],qam64_table_a0[8],qam16_table_b0[4],qam64_table_b0[8];
int16_t qam16_table_a1[4],qam64_table_a1[8],qam16_table_b1[4],qam64_table_b1[8];
int16_t qam16_table_a0[4],qam64_table_a0[8],qam16_table_b0[4],qam64_table_b0[8];//qpsk_table_a0[2],qpsk_table_b0[2]
int16_t qam16_table_a1[4],qam64_table_a1[8],qam16_table_b1[4],qam64_table_b1[8];//qpsk_table_a1[2],qpsk_table_b1[2]
int16_t *qam_table_s0=NULL,*qam_table_s1=NULL;
#if 0
#ifdef NEW_ALLOC_RE
/* TODO: variable to be removed? */
int (*allocate_REs)(PHY_VARS_eNB*,
int **,
@@ -2125,8 +2289,15 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
amp_rho_b = (int16_t)(((int32_t)amp*dlsch1->sqrt_rho_b)>>13);
}
if (mod_order0 == 4)
/*if(mod_order0 == 2)
{
for(i=0;i<2;i++)
{
qpsk_table_a0[i] = (int16_t)(((int32_t)qpsk_table[i]*amp_rho_a)>>15);
qpsk_table_b0[i] = (int16_t)(((int32_t)qpsk_table[i]*amp_rho_b)>>15);
}
}
else*/ if (mod_order0 == 4)
for (i=0;i<4; i++) {
qam16_table_a0[i] = (int16_t)(((int32_t)qam16_table[i]*amp_rho_a)>>15);
qam16_table_b0[i] = (int16_t)(((int32_t)qam16_table[i]*amp_rho_b)>>15);
@@ -2137,7 +2308,14 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
qam64_table_b0[i] = (int16_t)(((int32_t)qam64_table[i]*amp_rho_b)>>15);
}
if (mod_order1 == 4)
/*if (mod_order1 == 2)
{
for (i=0; i<2; i++) {
qpsk_table_a1[i] = (int16_t)(((int32_t)qpsk_table[i]*amp_rho_a)>>15);
qpsk_table_b1[i] = (int16_t)(((int32_t)qpsk_table[i]*amp_rho_b)>>15);
}
}
else*/ if (mod_order1 == 4)
for (i=0; i<4; i++) {
qam16_table_a1[i] = (int16_t)(((int32_t)qam16_table[i]*amp_rho_a)>>15);
qam16_table_b1[i] = (int16_t)(((int32_t)qam16_table[i]*amp_rho_b)>>15);
@@ -2259,7 +2437,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
re_offset = frame_parms->first_carrier_offset;
symbol_offset = (uint32_t)frame_parms->ofdm_symbol_size*(l+(subframe_offset*nsymb));
#if 0
#ifdef NEW_ALLOC_RE
/* TODO: remove this code? */
allocate_REs = allocate_REs_in_RB;
#endif
@@ -2267,11 +2445,30 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
switch (mod_order0) {
case 2:
qam_table_s0 = NULL;
/*if (pilots) {
qam_table_s0 = qpsk_table_b0;
#ifdef NEW_ALLOC_RE
// TODO: remove this code? //
allocate_REs = (dlsch0->harq_processes[harq_pid]->mimo_mode == SISO) ?
allocate_REs_in_RB_pilots_QPSK_siso :
allocate_REs_in_RB;
#endif
}
else {
qam_table_s0 = qpsk_table_a0;
#ifdef NEW_ALLOC_RE
// TODO: remove this code? //
allocate_REs = (dlsch0->harq_processes[harq_pid]->mimo_mode == SISO) ?
allocate_REs_in_RB_no_pilots_QPSK_siso :
allocate_REs_in_RB;
#endif
}*/
break;
case 4:
if (pilots) {
qam_table_s0 = qam16_table_b0;
#if 0
#ifdef NEW_ALLOC_RE
/* TODO: remove this code? */
allocate_REs = (dlsch0->harq_processes[harq_pid]->mimo_mode == SISO) ?
allocate_REs_in_RB_pilots_16QAM_siso :
@@ -2280,7 +2477,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}
else {
qam_table_s0 = qam16_table_a0;
#if 0
#ifdef NEW_ALLOC_RE
/* TODO: remove this code? */
allocate_REs = (dlsch0->harq_processes[harq_pid]->mimo_mode == SISO) ?
allocate_REs_in_RB_no_pilots_16QAM_siso :
@@ -2293,7 +2490,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
case 6:
if (pilots) {
qam_table_s0 = qam64_table_b0;
#if 0
#ifdef NEW_ALLOC_RE
/* TODO: remove this code? */
allocate_REs = (dlsch0->harq_processes[harq_pid]->mimo_mode == SISO) ?
allocate_REs_in_RB_pilots_64QAM_siso :
@@ -2302,7 +2499,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}
else {
qam_table_s0 = qam64_table_a0;
#if 0
#ifdef NEW_ALLOC_RE
/* TODO: remove this code? */
allocate_REs = (dlsch0->harq_processes[harq_pid]->mimo_mode == SISO) ?
allocate_REs_in_RB_no_pilots_64QAM_siso :
@@ -2316,10 +2513,16 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
switch (mod_order1) {
case 2:
qam_table_s1 = NULL;
#if 0
#ifdef NEW_ALLOC_RE
/* TODO: remove this code? */
allocate_REs = allocate_REs_in_RB;
#endif
/*if (pilots) {
qam_table_s1 = qpsk_table_b1;
}
else {
qam_table_s1 = qpsk_table_a1;
}*/
break;
case 4:
if (pilots) {
+40 -34
View File
@@ -36,6 +36,8 @@
int generate_drs_pusch(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
LTE_DL_FRAME_PARMS *frame_parms,
int32_t **txdataF,
uint8_t eNB_id,
short amp,
unsigned int subframe,
@@ -54,29 +56,33 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
int16_t alpha_re[12] = {32767, 28377, 16383, 0,-16384, -28378,-32768,-28378,-16384, -1, 16383, 28377};
int16_t alpha_im[12] = {0, 16383, 28377, 32767, 28377, 16383, 0,-16384,-28378,-32768,-28378,-16384};
uint8_t cyclic_shift,cyclic_shift0,cyclic_shift1;
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
int32_t *txdataF = ue->common_vars.txdataF[ant];
uint8_t cyclic_shift,cyclic_shift0=0,cyclic_shift1=0;
LTE_DL_FRAME_PARMS *fp = (ue==NULL) ? frame_parms : &ue->frame_parms;
int32_t *txF = (ue==NULL) ? txdataF[ant] : ue->common_vars.txdataF[ant];
uint32_t u,v,alpha_ind;
uint32_t u0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1];
uint32_t u1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)];
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
uint32_t u0=0,u1=0,v0=0,v1=0;
int32_t ref_re,ref_im;
uint8_t harq_pid = subframe2harq_pid(frame_parms,proc->frame_tx,subframe);
uint8_t harq_pid = (proc == NULL) ? 0: subframe2harq_pid(fp,proc->frame_tx,subframe);
cyclic_shift0 = (frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2 +
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1]+
((ue->ulsch[0]->cooperation_flag==2)?10:0)+
ant*6) % 12;
// printf("PUSCH.cyclicShift %d, n_DMRS2 %d, nPRS %d\n",frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,ue->ulsch[eNB_id]->n_DMRS2,ue->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1]);
cyclic_shift1 = (frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2 +
frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[(subframe<<1)+1]+
((ue->ulsch[0]->cooperation_flag==2)?10:0)+
ant*6) % 12;
if (ue!=NULL) {
cyclic_shift0 = (fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2 +
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1]+
((ue->ulsch[0]->cooperation_flag==2)?10:0)+
ant*6) % 12;
// printf("PUSCH.cyclicShift %d, n_DMRS2 %d, nPRS %d\n",frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,ue->ulsch[eNB_id]->n_DMRS2,ue->lte_frame_parms.pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1]);
cyclic_shift1 = (fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
ue->ulsch[eNB_id]->harq_processes[harq_pid]->n_DMRS2 +
fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[(subframe<<1)+1]+
((ue->ulsch[0]->cooperation_flag==2)?10:0)+
ant*6) % 12;
u0=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1];
u1=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)];
v0=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
v1=fp->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
}
// cyclic_shift0 = 0;
// cyclic_shift1 = 0;
Msc_RS = 12*nb_rb;
@@ -90,9 +96,9 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
return(-1);
}
for (l = (3 - frame_parms->Ncp),u=u0,v=v0,cyclic_shift=cyclic_shift0;
for (l = (3 - fp->Ncp),u=u0,v=v0,cyclic_shift=cyclic_shift0;
l<frame_parms->symbols_per_tti;
l += (7 - frame_parms->Ncp),u=u1,v=v1,cyclic_shift=cyclic_shift1) {
l += (7 - fp->Ncp),u=u1,v=v1,cyclic_shift=cyclic_shift1) {
drs_offset = 0;
#ifdef DEBUG_DRS
@@ -100,9 +106,9 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
#endif
re_offset = frame_parms->first_carrier_offset;
subframe_offset = subframe*frame_parms->symbols_per_tti*frame_parms->ofdm_symbol_size;
symbol_offset = subframe_offset + frame_parms->ofdm_symbol_size*l;
re_offset = fp->first_carrier_offset;
subframe_offset = subframe*fp->symbols_per_tti*frame_parms->ofdm_symbol_size;
symbol_offset = subframe_offset + fp->ofdm_symbol_size*l;
#ifdef DEBUG_DRS
@@ -110,7 +116,7 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
#endif
alpha_ind = 0;
for (rb=0; rb<frame_parms->N_RB_UL; rb++) {
for (rb=0; rb<fp->N_RB_UL; rb++) {
if ((rb >= first_rb) && (rb<(first_rb+nb_rb))) {
@@ -122,12 +128,12 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
ref_re = (int32_t) ul_ref_sigs[u][v][Msc_RS_idx][drs_offset<<1];
ref_im = (int32_t) ul_ref_sigs[u][v][Msc_RS_idx][(drs_offset<<1)+1];
((int16_t*) txdataF)[2*(symbol_offset + re_offset)] = (int16_t) (((ref_re*alpha_re[alpha_ind]) -
((int16_t*) txF)[2*(symbol_offset + re_offset)] = (int16_t) (((ref_re*alpha_re[alpha_ind]) -
(ref_im*alpha_im[alpha_ind]))>>15);
((int16_t*) txdataF)[2*(symbol_offset + re_offset)+1] = (int16_t) (((ref_re*alpha_im[alpha_ind]) +
((int16_t*) txF)[2*(symbol_offset + re_offset)+1] = (int16_t) (((ref_re*alpha_im[alpha_ind]) +
(ref_im*alpha_re[alpha_ind]))>>15);
((short*) txdataF)[2*(symbol_offset + re_offset)] = (short) ((((short*) txdataF)[2*(symbol_offset + re_offset)]*(int32_t)amp)>>15);
((short*) txdataF)[2*(symbol_offset + re_offset)+1] = (short) ((((short*) txdataF)[2*(symbol_offset + re_offset)+1]*(int32_t)amp)>>15);
((short*) txF)[2*(symbol_offset + re_offset)] = (short) ((((short*) txF)[2*(symbol_offset + re_offset)]*(int32_t)amp)>>15);
((short*) txF)[2*(symbol_offset + re_offset)+1] = (short) ((((short*) txF)[2*(symbol_offset + re_offset)+1]*(int32_t)amp)>>15);
alpha_ind = (alpha_ind + cyclic_shift);
@@ -140,14 +146,14 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
symbol_offset,
alpha_ind,
re_offset,
((short*) txdataF)[2*(symbol_offset + re_offset)],
((short*) txdataF)[2*(symbol_offset + re_offset)+1]);
((short*) txF)[2*(symbol_offset + re_offset)],
((short*) txF)[2*(symbol_offset + re_offset)+1]);
#endif // DEBUG_DRS
re_offset++;
drs_offset++;
if (re_offset >= frame_parms->ofdm_symbol_size)
if (re_offset >= fp->ofdm_symbol_size)
re_offset = 0;
}
@@ -156,8 +162,8 @@ int generate_drs_pusch(PHY_VARS_UE *ue,
// check if we crossed the symbol boundary and skip DC
if (re_offset >= frame_parms->ofdm_symbol_size) {
if (frame_parms->N_RB_DL&1) // odd number of RBs
if (re_offset >= fp->ofdm_symbol_size) {
if (fp->N_RB_DL&1) // odd number of RBs
re_offset=6;
else // even number of RBs (doesn't straddle DC)
re_offset=0;
+1 -1
View File
@@ -30,7 +30,7 @@ extern short *ul_ref_sigs_rx[30][2][33];
extern unsigned short dftsizes[33];
extern unsigned short ref_primes[33];
extern int qam64_table[8],qam16_table[4];
extern int qam64_table[8],qam16_table[4],qpsk_table[2];
extern unsigned char cs_ri_normal[4];
extern unsigned char cs_ri_extended[4];
+4 -2
View File
@@ -67,7 +67,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
if (ru->idx<=1) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_SEND_IF4+ru->idx, 1 );
if (packet_type == IF4p5_PDLFFT) {
//LOG_D(PHY,"send DL_IF4p5: RU %d frame %d, subframe %d\n",ru->idx,frame,subframe);
LOG_D(PHY,"send DL_IF4p5: RU %d frame %d, subframe %d\n",ru->idx,frame,subframe);
if (subframe_select(fp,subframe)==SF_S)
nsym=fp->dl_symbols_in_S_subframe;
@@ -125,6 +125,8 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
slotoffsetF = 0;
blockoffsetF = slotoffsetF + fp->ofdm_symbol_size - db_halflength;
LOG_D(PHY,"send UL_IF4p5: RU %d frame %d, subframe %d\n",ru->idx,frame,subframe);
if (subframe_select(fp,subframe)==SF_S) {
nsym=fp->ul_symbols_in_S_subframe;
slotoffsetF += (fp->ofdm_symbol_size*(fp->symbols_per_tti-nsym));
@@ -410,7 +412,7 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
for (idx=0;idx<ru->num_eNB;idx++) ru->wakeup_prach_eNB(ru->eNB_list[idx],ru,*frame,*subframe);
} else if (*packet_type == IF4p5_PULTICK) {
if (ru->idx==0) LOG_D(PHY,"UL_IF4p5: RU %d : frame %d, subframe %d, PULTICK\n",ru->idx,*frame,*subframe);
} else {
AssertFatal(1==0, "recv_IF4p5 - Unknown packet_type %x", *packet_type);
}
+13 -1
View File
@@ -336,7 +336,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
#endif
write_output("rxdata.m","rxd",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
//write_output("rxdata.m","rxd",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
}
@@ -513,6 +513,18 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
ue->pbch_vars[0]->pdu_errors_conseq=0;
if (ue->frame_parms.frame_type==FDD) {
ue->N_TA_offset = 0;
}
else {
if (ue->frame_parms.N_RB_DL == 100)
ue->N_TA_offset = 624;
else if (ue->frame_parms.N_RB_DL == 50)
ue->N_TA_offset = 624/2;
else if (ue->frame_parms.N_RB_DL == 25)
ue->N_TA_offset = 624/4;
}
}
#if DISABLE_LOG_X
+13 -8
View File
@@ -1512,6 +1512,7 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
uint32_t pusch_frame;
int subframe = proc->subframe_tx;
phich_config_t *phich;
int absSF = subframe+(proc->frame_tx*10);
// compute Ngroup_PHICH (see formula at beginning of Section 6.9 in 36-211
@@ -1523,16 +1524,20 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
if (frame_parms->Ncp == 1)
NSF_PHICH = 2;
if (eNB->phich_vars[subframe&1].num_hi > 0) {
for (i=0; i<MAX_NUM_PHICH; i++) {
phich = &eNB->phich_vars.config[i];
if (phich->active == 0 || phich->absSF != absSF) continue;
pusch_frame = phich_frame2_pusch_frame(frame_parms,proc->frame_tx,subframe);
pusch_subframe = phich_subframe2_pusch_subframe(frame_parms,subframe);
harq_pid = subframe2harq_pid(frame_parms,pusch_frame,pusch_subframe);
}
phich->active = 0;
for (i=0; i<eNB->phich_vars[subframe&1].num_hi; i++) {
phich = &eNB->phich_vars[subframe&1].config[i];
ngroup_PHICH = (phich->first_rb +
phich->n_DMRS)%Ngroup_PHICH;
@@ -1565,6 +1570,6 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
phich->hi,
subframe,
txdataF);
}// for (i=0; i<eNB->phich_vars[subframe&1].num_hi; i++) {
eNB->phich_vars[subframe&1].num_hi=0;
}
}
+13 -6
View File
@@ -38,9 +38,12 @@
#include "SCHED/extern.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
//#define PRACH_DEBUG 1
#define PRACH_DEBUG 1
//#define PRACH_WRITE_OUTPUT_DEBUG 1
#undef LOG_I
#define LOG_I(A,B,C...) printf(B,C)
uint16_t NCS_unrestricted[16] = {0,13,15,18,22,26,32,38,46,59,76,93,119,167,279,419};
uint16_t NCS_restricted[15] = {15,18,22,26,32,38,46,55,68,82,100,128,158,202,237}; // high-speed case
uint16_t NCS_4[7] = {2,4,6,8,10,12,15};
@@ -1202,6 +1205,10 @@ void rx_prach0(PHY_VARS_eNB *eNB,
int16_t *prach[nb_rx];
uint8_t prach_fmt = get_prach_fmt(prach_ConfigIndex,frame_type);
uint16_t N_ZC = (prach_fmt <4)?839:139;
#ifdef PRACH_DEBUG
int en;
#endif
if (eNB) {
#ifdef Rel14
@@ -1275,7 +1282,7 @@ void rx_prach0(PHY_VARS_eNB *eNB,
#ifdef PRACH_DEBUG
int32_t en0=signal_energy((int32_t*)prach[aa],fp->samples_per_tti);
int8_t dbEn0 = dB_fixed(en0);
int8_t rach_dBm = dbEn0 - eNB->rx_total_gain_dB;
int8_t rach_dBm = dbEn0 - ru->rx_total_gain_dB;
#ifdef PRACH_WRITE_OUTPUT_DEBUG
if (dbEn0>32 && prach[0]!= NULL)
@@ -1507,7 +1514,7 @@ void rx_prach0(PHY_VARS_eNB *eNB,
else
#endif
send_IF4p5(ru, ru->proc.frame_prach, ru->proc.subframe_prach, IF4p5_PRACH);
LOG_D(PHY,"SFN/SF %d.%d: Sending PRACH over IF4p5\n",ru->proc.frame_prach,ru->proc.subframe_prach);
return;
} else if (eNB!=NULL) {
@@ -1885,9 +1892,9 @@ void compute_prach_seq(uint16_t rootSequenceIndex,
}
#ifdef PRACH_DEBUG
LOG_I( PHY, "compute_prach_seq: done init prach_tables\n" );
#endif
//#ifdef PRACH_DEBUG
// LOG_I( PHY, "compute_prach_seq: done init prach_tables\n" );
//#endif
if (highSpeedFlag== 0) {
+36 -9
View File
@@ -127,6 +127,20 @@ int32_t dlsch_encoding(PHY_VARS_eNB *eNB,
time_stats_t *rm_stats,
time_stats_t *te_stats,
time_stats_t *i_stats);
int32_t dlsch_encoding_all(PHY_VARS_eNB *eNB,
uint8_t *a,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch,
int frame,
uint8_t subframe,
time_stats_t *rm_stats,
time_stats_t *te_stats,
time_stats_t *te_wait_stats,
time_stats_t *te_main_stats,
time_stats_t *te_wakeup_stats0,
time_stats_t *te_wakeup_stats1,
time_stats_t *i_stats);
int32_t dlsch_encoding_SIC(PHY_VARS_UE *ue,
uint8_t *a,
@@ -171,7 +185,12 @@ int32_t dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
uint8_t subframe,
time_stats_t *rm_stats,
time_stats_t *te_stats,
time_stats_t *i_stats);
time_stats_t *te_wait_stats,
time_stats_t *te_main_stats,
time_stats_t *te_wakeup_stats0,
time_stats_t *te_wakeup_stats1,
time_stats_t *i_stats,
int worker_num);
void dlsch_encoding_emul(PHY_VARS_eNB *phy_vars_eNB,
uint8_t *DLSCH_pdu,
@@ -1488,6 +1507,7 @@ uint8_t generate_dci_top_emul(PHY_VARS_eNB *phy_vars_eNB,
void generate_64qam_table(void);
void generate_16qam_table(void);
void generate_qpsk_table(void);
uint16_t extract_crc(uint8_t *dci,uint8_t DCI_LENGTH);
@@ -1660,15 +1680,17 @@ int32_t generate_srs_tx(PHY_VARS_UE *phy_vars_ue,
/*!
\brief This function generates the downlink reference signal for the PUSCH according to 36.211 v8.6.0. The DRS occuies the RS defined by rb_alloc and the symbols 2 and 8 for extended CP and 3 and 10 for normal CP.
*/
int generate_drs_pusch(PHY_VARS_UE *ue,
UE_rxtx_proc_t *proc,
LTE_DL_FRAME_PARMS *frame_parms,
int32_t **txdataF,
uint8_t eNB_id,
short amp,
unsigned int subframe,
unsigned int first_rb,
unsigned int nb_rb,
uint8_t ant);
int32_t generate_drs_pusch(PHY_VARS_UE *phy_vars_ue,
UE_rxtx_proc_t *proc,
uint8_t eNB_id,
int16_t amp,
uint32_t subframe,
uint32_t first_rb,
uint32_t nb_rb,
uint8_t ant);
/*!
\brief This function initializes the Group Hopping, Sequence Hopping and nPRS sequences for PUCCH/PUSCH according to 36.211 v8.6.0. It should be called after configuration of UE (reception of SIB2/3) and initial configuration of eNB (or after reconfiguration of cell-specific parameters).
@@ -1897,6 +1919,11 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *phy_vars_eNB,
uint8_t Nbundled,
uint8_t llr8_flag);
int ulsch_decoding_data_all(PHY_VARS_eNB *eNB,
int UE_id,
int harq_pid,
int llr8_flag);
/*!
\brief Decoding of ULSCH data component from 36-212. This one spawns 1 worker thread in parallel,half of the segments in each thread.
@param phy_vars_eNB Pointer to eNB top-level descriptor
+3 -7
View File
@@ -2438,9 +2438,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
} // aa
LOG_D(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
LOG_I(PHY,"PUCCH 1a/b: subframe %d : stat %d,%d (pos %d)\n",subframe,stat_re,stat_im,
(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe]));
LOG_D(PHY,"PUCCH 1a/b: subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
LOG_I(PHY,"PUCCH 1a/b: subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_re);
eNB->pucch1ab_stats[UE_id][(subframe<<11) + 1+2*(eNB->pucch1ab_stats_cnt[UE_id][subframe])] = (stat_im);
@@ -2454,11 +2454,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
if (fmt==pucch_format1b)
*(1+payload) = (stat_im<0) ? 1 : 2;
} else { // insufficient energy on PUCCH so NAK
#if defined(USRP_REC_PLAY)
LOG_D(PHY,"PUCCH 1a/b: NAK subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
#else
LOG_D(PHY,"PUCCH 1a/b: subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
#endif
LOG_I(PHY,"PUCCH 1a/b (DTX): subframe %d : sigma2_dB %d, stat_max %d, pucch1_thres %d\n",subframe,sigma2_dB,dB_fixed(stat_max),pucch1_thres);
*payload = 4; // DTX
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re);
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im);
+27 -4
View File
@@ -31,7 +31,7 @@
*/
//#include "defs.h"
#include <syscall.h>
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "PHY/CODING/extern.h"
@@ -46,6 +46,9 @@
#include "UTIL/LOG/vcd_signal_dumper.h"
//#define DEBUG_ULSCH_DECODING
#include "targets/RT/USER/rt_wrapper.h"
extern int codingw;
void free_eNB_ulsch(LTE_eNB_ULSCH_t *ulsch)
{
@@ -221,8 +224,6 @@ uint8_t extract_cqi_crc(uint8_t *cqi,uint8_t CQI_LENGTH)
int ulsch_decoding_data_2thread0(td_params* tdp) {
PHY_VARS_eNB *eNB = tdp->eNB;
@@ -414,13 +415,20 @@ int ulsch_decoding_data_2thread0(td_params* tdp) {
extern int oai_exit;
void *td_thread(void *param) {
pthread_setname_np( pthread_self(), "td processing");
PHY_VARS_eNB *eNB = ((td_params*)param)->eNB;
eNB_proc_t *proc = &eNB->proc;
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
thread_top_init("td_thread",1,200000,250000,500000);
pthread_setname_np( pthread_self(),"td processing");
LOG_I(PHY,"thread td created id=%ld\n", syscall(__NR_gettid));
//wait_sync("td_thread");
while (!oai_exit) {
if (wait_on_condition(&proc->mutex_td,&proc->cond_td,&proc->instance_cnt_td,"td thread")<0) break;
if(oai_exit) break;
((td_params*)param)->ret = ulsch_decoding_data_2thread0((td_params*)param);
@@ -623,6 +631,7 @@ int ulsch_decoding_data_2thread(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr
break;
}
stop_meas(&eNB->ulsch_turbo_decoding_stats);
//printf("/////////////////////////////////////////**************************loop for %d time in ulsch_decoding main\n",r);
}
// wait for worker to finish
@@ -782,6 +791,20 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr8_flag)
return(ret);
}
int ulsch_decoding_data_all(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr8_flag)
{
int ret = 0;
/*if(codingw)
{
ret = ulsch_decoding_data_2thread(eNB,UE_id,harq_pid,llr8_flag);
}
else*/
{
ret = ulsch_decoding_data(eNB,UE_id,harq_pid,llr8_flag);
}
return ret;
}
static inline unsigned int lte_gold_unscram(unsigned int *x1, unsigned int *x2, unsigned char reset) __attribute__((always_inline));
static inline unsigned int lte_gold_unscram(unsigned int *x1, unsigned int *x2, unsigned char reset)
{
+1 -1
View File
@@ -62,7 +62,7 @@ unsigned char ue_power_offsets[25] = {14,11,9,8,7,6,6,5,4,4,4,3,3,3,2,2,2,1,1,1,
short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
short conjugate2[8]__attribute__((aligned(16))) = {1,-1,1,-1,1,-1,1,-1};
int qam64_table[8],qam16_table[4];
int qam64_table[8],qam16_table[4],qpsk_table[2];
unsigned char cs_ri_normal[4] = {1,4,7,10};
unsigned char cs_ri_extended[4] = {0,3,5,8};
+1 -1
View File
@@ -53,7 +53,7 @@ void print_meas_now(time_stats_t *ts, const char* name, FILE* file_name){
if (ts->trials>0) {
//fprintf(file_name,"Name %25s: Processing %15.3f ms for SF %d, diff_now %15.3f \n", name,(ts->diff_now/(cpu_freq_GHz*1000000.0)),subframe,ts->diff_now);
fprintf(file_name,"%15.3f ms, diff_now %15.3f \n",(ts->diff_now/(cpu_freq_GHz*1000000.0)),(double)ts->diff_now);
fprintf(file_name,"%15.3f us, diff_now %15.3f \n",(ts->diff_now/(cpu_freq_GHz*1000.0)),(double)ts->diff_now);
}
}
+88 -14
View File
@@ -270,6 +270,8 @@ typedef struct {
pthread_mutex_t mutex_rxtx;
/// scheduling parameters for RXn-TXnp4 thread
struct sched_param sched_param_rxtx;
/// pipeline ready state
int pipe_ready;
} eNB_rxtx_proc_t;
typedef struct {
@@ -285,6 +287,20 @@ typedef struct {
LTE_eNB_DLSCH_t *dlsch;
int G;
int harq_pid;
int total_worker;
int current_worker;
/// \internal This variable is protected by \ref mutex_te.
int instance_cnt_te;
/// pthread attributes for parallel turbo-encoder thread
pthread_attr_t attr_te;
/// scheduling parameters for parallel turbo-encoder thread
struct sched_param sched_param_te;
/// pthread structure for parallel turbo-encoder thread
pthread_t pthread_te;
/// condition variable for parallel turbo-encoder thread
pthread_cond_t cond_te;
/// mutex for parallel turbo-encoder thread
pthread_mutex_t mutex_te;
} te_params;
typedef struct RU_proc_t_s {
@@ -321,6 +337,7 @@ typedef struct RU_proc_t_s {
/// \brief Instance count for FH processing thread.
/// \internal This variable is protected by \ref mutex_FH.
int instance_cnt_FH;
int instance_cnt_FH1;
/// \internal This variable is protected by \ref mutex_prach.
int instance_cnt_prach;
#ifdef Rel14
@@ -336,14 +353,22 @@ typedef struct RU_proc_t_s {
int instance_cnt_asynch_rxtx;
/// \internal This variable is protected by \ref mutex_fep
int instance_cnt_fep;
/// \internal This variable is protected by \ref mutex_fep
/// \internal This variable is protected by \ref mutex_feptx
int instance_cnt_feptx;
/// \internal This variable is protected by \ref mutex_ru_thread
int instance_cnt_ru;
/// pthread structure for RU FH processing thread
pthread_t pthread_FH;
/// pthread structure for RU control thread
pthread_t pthread_ctrl;
/// This varible is protected by \ref mutex_emulatedRF
int instance_cnt_emulateRF;
/// pthread structure for RU FH processing thread
pthread_t pthread_FH1;
/// pthread structure for RU prach processing thread
pthread_t pthread_prach;
#ifdef Rel14
@@ -354,8 +379,10 @@ typedef struct RU_proc_t_s {
pthread_t pthread_synch;
/// pthread struct for RU RX FEP worker thread
pthread_t pthread_fep;
/// pthread struct for RU RX FEPTX worker thread
/// pthread struct for RU TX FEP worker thread
pthread_t pthread_feptx;
/// pthread struct for emulated RF
pthread_t pthread_emulateRF;
/// pthread structure for asychronous RX/TX processing thread
pthread_t pthread_asynch_rxtx;
/// flag to indicate first RX acquisition
@@ -364,8 +391,12 @@ typedef struct RU_proc_t_s {
int first_tx;
/// pthread attributes for RU FH processing thread
pthread_attr_t attr_FH;
/// pthread attributes for RU control thread
pthread_attr_t attr_ctrl;
pthread_attr_t attr_FH1;
/// pthread attributes for RU prach
pthread_attr_t attr_prach;
#ifdef Rel14
@@ -380,8 +411,11 @@ typedef struct RU_proc_t_s {
pthread_attr_t attr_fep;
/// pthread attributes for worker feptx thread
pthread_attr_t attr_feptx;
/// pthread attributes for emulated RF
pthread_attr_t attr_emulateRF;
/// scheduling parameters for RU FH thread
struct sched_param sched_param_FH;
struct sched_param sched_param_FH1;
/// scheduling parameters for RU prach thread
struct sched_param sched_param_prach;
#ifdef Rel14
@@ -394,6 +428,7 @@ typedef struct RU_proc_t_s {
struct sched_param sched_param_asynch_rxtx;
/// condition variable for RU FH thread
pthread_cond_t cond_FH;
pthread_cond_t cond_FH1;
/// condition variable for RU prach thread
pthread_cond_t cond_prach;
#ifdef Rel14
@@ -404,16 +439,19 @@ typedef struct RU_proc_t_s {
pthread_cond_t cond_synch;
/// condition variable for asynch RX/TX thread
pthread_cond_t cond_asynch_rxtx;
/// condition varaible for RU RX FEP thread
/// condition varible for RU RX FEP thread
pthread_cond_t cond_fep;
/// condition varaible for RU RX FEPTX thread
/// condition varible for RU TX FEP thread
pthread_cond_t cond_feptx;
/// condition varible for emulated RF
pthread_cond_t cond_emulateRF;
/// condition variable for eNB signal
pthread_cond_t cond_eNBs;
/// condition variable for ru_thread
pthread_cond_t cond_ru_thread;
/// mutex for RU FH
pthread_mutex_t mutex_FH;
pthread_mutex_t mutex_FH1;
/// mutex for RU prach
pthread_mutex_t mutex_prach;
#ifdef Rel14
@@ -430,14 +468,24 @@ typedef struct RU_proc_t_s {
pthread_mutex_t mutex_fep;
/// mutex for fep TX worker thread
pthread_mutex_t mutex_feptx;
/// mutex for ru_thread
pthread_mutex_t mutex_ru;
/// mutex for emulated RF thread
pthread_mutex_t mutex_emulateRF;
/// symbol mask for IF4p5 reception per subframe
uint32_t symbol_mask[10];
/// time measurements for each subframe
struct timespec t[10];
/// number of slave threads
int num_slaves;
/// array of pointers to slaves
struct RU_proc_t_s **slave_proc;
/// pipeline ready state
int ru_rx_ready;
int ru_tx_ready;
} RU_proc_t;
/// Context data structure for eNB subframe processing
@@ -471,7 +519,7 @@ typedef struct eNB_proc_t_s {
/// \internal This variable is protected by \ref mutex_td.
int instance_cnt_td;
/// \internal This variable is protected by \ref mutex_te.
int instance_cnt_te;
//int instance_cnt_te[3];
/// \internal This variable is protected by \ref mutex_prach.
int instance_cnt_prach;
#ifdef Rel14
@@ -493,7 +541,7 @@ typedef struct eNB_proc_t_s {
/// pthread attributes for parallel turbo-decoder thread
pthread_attr_t attr_td;
/// pthread attributes for parallel turbo-encoder thread
pthread_attr_t attr_te;
//pthread_attr_t attr_te[3];
/// pthread attributes for single eNB processing thread
pthread_attr_t attr_single;
/// pthread attributes for prach processing thread
@@ -507,7 +555,7 @@ typedef struct eNB_proc_t_s {
/// scheduling parameters for parallel turbo-decoder thread
struct sched_param sched_param_td;
/// scheduling parameters for parallel turbo-encoder thread
struct sched_param sched_param_te;
//struct sched_param sched_param_te[3];
/// scheduling parameters for single eNB thread
struct sched_param sched_param_single;
/// scheduling parameters for prach thread
@@ -521,7 +569,7 @@ typedef struct eNB_proc_t_s {
/// pthread structure for parallel turbo-decoder thread
pthread_t pthread_td;
/// pthread structure for parallel turbo-encoder thread
pthread_t pthread_te;
//pthread_t pthread_te[3];
/// pthread structure for PRACH thread
pthread_t pthread_prach;
#ifdef Rel14
@@ -531,7 +579,7 @@ typedef struct eNB_proc_t_s {
/// condition variable for parallel turbo-decoder thread
pthread_cond_t cond_td;
/// condition variable for parallel turbo-encoder thread
pthread_cond_t cond_te;
//pthread_cond_t cond_te[3];
/// condition variable for PRACH processing thread;
pthread_cond_t cond_prach;
#ifdef Rel14
@@ -543,7 +591,7 @@ typedef struct eNB_proc_t_s {
/// mutex for parallel turbo-decoder thread
pthread_mutex_t mutex_td;
/// mutex for parallel turbo-encoder thread
pthread_mutex_t mutex_te;
//pthread_mutex_t mutex_te[3];
/// mutex for PRACH thread
pthread_mutex_t mutex_prach;
#ifdef Rel14
@@ -573,9 +621,13 @@ typedef struct eNB_proc_t_s {
/// parameters for turbo-decoding worker thread
td_params tdp;
/// parameters for turbo-encoding worker thread
te_params tep;
te_params tep[3];
/// set of scheduling variables RXn-TXnp4 threads
eNB_rxtx_proc_t proc_rxtx[2];
/// stats thread pthread descriptor
pthread_t process_stats_thread;
/// for waking up tx procedure
RU_proc_t *ru_proc;
} eNB_proc_t;
@@ -677,6 +729,7 @@ typedef enum {
REMOTE_IF4p5 =3,
REMOTE_IF1pp =4,
MAX_RU_IF_TYPES =5
//EMULATE_RF =6
} RU_if_south_t;
typedef enum {
@@ -715,6 +768,10 @@ typedef struct RU_t_s{
int rx_offset;
/// flag to indicate the RU is a slave to another source
int is_slave;
/// flag to indicate that the RU should generate the DMRS sequence in slot 2 (subframe 1) for OTA synchronization and calibration
int generate_dmrs_sync;
/// flag to indicate if the RU has a control channel
int has_ctrl_prt;
/// counter to delay start of processing of RU until HW settles
int wait_cnt;
/// Total gain of receive chain
@@ -790,11 +847,19 @@ typedef struct RU_t_s{
void (*wakeup_prach_eNB_br)(struct PHY_VARS_eNB_s *eNB,struct RU_t_s *ru,int frame,int subframe);
#endif
/// function pointer to eNB entry routine
void (*eNB_top)(struct PHY_VARS_eNB_s *eNB, int frame_rx, int subframe_rx, char *string);
void (*eNB_top)(struct PHY_VARS_eNB_s *eNB, int frame_rx, int subframe_rx, char *string,struct RU_t_s *ru);
/// Timing statistics
time_stats_t ofdm_demod_stats;
/// Timing statistics (TX)
time_stats_t ofdm_mod_stats;
/// Timing wait statistics
time_stats_t ofdm_demod_wait_stats;
/// Timing wakeup statistics
time_stats_t ofdm_demod_wakeup_stats;
/// Timing wait statistics (TX)
time_stats_t ofdm_mod_wait_stats;
/// Timing wakeup statistics (TX)
time_stats_t ofdm_mod_wakeup_stats;
/// Timing statistics (RX Fronthaul + Compression)
time_stats_t rx_fhaul;
/// Timing statistics (TX Fronthaul + Compression)
@@ -826,6 +891,8 @@ typedef struct RU_t_s{
RU_proc_t proc;
/// stats thread pthread descriptor
pthread_t ru_stats_thread;
/// OTA synchronization signal
int16_t *dmrssync;
} RU_t;
@@ -994,7 +1061,7 @@ typedef struct PHY_VARS_eNB_s {
eth_params_t eth_params;
int rx_total_gain_dB;
int (*td)(struct PHY_VARS_eNB_s *eNB,int UE_id,int harq_pid,int llr8_flag);
int (*te)(struct PHY_VARS_eNB_s *,uint8_t *,uint8_t,LTE_eNB_DLSCH_t *,int,uint8_t,time_stats_t *,time_stats_t *,time_stats_t *);
int (*te)(struct PHY_VARS_eNB_s *,uint8_t *,uint8_t,LTE_eNB_DLSCH_t *,int,uint8_t,time_stats_t *,time_stats_t *,time_stats_t *,time_stats_t *,time_stats_t *,time_stats_t *,time_stats_t *);
int (*start_if)(struct RU_t_s *ru,struct PHY_VARS_eNB_s *eNB);
uint8_t local_flag;
LTE_DL_FRAME_PARMS frame_parms;
@@ -1022,7 +1089,7 @@ typedef struct PHY_VARS_eNB_s {
#endif
Sched_Rsp_t Sched_INFO;
LTE_eNB_PDCCH pdcch_vars[2];
LTE_eNB_PHICH phich_vars[2];
LTE_eNB_PHICH phich_vars;
#ifdef Rel14
LTE_eNB_EPDCCH epdcch_vars[2];
LTE_eNB_MPDCCH mpdcch_vars[2];
@@ -1173,7 +1240,14 @@ typedef struct PHY_VARS_eNB_s {
time_stats_t dlsch_modulation_stats;
time_stats_t dlsch_scrambling_stats;
time_stats_t dlsch_rate_matching_stats;
time_stats_t dlsch_turbo_encoding_preperation_stats;
time_stats_t dlsch_turbo_encoding_segmentation_stats;
time_stats_t dlsch_turbo_encoding_stats;
time_stats_t dlsch_turbo_encoding_waiting_stats;
time_stats_t dlsch_turbo_encoding_signal_stats;
time_stats_t dlsch_turbo_encoding_main_stats;
time_stats_t dlsch_turbo_encoding_wakeup_stats0;
time_stats_t dlsch_turbo_encoding_wakeup_stats1;
time_stats_t dlsch_interleaving_stats;
time_stats_t rx_dft_stats;
+6 -4
View File
@@ -839,22 +839,24 @@ typedef struct {
uint8_t dci_pdu[8];
} mDCI_ALLOC_t;
#define MAX_NUM_PDCCH 32
typedef struct {
uint8_t num_dci;
uint8_t num_pdcch_symbols;
DCI_ALLOC_t dci_alloc[32];
DCI_ALLOC_t dci_alloc[MAX_NUM_PDCCH];
} LTE_eNB_PDCCH;
typedef struct {
uint16_t absSF;
uint16_t active;
uint8_t hi;
uint8_t first_rb;
uint8_t n_DMRS;
} phich_config_t;
#define MAX_NUM_PHICH 32
typedef struct {
uint8_t num_hi;
phich_config_t config[32];
phich_config_t config[MAX_NUM_PHICH];
} LTE_eNB_PHICH;
typedef struct {
+3
View File
@@ -203,6 +203,9 @@
// QAM amplitude definitions
/// Amplitude for QPSK (\f$ 2^15 \times 1/\sqrt{2}\f$)
#define QPSK 23170
/// First Amplitude for QAM16 (\f$ 2^{15} \times 2/\sqrt{10}\f$)
#define QAM16_n1 20724
/// Second Amplitude for QAM16 (\f$ 2^{15} \times 1/\sqrt{10}\f$)
+11 -8
View File
@@ -95,7 +95,8 @@ void handle_nfapi_hi_dci0_dci_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_r
void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t *proc,
nfapi_hi_dci0_request_pdu_t *hi_dci0_config_pdu)
{
LTE_eNB_PHICH *phich = &eNB->phich_vars[subframe&1];
LTE_eNB_PHICH *phich = &eNB->phich_vars;
int i;
// copy dci configuration in to eNB structure
LOG_D(PHY,"Received HI PDU with value %d (rbstart %d,cshift %d)\n",
@@ -104,11 +105,14 @@ void handle_nfapi_hi_dci0_hi_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rx
hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms);
// DJP - TODO FIXME - transmission power ignored
phich->config[phich->num_hi].hi = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.hi_value;
phich->config[phich->num_hi].first_rb = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.resource_block_start;
phich->config[phich->num_hi].n_DMRS = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms;
phich->num_hi++;
AssertFatal(phich->num_hi<32,"Maximum number of phich reached in subframe\n");
for (i=0;i<32;i++) if (phich->config[i].active==0) break;
AssertFatal(i<32,"no free PHICH allocation\n");
phich->config[i].active = 0;
phich->config[i].absSF = (frame*10)+subframe;
phich->config[i].hi = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.hi_value;
phich->config[i].first_rb = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.resource_block_start;
phich->config[i].n_DMRS = hi_dci0_config_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms;
}
void handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
@@ -488,7 +492,7 @@ void handle_uci_harq_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_pdu
{
LTE_eNB_UCI *uci = &eNB->uci_vars[UE_id];
LOG_D(PHY,"Frame %d, Subframe %d: Programming UCI_HARQ process (type %d)\n",frame,subframe,HARQ);
LOG_I(PHY,"Frame %d, Subframe %d: Programming UCI_HARQ process (type %d)\n",frame,subframe,HARQ);
uci->frame = frame;
uci->subframe = subframe;
uci->rnti = ul_config_pdu->uci_harq_pdu.ue_information.ue_information_rel8.rnti;
@@ -653,7 +657,6 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
eNB->pdcch_vars[subframe&1].num_pdcch_symbols = number_pdcch_ofdm_symbols;
eNB->pdcch_vars[subframe&1].num_dci = 0;
eNB->phich_vars[subframe&1].num_hi = 0;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d hi_dci0:SFN/SF:%04d%d:pdus:%d ul_cfg:SFN/SF:%04d%d:pdus:%d num_pdcch_symbols:%d\n",
frame,subframe,
+1 -1
View File
@@ -841,7 +841,7 @@ lte_subframe_t get_subframe_direction(uint8_t Mod_id,uint8_t CC_id,uint8_t subfr
uint8_t phich_subframe_to_harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t subframe)
{
LOG_I(PHY,"phich_subframe_to_harq_pid.c: frame %d, subframe %d\n",frame,subframe);
LOG_D(PHY,"phich_subframe_to_harq_pid.c: frame %d, subframe %d\n",frame,subframe);
return(subframe2harq_pid(frame_parms,
phich_frame2_pusch_frame(frame_parms,frame,subframe),
phich_subframe2_pusch_subframe(frame_parms,subframe)));
+134 -75
View File
@@ -346,14 +346,24 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
start_meas(&eNB->dlsch_encoding_stats);
eNB->te(eNB,
dlsch_harq->pdu,
dlsch_harq->pdsch_start,
dlsch,
frame,subframe,
&eNB->dlsch_rate_matching_stats,
&eNB->dlsch_turbo_encoding_stats,
&eNB->dlsch_interleaving_stats);
dlsch_harq->pdu,
dlsch_harq->pdsch_start,
dlsch,
frame,
subframe,
&eNB->dlsch_rate_matching_stats,
&eNB->dlsch_turbo_encoding_stats,
&eNB->dlsch_turbo_encoding_waiting_stats,
&eNB->dlsch_turbo_encoding_main_stats,
&eNB->dlsch_turbo_encoding_wakeup_stats0,
&eNB->dlsch_turbo_encoding_wakeup_stats1,
&eNB->dlsch_interleaving_stats);
stop_meas(&eNB->dlsch_encoding_stats);
//////////////////////////////////////////////////*******************************************
if(eNB->dlsch_encoding_stats.diff_now>500*3000 && opp_enabled == 1)
{
print_meas_now(&eNB->dlsch_encoding_stats,"total coding",stderr);
}
// 36-211
start_meas(&eNB->dlsch_scrambling_stats);
dlsch_scrambling(fp,
@@ -546,6 +556,7 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
else
{
// generate pdsch
pdsch_procedures(eNB,
proc,
harq_pid,
@@ -749,7 +760,7 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
/* cancel SR detection if reception on n1_pucch0 is better than on SR PUCCH resource index, otherwise send it up to MAC */
if (uci->type==HARQ_SR && metric[0] > metric_SR) SR_payload = 0;
else if (SR_payload == 1) fill_sr_indication(eNB,uci->rnti,frame,subframe,metric_SR);
if (uci->type==HARQ_SR && metric[0] <= metric_SR) {
/* when transmitting ACK/NACK on SR PUCCH resource index, SR payload is always 1 */
SR_payload = 1;
@@ -772,8 +783,8 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
uci->rnti,
frame,subframe,
pucch_b0b1[0][0],metric[0]);
uci->stat = metric[0];
uci->stat = metric[0];
fill_uci_harq_indication(eNB,uci,frame,subframe,pucch_b0b1[0],0,0xffff);
}
@@ -782,12 +793,12 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
// if SR was detected, use the n1_pucch from SR
if (SR_payload==1) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK (%d,%d,%d,%d) format %d with SR\n",eNB->Mod_id,
eNB->dlsch[UE_id][0]->rnti,
LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK format %d with SR\n",eNB->Mod_id,
uci->rnti,
frame,subframe,
n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,format);
#endif
uci->pucch_fmt);
metric[0] = rx_pucch(eNB,
pucch_format1b,
@@ -800,9 +811,9 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
subframe,
PUCCH1a_THRES);
} else { //using assigned pucch resources
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK M=%d (%d,%d,%d,%d) format %d\n",eNB->Mod_id,
eNB->dlsch[UE_id][0]->rnti,
LOG_I(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK M=%d (%d,%d,%d,%d) format %d\n",eNB->Mod_id,
uci->rnti,
frame,subframe,
uci->num_pucch_resources,
uci->n_pucch_1[res][0],
@@ -810,7 +821,7 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
uci->n_pucch_1[res][2],
uci->n_pucch_1[res][3],
uci->pucch_fmt);
#endif
for (res=0;res<uci->num_pucch_resources;res++)
metric[res] = rx_pucch(eNB,
uci->pucch_fmt,
@@ -844,7 +855,7 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] != 1) { // 0 ACKs, or at least one DL assignment missed
harq_ack[0] = 0;
}
uci->stat = metric[0];
uci->stat = metric[0];
fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,2,0xffff); // special_bundling mode
}
else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources==2)){ // multiplexing + no SR, implement Table 10.1.3-5 (Rel14) for multiplexing with M=2
@@ -886,7 +897,7 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
}
}
}
uci->stat = max(metric[0],metric[1]);
uci->stat = max(metric[0],metric[1]);
fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,1,tdd_multiplexing_mask); // multiplexing mode
} //else if ((uci->tdd_bundling == 0) && (res==2))
else if ((uci->tdd_bundling == 0) && (uci->num_pucch_resources==3)){ // multiplexing + no SR, implement Table 10.1.3-6 (Rel14) for multiplexing with M=3
@@ -1105,22 +1116,22 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
}
}
}
uci->stat = max_metric;
uci->stat = max_metric;
fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,1,tdd_multiplexing_mask); // multiplexing mode
} // else if ((uci->tdd_bundling == 0) && (res==4))
else { // bundling
harq_ack[0] = pucch_b0b1[0][0];
harq_ack[1] = pucch_b0b1[0][1];
uci->stat = metric[0];
uci->stat = metric[0];
fill_uci_harq_indication(eNB,uci,frame,subframe,harq_ack,0,0xffff); // special_bundling mode
}
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d ACK/NAK metric 0 %d, metric 1 %d, (%d,%d)\n",eNB->Mod_id,
eNB->dlsch[UE_id][0]->rnti,
LOG_I(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d ACK/NAK metric 0 %d, metric 1 %d, (%d,%d)\n",eNB->Mod_id,
uci->rnti,
frame,subframe,
metric0,metric1,pucch_b0b1[0],pucch_b0b1[1]);
#endif
metric[0],metric[1],pucch_b0b1[0][0],pucch_b0b1[0][1]);
}
break;
default:
@@ -1359,36 +1370,62 @@ extern int oai_exit;
extern void *td_thread(void*);
void init_td_thread(PHY_VARS_eNB *eNB,pthread_attr_t *attr_td) {
void init_td_thread(PHY_VARS_eNB *eNB) {
eNB_proc_t *proc = &eNB->proc;
proc->tdp.eNB = eNB;
proc->instance_cnt_td = -1;
pthread_attr_init( &proc->attr_td);
pthread_mutex_init( &proc->mutex_td, NULL);
pthread_cond_init( &proc->cond_td, NULL);
pthread_create(&proc->pthread_td, &proc->attr_td, td_thread, (void*)&proc->tdp);
pthread_create(&proc->pthread_td, attr_td, td_thread, (void*)&proc->tdp);
}
void kill_td_thread(PHY_VARS_eNB *eNB) {
eNB_proc_t *proc = &eNB->proc;
proc->instance_cnt_td = 0;
pthread_cond_signal(&proc->cond_td);
pthread_join(proc->pthread_td, NULL);
pthread_mutex_destroy( &proc->mutex_td );
pthread_cond_destroy( &proc->cond_td );
}
extern void *te_thread(void*);
void init_te_thread(PHY_VARS_eNB *eNB,pthread_attr_t *attr_te) {
void init_te_thread(PHY_VARS_eNB *eNB) {
eNB_proc_t *proc = &eNB->proc;
proc->tep.eNB = eNB;
proc->instance_cnt_te = -1;
for(int i=0; i<3 ;i++){
proc->tep[i].eNB = eNB;
proc->tep[i].instance_cnt_te = -1;
pthread_mutex_init( &proc->tep[i].mutex_te, NULL);
pthread_cond_init( &proc->tep[i].cond_te, NULL);
pthread_attr_init( &proc->tep[i].attr_te);
pthread_mutex_init( &proc->mutex_te, NULL);
pthread_cond_init( &proc->cond_te, NULL);
printf("Creating te_thread\n");
pthread_create(&proc->pthread_te, attr_te, te_thread, (void*)&proc->tep);
printf("Creating te_thread 0\n");
pthread_create(&proc->tep[i].pthread_te, &proc->tep[i].attr_te, te_thread, (void*)&proc->tep[i]);
}
}
void kill_te_thread(PHY_VARS_eNB *eNB) {
eNB_proc_t *proc = &eNB->proc;
for(int i=0; i<3 ;i++){
proc->tep[i].instance_cnt_te = 0;
pthread_cond_signal(&proc->tep[i].cond_te);
pthread_join(proc->tep[i].pthread_te, NULL);
pthread_mutex_destroy( &proc->tep[i].mutex_te);
pthread_cond_destroy( &proc->tep[i].cond_te);
}
}
void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe)
{
@@ -1451,7 +1488,9 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe)
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subframe,uint16_t mask) {
/* release the harq if its round is >= 'after_rounds' */
static void do_release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subframe,uint16_t mask, int after_rounds)
{
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
@@ -1472,11 +1511,13 @@ void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subf
dlsch1_harq = dlsch1->harq_processes[harq_pid];
AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n");
dlsch0_harq->status = SCH_IDLE;
/*if ((dlsch1_harq == NULL)||
((dlsch1_harq!=NULL)&&
(dlsch1_harq->status == SCH_IDLE)))*/
dlsch0->harq_mask &= ~(1<<harq_pid);
if (dlsch0_harq->round >= after_rounds) {
dlsch0_harq->status = SCH_IDLE;
/*if ((dlsch1_harq == NULL)||
((dlsch1_harq!=NULL)&&
(dlsch1_harq->status == SCH_IDLE)))*/
dlsch0->harq_mask &= ~(1<<harq_pid);
}
LOG_D(PHY,"Frame %d, subframe %d: Releasing harq %d for UE %x\n",frame,subframe,harq_pid,dlsch0->rnti);
}
@@ -1496,17 +1537,28 @@ void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subf
dlsch1_harq = dlsch1->harq_processes[harq_pid];
AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n");
dlsch0_harq->status = SCH_IDLE;
if ((dlsch1_harq == NULL)||
((dlsch1_harq!=NULL)&&
(dlsch1_harq->status == SCH_IDLE)))
dlsch0->harq_mask &= ~(1<<harq_pid);
if (dlsch0_harq->round >= after_rounds) {
dlsch0_harq->status = SCH_IDLE;
if ((dlsch1_harq == NULL)||
((dlsch1_harq!=NULL)&&
(dlsch1_harq->status == SCH_IDLE)))
dlsch0->harq_mask &= ~(1<<harq_pid);
}
}
}
}
}
}
static void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subframe,uint16_t mask, int is_ack)
{
/* Maximum number of DL transmissions = 4.
* TODO: get the value from configuration.
* If is_ack is true then we release immediately. The value -1 can be used for that.
*/
do_release_harq(eNB, UE_id, tb, frame, subframe, mask, is_ack ? -1 : 4);
}
int getM(PHY_VARS_eNB *eNB,int frame,int subframe) {
int M,Mtx=0;
@@ -1607,7 +1659,8 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
pdu->harq_indication_fdd_rel13.harq_tb_n[i] = 2-ulsch_harq->o_ACK[i];
// release DLSCH if needed
if (ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff);
release_harq(eNB,UE_id,i,frame,subframe,0xffff, ulsch_harq->o_ACK[i] == 1);
#if T_TRACER
/* TODO: get correct harq pid */
@@ -1633,13 +1686,17 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = 2-ulsch_harq->o_ACK[i];
// release DLSCH if needed
if (ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff);
if (M==1 && ulsch_harq->O_ACK==1 && ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
else if (M==1 && ulsch_harq->O_ACK==2 && ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff);
/* TODO: review this code, it's most certainly wrong.
* We have to release the proper HARQ in case of ACK or NACK if max retransmission reached.
* Basically, call release_harq with 1 as last argument when ACK and 0 when NACK.
*/
release_harq(eNB,UE_id,i,frame,subframe,0xffff, ulsch_harq->o_ACK[i] == 1);
if (M==1 && ulsch_harq->O_ACK==1 && ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff, ulsch_harq->o_ACK[i] == 1);
else if (M==1 && ulsch_harq->O_ACK==2 && ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff, ulsch_harq->o_ACK[i] == 1);
else if (M>1 && ulsch_harq->o_ACK[i] == 1) {
// spatial bundling
release_harq(eNB,UE_id,0,frame,subframe,1<<i);
release_harq(eNB,UE_id,1,frame,subframe,1<<i);
release_harq(eNB,UE_id,0,frame,subframe,1<<i, ulsch_harq->o_ACK[i] == 1);
release_harq(eNB,UE_id,1,frame,subframe,1<<i, ulsch_harq->o_ACK[i] == 1);
}
}
}
@@ -1701,7 +1758,8 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0];
// release DLSCH if needed
if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
#if T_TRACER
if (harq_ack[0] != 1)
@@ -1721,8 +1779,8 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
pdu->harq_indication_fdd_rel13.harq_tb_n[0] = harq_ack[0];
pdu->harq_indication_fdd_rel13.harq_tb_n[1] = harq_ack[1];
// release DLSCH if needed
if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
if (harq_ack[1] == 1) release_harq(eNB,UE_id,1,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
}
else AssertFatal(1==0,"only format 1a/b for now, received %d\n",uci->pucch_fmt);
}
@@ -1743,7 +1801,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
// release all bundled DLSCH if needed
if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
}
else if (uci->pucch_fmt == pucch_format1b) {
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 2;
@@ -1753,8 +1811,8 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = harq_ack[0];
pdu->harq_indication_tdd_rel13.harq_data[1].bundling.value_0 = harq_ack[1];
// release all DLSCH if needed
if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
if (harq_ack[1] == 1) release_harq(eNB,UE_id,1,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
}
break;
case 1: // multiplexing
@@ -1766,7 +1824,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
AssertFatal(harq_ack[0] == 1 || harq_ack[0] == 2 || harq_ack[0] == 4, "harq_ack[0] is %d, should be 1,2 or 4\n",harq_ack[0]);
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
// release all DLSCH if needed
if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
}
else if (uci->num_pucch_resources == 1 && uci->pucch_fmt == pucch_format1b) {
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
@@ -1776,8 +1834,8 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = harq_ack[0];
pdu->harq_indication_tdd_rel13.harq_data[1].multiplex.value_0 = harq_ack[1];
// release all DLSCH if needed
if (harq_ack[0] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
if (harq_ack[1] == 1) release_harq(eNB,UE_id,1,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, harq_ack[0] == 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, harq_ack[1] == 1);
}
else { // num_pucch_resources (M) > 1
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
@@ -1788,8 +1846,8 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
if (uci->num_pucch_resources == 3) pdu->harq_indication_tdd_rel13.harq_data[2].multiplex.value_0 = harq_ack[2];
if (uci->num_pucch_resources == 4) pdu->harq_indication_tdd_rel13.harq_data[3].multiplex.value_0 = harq_ack[3];
// spatial-bundling in this case so release both HARQ if necessary
release_harq(eNB,UE_id,0,frame,subframe,tdd_multiplexing_mask);
release_harq(eNB,UE_id,1,frame,subframe,tdd_multiplexing_mask);
release_harq(eNB,UE_id,0,frame,subframe,tdd_multiplexing_mask, 1 /* force release? previous code was unconditional */);
release_harq(eNB,UE_id,1,frame,subframe,tdd_multiplexing_mask, 1 /* force release? previous code was unconditional */);
}
break;
case 2: // special bundling (SR collision)
@@ -1800,26 +1858,27 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
switch (harq_ack[0]) {
case 0:
/* TODO: release_harq here? this whole code looks suspicious */
break;
case 1: // check if M=1,4,7
if (uci->num_pucch_resources == 1 || uci->num_pucch_resources == 4 ||
tdd_config5_sf2scheds == 1 || tdd_config5_sf2scheds == 4 || tdd_config5_sf2scheds == 7) {
release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,1,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, 1);
}
break;
case 2: // check if M=2,5,8
if (uci->num_pucch_resources == 2 || tdd_config5_sf2scheds == 2 ||
tdd_config5_sf2scheds == 5 || tdd_config5_sf2scheds == 8) {
release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,1,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, 1);
}
break;
case 3: // check if M=3,6,9
if (uci->num_pucch_resources == 3 || tdd_config5_sf2scheds == 3 ||
tdd_config5_sf2scheds == 6 || tdd_config5_sf2scheds == 9) {
release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,1,frame,subframe,0xffff);
release_harq(eNB,UE_id,0,frame,subframe,0xffff, 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, 1);
}
break;
}
@@ -1830,7 +1889,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs++;
LOG_D(PHY,"Incremented eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs:%d\n", eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
LOG_I(PHY,"Incremented eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs:%d\n", eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
}
+4 -2
View File
@@ -41,7 +41,7 @@
#include <sched.h>
#include "targets/RT/USER/lte-softmodem.h"
#define DEBUG_PHY_PROC
//#define DEBUG_PHY_PROC
#ifndef PUCCH
#define PUCCH
@@ -1851,6 +1851,8 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
for (aa=0; aa<1/*frame_parms->nb_antennas_tx*/; aa++)
generate_drs_pusch(ue,
proc,
(LTE_DL_FRAME_PARMS *)NULL,
(int32_t**)NULL,
eNB_id,
tx_amp,
subframe_tx,
@@ -2161,7 +2163,7 @@ void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
&len);
LOG_D(PHY,"PUCCH feedback AbsSubframe %d.%d SR %d NbCW %d (%d %d) AckNack %d.%d CQI %d RI %d format %d pucch_resource %d pucch_payload %d %d \n",
LOG_I(PHY,"PUCCH feedback AbsSubframe %d.%d SR %d NbCW %d (%d %d) AckNack %d.%d CQI %d RI %d format %d pucch_resource %d pucch_payload %d %d \n",
frame_tx%1024, subframe_tx, SR_payload, nb_cw, ack_status_cw0, ack_status_cw1, pucch_ack_payload[0], pucch_ack_payload[1], cqi_status, ri_status, format, pucch_resource,pucch_payload[0],pucch_payload[1]);
// Part - IV
+72 -9
View File
@@ -84,11 +84,28 @@ void feptx0(RU_t *ru,int slot) {
6,
fp->nb_prefix_samples,
CYCLIC_PREFIX);
else normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
(int*)&ru->common.txdata[aa][slot_offset],
7,
fp);
else {
AssertFatal(ru->generate_dmrs_sync==1 && (fp->frame_type != TDD || ru->is_slave == 1),
"ru->generate_dmrs_sync should not be set, frame_type %d, is_slave %d\n",
fp->frame_type,ru->is_slave);
if (ru->generate_dmrs_sync == 1 && slot == 0 && subframe == 1 && aa==0) {
generate_drs_pusch((PHY_VARS_UE *)NULL,
(UE_rxtx_proc_t*)NULL,
fp,
ru->common.txdataF_BF,
0,
AMP,
1,
0,
fp->N_RB_DL,
aa);
}
normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
(int*)&ru->common.txdata[aa][slot_offset],
7,
fp);
}
/*
len = fp->samples_per_tti>>1;
@@ -138,12 +155,22 @@ static void *feptx_thread(void *param) {
RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc;
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
thread_top_init("feptx_thread",1,85000,120000,500000);
pthread_setname_np( pthread_self(),"feptx processing");
LOG_I(PHY,"thread feptx created id=%ld\n", syscall(__NR_gettid));
//CPU_SET(6, &cpuset);
//pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
//wait_sync("feptx_thread");
thread_top_init("feptx_thread",0,870000,1000000,1000000);
while (!oai_exit) {
if (wait_on_condition(&proc->mutex_feptx,&proc->cond_feptx,&proc->instance_cnt_feptx,"feptx thread")<0) break;
//stop_meas(&ru->ofdm_mod_wakeup_stats);
feptx0(ru,1);
if (release_thread(&proc->mutex_feptx,&proc->instance_cnt_feptx,"feptx thread")<0) break;
@@ -152,6 +179,10 @@ static void *feptx_thread(void *param) {
exit_fun( "ERROR pthread_cond_signal" );
return NULL;
}
/*if(opp_enabled == 1 && ru->ofdm_mod_wakeup_stats.diff_now>30*3000){
print_meas_now(&ru->ofdm_mod_wakeup_stats,"fep wakeup",stderr);
printf("delay in fep wakeup in frame_tx: %d subframe_rx: %d \n",proc->frame_tx,proc->subframe_tx);
}*/
}
@@ -168,7 +199,7 @@ void feptx_ofdm_2thread(RU_t *ru) {
wait.tv_sec=0;
wait.tv_nsec=5000000L;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 1 );
start_meas(&ru->ofdm_mod_stats);
if (subframe_select(fp,subframe) == SF_UL) return;
@@ -198,17 +229,25 @@ void feptx_ofdm_2thread(RU_t *ru) {
exit_fun( "ERROR pthread_cond_signal" );
return;
}
//start_meas(&ru->ofdm_mod_wakeup_stats);
pthread_mutex_unlock( &proc->mutex_feptx );
}
// call first slot in this thread
feptx0(ru,0);
start_meas(&ru->ofdm_mod_wait_stats);
wait_on_busy_condition(&proc->mutex_feptx,&proc->cond_feptx,&proc->instance_cnt_feptx,"feptx thread");
stop_meas(&ru->ofdm_mod_wait_stats);
/*if(opp_enabled == 1 && ru->ofdm_mod_wait_stats.diff_now>30*3000){
print_meas_now(&ru->ofdm_mod_wait_stats,"fep wakeup",stderr);
printf("delay in feptx wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_tx,proc->subframe_tx);
}*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
stop_meas(&ru->ofdm_mod_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM , 0 );
}
@@ -429,12 +468,23 @@ static void *fep_thread(void *param) {
RU_t *ru = (RU_t *)param;
RU_proc_t *proc = &ru->proc;
thread_top_init("fep_thread",0,870000,1000000,1000000);
thread_top_init("fep_thread",1,100000,120000,5000000);
pthread_setname_np( pthread_self(),"fep processing");
LOG_I(PHY,"thread fep created id=%ld\n", syscall(__NR_gettid));
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
//CPU_SET(2, &cpuset);
//pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
//wait_sync("fep_thread");
while (!oai_exit) {
if (wait_on_condition(&proc->mutex_fep,&proc->cond_fep,&proc->instance_cnt_fep,"fep thread")<0) break;
if (wait_on_condition(&proc->mutex_fep,&proc->cond_fep,&proc->instance_cnt_fep,"fep thread")<0) break;
//stop_meas(&ru->ofdm_demod_wakeup_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX1, 1 );
fep0(ru,0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX1, 0 );
if (release_thread(&proc->mutex_fep,&proc->instance_cnt_fep,"fep thread")<0) break;
if (pthread_cond_signal(&proc->cond_fep) != 0) {
@@ -442,6 +492,10 @@ static void *fep_thread(void *param) {
exit_fun( "ERROR pthread_cond_signal" );
return NULL;
}
/*if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.diff_now>30*3000){
print_meas_now(&ru->ofdm_demod_wakeup_stats,"fep wakeup",stderr);
printf("delay in fep wakeup in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->subframe_rx);
}*/
}
@@ -492,6 +546,7 @@ void ru_fep_full_2thread(RU_t *ru) {
wait.tv_sec=0;
wait.tv_nsec=5000000L;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 1 );
start_meas(&ru->ofdm_demod_stats);
if (pthread_mutex_timedlock(&proc->mutex_fep,&wait) != 0) {
@@ -515,15 +570,23 @@ void ru_fep_full_2thread(RU_t *ru) {
exit_fun( "ERROR pthread_cond_signal" );
return;
}
//start_meas(&ru->ofdm_demod_wakeup_stats);
pthread_mutex_unlock( &proc->mutex_fep );
// call second slot in this symbol
fep0(ru,1);
start_meas(&ru->ofdm_demod_wait_stats);
wait_on_busy_condition(&proc->mutex_fep,&proc->cond_fep,&proc->instance_cnt_fep,"fep thread");
stop_meas(&ru->ofdm_demod_wait_stats);
if(opp_enabled == 1 && ru->ofdm_demod_wakeup_stats.diff_now>30*3000){
print_meas_now(&ru->ofdm_demod_wakeup_stats,"fep wakeup",stderr);
printf("delay in fep wait on codition in frame_rx: %d subframe_rx: %d \n",proc->frame_rx,proc->subframe_rx);
}
stop_meas(&ru->ofdm_demod_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX, 0 );
}
@@ -39,6 +39,13 @@
#include <fcntl.h>
#include <errno.h>
#include "platform_constants.h"
#ifdef UE_NAS_USE_TUN
#include <sys/ioctl.h>
#include <sys/socket.h>
#include <linux/if.h>
#include <linux/if_tun.h>
#include "openairinterface5g_limits.h"
#endif
char nl_rx_buf[NL_MAX_PAYLOAD];
@@ -47,12 +54,121 @@ struct nlmsghdr *nas_nlh_tx = NULL;
struct nlmsghdr *nas_nlh_rx = NULL;
struct iovec nas_iov_tx;
struct iovec nas_iov_rx = {nl_rx_buf, sizeof(nl_rx_buf)};
#ifdef UE_NAS_USE_TUN
int nas_sock_fd[NUMBER_OF_UE_MAX];
#else
int nas_sock_fd;
#endif
struct msghdr nas_msg_tx;
struct msghdr nas_msg_rx;
#define GRAAL_NETLINK_ID 31
#ifdef UE_NAS_USE_TUN
static int tun_alloc(char *dev)
{
struct ifreq ifr;
int fd, err;
if( (fd = open("/dev/net/tun", O_RDWR)) < 0 ) {
printf("[TUN] failed to open /dev/net/tun\n");
return -1;
}
memset(&ifr, 0, sizeof(ifr));
/* Flags: IFF_TUN - TUN device (no Ethernet headers)
* IFF_TAP - TAP device
*
* IFF_NO_PI - Do not provide packet information
*/
ifr.ifr_flags = IFF_TUN | IFF_NO_PI;
if( *dev )
strncpy(ifr.ifr_name, dev, IFNAMSIZ);
if( (err = ioctl(fd, TUNSETIFF, (void *) &ifr)) < 0 ){
close(fd);
return err;
}
strcpy(dev, ifr.ifr_name);
return fd;
}
int netlink_init(void)
{
int i;
int ret;
char ifname[64];
for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
sprintf(ifname, "oip%d", i+1);
nas_sock_fd[i] = tun_alloc(ifname);
if (nas_sock_fd[i] == -1) {
printf("[NETLINK] Error opening socket %d (%d:%s)\n",nas_sock_fd[i],errno, strerror(errno));
#if defined(LINK_ENB_PDCP_TO_IP_DRIVER)
exit(1);
#endif
}
printf("[NETLINK]Opened socket with fd %d\n",nas_sock_fd[i]);
#if !defined(PDCP_USE_NETLINK_QUEUES)
ret = fcntl(nas_sock_fd[i],F_SETFL,O_NONBLOCK);
if (ret == -1) {
printf("[NETLINK] Error fcntl (%d:%s)\n",errno, strerror(errno));
#if defined(LINK_ENB_PDCP_TO_IP_DRIVER)
exit(1);
#endif
}
#endif
memset(&nas_src_addr, 0, sizeof(nas_src_addr));
nas_src_addr.nl_family = AF_NETLINK;
nas_src_addr.nl_pid = 1;//getpid(); /* self pid */
nas_src_addr.nl_groups = 0; /* not in mcast groups */
ret = bind(nas_sock_fd[i], (struct sockaddr*)&nas_src_addr, sizeof(nas_src_addr));
memset(&nas_dest_addr, 0, sizeof(nas_dest_addr));
nas_dest_addr.nl_family = AF_NETLINK;
nas_dest_addr.nl_pid = 0; /* For Linux Kernel */
nas_dest_addr.nl_groups = 0; /* unicast */
// TX PART
nas_nlh_tx=(struct nlmsghdr *)malloc(NLMSG_SPACE(NL_MAX_PAYLOAD));
memset(nas_nlh_tx, 0, NLMSG_SPACE(NL_MAX_PAYLOAD));
/* Fill the netlink message header */
nas_nlh_tx->nlmsg_len = NLMSG_SPACE(NL_MAX_PAYLOAD);
nas_nlh_tx->nlmsg_pid = 1;//getpid(); /* self pid */
nas_nlh_tx->nlmsg_flags = 0;
nas_iov_tx.iov_base = (void *)nas_nlh_tx;
nas_iov_tx.iov_len = nas_nlh_tx->nlmsg_len;
memset(&nas_msg_tx,0,sizeof(nas_msg_tx));
nas_msg_tx.msg_name = (void *)&nas_dest_addr;
nas_msg_tx.msg_namelen = sizeof(nas_dest_addr);
nas_msg_tx.msg_iov = &nas_iov_tx;
nas_msg_tx.msg_iovlen = 1;
// RX PART
memset(&nas_msg_rx,0,sizeof(nas_msg_rx));
nas_msg_rx.msg_name = (void *)&nas_src_addr;
nas_msg_rx.msg_namelen = sizeof(nas_src_addr);
nas_msg_rx.msg_iov = &nas_iov_rx;
nas_msg_rx.msg_iovlen = 1;
}
return 1;
}
#else /* UE_NAS_USE_TUN */
int netlink_init(void)
{
int ret;
@@ -119,3 +235,5 @@ int netlink_init(void)
return(nas_sock_fd);
}
#endif /* UE_NAS_USE_TUN */
+2
View File
@@ -69,6 +69,8 @@ double t_rx_min = 1000000000; /*!< \brief initial min process time for rx */
int n_tx_dropped = 0; /*!< \brief initial max process time for tx */
int n_rx_dropped = 0; /*!< \brief initial max process time for rx */
int codingw = 0;
void handler(int sig)
{
void *array[10];
+2
View File
@@ -89,6 +89,8 @@ nfapi_tx_request_pdu_t tx_pdu_list[MAX_NUM_TX_REQUEST_PDU];
nfapi_tx_request_t TX_req;
Sched_Rsp_t sched_resp;
int codingw = 0;
void
fill_nfapi_ulsch_config_request(nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint8_t cqi_req,
+4 -6
View File
@@ -91,10 +91,8 @@ double dac_fixed_gain(double *s_re[2],
int i;
int aa;
double amp,amp1_local,*amp1p;
amp = //sqrt(NB_RE)*pow(10.0,.05*txpwr_dBm)/sqrt(nb_tx_antennas); //this is amp per tx antenna
pow(10.0,.05*txpwr_dBm)/sqrt(nb_tx_antennas); //this is amp per tx antenna
double amp1_local,*amp1p;
double amp = pow(10.0,.05*txpwr_dBm)/sqrt(nb_tx_antennas); //this is amp per tx antenna
if (amp1==NULL) amp1p = &amp1_local;
else amp1p = amp1;
@@ -123,7 +121,7 @@ double dac_fixed_gain(double *s_re[2],
//printf("DL: amp1 %f dB (%d,%d), tx_power %f\n",20*log10(amp1),input_offset,input_offset_meas,txpwr_dBm);
*/
// printf("DAC: amp/amp1p %f amp1 %f dB (%d,%d), tx_power %f\n",amp/(*amp1p),20*log10(*amp1p),input_offset,input_offset_meas,txpwr_dBm);
for (i=0; i<length; i++) {
for (aa=0; aa<nb_tx_antennas; aa++) {
s_re[aa][i] = amp*((double)(((short *)input[aa]))[((i+input_offset)<<1)])/(*amp1p);
@@ -131,7 +129,7 @@ double dac_fixed_gain(double *s_re[2],
}
}
// printf("ener %e\n",signal_energy_fp(s_re,s_im,nb_tx_antennas,length,0));
// printf("ener %e\n",signal_energy_fp(s_re,s_im,nb_tx_antennas,length<length_meas?length:length_meas,0));
return(signal_energy_fp(s_re,s_im,nb_tx_antennas,length<length_meas?length:length_meas,0)/NB_RE);
}
+1 -1
View File
@@ -131,7 +131,7 @@ message flex_enb_config_request {
message flex_enb_config_reply {
optional flex_header header = 1;
optional uint32 eNB_id = 2; // Unique id to distinguish the eNB
optional uint64 eNB_id = 2; // Unique id to distinguish the eNB
repeated flex_cell_config cell_config = 3;
optional uint32 device_spec = 4;
}
+103 -13
View File
@@ -64,37 +64,124 @@
extern uint16_t sf_ahead;
void RCconfig_flexran()
{
int i;
uint16_t i;
uint16_t num_enbs;
char aprefix[MAX_OPTNAME_SIZE*2 + 8];
/* this will possibly truncate the cell id (RRC assumes int32_t).
* Both Nid_cell and enb_id are signed in RRC case, but we use unsigned for
* the bitshifting to work properly */
int32_t Nid_cell = 0;
uint16_t Nid_cell_tr = 0;
uint32_t enb_id = 0;
/*
* the only reason for all these variables is, that they are "hard-encoded"
* into the CCPARAMS_DESC macro and we need it for the Nid_cell variable ...
*/
char *frame_type, *prefix_type, *pbch_repetition, *prach_high_speed,
*pusch_hoppingMode, *pusch_enable64QAM, *pusch_groupHoppingEnabled,
*pusch_sequenceHoppingEnabled, *phich_duration, *phich_resource,
*srs_enable, *srs_ackNackST, *srs_MaxUpPts, *pusch_alpha,
*pucch_deltaF_Format1, *pucch_deltaF_Format1b, *pucch_deltaF_Format2,
*pucch_deltaF_Format2a, *pucch_deltaF_Format2b,
*rach_preamblesGroupAConfig, *rach_messagePowerOffsetGroupB, *pcch_nB;
long long int downlink_frequency;
int32_t tdd_config, tdd_config_s, eutra_band, uplink_frequency_offset,
Nid_cell_mbsfn, N_RB_DL, nb_antenna_ports, prach_root, prach_config_index,
prach_zero_correlation, prach_freq_offset, pucch_delta_shift,
pucch_nRB_CQI, pucch_nCS_AN, pucch_n1_AN, pdsch_referenceSignalPower,
pdsch_p_b, pusch_n_SB, pusch_hoppingOffset, pusch_groupAssignment,
pusch_nDMRS1, srs_BandwidthConfig, srs_SubframeConfig, pusch_p0_Nominal,
pucch_p0_Nominal, msg3_delta_Preamble, rach_numberOfRA_Preambles,
rach_sizeOfRA_PreamblesGroupA, rach_messageSizeGroupA,
rach_powerRampingStep, rach_preambleInitialReceivedTargetPower,
rach_preambleTransMax, rach_raResponseWindowSize,
rach_macContentionResolutionTimer, rach_maxHARQ_Msg3Tx,
pcch_defaultPagingCycle, bcch_modificationPeriodCoeff,
ue_TimersAndConstants_t300, ue_TimersAndConstants_t301,
ue_TimersAndConstants_t310, ue_TimersAndConstants_t311,
ue_TimersAndConstants_n310, ue_TimersAndConstants_n311,
ue_TransmissionMode;
/* get number of eNBs */
paramdef_t ENBSParams[] = ENBSPARAMS_DESC;
config_get(ENBSParams, sizeof(ENBSParams)/sizeof(paramdef_t), NULL);
num_enbs = ENBSParams[ENB_ACTIVE_ENBS_IDX].numelt;
/* for eNB ID */
paramdef_t ENBParams[] = ENBPARAMS_DESC;
paramlist_def_t ENBParamList = {ENB_CONFIG_STRING_ENB_LIST, NULL, 0};
/* for Nid_cell */
checkedparam_t config_check_CCparams[] = CCPARAMS_CHECK;
paramdef_t CCsParams[] = CCPARAMS_DESC;
paramlist_def_t CCsParamList = {ENB_CONFIG_STRING_COMPONENT_CARRIERS, NULL, 0};
/* map parameter checking array instances to parameter definition array instances */
for (int I = 0; I < (sizeof(CCsParams) / sizeof(paramdef_t)); I++) {
CCsParams[I].chkPptr = &(config_check_CCparams[I]);
}
paramdef_t flexranParams[] = FLEXRANPARAMS_DESC;
config_get(flexranParams, sizeof(flexranParams)/sizeof(paramdef_t), CONFIG_STRING_NETWORK_CONTROLLER_CONFIG);
if (!RC.flexran) {
RC.flexran = calloc(RC.nb_L1_inst, sizeof(flexran_agent_info_t*));
AssertFatal(RC.flexran != NULL,
RC.flexran = calloc(num_enbs, sizeof(flexran_agent_info_t*));
AssertFatal(RC.flexran,
"can't ALLOCATE %zu Bytes for %d flexran agent info with size %zu\n",
RC.nb_L1_inst * sizeof(flexran_agent_info_t*),
RC.nb_L1_inst, sizeof(flexran_agent_info_t*));
num_enbs * sizeof(flexran_agent_info_t*),
num_enbs, sizeof(flexran_agent_info_t*));
}
/* For all agent instance, fill in the same controller configuration. */
for (i = 0; i < RC.nb_L1_inst; i++) {
for (i = 0; i < num_enbs; i++) {
RC.flexran[i] = calloc(1, sizeof(flexran_agent_info_t));
AssertFatal(RC.flexran[i] != NULL,
AssertFatal(RC.flexran[i],
"can't ALLOCATE %zu Bytes for flexran agent info (iteration %d/%d)\n",
sizeof(flexran_agent_info_t), i + 1, RC.nb_L1_inst);
sizeof(flexran_agent_info_t), i + 1, num_enbs);
/* if config says "yes", enable Agent, in all other cases it's like "no" */
RC.flexran[i]->enabled = strcmp(*(flexranParams[FLEXRAN_ENABLED].strptr), "yes") == 0;
RC.flexran[i]->enabled = strcasecmp(*(flexranParams[FLEXRAN_ENABLED].strptr), "yes") == 0;
/* if not enabled, simply skip the rest, it is not needed anyway */
if (!RC.flexran[i]->enabled)
continue;
RC.flexran[i]->interface_name = strdup(*(flexranParams[FLEXRAN_INTERFACE_NAME_IDX].strptr));
//inet_ntop(AF_INET, &(enb_properties->properties[mod_id]->flexran_agent_ipv4_address), in_ip, INET_ADDRSTRLEN);
RC.flexran[i]->remote_ipv4_addr = strdup(*(flexranParams[FLEXRAN_IPV4_ADDRESS_IDX].strptr));
RC.flexran[i]->remote_port = *(flexranParams[FLEXRAN_PORT_IDX].uptr);
RC.flexran[i]->cache_name = strdup(*(flexranParams[FLEXRAN_CACHE_IDX].strptr));
RC.flexran[i]->node_ctrl_state = strcmp(*(flexranParams[FLEXRAN_AWAIT_RECONF_IDX].strptr), "yes") == 0 ? ENB_WAIT : ENB_NORMAL_OPERATION;
RC.flexran[i]->enb_id = i;
RC.flexran[i]->node_ctrl_state = strcasecmp(*(flexranParams[FLEXRAN_AWAIT_RECONF_IDX].strptr), "yes") == 0 ? ENB_WAIT : ENB_NORMAL_OPERATION;
config_getlist(&ENBParamList, ENBParams, sizeof(ENBParams)/sizeof(paramdef_t),NULL);
/* eNB ID from configuration, as read in by RCconfig_RRC() */
if (!ENBParamList.paramarray[i][ENB_ENB_ID_IDX].uptr) {
// Calculate a default eNB ID
# if defined(ENABLE_USE_MME)
enb_id = i + (s1ap_generate_eNB_id () & 0xFFFF8);
# else
enb_id = i;
# endif
} else {
enb_id = *(ENBParamList.paramarray[i][ENB_ENB_ID_IDX].uptr);
}
/* cell ID */
sprintf(aprefix, "%s.[%i]", ENB_CONFIG_STRING_ENB_LIST, i);
config_getlist(&CCsParamList, NULL, 0, aprefix);
if (CCsParamList.numelt > 0) {
sprintf(aprefix, "%s.[%i].%s.[%i]", ENB_CONFIG_STRING_ENB_LIST, i, ENB_CONFIG_STRING_COMPONENT_CARRIERS, 0);
config_get(CCsParams, sizeof(CCsParams)/sizeof(paramdef_t), aprefix);
Nid_cell_tr = (uint16_t) Nid_cell;
}
RC.flexran[i]->mod_id = i;
RC.flexran[i]->agent_id = (((uint64_t)i) << 48) | (((uint64_t)enb_id) << 16) | ((uint64_t)Nid_cell_tr);
/* assume for the moment the monolithic case, i.e. agent can provide
* information for all layers */
RC.flexran[i]->capability_mask = FLEXRAN_CAP_LOPHY | FLEXRAN_CAP_HIPHY
| FLEXRAN_CAP_LOMAC | FLEXRAN_CAP_HIMAC
| FLEXRAN_CAP_RLC | FLEXRAN_CAP_PDCP
| FLEXRAN_CAP_SDAP | FLEXRAN_CAP_RRC;
}
}
@@ -219,6 +306,9 @@ void RCconfig_macrlc() {
mac_top_init_eNB();
for (j=0;j<RC.nb_macrlc_inst;j++) {
//RC.mac[j]->phy_test = *(MacRLC_ParamList.paramarray[j][MACRLC_PHY_TEST_IDX].iptr);
//printf("PHY_TEST = %d,%d\n", RC.mac[j]->phy_test, j);
if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_N_PREFERENCE_IDX].strptr), "local_RRC") == 0) {
// check number of instances is same as RRC/PDCP
+39
View File
@@ -690,4 +690,43 @@ typedef enum {
#define CONFIG_STRING_MACRLC_CONFIG "macrlc_config"
/* MACRLC configuration parameters names */
#define CONFIG_STRING_MACRLC_CC "num_cc"
#define CONFIG_STRING_MACRLC_TRANSPORT_N_PREFERENCE "tr_n_preference"
#define CONFIG_STRING_MACRLC_LOCAL_N_IF_NAME "local_n_if_name"
#define CONFIG_STRING_MACRLC_LOCAL_N_ADDRESS "local_n_address"
#define CONFIG_STRING_MACRLC_REMOTE_N_ADDRESS "remote_n_address"
#define CONFIG_STRING_MACRLC_LOCAL_N_PORTC "local_n_portc"
#define CONFIG_STRING_MACRLC_REMOTE_N_PORTC "remote_n_portc"
#define CONFIG_STRING_MACRLC_LOCAL_N_PORTD "local_n_portd"
#define CONFIG_STRING_MACRLC_REMOTE_N_PORTD "remote_n_portd"
#define CONFIG_STRING_MACRLC_TRANSPORT_S_PREFERENCE "tr_s_preference"
#define CONFIG_STRING_MACRLC_LOCAL_S_IF_NAME "local_s_if_name"
#define CONFIG_STRING_MACRLC_LOCAL_S_ADDRESS "local_s_address"
#define CONFIG_STRING_MACRLC_REMOTE_S_ADDRESS "remote_s_address"
#define CONFIG_STRING_MACRLC_LOCAL_S_PORTC "local_s_portc"
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc"
#define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd"
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd"
#define CONFIG_STRING_MACRLC_PHY_TEST_MODE "phy_test_mode"
#define MACRLC_CC_IDX 0
#define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1
#define MACRLC_LOCAL_N_IF_NAME_IDX 2
#define MACRLC_LOCAL_N_ADDRESS_IDX 3
#define MACRLC_REMOTE_N_ADDRESS_IDX 4
#define MACRLC_LOCAL_N_PORTC_IDX 5
#define MACRLC_REMOTE_N_PORTC_IDX 6
#define MACRLC_LOCAL_N_PORTD_IDX 7
#define MACRLC_REMOTE_N_PORTD_IDX 8
#define MACRLC_TRANSPORT_S_PREFERENCE_IDX 9
#define MACRLC_LOCAL_S_IF_NAME_IDX 10
#define MACRLC_LOCAL_S_ADDRESS_IDX 11
#define MACRLC_REMOTE_S_ADDRESS_IDX 12
#define MACRLC_LOCAL_S_PORTC_IDX 13
#define MACRLC_REMOTE_S_PORTC_IDX 14
#define MACRLC_LOCAL_S_PORTD_IDX 15
#define MACRLC_REMOTE_S_PORTD_IDX 16
#define MACRLC_PHY_TEST_IDX 17
/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
+3 -10
View File
@@ -114,12 +114,12 @@ void *receive_thread(void *args) {
while (1) {
while (flexran_agent_msg_recv(d->enb_id, FLEXRAN_AGENT_DEFAULT, &data, &size, &priority) == 0) {
while (flexran_agent_msg_recv(d->mod_id, FLEXRAN_AGENT_DEFAULT, &data, &size, &priority) == 0) {
LOG_D(FLEXRAN_AGENT,"received message with size %d\n", size);
// Invoke the message handler
msg=flexran_agent_handle_message(d->enb_id, data, size);
msg=flexran_agent_handle_message(d->mod_id, data, size);
free(data);
@@ -127,7 +127,7 @@ void *receive_thread(void *args) {
if (msg != NULL){
data=flexran_agent_pack_message(msg,&size);
if (flexran_agent_msg_send(d->enb_id, FLEXRAN_AGENT_DEFAULT, data, size, priority)) {
if (flexran_agent_msg_send(d->mod_id, FLEXRAN_AGENT_DEFAULT, data, size, priority)) {
err_code = PROTOCOL__FLEXRAN_ERR__MSG_ENQUEUING;
goto error;
}
@@ -190,13 +190,6 @@ int flexran_agent_start(mid_t mod_id)
LOG_I(FLEXRAN_AGENT, "FlexRAN Agent for eNB %d is DISABLED\n", mod_id);
return 100;
}
flexran->enb_id = mod_id;
/* assume for the moment the monolithic case, i.e. agent can provide
* information for all layers */
flexran->capability_mask = FLEXRAN_CAP_LOL1 | FLEXRAN_CAP_HIL1
| FLEXRAN_CAP_LOL2 | FLEXRAN_CAP_HIL2
| FLEXRAN_CAP_PDCP | FLEXRAN_CAP_RRC;
/*
* Initialize the channel container
+73 -78
View File
@@ -804,7 +804,6 @@ int flexran_agent_enb_config_reply(mid_t mod_id, const void *params, Protocol__F
xid = (enb_config_req_msg->header)->xid;
int i, j;
int enb_id = mod_id;
Protocol__FlexEnbConfigReply *enb_config_reply_msg;
enb_config_reply_msg = malloc(sizeof(Protocol__FlexEnbConfigReply));
@@ -816,10 +815,10 @@ int flexran_agent_enb_config_reply(mid_t mod_id, const void *params, Protocol__F
goto error;
enb_config_reply_msg->header = header;
enb_config_reply_msg->enb_id = mod_id;
enb_config_reply_msg->enb_id = RC.flexran[mod_id]->agent_id;
enb_config_reply_msg->has_enb_id = 1;
enb_config_reply_msg->n_cell_config = MAX_NUM_CCs;
Protocol__FlexCellConfig **cell_conf;
@@ -832,61 +831,60 @@ int flexran_agent_enb_config_reply(mid_t mod_id, const void *params, Protocol__F
protocol__flex_cell_config__init(cell_conf[i]);
cell_conf[i]->phy_cell_id = 1;
cell_conf[i]->has_phy_cell_id = flexran_get_cell_id(enb_id,i);
cell_conf[i]->has_phy_cell_id = flexran_get_cell_id(mod_id,i);
cell_conf[i]->cell_id = i;
cell_conf[i]->has_cell_id = 1;
cell_conf[i]->pusch_hopping_offset = flexran_get_hopping_offset(enb_id,i);
cell_conf[i]->pusch_hopping_offset = flexran_get_hopping_offset(mod_id,i);
cell_conf[i]->has_pusch_hopping_offset = 1;
if (flexran_get_hopping_mode(enb_id,i) == 0) {
if (flexran_get_hopping_mode(mod_id,i) == 0) {
cell_conf[i]->hopping_mode = PROTOCOL__FLEX_HOPPING_MODE__FLHM_INTER;
} else if(flexran_get_hopping_mode(enb_id,i) == 1) {
} else if(flexran_get_hopping_mode(mod_id,i) == 1) {
cell_conf[i]->hopping_mode = PROTOCOL__FLEX_HOPPING_MODE__FLHM_INTERINTRA;
}
cell_conf[i]->has_hopping_mode = 1;
cell_conf[i]->n_sb = flexran_get_n_SB(enb_id,i);
cell_conf[i]->n_sb = flexran_get_n_SB(mod_id,i);
cell_conf[i]->has_n_sb = 1;
if (flexran_get_phich_resource(enb_id,i) == 0) {
if (flexran_get_phich_resource(mod_id,i) == 0) {
cell_conf[i]->phich_resource = PROTOCOL__FLEX_PHICH_RESOURCE__FLPR_ONE_SIXTH; //0
} else if (flexran_get_phich_resource(enb_id,i) == 1) {
} else if (flexran_get_phich_resource(mod_id,i) == 1) {
cell_conf[i]->phich_resource = PROTOCOL__FLEX_PHICH_RESOURCE__FLPR_HALF; //1
} else if (flexran_get_phich_resource(enb_id,i) == 2) {
} else if (flexran_get_phich_resource(mod_id,i) == 2) {
cell_conf[i]->phich_resource = PROTOCOL__FLEX_PHICH_RESOURCE__FLPR_ONE; // 2
} else if (flexran_get_phich_resource(enb_id,i) == 3) {
} else if (flexran_get_phich_resource(mod_id,i) == 3) {
cell_conf[i]->phich_resource = PROTOCOL__FLEX_PHICH_RESOURCE__FLPR_TWO;//3
}
cell_conf[i]->has_phich_resource = 1;
if (flexran_get_phich_duration(enb_id,i) == 0) {
if (flexran_get_phich_duration(mod_id,i) == 0) {
cell_conf[i]->phich_duration = PROTOCOL__FLEX_PHICH_DURATION__FLPD_NORMAL;
} else if(flexran_get_phich_duration(enb_id,i) == 1) {
} else if(flexran_get_phich_duration(mod_id,i) == 1) {
cell_conf[i]->phich_duration = PROTOCOL__FLEX_PHICH_DURATION__FLPD_EXTENDED;
}
cell_conf[i]->has_phich_duration = 1;
//TODO: Fill in with actual value, See TS 36.211, section 6.9
cell_conf[i]->init_nr_pdcch_ofdm_sym = flexran_get_num_pdcch_symb(enb_id,i);
cell_conf[i]->has_init_nr_pdcch_ofdm_sym = 0;
//TODO: Fill in with actual value
/* Protocol__FlexSiConfig *si_config; */
/* si_config = malloc(sizeof(Protocol__FlexSiConfig)); */
/* if(si_config == NULL) */
/* goto error; */
/* protocol__flex_si_config__init(si_config); */
/* //TODO: Fill in with actual value, Frame number to apply the SI configuration */
/* si_config->sfn = 1; */
/* si_config->has_sfn = 1; */
/* //TODO: Fill in with actual value, the length of SIB1 in bytes */
/* si_config->sib1_length = get_sib1_length(enb_id,i); */
/* si_config->has_sib1_length = 1; */
/* //TODO: Fill in with actual value, Scheduling window for all SIs in SF */
/* si_config->si_window_length = (uint32_t) get_si_window_length(enb_id,i); */
/* si_config->has_si_window_length = 1; */
/* //TODO: Fill in with actual value, the number of SI messages */
/* si_config->n_si_message=1; */
cell_conf[i]->init_nr_pdcch_ofdm_sym = flexran_get_num_pdcch_symb(mod_id,i);
cell_conf[i]->has_init_nr_pdcch_ofdm_sym = 1;
Protocol__FlexSiConfig *si_config;
si_config = malloc(sizeof(Protocol__FlexSiConfig));
if(si_config == NULL)
goto error;
protocol__flex_si_config__init(si_config);
si_config->sfn = flexran_get_current_system_frame_num(mod_id);
si_config->has_sfn = 1;
si_config->sib1_length = flexran_get_sib1_length(mod_id,i);
si_config->has_sib1_length = 1;
si_config->si_window_length = (uint32_t) flexran_get_si_window_length(mod_id, i);
si_config->has_si_window_length = 1;
si_config->n_si_message = 0;
/* Protocol__FlexSiMessage **si_message; */
/* si_message = malloc(sizeof(Protocol__FlexSiMessage *) * si_config->n_si_message); */
/* if(si_message == NULL) */
@@ -906,44 +904,42 @@ int flexran_agent_enb_config_reply(mid_t mod_id, const void *params, Protocol__F
/* if(si_config->n_si_message > 0){ */
/* si_config->si_message = si_message; */
/* } */
/* cell_conf[i]->si_config = si_config; */
cell_conf[i]->dl_bandwidth = flexran_get_N_RB_DL(enb_id,i);
cell_conf[i]->si_config = si_config;
cell_conf[i]->dl_bandwidth = flexran_get_N_RB_DL(mod_id,i);
cell_conf[i]->has_dl_bandwidth = 1;
cell_conf[i]->ul_bandwidth = flexran_get_N_RB_UL(enb_id,i);
cell_conf[i]->ul_bandwidth = flexran_get_N_RB_UL(mod_id,i);
cell_conf[i]->has_ul_bandwidth = 1;
if (flexran_get_ul_cyclic_prefix_length(enb_id, i) == 0) {
if (flexran_get_ul_cyclic_prefix_length(mod_id, i) == 0) {
cell_conf[i]->ul_cyclic_prefix_length = PROTOCOL__FLEX_UL_CYCLIC_PREFIX_LENGTH__FLUCPL_NORMAL;
} else if(flexran_get_ul_cyclic_prefix_length(enb_id, i) == 1) {
cell_conf[i]->ul_cyclic_prefix_length = PROTOCOL__FLEX_UL_CYCLIC_PREFIX_LENGTH__FLUCPL_EXTENDED;
} else if(flexran_get_ul_cyclic_prefix_length(mod_id, i) == 1) {
cell_conf[i]->ul_cyclic_prefix_length = PROTOCOL__FLEX_UL_CYCLIC_PREFIX_LENGTH__FLUCPL_EXTENDED;
}
cell_conf[i]->has_ul_cyclic_prefix_length = 1;
if (flexran_get_ul_cyclic_prefix_length(enb_id,i) == 0) {
if (flexran_get_ul_cyclic_prefix_length(mod_id,i) == 0) {
cell_conf[i]->ul_cyclic_prefix_length = PROTOCOL__FLEX_DL_CYCLIC_PREFIX_LENGTH__FLDCPL_NORMAL;
} else if (flexran_get_ul_cyclic_prefix_length(enb_id,i) == 1) {
} else if (flexran_get_ul_cyclic_prefix_length(mod_id,i) == 1) {
cell_conf[i]->ul_cyclic_prefix_length = PROTOCOL__FLEX_DL_CYCLIC_PREFIX_LENGTH__FLDCPL_EXTENDED;
}
cell_conf[i]->has_dl_cyclic_prefix_length = 1;
//TODO: Fill in with actual value, number of cell specific antenna ports. Currently single port support
cell_conf[i]->antenna_ports_count = 1;
cell_conf[i]->antenna_ports_count = flexran_get_antenna_ports(mod_id, i);
cell_conf[i]->has_antenna_ports_count = 1;
if (flexran_get_duplex_mode(enb_id,i) == 1) {
if (flexran_get_duplex_mode(mod_id,i) == 1) {
cell_conf[i]->duplex_mode = PROTOCOL__FLEX_DUPLEX_MODE__FLDM_FDD;
} else if(flexran_get_duplex_mode(enb_id,i) == 0) {
} else if(flexran_get_duplex_mode(mod_id,i) == 0) {
cell_conf[i]->duplex_mode = PROTOCOL__FLEX_DUPLEX_MODE__FLDM_TDD;
}
cell_conf[i]->has_duplex_mode = 1;
//TODO: Fill in with actual value, DL/UL subframe assignment. TDD only
cell_conf[i]->subframe_assignment = flexran_get_subframe_assignment(enb_id, i);
cell_conf[i]->has_subframe_assignment = 0;
//TODO: Fill in with actual value, TDD only. See TS 36.211, table 4.2.1
cell_conf[i]->special_subframe_patterns = flexran_get_special_subframe_assignment(enb_id,i);
cell_conf[i]->has_special_subframe_patterns = 0;
cell_conf[i]->subframe_assignment = flexran_get_subframe_assignment(mod_id, i);
cell_conf[i]->has_subframe_assignment = 1;
cell_conf[i]->special_subframe_patterns = flexran_get_special_subframe_assignment(mod_id,i);
cell_conf[i]->has_special_subframe_patterns = 1;
//TODO: Fill in with actual value, The MBSFN radio frame period
cell_conf[i]->n_mbsfn_subframe_config_rfperiod = 0;
uint32_t *elem_rfperiod;
@@ -954,7 +950,7 @@ int flexran_agent_enb_config_reply(mid_t mod_id, const void *params, Protocol__F
elem_rfperiod[j] = 1;
}
cell_conf[i]->mbsfn_subframe_config_rfperiod = elem_rfperiod;
//TODO: Fill in with actual value, The MBSFN radio frame offset
cell_conf[i]->n_mbsfn_subframe_config_rfoffset = 0;
uint32_t *elem_rfoffset;
@@ -965,7 +961,7 @@ int flexran_agent_enb_config_reply(mid_t mod_id, const void *params, Protocol__F
elem_rfoffset[j] = 1;
}
cell_conf[i]->mbsfn_subframe_config_rfoffset = elem_rfoffset;
//TODO: Fill in with actual value, Bitmap indicating the MBSFN subframes
cell_conf[i]->n_mbsfn_subframe_config_sfalloc = 0;
uint32_t *elem_sfalloc;
@@ -976,63 +972,62 @@ int flexran_agent_enb_config_reply(mid_t mod_id, const void *params, Protocol__F
elem_sfalloc[j] = 1;
}
cell_conf[i]->mbsfn_subframe_config_sfalloc = elem_sfalloc;
cell_conf[i]->prach_config_index = flexran_get_prach_ConfigIndex(enb_id,i);
cell_conf[i]->prach_config_index = flexran_get_prach_ConfigIndex(mod_id,i);
cell_conf[i]->has_prach_config_index = 1;
cell_conf[i]->prach_freq_offset = flexran_get_prach_FreqOffset(enb_id,i);
cell_conf[i]->prach_freq_offset = flexran_get_prach_FreqOffset(mod_id,i);
cell_conf[i]->has_prach_freq_offset = 1;
cell_conf[i]->ra_response_window_size = flexran_get_ra_ResponseWindowSize(enb_id,i);
cell_conf[i]->ra_response_window_size = flexran_get_ra_ResponseWindowSize(mod_id,i);
cell_conf[i]->has_ra_response_window_size = 1;
cell_conf[i]->mac_contention_resolution_timer = flexran_get_mac_ContentionResolutionTimer(enb_id,i);
cell_conf[i]->mac_contention_resolution_timer = flexran_get_mac_ContentionResolutionTimer(mod_id,i);
cell_conf[i]->has_mac_contention_resolution_timer = 1;
cell_conf[i]->max_harq_msg3tx = flexran_get_maxHARQ_Msg3Tx(enb_id,i);
cell_conf[i]->max_harq_msg3tx = flexran_get_maxHARQ_Msg3Tx(mod_id,i);
cell_conf[i]->has_max_harq_msg3tx = 1;
cell_conf[i]->n1pucch_an = flexran_get_n1pucch_an(enb_id,i);
cell_conf[i]->n1pucch_an = flexran_get_n1pucch_an(mod_id,i);
cell_conf[i]->has_n1pucch_an = 1;
cell_conf[i]->deltapucch_shift = flexran_get_deltaPUCCH_Shift(enb_id,i);
cell_conf[i]->deltapucch_shift = flexran_get_deltaPUCCH_Shift(mod_id,i);
cell_conf[i]->has_deltapucch_shift = 1;
cell_conf[i]->nrb_cqi = flexran_get_nRB_CQI(enb_id,i);
cell_conf[i]->nrb_cqi = flexran_get_nRB_CQI(mod_id,i);
cell_conf[i]->has_nrb_cqi = 1;
cell_conf[i]->srs_subframe_config = flexran_get_srs_SubframeConfig(enb_id,i);
cell_conf[i]->srs_subframe_config = flexran_get_srs_SubframeConfig(mod_id,i);
cell_conf[i]->has_srs_subframe_config = 1;
cell_conf[i]->srs_bw_config = flexran_get_srs_BandwidthConfig(enb_id,i);
cell_conf[i]->srs_bw_config = flexran_get_srs_BandwidthConfig(mod_id,i);
cell_conf[i]->has_srs_bw_config = 1;
cell_conf[i]->srs_mac_up_pts = flexran_get_srs_MaxUpPts(enb_id,i);
cell_conf[i]->srs_mac_up_pts = flexran_get_srs_MaxUpPts(mod_id,i);
cell_conf[i]->has_srs_mac_up_pts = 1;
cell_conf[i]->dl_freq = flexran_agent_get_operating_dl_freq (enb_id,i);
cell_conf[i]->dl_freq = flexran_agent_get_operating_dl_freq (mod_id,i);
cell_conf[i]->has_dl_freq = 1;
cell_conf[i]->ul_freq = flexran_agent_get_operating_ul_freq (enb_id, i);
cell_conf[i]->ul_freq = flexran_agent_get_operating_ul_freq (mod_id, i);
cell_conf[i]->has_ul_freq = 1;
cell_conf[i]->eutra_band = flexran_agent_get_operating_eutra_band (enb_id,i);
cell_conf[i]->eutra_band = flexran_agent_get_operating_eutra_band (mod_id,i);
cell_conf[i]->has_eutra_band = 1;
cell_conf[i]->dl_pdsch_power = flexran_agent_get_operating_pdsch_refpower(enb_id, i);
cell_conf[i]->dl_pdsch_power = flexran_agent_get_operating_pdsch_refpower(mod_id, i);
cell_conf[i]->has_dl_pdsch_power = 1;
cell_conf[i]->ul_pusch_power = flexran_agent_get_operating_pusch_p0 (enb_id,i);
cell_conf[i]->ul_pusch_power = flexran_agent_get_operating_pusch_p0 (mod_id,i);
cell_conf[i]->has_ul_pusch_power = 1;
if (flexran_get_enable64QAM(enb_id,i) == 0) {
if (flexran_get_enable64QAM(mod_id,i) == 0) {
cell_conf[i]->enable_64qam = PROTOCOL__FLEX_QAM__FLEQ_MOD_16QAM;
} else if(flexran_get_enable64QAM(enb_id,i) == 1) {
} else if(flexran_get_enable64QAM(mod_id,i) == 1) {
cell_conf[i]->enable_64qam = PROTOCOL__FLEX_QAM__FLEQ_MOD_64QAM;
}
cell_conf[i]->has_enable_64qam = 1;
cell_conf[i]->carrier_index = i;
cell_conf[i]->has_carrier_index = 1;
}
+10 -7
View File
@@ -138,12 +138,14 @@ typedef enum {
FLEXRAN_AGENT_TIMER_STATE_MAX,
} flexran_agent_timer_state_t;
#define FLEXRAN_CAP_LOL1 0x1
#define FLEXRAN_CAP_HIL1 0x2
#define FLEXRAN_CAP_LOL2 0x4 // is: MAC
#define FLEXRAN_CAP_HIL2 0x8 // is: RLC
#define FLEXRAN_CAP_PDCP 0x16
#define FLEXRAN_CAP_RRC 0x32
#define FLEXRAN_CAP_LOPHY 1
#define FLEXRAN_CAP_HIPHY 2
#define FLEXRAN_CAP_LOMAC 4
#define FLEXRAN_CAP_HIMAC 8
#define FLEXRAN_CAP_RLC 16
#define FLEXRAN_CAP_PDCP 32
#define FLEXRAN_CAP_SDAP 64
#define FLEXRAN_CAP_RRC 128
typedef enum {
ENB_NORMAL_OPERATION = 0x0,
@@ -159,7 +161,8 @@ typedef struct {
uint16_t remote_port;
char *cache_name;
int enb_id;
mid_t mod_id;
uint64_t agent_id;
uint8_t capability_mask;
/* lock for waiting before starting or soft-restart */
+2
View File
@@ -1071,6 +1071,8 @@ typedef struct eNB_MAC_INST_s {
COMMON_channels_t common_channels[MAX_NUM_CCs];
/// current PDU index (BCH,MCH,DLSCH)
uint16_t pdu_index[MAX_NUM_CCs];
/// flag to enable phy-test (disables the scheduler)
uint16_t phy_test;
/// NFAPI Config Request Structure
nfapi_config_request_t config[MAX_NUM_CCs];
+33 -22
View File
@@ -64,6 +64,7 @@
#define DEBUG_eNB_SCHEDULER 1
extern RAN_CONTEXT_t RC;
extern int phy_test;
uint16_t pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
@@ -108,8 +109,7 @@ schedule_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
if ((1 << tmp) & deltaTSFC) {
// This is an SRS subframe, loop over UEs
for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
if (RC.mac[module_idP]->UE_list.active[UE_id] != TRUE)
continue;
if (RC.mac[module_idP]->UE_list.active[UE_id] != TRUE) continue;
ul_req = &RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body;
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) continue;
@@ -124,6 +124,7 @@ schedule_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
soundingRS_UL_ConfigDedicated->choice.
setup.srs_ConfigIndex,
&srsPeriodicity, &srsOffset);
if (((10 * frameP + subframeP) % srsPeriodicity) == srsOffset) {
// Program SRS
ul_req->srs_present = 1;
@@ -262,7 +263,7 @@ schedule_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
ul_req_body = &ul_req->ul_config_request_body;
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP, UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) continue;
//if (mac_eNB_get_rrc_status(module_idP, UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) continue;
AssertFatal(UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated!= NULL,
@@ -425,12 +426,15 @@ check_ul_failure(module_id_t module_idP, int CC_id, int UE_id,
}
} // ul_failure_timer>0
#if 0
/* U-plane inactivity timer is disabled. Uncomment to re-enable. */
UE_list->UE_sched_ctrl[UE_id].uplane_inactivity_timer++;
if(UE_list->UE_sched_ctrl[UE_id].uplane_inactivity_timer > (U_PLANE_INACTIVITY_VALUE*subframe_num(&RC.eNB[module_idP][CC_id]->frame_parms))){
LOG_D(MAC,"UE %d rnti %x: U-Plane Failure after repeated PDCCH orders: Triggering RRC \n",UE_id,rnti);
mac_eNB_rrc_uplane_failure(module_idP,CC_id,frameP,subframeP,rnti);
UE_list->UE_sched_ctrl[UE_id].uplane_inactivity_timer = 0;
}// time > 60s
#endif
}
void
@@ -541,7 +545,7 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
rnti = UE_RNTI(module_idP, i);
CC_id = UE_PCCID(module_idP, i);
if ((frameP == 0) && (subframeP == 0)) {
if (((frameP&127) == 0) && (subframeP == 0)) {
LOG_I(MAC,
"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
rnti,
@@ -640,26 +644,33 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
#endif
// This schedules MIB
if ((subframeP == 0) && (frameP & 3) == 0)
schedule_mib(module_idP, frameP, subframeP);
// This schedules SI for legacy LTE and eMTC starting in subframeP
schedule_SI(module_idP, frameP, subframeP);
// This schedules Paging in subframeP
schedule_PCH(module_idP,frameP,subframeP);
// This schedules Random-Access for legacy LTE and eMTC starting in subframeP
schedule_RA(module_idP, frameP, subframeP);
// copy previously scheduled UL resources (ULSCH + HARQ)
copy_ulreq(module_idP, frameP, subframeP);
// This schedules SRS in subframeP
schedule_SRS(module_idP, frameP, subframeP);
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP, frameP, subframeP);
// This schedules UCI_SR in subframeP
schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP);
// This schedules DLSCH in subframeP
schedule_dlsch(module_idP, frameP, subframeP, mbsfn_status);
if (phy_test == 0){
// This schedules SI for legacy LTE and eMTC starting in subframeP
schedule_SI(module_idP, frameP, subframeP);
// This schedules Paging in subframeP
schedule_PCH(module_idP,frameP,subframeP);
// This schedules Random-Access for legacy LTE and eMTC starting in subframeP
schedule_RA(module_idP, frameP, subframeP);
// copy previously scheduled UL resources (ULSCH + HARQ)
copy_ulreq(module_idP, frameP, subframeP);
// This schedules SRS in subframeP
schedule_SRS(module_idP, frameP, subframeP);
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP, frameP, subframeP);
// This schedules UCI_SR in subframeP
schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP);
// This schedules DLSCH in subframeP
schedule_dlsch(module_idP, frameP, subframeP, mbsfn_status);
}
else{
schedule_ulsch_phy_test(module_idP,frameP,subframeP);
schedule_ue_spec_phy_test(module_idP,frameP,subframeP,mbsfn_status);
}
if (RC.flexran[module_idP]->enabled)
flexran_agent_send_update_stats(module_idP);
+20 -10
View File
@@ -1053,11 +1053,17 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
"Frame %d, Subframe %d: Preparing for Msg4 retransmission currently %d.%d\n",
frameP, subframeP, ra->Msg4_frame,
ra->Msg4_subframe);
if (ra->Msg4_subframe > 1)
if (cc[CC_idP].tdd_Config == NULL) {
if (ra->Msg4_subframe > 1)
ra->Msg4_frame++;
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
LOG_D(MAC,
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
}
else {
ra->Msg4_frame++;
ra->Msg4_frame &= 1023;
}
LOG_I(MAC,
"Frame %d, Subframe %d: Msg4 retransmission in %d.%d\n",
frameP, subframeP, ra->Msg4_frame,
ra->Msg4_subframe);
@@ -1132,7 +1138,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
dl_req->sfn_sf = mac->TX_req[CC_idP].sfn_sf;
LOG_D(MAC, "Filling UCI ACK/NAK information, cce_idx %d\n",
LOG_I(MAC, "Filling UCI ACK/NAK information, cce_idx %d\n",
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
// Program PUCCH1a for ACK/NAK
// Program ACK/NAK for Msg4 PDSCH
@@ -1321,20 +1327,24 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP,
dci_dl_pdu_rel8.cce_idx);
// prepare frame for retransmission
if (ra->Msg4_subframe > 1)
if (cc->tdd_Config==NULL) {
if (ra->Msg4_subframe > 1)
ra->Msg4_frame++;
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
}
else ra->Msg4_frame++;
LOG_W(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission round %d in %d.%d)\n",
module_idP, CC_idP, frameP, subframeP, ra->rnti,
round, ra->Msg4_frame, ra->Msg4_subframe);
AssertFatal(1==0,"Shouldn't happen exit\n");
} // Msg4 frame/subframe
} // regular LTE case
} else {
LOG_D(MAC,
LOG_I(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d : Msg4 acknowledged\n",
module_idP, CC_idP, frameP, subframeP);
ra->state = IDLE;
+1
View File
@@ -787,6 +787,7 @@ schedule_SI(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
eNB->eNB_stats[CC_id].bcch_buffer = bcch_sdu_length;
eNB->eNB_stats[CC_id].total_bcch_buffer += bcch_sdu_length;
eNB->eNB_stats[CC_id].bcch_mcs = mcs;
//printf("SI %d.%d\n", frameP, subframeP);/////////////////////////////////////////******************************
} else {
//LOG_D(MAC,"[eNB %d] Frame %d : BCCH not active \n",Mod_id,frame);
+353
View File
@@ -0,0 +1,353 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.0 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file eNB_scheduler_dlsch.c
* \brief procedures related to eNB for the DLSCH transport channel
* \author Navid Nikaein and Raymond Knopp
* \date 2010 - 2014
* \email: navid.nikaein@eurecom.fr
* \version 1.0
* @ingroup _mac
*/
#include "assertions.h"
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "LAYER2/MAC/defs.h"
#include "LAYER2/MAC/proto.h"
#include "LAYER2/MAC/extern.h"
#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "OCG.h"
#include "OCG_extern.h"
#include "SIMULATION/TOOLS/defs.h" // for taus
#include "T.h"
extern RAN_CONTEXT_t RC;
//------------------------------------------------------------------------------
void
schedule_ue_spec_phy_test(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int* mbsfn_flag
)
//------------------------------------------------------------------------------
{
uint8_t CC_id;
int UE_id=0;
uint16_t N_RB_DL;
uint16_t TBS;
uint16_t nb_rb;
unsigned char harq_pid = subframeP%5;
uint16_t rnti = 0x1235;
uint32_t rb_alloc = 0x1FFFFFFF;
int32_t tpc = 1;
int32_t mcs = 28;
int32_t cqi = 15;
int32_t ndi = subframeP/5;
int32_t dai = 0;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = eNB->common_channels;
nfapi_dl_config_request_body_t *dl_req;
nfapi_dl_config_request_pdu_t *dl_config_pdu;
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
LOG_D(MAC, "doing schedule_ue_spec for CC_id %d\n",CC_id);
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
if (mbsfn_flag[CC_id]>0)
continue;
nb_rb = conv_nprb(0,rb_alloc,N_RB_DL);
//printf("////////////////////////////////////*************************nb_rb = %d\n",nb_rb);
TBS = get_TBS_DL(mcs,nb_rb);
LOG_D(PHY,"schedule_ue_spec_phy_test: subframe %d/%d: nb_rb=%d, TBS=%d, mcs=%d (rb_alloc=%x, N_RB_DL=%d)\n",frameP,subframeP,nb_rb,TBS,mcs,rb_alloc,N_RB_DL);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu));
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),cqi,format1);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_allocation_type = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.virtual_resource_block_assignment_flag = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = rb_alloc;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 1; // CRNTI : see Table 4-10 from SCF082 - nFAPI specifications
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.harq_process = harq_pid;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.tpc = tpc; // dont adjust power when retransmitting
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.new_data_indicator_1 = ndi;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_1 = mcs;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0;
//deactivate second codeword
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.mcs_2 = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_2 = 1;
if (cc[CC_id].tdd_Config != NULL) { //TDD
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.downlink_assignment_index = dai;
LOG_D(MAC,"[eNB %d] Initial transmission CC_id %d : harq_pid %d, dai %d, mcs %d\n",
module_idP,CC_id,harq_pid,dai,mcs);
} else {
LOG_D(MAC,"[eNB %d] Initial transmission CC_id %d : harq_pid %d, mcs %d\n",
module_idP,CC_id,harq_pid,mcs);
}
LOG_D(MAC,"Checking feasibility pdu %d (new sdu)\n",dl_req->number_pdu);
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,rnti)) {
//ue_sched_ctl->round[CC_id][harq_pid] = 0;
dl_req->number_dci++;
dl_req->number_pdu++;
// Toggle NDI for next time
/*
LOG_D(MAC,"CC_id %d Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",
CC_id, frameP,subframeP,UE_id,
rnti,harq_pid,UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]);
UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]=1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid] = mcs;
UE_list->UE_template[CC_id][UE_id].oldmcs2[harq_pid] = 0;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated!=NULL,"physicalConfigDedicated is NULL\n");
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->pdsch_ConfigDedicated!=NULL,"physicalConfigDedicated->pdsch_ConfigDedicated is NULL\n");
*/
fill_nfapi_dlsch_config(eNB,
dl_req,
TBS,
eNB->pdu_index[CC_id],
rnti,
0, // type 0 allocation from 7.1.6 in 36.213
0, // virtual_resource_block_assignment_flag
rb_alloc, // resource_block_coding
getQm(mcs),
0, // redundancy version
1, // transport blocks
0, // transport block to codeword swap flag
cc[CC_id].p_eNB == 1 ? 0 : 1, // transmission_scheme
1, // number of layers
1, // number of subbands
// uint8_t codebook_index,
4, // UE category capacity
PDSCH_ConfigDedicated__p_a_dB0,
0, // delta_power_offset for TM5
0, // ngap
0, // nprb
cc[CC_id].p_eNB == 1 ? 1 : 2, // transmission mode
0, //number of PRBs treated as one subband, not used here
0 // number of beamforming vectors, not used here
);
eNB->TX_req[CC_id].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_id].tx_request_body,
(frameP*10)+subframeP,
TBS,
eNB->pdu_index[CC_id],
eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0]);
}
else {
LOG_W(MAC,"[eNB_scheduler_phytest] DCI allocation infeasible!\n");
}
}
}
void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
{
uint16_t first_rb[MAX_NUM_CCs];
int UE_id = 0;
uint8_t aggregation = 2;
rnti_t rnti = 0x1235;
uint8_t mcs = 0;
uint8_t harq_pid = 0;
uint32_t cqi_req = 0,cshift,ndi,tpc = 1;
int32_t normalized_rx_power;
int32_t target_rx_power= 178;
int CC_id = 0;
int nb_rb = 96;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = eNB->common_channels;
UE_list_t *UE_list=&eNB->UE_list;
UE_TEMPLATE *UE_template;
UE_sched_ctrl *UE_sched_ctrl;
int sched_frame=frameP;
int sched_subframe = (subframeP+4)%10;
if (sched_subframe<subframeP) sched_frame++;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
//nfapi_ul_config_request_pdu_t *ul_config_pdu = &ul_req->ul_config_pdu_list[0];;
nfapi_ul_config_request_body_t *ul_req = &eNB->UL_req[CC_id].ul_config_request_body;
eNB->UL_req[CC_id].sfn_sf = (sched_frame<<4) + sched_subframe;
eNB->HI_DCI0_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
//rnti = UE_RNTI(module_idP,UE_id);
//leave out first RB for PUCCH
first_rb[CC_id] = 1;
// loop over all active UEs
// if (eNB_UE_stats->mode == PUSCH) { // ue has a ulsch channel
UE_template = &UE_list->UE_template[CC_id][UE_id];
UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = subframe2harqpid(&cc[CC_id],sched_frame,sched_subframe);
LOG_D(MAC,"Scheduling for frame %d, subframe %d => harq_pid %d\n",sched_frame,sched_subframe,harq_pid);
RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = UE_template->TBS_UL[harq_pid];
//power control
//compute the expected ULSCH RX power (for the stats)
// this is the normalized RX power and this should be constant (regardless of mcs
normalized_rx_power = UE_sched_ctrl->pusch_snr[CC_id];
// new transmission
ndi = 1-UE_template->oldNDI_UL[harq_pid];
UE_template->oldNDI_UL[harq_pid]=ndi;
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1 = mcs;
UE_template->mcs_UL[harq_pid] = mcs;//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2 = mcs;
// buffer_occupancy = UE_template->ul_total_buffer;
UE_template->TBS_UL[harq_pid] = get_TBS_UL(mcs,nb_rb);
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx += nb_rb;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS = get_TBS_UL(mcs,nb_rb);
// buffer_occupancy -= TBS;
// bad indices : 20 (40 PRB), 21 (45 PRB), 22 (48 PRB)
//store for possible retransmission
UE_template->nb_rb_ul[harq_pid] = nb_rb;
UE_template->first_rb_ul[harq_pid] = first_rb[CC_id];
UE_sched_ctrl->ul_scheduled |= (1<<harq_pid);
// adjust total UL buffer status by TBS, wait for UL sdus to do final update
//UE_template->ul_total_buffer = UE_template->TBS_UL[harq_pid];
// Cyclic shift for DM RS
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
// save it for a potential retransmission
UE_template->cshift[harq_pid] = cshift;
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_dci_pdu);
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dci_format = NFAPI_UL_DCI_FORMAT_0;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.aggregation_level = aggregation;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = first_rb[CC_id];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block = nb_rb;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.mcs_1 = mcs;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cyclic_shift_2_for_drms = cshift;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.frequency_hopping_enabled_flag = 0;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.new_data_indication_1 = ndi;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.tpc = tpc;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframe];
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
// Add UL_config PDUs
fill_nfapi_ulsch_config_request_rel8(&ul_req->ul_config_pdu_list[ul_req->number_of_pdus],
cqi_req,
cc,
0,//UE_template->physicalConfigDedicated,
get_tmode(module_idP,CC_id,UE_id),
eNB->ul_handle,
rnti,
first_rb[CC_id], // resource_block_start
nb_rb, // number_of_resource_blocks
mcs,
cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
0, // frequency_hopping_bits
ndi, // new_data_indication
0, // redundancy_version
harq_pid, // harq_process_number
0, // ul_tx_mode
0, // current_tx_nb
0, // n_srs
get_TBS_UL(mcs,nb_rb)
);
#ifdef Rel14
if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
fill_nfapi_ulsch_config_request_emtc(&ul_req->ul_config_pdu_list[ul_req->number_of_pdus],
UE_template->rach_resource_type>2 ? 2 : 1,
1, //total_number_of_repetitions
1, //repetition_number
(frameP*10)+subframeP);
}
#endif
ul_req->number_of_pdus = 1;
eNB->ul_handle++;
add_ue_ulsch_info(module_idP,
CC_id,
UE_id,
subframeP,
S_UL_SCHEDULED);
// increment first rb for next UE allocation
first_rb[CC_id]+= nb_rb;
} // loop of CC_id
}
+191 -22
View File
@@ -627,7 +627,7 @@ uint16_t get_pucch1_absSF(COMMON_channels_t * cc, uint16_t dlsch_absSF)
case 3:
if ((sf == 5) || (sf == 6) || (sf == 7) || (sf == 8)
|| (sf == 9))
return ((10 * nextf) + (sf >> 1)); // ACK/NAK in 2,3,4 resp. next frame
return ((10 * nextf) + ((sf-1) >> 1)); // ACK/NAK in 2,3,4 resp. next frame
else if (sf == 1)
return ((10 * nextf) + 2); // ACK/NAK in 2 next frame
else if (sf == 0)
@@ -1380,7 +1380,7 @@ fill_nfapi_uci_acknak(module_id_t module_idP,
rntiP,
absSFP,
&ul_config_pdu->uci_harq_pdu.harq_information, cce_idxP);
LOG_D(MAC,
LOG_I(MAC,
"Filled in UCI HARQ request for rnti %x SF %d.%d acknakSF %d.%d, cce_idxP %d-> n1_pucch %d\n",
rntiP, absSFP / 10, absSFP % 10, ackNAK_absSF / 10,
ackNAK_absSF % 10, cce_idxP,
@@ -3255,14 +3255,89 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
AssertFatal(numCC == 1,
"numCC %d > 1, should not be using Format1a/b\n",
numCC);
uint8_t harq_pid = ((10 * frameP) + subframeP + 10236) & 7;
LOG_I(MAC,"frame %d subframe %d harq_pid %d mode %d tmode[0] %d num_ack_nak %d round %d\n",frameP,subframeP,harq_pid,harq_indication_fdd->mode,tmode[0],num_ack_nak,sched_ctl->round[CC_idP][harq_pid]);
AssertFatal(numCC == 1,
"numCC %d > 1, should not be using Format1a/b\n",
numCC);
if (tmode[0] == 1 || tmode[0] == 2 || tmode[0] == 5 || tmode[0] == 6 || tmode[0] == 7) { // NOTE: have to handle the case of TM9-10 with 1 antenna port
// single ACK/NAK bit
AssertFatal(num_ack_nak == 1,
"num_ack_nak %d > 1 for 1 CC and single-layer transmission frame:%d subframe:%d\n",
num_ack_nak,frameP,subframeP);
AssertFatal(sched_ctl->round[CC_idP][harq_pid] < 8,
"Got ACK/NAK for inactive harq_pid %d for UE %d/%x\n",
harq_pid, UE_id, rnti);
AssertFatal(pdu[0] == 1 || pdu[0] == 2
|| pdu[0] == 4,
"Received ACK/NAK %d which is not 1 or 2 for harq_pid %d from UE %d/%x\n",
pdu[0], harq_pid, UE_id, rnti);
LOG_D(MAC, "Received %d for harq_pid %d\n", pdu[0],
harq_pid);
pdu = &harq_indication_tdd->harq_data[0].bundling.value_0;
if (pdu[0] == 1) { // ACK
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
} else if (pdu[0] == 2 || pdu[0] == 4) // NAK (treat DTX as NAK)
sched_ctl->round[CC_idP][harq_pid]++; // increment round
} else {
// one or two ACK/NAK bits
AssertFatal(num_ack_nak <= 2,
"num_ack_nak %d > 2 for 1 CC and TM3/4/8/9/10\n",
num_ack_nak);
if ((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[CC_idP][harq_pid] == 1)
&& (pdu[0] == 1) && (pdu[1] == 1)) {
sched_ctl->round[CC_idP][harq_pid] = 8;
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
}
if ((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[CC_idP][harq_pid] == 1)
&& (pdu[0] == 2) && (pdu[1] == 2))
sched_ctl->round[CC_idP][harq_pid]++;
else if (((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[0][harq_pid] == 2)
&& (pdu[0] == 1) && (pdu[1] == 2))
|| ((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[CC_idP][harq_pid] == 2)
&& (pdu[0] == 2) && (pdu[1] == 1))) {
sched_ctl->round[CC_idP][harq_pid]++;
sched_ctl->tbcnt[CC_idP][harq_pid] = 1;
} else if ((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[CC_idP][harq_pid] == 2)
&& (pdu[0] == 2) && (pdu[1] == 2))
sched_ctl->round[CC_idP][harq_pid]++;
else
AssertFatal(1 == 0,
"Illegal ACK/NAK/round combination (%d,%d,%d,%d,%d) for harq_pid %d, UE %d/%x\n",
num_ack_nak,
sched_ctl->round[CC_idP][harq_pid],
sched_ctl->round[CC_idP][harq_pid], pdu[0],
pdu[1], harq_pid, UE_id, rnti);
}
break;
case 1: // Channel Selection
AssertFatal(1==0,"Can't do channel selection yet in TDD\n");
break;
case 1: // Channel Selection
case 2: // Format 2
AssertFatal(1==0,"Can't do Format 2 yet in TDD\n");
break;
case 2: // Format 3
break;
case 3: // Format 4
case 3: // Format 3
AssertFatal(1==0,"Can't do Format 3 yet in TDD\n");
break;
case 4: // Format 5
AssertFatal(1==0,"Can't do Format 4 yet in TDD\n");
break;
}
} else {
@@ -3272,7 +3347,7 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
uint8_t harq_pid = ((10 * frameP) + subframeP + 10236) & 7;
LOG_D(MAC,"frame %d subframe %d harq_pid %d mode %d tmode[0] %d num_ack_nak %d round %d\n",frameP,subframeP,harq_pid,harq_indication_fdd->mode,tmode[0],num_ack_nak,sched_ctl->round[CC_idP][harq_pid]);
LOG_I(MAC,"frame %d subframe %d harq_pid %d mode %d tmode[0] %d num_ack_nak %d round %d\n",frameP,subframeP,harq_pid,harq_indication_fdd->mode,tmode[0],num_ack_nak,sched_ctl->round[CC_idP][harq_pid]);
switch (harq_indication_fdd->mode) {
case 0: // Format 1a/b (10.1.2.1)
@@ -3297,8 +3372,13 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
if (pdu[0] == 1) { // ACK
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
} else if (pdu[0] == 2 || pdu[0] == 4) // NAK (treat DTX as NAK)
} else if (pdu[0] == 2 || pdu[0] == 4) { // NAK (treat DTX as NAK)
sched_ctl->round[CC_idP][harq_pid]++; // increment round
if (sched_ctl->round[CC_idP][harq_pid] == 4) {
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
}
}
} else {
// one or two ACK/NAK bits
AssertFatal(num_ack_nak <= 2,
@@ -3314,8 +3394,13 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
if ((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[CC_idP][harq_pid] == 1)
&& (pdu[0] == 2) && (pdu[1] == 2))
&& (pdu[0] == 2) && (pdu[1] == 2)) {
sched_ctl->round[CC_idP][harq_pid]++;
if (sched_ctl->round[CC_idP][harq_pid] == 4) {
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
}
}
else if (((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[0][harq_pid] == 2)
@@ -3326,11 +3411,20 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
&& (pdu[0] == 2) && (pdu[1] == 1))) {
sched_ctl->round[CC_idP][harq_pid]++;
sched_ctl->tbcnt[CC_idP][harq_pid] = 1;
if (sched_ctl->round[CC_idP][harq_pid] == 4) {
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0; /* TODO: do we have to set it to 0? */
}
} else if ((num_ack_nak == 2)
&& (sched_ctl->round[CC_idP][harq_pid] < 8)
&& (sched_ctl->tbcnt[CC_idP][harq_pid] == 2)
&& (pdu[0] == 2) && (pdu[1] == 2))
&& (pdu[0] == 2) && (pdu[1] == 2)) {
sched_ctl->round[CC_idP][harq_pid]++;
if (sched_ctl->round[CC_idP][harq_pid] == 4) {
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
}
}
else
AssertFatal(1 == 0,
"Illegal ACK/NAK/round combination (%d,%d,%d,%d,%d) for harq_pid %d, UE %d/%x\n",
@@ -3356,12 +3450,18 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
pdu[1]);
if (pdu[0] == 1)
sched_ctl->round[pCCid][harq_pid] = 8;
else
else {
sched_ctl->round[pCCid][harq_pid]++;
if (sched_ctl->round[pCCid][harq_pid] == 4)
sched_ctl->round[pCCid][harq_pid] = 8;
}
if (pdu[1] == 1)
sched_ctl->round[1 - pCCid][harq_pid] = 8;
else
else {
sched_ctl->round[1 - pCCid][harq_pid]++;
if (sched_ctl->round[1 - pCCid][harq_pid] == 4)
sched_ctl->round[1 - pCCid][harq_pid] = 8;
}
} // A=2
else if ((num_ack_nak == 3)
&& (sched_ctl->round[pCCid][harq_pid] < 8)
@@ -3387,13 +3487,26 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
((pdu[0] == 1) && (pdu[1] == 2))) {
sched_ctl->round[pCCid][harq_pid]++;
sched_ctl->tbcnt[pCCid][harq_pid] = 1;
} else
if (sched_ctl->round[pCCid][harq_pid] == 4) {
sched_ctl->round[pCCid][harq_pid] = 8;
sched_ctl->tbcnt[pCCid][harq_pid] = 0; /* TODO: do we have to set it to 0? */
}
} else {
sched_ctl->round[pCCid][harq_pid]++;
if (sched_ctl->round[pCCid][harq_pid] == 4) {
sched_ctl->round[pCCid][harq_pid] = 8;
sched_ctl->tbcnt[pCCid][harq_pid] = 0;
}
}
if (pdu[2] == 1)
sched_ctl->round[1 - pCCid][harq_pid] = 8;
else
else {
sched_ctl->round[1 - pCCid][harq_pid]++;
if (sched_ctl->round[1 - pCCid][harq_pid] == 4) {
sched_ctl->round[1 - pCCid][harq_pid] = 8;
}
}
} // A=3 primary cell has 2 TBs
else if ((num_ack_nak == 3)
&& (sched_ctl->round[1 - pCCid][harq_pid] < 8)
@@ -3419,13 +3532,26 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
|| ((pdu[0] == 1) && (pdu[1] >= 2))) { // one ACK
sched_ctl->round[1 - pCCid][harq_pid]++;
sched_ctl->tbcnt[1 - pCCid][harq_pid] = 1;
} else // both NAK/DTX
if (sched_ctl->round[1 - pCCid][harq_pid] == 4) {
sched_ctl->round[1 - pCCid][harq_pid] = 8;
sched_ctl->tbcnt[1 - pCCid][harq_pid] = 0;
}
} else { // both NAK/DTX
sched_ctl->round[1 - pCCid][harq_pid]++;
if (sched_ctl->round[1 - pCCid][harq_pid] == 4) {
sched_ctl->round[1 - pCCid][harq_pid] = 8;
sched_ctl->tbcnt[1 - pCCid][harq_pid] = 0;
}
}
if (pdu[2] == 1)
sched_ctl->round[pCCid][harq_pid] = 8;
else
else {
sched_ctl->round[pCCid][harq_pid]++;
if (sched_ctl->round[pCCid][harq_pid] == 4) {
sched_ctl->round[pCCid][harq_pid] = 8;
}
}
} // A=3 secondary cell has 2 TBs
#if MAX_NUM_CCs>1
else if ((num_ack_nak == 4)
@@ -3454,8 +3580,17 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
|| ((pdu[0] == 1) && (pdu[1] >= 2))) { // one ACK
sched_ctl->round[0][harq_pid]++;
sched_ctl->tbcnt[0][harq_pid] = 1;
} else // both NAK/DTX
if (sched_ctl->round[0][harq_pid] == 4) {
sched_ctl->round[0][harq_pid] = 8;
sched_ctl->tbcnt[0][harq_pid] = 0;
}
} else { // both NAK/DTX
sched_ctl->round[0][harq_pid]++;
if (sched_ctl->round[0][harq_pid] == 4) {
sched_ctl->round[0][harq_pid] = 8;
sched_ctl->tbcnt[0][harq_pid] = 0;
}
}
if ((pdu[2] == 1) && (pdu[3] == 1)) { // both ACK
sched_ctl->round[1][harq_pid] = 8;
@@ -3464,8 +3599,17 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
|| ((pdu[2] == 1) && (pdu[3] >= 2))) { // one ACK
sched_ctl->round[1][harq_pid]++;
sched_ctl->tbcnt[1][harq_pid] = 1;
} else // both NAK/DTX
if (sched_ctl->round[1][harq_pid] == 4) {
sched_ctl->round[1][harq_pid] = 8;
sched_ctl->tbcnt[1][harq_pid] = 0;
}
} else { // both NAK/DTX
sched_ctl->round[1][harq_pid]++;
if (sched_ctl->round[1][harq_pid] == 4) {
sched_ctl->round[1][harq_pid] = 8;
sched_ctl->tbcnt[1][harq_pid] = 0;
}
}
} // A=4 both serving cells have 2 TBs
#endif
break;
@@ -3480,8 +3624,13 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
if (pdu[j] == 1) {
sched_ctl->round[i][harq_pid] = 8;
sched_ctl->tbcnt[i][harq_pid] = 0;
} else if (pdu[j] == 2)
} else if (pdu[j] == 2) {
sched_ctl->round[i][harq_pid]++;
if (sched_ctl->round[i][harq_pid] == 4) {
sched_ctl->round[i][harq_pid] = 8;
sched_ctl->tbcnt[i][harq_pid] = 0;
}
}
else
AssertFatal(1 == 0,
"Illegal harq_ack value for CC %d harq_pid %d (%d) UE %d/%x\n",
@@ -3496,13 +3645,25 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
&& (pdu[j] == 1) && (pdu[j + 1] == 2)) {
sched_ctl->round[i][harq_pid]++;
sched_ctl->tbcnt[i][harq_pid] = 1;
if (sched_ctl->round[i][harq_pid] == 4) {
sched_ctl->round[i][harq_pid] = 8;
sched_ctl->tbcnt[i][harq_pid] = 0;
}
} else if ((sched_ctl->tbcnt[i][harq_pid] == 2)
&& (pdu[j] == 2) && (pdu[j + 1] == 1)) {
sched_ctl->round[i][harq_pid]++;
sched_ctl->tbcnt[i][harq_pid] = 1;
if (sched_ctl->round[i][harq_pid] == 4) {
sched_ctl->round[i][harq_pid] = 8;
sched_ctl->tbcnt[i][harq_pid] = 0;
}
} else if ((sched_ctl->tbcnt[i][harq_pid] == 2)
&& (pdu[j] == 2) && (pdu[j + 1] == 2)) {
sched_ctl->round[i][harq_pid]++;
if (sched_ctl->round[i][harq_pid] == 4) {
sched_ctl->round[i][harq_pid] = 8;
sched_ctl->tbcnt[i][harq_pid] = 0;
}
} else
AssertFatal(1 == 0,
"Illegal combination for CC %d harq_pid %d (%d,%d,%d) UE %d/%x\n",
@@ -3516,6 +3677,10 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
sched_ctl->tbcnt[i][harq_pid] = 0;
} else if (pdu[j] == 2) {
sched_ctl->round[i][harq_pid]++;
if (sched_ctl->round[i][harq_pid] == 4) {
sched_ctl->round[i][harq_pid] = 8;
sched_ctl->tbcnt[i][harq_pid] = 0;
}
} else
AssertFatal(1 == 0,
"Illegal hack_nak value %d for CC %d harq_pid %d UE %d/%x\n",
@@ -4026,8 +4191,12 @@ static int nack_or_dtx_reported(
int i;
if (cc->tdd_Config) {
AssertFatal(0==1, "TDD to be done. FAPI structures (see nfapi_harq_indication_tdd_rel13_t) are not clean. To be cleaned as well?\n");
abort();
LOG_W(MAC,"FAPI structures (see nfapi_harq_indication_tdd_rel13_t) are not clean. To be cleaned as well?\n");
nfapi_harq_indication_tdd_rel13_t *hi = &harq_pdu->harq_indication_tdd_rel13;
for (i = 0; i < hi->number_of_ack_nack; hi++)
if (hi->harq_data[i].bundling.value_0 != 1)
return 1;
return 0;
} else {
nfapi_harq_indication_fdd_rel13_t *hi = &harq_pdu->harq_indication_fdd_rel13;
for (i = 0; i < hi->number_of_ack_nack; hi++)
@@ -4054,7 +4223,7 @@ harq_indication(module_id_t mod_idP, int CC_idP, frame_t frameP,
UE_sched_ctrl *sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
COMMON_channels_t *cc = &RC.mac[mod_idP]->common_channels[CC_idP];
// extract HARQ Information
LOG_D(MAC,
LOG_I(MAC,
"Frame %d, subframe %d: Received harq indication (%d) from UE %d/%x, ul_cqi %d\n",
frameP, subframeP, channel, UE_id, rnti, ul_cqi);
if (cc->tdd_Config)
+47 -8
View File
@@ -160,8 +160,8 @@ rx_sdu(const module_id_t enb_mod_idP,
if (UE_id != -1) {
LOG_D(MAC,
"[eNB %d][PUSCH %d] CC_id %d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
enb_mod_idP, harq_pid, CC_idP,
"[eNB %d][PUSCH %d] SFN.SF %d.%d : CC_id %d Received ULSCH sdu round %d from PHY (rnti %x, UE_id %d) ul_cqi %d\n",
enb_mod_idP, harq_pid, frameP,subframeP, CC_idP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],
current_rnti, UE_id, ul_cqi);
@@ -212,6 +212,30 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes = 0;
} else
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid]++;
first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid];
// Program NACK for PHICH
LOG_D(MAC,
"Programming PHICH NACK for rnti %x harq_pid %d (first_rb %d)\n",
current_rnti, harq_pid, first_rb);
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_idP];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
memset((void *) hi_dci0_pdu, 0, sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_hi_pdu);
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.tl.tag = NFAPI_HI_DCI0_REQUEST_HI_PDU_REL8_TAG;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = first_rb;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req_body->number_of_hi++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP,subframeP, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP,subframeP, 4);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
return;
}
@@ -225,8 +249,8 @@ rx_sdu(const module_id_t enb_mod_idP,
maxHARQ_Msg3Tx);
LOG_I(MAC,
"[eNB %d][PUSCH %d] CC_id %d [RAPROC Msg3] Received ULSCH sdu round %d from PHY (rnti %x, RA_id %d) ul_cqi %d\n",
enb_mod_idP, harq_pid, CC_idP, ra[RA_id].msg3_round,
"[eNB %d][PUSCH %d] SFN.SF %d.%d CC_id %d [RAPROC Msg3] : Received ULSCH sdu round %d from PHY (rnti %x, RA_id %d) ul_cqi %d\n",
enb_mod_idP, harq_pid, frameP,subframeP,CC_idP, ra[RA_id].msg3_round,
current_rnti, RA_id, ul_cqi);
first_rb = ra->msg3_first_rb;
@@ -247,10 +271,19 @@ rx_sdu(const module_id_t enb_mod_idP,
first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid];
ra[RA_id].msg3_round++;
// prepare handling of retransmission
ra[RA_id].Msg3_frame = (ra[RA_id].Msg3_frame + ((ra[RA_id].Msg3_subframe > 1) ? 1 : 0)) % 1024;
ra[RA_id].Msg3_subframe = (ra[RA_id].Msg3_subframe + 8) % 10;
add_msg3(enb_mod_idP, CC_idP, &ra[RA_id], frameP, subframeP);
if (RC.mac[enb_mod_idP]->common_channels[CC_idP].tdd_Config == NULL) {
ra[RA_id].Msg3_frame = (ra[RA_id].Msg3_frame + ((ra[RA_id].Msg3_subframe > 1) ? 1 : 0)) % 1024;
ra[RA_id].Msg3_subframe = (ra[RA_id].Msg3_subframe + 8) % 10;
}
else {
ra[RA_id].Msg3_frame++;
ra[RA_id].Msg3_frame&=1023;
}
// add_msg3(enb_mod_idP, CC_idP, &ra[RA_id], frameP, subframeP);
}
/* TODO: program NACK for PHICH? */
return;
}
} else {
@@ -561,9 +594,10 @@ rx_sdu(const module_id_t enb_mod_idP,
// Program Msg4 PDCCH+DLSCH/MPDCCH transmission 4 subframes from now, // Check if this is ok for BL/CE, or if the rule is different
// make sure this works for all TDD configurations!
ra->Msg4_frame = frameP + ((subframeP > 5) ? 1 : 0);
ra->Msg4_subframe = (subframeP + 4) % 10;
} // if process is active
} // loop on RA processes
@@ -1448,6 +1482,10 @@ schedule_ulsch_rnti(module_id_t module_idP,
T_INT(first_rb[CC_id]),
T_INT(rb_table[rb_table_index]), T_INT(round));
#if 0
/* This is done in rx_sdu, as it has to.
* Since the code is a bit different, let's keep this version here for review, in case of problem.
*/
// fill in NAK information
hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
@@ -1471,6 +1509,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
UE_template->first_rb_ul[harq_pid],
UE_template->nb_rb_ul[harq_pid],
UE_template->TBS_UL[harq_pid], round);
#endif
// Add UL_config PDUs
LOG_D(MAC,
"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
+1 -1
View File
@@ -734,7 +734,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
// control channel or retransmission
/* TODO: do we have to check for retransmission? */
if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round > 0) {
if (mac_eNB_get_rrc_status(Mod_id, rnti) < RRC_RECONFIGURED || round != 8) {
nb_rbs_required_remaining_1[CC_id][UE_id] =
nb_rbs_required[CC_id][UE_id];
} else {
+3
View File
@@ -150,6 +150,9 @@ void schedule_dlsch(module_id_t module_idP, frame_t frameP,
void schedule_ue_spec(module_id_t module_idP, slice_id_t slice_idP,
frame_t frameP,sub_frame_t subframe, int *mbsfn_flag);
void schedule_ue_spec_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP);
/** \brief Function for UE/PHY to compute PUSCH transmit power in power-control procedure.
@param Mod_id Module id of UE
+65
View File
@@ -72,7 +72,11 @@ extern struct nlmsghdr *nas_nlh_tx;
extern struct nlmsghdr *nas_nlh_rx;
extern struct iovec nas_iov_tx;
extern struct iovec nas_iov_rx;
#ifdef UE_NAS_USE_TUN
extern int nas_sock_fd[NUMBER_OF_UE_MAX];
#else
extern int nas_sock_fd;
#endif
extern struct msghdr nas_msg_tx;
extern struct msghdr nas_msg_rx;
@@ -239,7 +243,11 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t* const ctxt_pP)
nas_nlh_tx->nlmsg_len += pdcp_output_sdu_bytes_to_write;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_UE_PDCP_FLUSH_SIZE, pdcp_output_sdu_bytes_to_write);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_FLUSH_BUFFER, 1 );
#ifdef UE_NAS_USE_TUN
ret = write(nas_sock_fd[ctxt_pP->module_id], &(sdu_p->data[sizeof(pdcp_data_ind_header_t)]), pdcp_output_sdu_bytes_to_write);
#else
ret = sendmsg(nas_sock_fd,&nas_msg_tx,0);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_FLUSH_BUFFER, 0 );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_UE_PDCP_FLUSH_ERR, ret );
@@ -372,6 +380,62 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t* const ctxt_pP)
//-----------------------------------------------------------------------------
int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
{
#ifdef UE_NAS_USE_TUN
protocol_ctxt_t ctxt = *ctxt_pP;
hash_key_t key = HASHTABLE_NOT_A_KEY_VALUE;
hashtable_rc_t h_rc;
pdcp_t* pdcp_p = NULL;
int len;
rb_id_t rab_id = DEFAULT_RAB_ID;
do {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_READ, 1 );
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_READ_BUFFER, 1 );
len = read(nas_sock_fd[ctxt_pP->module_id], &nl_rx_buf, NL_MAX_PAYLOAD);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_READ_BUFFER, 0 );
if (len<=0) continue;
LOG_D(PDCP, "PDCP_COLL_KEY_DEFAULT_DRB_VALUE(module_id=%d, rnti=%x, enb_flag=%d)\n",
ctxt.module_id, ctxt.rnti, ctxt.enb_flag);
key = PDCP_COLL_KEY_DEFAULT_DRB_VALUE(ctxt.module_id, ctxt.rnti, ctxt.enb_flag);
h_rc = hashtable_get(pdcp_coll_p, key, (void**)&pdcp_p);
if (h_rc == HASH_TABLE_OK) {
LOG_D(PDCP, "[FRAME %5u][UE][NETLINK][IP->PDCP] INST %d: Received socket with length %d on Rab %d \n",
ctxt.frame, ctxt.instance, len, rab_id);
LOG_D(PDCP, "[FRAME %5u][UE][IP][INSTANCE %u][RB %u][--- PDCP_DATA_REQ / %d Bytes --->][PDCP][MOD %u][UE %u][RB %u]\n",
ctxt.frame, ctxt.instance, rab_id, len, ctxt.module_id,
ctxt.rnti, rab_id);
MSC_LOG_RX_MESSAGE((ctxt_pP->enb_flag == ENB_FLAG_YES) ? MSC_PDCP_ENB:MSC_PDCP_UE,
(ctxt_pP->enb_flag == ENB_FLAG_YES) ? MSC_IP_ENB:MSC_IP_UE,
NULL, 0,
MSC_AS_TIME_FMT" DATA-REQ inst %u rb %u rab %u size %u",
MSC_AS_TIME_ARGS(ctxt_pP),
ctxt.instance, rab_id, rab_id, len);
pdcp_data_req(&ctxt, SRB_FLAG_NO, rab_id, RLC_MUI_UNDEFINED,
RLC_SDU_CONFIRM_NO, len, nl_rx_buf,
PDCP_TRANSMISSION_MODE_DATA);
} else {
MSC_LOG_RX_DISCARDED_MESSAGE(
(ctxt_pP->enb_flag == ENB_FLAG_YES) ? MSC_PDCP_ENB:MSC_PDCP_UE,
(ctxt_pP->enb_flag == ENB_FLAG_YES) ? MSC_IP_ENB:MSC_IP_UE,
NULL,
0,
MSC_AS_TIME_FMT" DATA-REQ inst %u rb %u rab %u size %u",
MSC_AS_TIME_ARGS(ctxt_pP),
ctxt.instance, rab_id, rab_id, len);
LOG_D(PDCP,
"[FRAME %5u][UE][IP][INSTANCE %u][RB %u][--- PDCP_DATA_REQ / %d Bytes ---X][PDCP][MOD %u][UE %u][RB %u] NON INSTANCIATED INSTANCE key 0x%"PRIx64", DROPPED\n",
ctxt.frame, ctxt.instance, rab_id, len, ctxt.module_id,
ctxt.rnti, rab_id, key);
}
} while (len > 0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PDCP_FIFO_READ, 0 );
return len;
#else /* UE_NAS_USE_TUN */
#ifdef PDCP_USE_NETLINK
protocol_ctxt_t ctxt_cpy = *ctxt_pP;
protocol_ctxt_t ctxt;
@@ -764,6 +828,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
#else // neither PDCP_USE_NETLINK nor PDCP_USE_RT_FIFO
return 0;
#endif // PDCP_USE_NETLINK
#endif /* #else UE_NAS_USE_TUN */
}
+3
View File
@@ -35,6 +35,9 @@
#include <stdlib.h>
#include <string.h>
#include "COMMON/s1ap_messages_types.h"
#include "COMMON/rrc_messages_types.h"
#include "collection/tree.h"
#include "rrc_types_NB_IoT.h"
#include "COMMON/platform_constants.h"
+3
View File
@@ -199,6 +199,9 @@ const char* eurecomVariablesNames[] = {
"ue0_trx_write_ns",
"ue0_trx_read_ns_missing",
"ue0_trx_write_ns_missing",
"enb_thread_rxtx_CPUID",
"ru_thread_CPUID",
"ru_thread_tx_CPUID"
};
const char* eurecomFunctionsNames[] = {
+3
View File
@@ -175,6 +175,9 @@ typedef enum {
VCD_SIGNAL_DUMPER_VARIABLES_UE0_TRX_WRITE_NS,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_TRX_READ_NS_MISSING,
VCD_SIGNAL_DUMPER_VARIABLES_UE0_TRX_WRITE_NS_MISSING,
VCD_SIGNAL_DUMPER_VARIABLES_CPUID_ENB_THREAD_RXTX,
VCD_SIGNAL_DUMPER_VARIABLES_CPUID_RU_THREAD,
VCD_SIGNAL_DUMPER_VARIABLES_CPUID_RU_THREAD_TX,
VCD_SIGNAL_DUMPER_VARIABLES_END
} vcd_signal_dump_variables;
+7
View File
@@ -290,6 +290,7 @@ NwGtpv1uRcT gtpv1u_eNB_process_stack_req(
hashtable_rc_t hash_rc = HASH_TABLE_KEY_NOT_EXISTS;
gtpv1u_teid_data_t *gtpv1u_teid_data_p = NULL;
protocol_ctxt_t ctxt;
NwGtpv1uRcT rc;
switch(pUlpApi->apiType) {
/* Here there are two type of messages handled:
@@ -314,6 +315,12 @@ NwGtpv1uRcT gtpv1u_eNB_process_stack_req(
gtpv1u_eNB_write_dump_socket(buffer,buffer_len);
#endif
rc = nwGtpv1uMsgDelete(RC.gtpv1u_data_g->gtpv1u_stack,
pUlpApi->apiInfo.recvMsgInfo.hMsg);
if (rc != NW_GTPV1U_OK) {
LOG_E(GTPU, "nwGtpv1uMsgDelete failed: 0x%x\n", rc);
}
//-----------------------
// GTPV1U->PDCP mapping
//-----------------------
+1 -1
View File
@@ -120,7 +120,7 @@ int openair0_device_load(openair0_device *device, openair0_config_t *openair0_cf
rc=load_lib(device, openair0_cfg, NULL,RAU_LOCAL_RADIO_HEAD );
if ( rc >= 0) {
if ( set_device(device) < 0) {
if ( set_device(device) < 0) {
fprintf(stderr, "%s %d:Unsupported radio head\n",__FILE__, __LINE__);
return -1;
}
+24 -5
View File
@@ -1185,15 +1185,20 @@ extern "C" {
// workaround for an api problem, master clock has to be set with the constructor not via set_master_clock_rate
args += boost::str(boost::format(",master_clock_rate=%f") % usrp_master_clock);
// args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=4096, recv_frame_size=4096";
// args += ",num_send_frames=256,num_recv_frames=256, send_frame_size=4096, recv_frame_size=4096";
uhd::device_addrs_t device_adds = uhd::device::find(args);
if(device_adds.size() == 0) {
std::cerr<<"No USRP Device Found. " << std::endl;
free(s);
return -1;
args += ",addr=192.168.30.2";
uhd::device_addrs_t device_adds = uhd::device::find(args);
if(device_adds.size() == 0) {
std::cerr<<"No USRP Device Found. " << std::endl;
free(s);
return -1;
}
}
LOG_I(PHY,"Found USRP X300\n");
s->usrp = uhd::usrp::multi_usrp::make(args);
@@ -1228,6 +1233,20 @@ extern "C" {
LOG_I(PHY,"%s() sample_rate:%u\n", __FUNCTION__, (int)openair0_cfg[0].sample_rate);
switch ((int)openair0_cfg[0].sample_rate) {
case 122880000:
// from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15; //to be checked
openair0_cfg[0].tx_bw = 80e6;
openair0_cfg[0].rx_bw = 80e6;
break;
case 61440000:
// from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15;
openair0_cfg[0].tx_bw = 40e6;
openair0_cfg[0].rx_bw = 40e6;
break;
case 30720000:
// from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048;
+7 -4
View File
@@ -40,6 +40,8 @@
# endif
# include "enb_app.h"
extern int emulate_rf;
int create_tasks(uint32_t enb_nb)
{
LOG_D(ENB_APP, "%s(enb_nb:%d\n", __FUNCTION__, enb_nb);
@@ -69,10 +71,11 @@ int create_tasks(uint32_t enb_nb)
LOG_E(S1AP, "Create task for S1AP failed\n");
return -1;
}
if (itti_create_task (TASK_UDP, udp_eNB_task, NULL) < 0) {
LOG_E(UDP_, "Create task for UDP failed\n");
return -1;
if(!emulate_rf){
if (itti_create_task (TASK_UDP, udp_eNB_task, NULL) < 0) {
LOG_E(UDP_, "Create task for UDP failed\n");
return -1;
}
}
if (itti_create_task (TASK_GTPV1_U, &gtpv1u_eNB_task, NULL) < 0) {
@@ -0,0 +1,209 @@
Active_eNBs = ( "eNB_Eurecom_LTEBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
eNBs =
(
{
////////// Identification parameters:
eNB_ID = 0xe00;
cell_type = "CELL_MACRO_ENB";
eNB_name = "eNB_Eurecom_LTEBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = "1";
mobile_country_code = "208";
mobile_network_code = "93";
tr_s_preference = "local_mac"
////////// Physical parameters:
component_carriers = (
{
node_function = "eNodeB_3GPP";
node_timing = "synch_to_ext_device";
node_synch_ref = 0;
frame_type = "FDD";
tdd_config = 3;
tdd_config_s = 0;
prefix_type = "NORMAL";
eutra_band = 7;
downlink_frequency = 2685000000L;
uplink_frequency_offset = -120000000;
Nid_cell = 0;
N_RB_DL = 100;
Nid_cell_mbsfn = 0;
nb_antenna_ports = 1;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 125;
pbch_repetition = "FALSE";
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 1;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pdsch_referenceSignalPower = -27;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
pusch_hoppingMode = "interSubFrame";
pusch_hoppingOffset = 0;
pusch_groupHoppingEnabled = "ENABLE";
pusch_groupAssignment = 0;
pusch_sequenceHoppingEnabled = "DISABLE";
pusch_nDMRS1 = 1;
phich_duration = "NORMAL";
phich_resource = "ONESIXTH";
srs_enable = "DISABLE";
/* srs_BandwidthConfig =;
srs_SubframeConfig =;
srs_ackNackST =;
srs_MaxUpPts =;*/
pusch_p0_Nominal = -96;
pusch_alpha = "AL1";
pucch_p0_Nominal = -104;
msg3_delta_Preamble = 6;
pucch_deltaF_Format1 = "deltaF2";
pucch_deltaF_Format1b = "deltaF3";
pucch_deltaF_Format2 = "deltaF0";
pucch_deltaF_Format2a = "deltaF0";
pucch_deltaF_Format2b = "deltaF0";
rach_numberOfRA_Preambles = 64;
rach_preamblesGroupAConfig = "DISABLE";
/*
rach_sizeOfRA_PreamblesGroupA = ;
rach_messageSizeGroupA = ;
rach_messagePowerOffsetGroupB = ;
*/
rach_powerRampingStep = 4;
rach_preambleInitialReceivedTargetPower = -108;
rach_preambleTransMax = 10;
rach_raResponseWindowSize = 10;
rach_macContentionResolutionTimer = 48;
rach_maxHARQ_Msg3Tx = 4;
pcch_default_PagingCycle = 128;
pcch_nB = "oneT";
bcch_modificationPeriodCoeff = 2;
ue_TimersAndConstants_t300 = 1000;
ue_TimersAndConstants_t301 = 1000;
ue_TimersAndConstants_t310 = 1000;
ue_TimersAndConstants_t311 = 10000;
ue_TimersAndConstants_n310 = 20;
ue_TimersAndConstants_n311 = 1;
ue_TransmissionMode = 1;
}
);
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200]
timer_reordering = 35;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500]
timer_status_prohibit = 0;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)]
poll_pdu = 4;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)]
poll_byte = 99999;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32]
max_retx_threshold = 4;
}
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth6";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth6";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 116;
eNB_instances = [0];
}
);
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="medium";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
@@ -151,9 +151,9 @@ eNBs =
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.19/24";
ENB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.19/24";
ENB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
@@ -164,6 +164,7 @@ MACRLCs = (
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 1;
}
);
@@ -11,7 +11,7 @@ RUs = (
tr_preference = "udp_if4p5";
nb_tx = 1;
nb_rx = 1;
max_pdschReferenceSignalPower = -29;
max_pdschReferenceSignalPower = -15;
max_rxgain = 120;
bands = [7,13];
is_slave = "no";
+42 -12
View File
@@ -1,19 +1,19 @@
[*]
[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
[*] Tue Jul 25 20:26:12 2017
[*] Thu Feb 22 14:46:40 2018
[*]
[dumpfile] "/tmp/openair_dump_eNB.vcd"
[dumpfile_mtime] "Tue Jul 25 20:11:55 2017"
[dumpfile_size] 19201475
[savefile] "/home/papillon/openairinterface5g/targets/RT/USER/eNB_usrp.gtkw"
[timestart] 29023604000
[size] 1236 578
[pos] 309 0
*-20.793451 29026062100 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[dumpfile_mtime] "Thu Feb 22 14:44:26 2018"
[dumpfile_size] 3482761
[savefile] "/homes/wangts/openairinterface5g/targets/RT/USER/eNB_usrp.gtkw"
[timestart] 4525000000
[size] 1920 1018
[pos] 0 22
*-21.506693 4530514310 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 386
[signals_width] 262
[signals_width] 344
[sst_expanded] 1
[sst_vpaned_height] 146
[sst_vpaned_height] 303
@28
functions.trx_read
functions.trx_write
@@ -25,12 +25,42 @@ functions.eNB_thread_rxtx0
@24
variables.frame_number_RX0_RU[63:0]
variables.subframe_number_RX0_RU[63:0]
@25
variables.frame_number_TX0_RU[63:0]
@24
variables.subframe_number_TX0_RU[63:0]
@28
functions.mac_schedule_dlsch
functions.macxface_eNB_dlsch_ulsch_scheduler
functions.macxface_ue_scheduler
functions.phy_eNB_ofdm_mod_l
@24
variables.frame_number_RX0_eNB[63:0]
@25
variables.subframe_number_RX0_eNB[63:0]
@24
variables.frame_number_TX0_eNB[63:0]
variables.subframe_number_TX0_eNB[63:0]
variables.frame_number_RX1_eNB[63:0]
variables.subframe_number_RX1_eNB[63:0]
variables.frame_number_TX1_eNB[63:0]
variables.subframe_number_TX1_eNB[63:0]
@28
functions.phy_eNB_dlsch_modulation
functions.phy_eNB_dlsch_encoding
functions.phy_eNB_dlsch_scrambling
functions.phy_eNB_beam_precoding
functions.phy_enb_pdcch_tx
functions.phy_enb_prach_rx
functions.phy_procedures_ru_feprx0
functions.phy_procedures_eNb_rx_uespec0
functions.phy_procedures_eNb_rx_uespec1
functions.phy_enb_sfgen
functions.phy_procedures_eNb_tx0
functions.phy_procedures_eNb_tx1
functions.phy_procedures_ru_feprx1
functions.phy_procedures_ru_feptx_ofdm0
functions.phy_procedures_ru_feptx_ofdm1
functions.phy_procedures_ru_feptx_prec0
functions.phy_procedures_ru_feptx_prec1
functions.eNB_thread_rxtx1
functions.phy_enb_sfgen
functions.phy_enb_prach_rx
+294 -57
View File
@@ -148,11 +148,13 @@ void exit_fun(const char* s);
void init_eNB(int,int);
void stop_eNB(int nb_inst);
int wakeup_tx(PHY_VARS_eNB *eNB,RU_proc_t *ru_proc);
int wakeup_txfh(eNB_rxtx_proc_t *proc,RU_proc_t *ru_proc);
void wakeup_prach_eNB(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe);
#ifdef Rel14
void wakeup_prach_eNB_br(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe);
#endif
extern int codingw;
extern uint8_t nfapi_mode;
extern void oai_subframe_ind(uint16_t sfn, uint16_t sf);
@@ -221,6 +223,15 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
LOG_D(PHY,"Calling RX procedures for SFNSF %d.%d\n",proc->frame_rx,proc->subframe_rx);
phy_procedures_eNB_uespec_RX(eNB, proc, no_relay );
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER , 1 );
if(get_nprocs() >= 8){
if(wait_on_condition(&proc[1].mutex_rxtx,&proc[1].cond_rxtx,&proc[1].pipe_ready,"wakeup_tx")<0) {
LOG_E(PHY,"Frame %d, subframe %d: TX1 not ready\n",proc[1].frame_rx,proc[1].subframe_rx);
return(-1);
}
if (release_thread(&proc[1].mutex_rxtx,&proc[1].pipe_ready,"wakeup_tx")<0) return(-1);
}
pthread_mutex_lock(&eNB->UL_INFO_mutex);
@@ -233,6 +244,7 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
pthread_mutex_unlock(&eNB->UL_INFO_mutex);
// *****************************************
// TX processing for subframe n+sf_ahead
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
@@ -245,7 +257,16 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
if (oai_exit) return(-1);
LOG_D(PHY,"Calling eNB_procedures_TX for SFN.SF %d.%d\n",proc->frame_tx,proc->subframe_tx);
phy_procedures_eNB_TX(eNB, proc, no_relay, NULL, 1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER , 0 );
if(oai_exit) return(-1);
if(get_nprocs() <= 4){
phy_procedures_eNB_TX(eNB, proc, no_relay, NULL, 1);
}
stop_meas( &softmodem_stats_rxtx_sf );
@@ -297,6 +318,50 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
}
static void* tx_thread(void* param) {
eNB_proc_t *eNB_proc = (eNB_proc_t*)param;
eNB_rxtx_proc_t *proc = &eNB_proc->proc_rxtx[1];
PHY_VARS_eNB *eNB = RC.eNB[0][proc->CC_id];
char thread_name[100];
sprintf(thread_name,"TXnp4_%d\n",&eNB->proc.proc_rxtx[0] == proc ? 0 : 1);
thread_top_init(thread_name,1,470000,500000,500000);
//wait_sync("tx_thread");
while (!oai_exit) {
if (wait_on_condition(&proc->mutex_rxtx,&proc->cond_rxtx,&proc->instance_cnt_rxtx,thread_name)<0) break;
if (oai_exit) break;
// *****************************************
// TX processing for subframe n+4
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// (may be relaxed in the future for performance reasons)
// *****************************************
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX1_ENB,proc->subframe_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX1_ENB,proc->subframe_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX1_ENB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_ENB,proc->frame_rx);
phy_procedures_eNB_TX(eNB, proc, no_relay, NULL, 1);
if (release_thread(&proc->mutex_rxtx,&proc->instance_cnt_rxtx,thread_name)<0) break;
pthread_mutex_lock( &proc->mutex_rxtx );
proc->pipe_ready++;
// the thread can now be woken up
if (pthread_cond_signal(&proc->cond_rxtx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB TXnp4 thread\n");
exit_fun( "ERROR pthread_cond_signal" );
}
pthread_mutex_unlock( &proc->mutex_rxtx );
wakeup_txfh(proc,eNB_proc->ru_proc);
}
return 0;
}
/*!
* \brief The RX UE-specific and TX thread of eNB.
* \param param is a \ref eNB_proc_t structure which contains the info what to process.
@@ -306,26 +371,43 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
static void* eNB_thread_rxtx( void* param ) {
static int eNB_thread_rxtx_status;
eNB_rxtx_proc_t *proc = (eNB_rxtx_proc_t*)param;
eNB_proc_t *eNB_proc = (eNB_proc_t*)param;
eNB_rxtx_proc_t *proc = &eNB_proc->proc_rxtx[0];
PHY_VARS_eNB *eNB = RC.eNB[0][proc->CC_id];
//RU_proc_t *ru_proc = NULL;
char thread_name[100];
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
// set default return value
eNB_thread_rxtx_status = 0;
sprintf(thread_name,"RXn_TXnp4_%d",&eNB->proc.proc_rxtx[0] == proc ? 0 : 1);
thread_top_init(thread_name,1,850000L,1000000L,2000000L);
sprintf(thread_name,"RXn_TXnp4_%d\n",&eNB->proc.proc_rxtx[0] == proc ? 0 : 1);
thread_top_init(thread_name,1,470000,500000,500000);
pthread_setname_np( pthread_self(),"rxtx processing");
LOG_I(PHY,"thread rxtx created id=%ld\n", syscall(__NR_gettid));
while (!oai_exit) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_RXTX0+(proc->subframe_rx&1), 0 );
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx));
if (wait_on_condition(&proc->mutex_rxtx,&proc->cond_rxtx,&proc->instance_cnt_rxtx,thread_name)<0) break;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_CPUID_ENB_THREAD_RXTX,sched_getcpu());
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_eNB_PROC_RXTX0+(proc->subframe_rx&1), 1 );
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_ENB,proc->subframe_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX0_ENB,proc->subframe_rx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_ENB,proc->frame_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_ENB,proc->frame_rx);
@@ -334,10 +416,23 @@ static void* eNB_thread_rxtx( void* param ) {
if (eNB->CC_id==0)
{
if (rxtx(eNB,proc,thread_name) < 0) break;
}
if (release_thread(&proc->mutex_rxtx,&proc->instance_cnt_rxtx,thread_name)<0) break;
pthread_mutex_lock( &proc->mutex_rxtx );
proc->pipe_ready++;
// the thread can now be woken up
if (pthread_cond_signal(&proc->cond_rxtx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB TXnp4 thread\n");
exit_fun( "ERROR pthread_cond_signal" );
}
pthread_mutex_unlock( &proc->mutex_rxtx );
if(get_nprocs() >= 8) wakeup_tx(eNB,eNB->proc.ru_proc);
else
{
phy_procedures_eNB_TX(eNB, proc, no_relay, NULL, 1);
wakeup_txfh(proc,eNB->proc.ru_proc);
}
} // while !oai_exit
@@ -373,10 +468,12 @@ static void wait_system_ready (char *message, volatile int *start_flag) {
void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string)
void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string,RU_t *ru)
{
eNB_proc_t *proc = &eNB->proc;
eNB_rxtx_proc_t *proc_rxtx = &proc->proc_rxtx[0];
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
RU_proc_t *ru_proc=&ru->proc;
proc->frame_rx = frame_rx;
proc->subframe_rx = subframe_rx;
@@ -384,23 +481,115 @@ void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string)
if (!oai_exit) {
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx));
proc_rxtx->subframe_rx = proc->subframe_rx;
proc_rxtx->frame_rx = proc->frame_rx;
proc_rxtx->subframe_tx = (proc->subframe_rx+sf_ahead)%10;
proc_rxtx->frame_tx = (proc->subframe_rx>(9-sf_ahead)) ? (1+proc->frame_rx)&1023 : proc->frame_rx;
proc->frame_tx = proc_rxtx->frame_tx;
proc_rxtx->timestamp_tx = proc->timestamp_tx;
proc_rxtx->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx->frame_rx = ru_proc->frame_rx;
proc_rxtx->subframe_rx = ru_proc->subframe_rx;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > (9-sf_ahead)) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + sf_ahead)%10;
LOG_D(PHY,"RXTX for TX: %d.%d, RX: %d.%d\n",proc_rxtx->frame_tx,proc_rxtx->subframe_tx,proc_rxtx->frame_rx,proc_rxtx->subframe_rx);
if (rxtx(eNB,proc_rxtx,string) < 0) LOG_E(PHY,"eNB %d CC_id %d failed during execution\n",eNB->Mod_id,eNB->CC_id);
ru_proc->timestamp_tx = proc_rxtx->timestamp_tx;
ru_proc->subframe_tx = proc_rxtx->subframe_tx;
ru_proc->frame_tx = proc_rxtx->frame_tx;
}
}
int wakeup_txfh(eNB_rxtx_proc_t *proc,RU_proc_t *ru_proc) {
struct timespec wait;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
if(wait_on_condition(&ru_proc->mutex_eNBs,&ru_proc->cond_eNBs,&ru_proc->ru_tx_ready,"wakeup_txfh")<0) {
LOG_E(PHY,"Frame %d, subframe %d: TX FH not ready\n", ru_proc->frame_tx, ru_proc->subframe_tx);
return(-1);
}
if (release_thread(&ru_proc->mutex_eNBs,&ru_proc->ru_tx_ready,"wakeup_txfh")<0) return(-1);
if (ru_proc->instance_cnt_eNBs == 0) {
LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->subframe_tx, proc->frame_rx, proc->subframe_rx);
return(-1);
}
if (pthread_mutex_timedlock(&ru_proc->mutex_eNBs,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", ru_proc->subframe_rx&1,ru_proc->instance_cnt_eNBs );
exit_fun( "error locking mutex_eNB" );
return(-1);
}
++ru_proc->instance_cnt_eNBs;
ru_proc->timestamp_tx = proc->timestamp_tx;
ru_proc->subframe_tx = proc->subframe_tx;
ru_proc->frame_tx = proc->frame_tx;
// the thread can now be woken up
if (pthread_cond_signal(&ru_proc->cond_eNBs) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB TXnp4 thread\n");
exit_fun( "ERROR pthread_cond_signal" );
return(-1);
}
pthread_mutex_unlock( &ru_proc->mutex_eNBs );
return(0);
}
int wakeup_tx(PHY_VARS_eNB *eNB,RU_proc_t *ru_proc) {
eNB_proc_t *proc=&eNB->proc;
eNB_rxtx_proc_t *proc_rxtx1=&proc->proc_rxtx[1];//*proc_rxtx=&proc->proc_rxtx[proc->frame_rx&1];
eNB_rxtx_proc_t *proc_rxtx0=&proc->proc_rxtx[0];
struct timespec wait;
wait.tv_sec=0;
wait.tv_nsec=5000000L;
if (proc_rxtx1->instance_cnt_rxtx == 0) {
LOG_E(PHY,"Frame %d, subframe %d: TX1 thread busy, dropping\n",proc_rxtx1->frame_rx,proc_rxtx1->subframe_rx);
return(-1);
}
if (pthread_mutex_timedlock(&proc_rxtx1->mutex_rxtx,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB TX1 thread %d (IC %d)\n", proc_rxtx1->subframe_rx&1,proc_rxtx1->instance_cnt_rxtx );
exit_fun( "error locking mutex_tx" );
return(-1);
}
++proc_rxtx1->instance_cnt_rxtx;
proc_rxtx1->subframe_rx = proc_rxtx0->subframe_rx;
proc_rxtx1->frame_rx = proc_rxtx0->frame_rx;
proc_rxtx1->subframe_tx = proc_rxtx0->subframe_tx;
proc_rxtx1->frame_tx = proc_rxtx0->frame_tx;
proc_rxtx1->timestamp_tx = proc_rxtx0->timestamp_tx;
// the thread can now be woken up
if (pthread_cond_signal(&proc_rxtx1->cond_rxtx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB TXnp4 thread\n");
exit_fun( "ERROR pthread_cond_signal" );
return(-1);
}
pthread_mutex_unlock( &proc_rxtx1->mutex_rxtx );
return(0);
}
int wakeup_rxtx(PHY_VARS_eNB *eNB,RU_t *ru) {
eNB_proc_t *proc=&eNB->proc;
RU_proc_t *ru_proc=&ru->proc;
eNB_rxtx_proc_t *proc_rxtx=&proc->proc_rxtx[proc->frame_rx&1];
eNB_rxtx_proc_t *proc_rxtx0=&proc->proc_rxtx[0];//*proc_rxtx=&proc->proc_rxtx[proc->frame_rx&1];
//eNB_rxtx_proc_t *proc_rxtx1=&proc->proc_rxtx[1];
LTE_DL_FRAME_PARMS *fp = &eNB->frame_parms;
@@ -434,25 +623,28 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,RU_t *ru) {
wait.tv_sec=0;
wait.tv_nsec=5000000L;
/* accept some delay in processing - up to 5ms */
for (i = 0; i < 10 && proc_rxtx->instance_cnt_rxtx == 0; i++) {
LOG_W( PHY,"[eNB] Frame %d Subframe %d, eNB RXn-TXnp4 thread busy!! (cnt_rxtx %i)\n", proc_rxtx->frame_tx, proc_rxtx->subframe_tx, proc_rxtx->instance_cnt_rxtx);
usleep(500);
if(wait_on_condition(&proc_rxtx0->mutex_rxtx,&proc_rxtx0->cond_rxtx,&proc_rxtx0->pipe_ready,"wakeup_rxtx")<0) {
LOG_E(PHY,"Frame %d, subframe %d: RXTX0 not ready\n",proc_rxtx0->frame_rx,proc_rxtx0->subframe_rx);
return(-1);
}
if (proc_rxtx->instance_cnt_rxtx == 0) {
exit_fun( "TX thread busy" );
if (release_thread(&proc_rxtx0->mutex_rxtx,&proc_rxtx0->pipe_ready,"wakeup_rxtx")<0) return(-1);
if (proc_rxtx0->instance_cnt_rxtx == 0) {
LOG_E(PHY,"Frame %d, subframe %d: RXTX0 thread busy, dropping\n",proc_rxtx0->frame_rx,proc_rxtx0->subframe_rx);
return(-1);
}
// wake up TX for subframe n+sf_ahead
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&proc_rxtx->mutex_rxtx,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", proc_rxtx->subframe_rx&1,proc_rxtx->instance_cnt_rxtx );
if (pthread_mutex_timedlock(&proc_rxtx0->mutex_rxtx,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", proc_rxtx0->subframe_rx&1,proc_rxtx0->instance_cnt_rxtx );
exit_fun( "error locking mutex_rxtx" );
return(-1);
}
++proc_rxtx->instance_cnt_rxtx;
++proc_rxtx0->instance_cnt_rxtx;
// We have just received and processed the common part of a subframe, say n.
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
@@ -460,20 +652,20 @@ int wakeup_rxtx(PHY_VARS_eNB *eNB,RU_t *ru) {
// The last (TS_rx mod samples_per_frame) was n*samples_per_tti,
// we want to generate subframe (n+sf_ahead), so TS_tx = TX_rx+sf_ahead*samples_per_tti,
// and proc->subframe_tx = proc->subframe_rx+sf_ahead
proc_rxtx->timestamp_tx = proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx->frame_rx = proc->frame_rx;
proc_rxtx->subframe_rx = proc->subframe_rx;
proc_rxtx->frame_tx = (proc_rxtx->subframe_rx > (9-sf_ahead)) ? (proc_rxtx->frame_rx+1)&1023 : proc_rxtx->frame_rx;
proc_rxtx->subframe_tx = (proc_rxtx->subframe_rx + sf_ahead)%10;
proc_rxtx0->timestamp_tx = ru_proc->timestamp_rx + (sf_ahead*fp->samples_per_tti);
proc_rxtx0->frame_rx = ru_proc->frame_rx;
proc_rxtx0->subframe_rx = ru_proc->subframe_rx;
proc_rxtx0->frame_tx = (proc_rxtx0->subframe_rx > (9-sf_ahead)) ? (proc_rxtx0->frame_rx+1)&1023 : proc_rxtx0->frame_rx;
proc_rxtx0->subframe_tx = (proc_rxtx0->subframe_rx + sf_ahead)%10;
// the thread can now be woken up
if (pthread_cond_signal(&proc_rxtx->cond_rxtx) != 0) {
if (pthread_cond_signal(&proc_rxtx0->cond_rxtx) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB RXn-TXnp4 thread\n");
exit_fun( "ERROR pthread_cond_signal" );
return(-1);
}
pthread_mutex_unlock( &proc_rxtx->mutex_rxtx );
pthread_mutex_unlock( &proc_rxtx0->mutex_rxtx );
return(0);
}
@@ -618,8 +810,9 @@ static void* eNB_thread_prach( void* param ) {
// set default return value
eNB_thread_prach_status = 0;
thread_top_init("eNB_thread_prach",1,500000L,1000000L,20000000L);
thread_top_init("eNB_thread_prach",1,500000,1000000,20000000);
//wait_sync("eNB_thread_prach");
while (!oai_exit) {
@@ -660,7 +853,7 @@ static void* eNB_thread_prach_br( void* param ) {
// set default return value
eNB_thread_prach_status = 0;
thread_top_init("eNB_thread_prach_br",1,500000L,1000000L,20000000L);
thread_top_init("eNB_thread_prach_br",1,500000,1000000,20000000);
while (!oai_exit) {
@@ -684,8 +877,40 @@ static void* eNB_thread_prach_br( void* param ) {
#endif
extern void init_td_thread(PHY_VARS_eNB *, pthread_attr_t *);
extern void init_te_thread(PHY_VARS_eNB *, pthread_attr_t *);
extern void init_td_thread(PHY_VARS_eNB *);
extern void init_te_thread(PHY_VARS_eNB *);
extern void kill_td_thread(PHY_VARS_eNB *);
extern void kill_te_thread(PHY_VARS_eNB *);
//////////////////////////////////////need to modified////////////////*****
static void* process_stats_thread(void* param) {
PHY_VARS_eNB *eNB = (PHY_VARS_eNB*)param;
wait_sync("process_stats_thread");
while (!oai_exit) {
sleep(1);
if (opp_enabled == 1) {
if (eNB->td) print_meas(&eNB->ulsch_decoding_stats,"ulsch_decoding",NULL,NULL);
if (eNB->te)
{
print_meas(&eNB->dlsch_turbo_encoding_preperation_stats,"dlsch_coding_crc",NULL,NULL);
print_meas(&eNB->dlsch_turbo_encoding_segmentation_stats,"dlsch_segmentation",NULL,NULL);
print_meas(&eNB->dlsch_encoding_stats,"dlsch_encoding",NULL,NULL);
print_meas(&eNB->dlsch_turbo_encoding_signal_stats,"coding_signal",NULL,NULL);
print_meas(&eNB->dlsch_turbo_encoding_main_stats,"coding_main",NULL,NULL);
print_meas(&eNB->dlsch_turbo_encoding_waiting_stats,"coding_wait",NULL,NULL);
print_meas(&eNB->dlsch_turbo_encoding_wakeup_stats0,"coding_worker_0",NULL,NULL);
print_meas(&eNB->dlsch_turbo_encoding_wakeup_stats1,"coding_worker_1",NULL,NULL);
}
print_meas(&eNB->dlsch_modulation_stats,"dlsch_modulation",NULL,NULL);
}
}
return(NULL);
}
void init_eNB_proc(int inst) {
@@ -695,7 +920,6 @@ void init_eNB_proc(int inst) {
eNB_proc_t *proc;
eNB_rxtx_proc_t *proc_rxtx;
pthread_attr_t *attr0=NULL,*attr1=NULL,*attr_prach=NULL;
//*attr_td=NULL,*attr_te=NULL;
#ifdef Rel14
pthread_attr_t *attr_prach_br=NULL;
#endif
@@ -712,8 +936,11 @@ void init_eNB_proc(int inst) {
proc_rxtx = proc->proc_rxtx;
proc_rxtx[0].instance_cnt_rxtx = -1;
proc_rxtx[1].instance_cnt_rxtx = -1;
proc_rxtx[0].pipe_ready = 0;
proc_rxtx[1].pipe_ready = 0;
proc->instance_cnt_prach = -1;
proc->instance_cnt_asynch_rxtx = -1;
proc->instance_cnt_synch = -1;
proc->CC_id = CC_id;
proc->first_rx=1;
@@ -737,8 +964,6 @@ void init_eNB_proc(int inst) {
pthread_attr_init( &proc->attr_prach);
pthread_attr_init( &proc->attr_asynch_rxtx);
// pthread_attr_init( &proc->attr_td);
// pthread_attr_init( &proc->attr_te);
pthread_attr_init( &proc_rxtx[0].attr_rxtx);
pthread_attr_init( &proc_rxtx[1].attr_rxtx);
#ifdef Rel14
@@ -760,6 +985,15 @@ void init_eNB_proc(int inst) {
// attr_td = &proc->attr_td;
// attr_te = &proc->attr_te;
#endif
//////////////////////////////////////need to modified////////////////*****
if(get_nprocs() > 2 && codingw)
{
init_te_thread(eNB);
init_td_thread(eNB);
}
//////////////////////////////////////need to modified////////////////*****
pthread_create( &proc_rxtx[0].pthread_rxtx, attr0, eNB_thread_rxtx, proc );
pthread_create( &proc_rxtx[1].pthread_rxtx, attr1, tx_thread, proc);
LOG_I(PHY,"eNB->single_thread_flag:%d\n", eNB->single_thread_flag);
@@ -780,6 +1014,9 @@ void init_eNB_proc(int inst) {
}
AssertFatal(proc->instance_cnt_prach == -1,"instance_cnt_prach = %d\n",proc->instance_cnt_prach);
if (opp_enabled == 1) pthread_create(&proc->process_stats_thread,NULL,process_stats_thread,(void*)eNB);
}
@@ -805,6 +1042,8 @@ void init_eNB_proc(int inst) {
pthread_mutex_init(&sync_phy_proc.mutex_phy_proc_tx, NULL);
pthread_cond_init(&sync_phy_proc.cond_phy_proc_tx, NULL);
sync_phy_proc.phy_proc_CC_id = 0;
}
@@ -818,6 +1057,7 @@ void kill_eNB_proc(int inst) {
PHY_VARS_eNB *eNB;
eNB_proc_t *proc;
eNB_rxtx_proc_t *proc_rxtx;
int i;
for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
eNB=RC.eNB[inst][CC_id];
@@ -825,15 +1065,15 @@ void kill_eNB_proc(int inst) {
proc_rxtx = &proc->proc_rxtx[0];
kill_td_thread(eNB);
kill_te_thread(eNB);
LOG_I(PHY, "Killing TX CC_id %d inst %d\n", CC_id, inst );
if (eNB->single_thread_flag==0) {
pthread_mutex_lock(&proc_rxtx[0].mutex_rxtx);
proc_rxtx[0].instance_cnt_rxtx = 0;
pthread_mutex_unlock(&proc_rxtx[0].mutex_rxtx);
pthread_mutex_lock(&proc_rxtx[1].mutex_rxtx);
proc_rxtx[1].instance_cnt_rxtx = 0;
pthread_mutex_unlock(&proc_rxtx[1].mutex_rxtx);
for (i=0; i<2; i++) {
pthread_mutex_lock(&proc_rxtx[i].mutex_rxtx);
proc_rxtx[i].instance_cnt_rxtx = 0;
proc_rxtx[i].pipe_ready = 0;
pthread_cond_signal(&proc_rxtx[i].cond_rxtx);
pthread_mutex_unlock(&proc_rxtx[i].mutex_rxtx);
}
proc->instance_cnt_prach = 0;
pthread_cond_signal( &proc->cond_prach );
@@ -856,15 +1096,12 @@ void kill_eNB_proc(int inst) {
#endif
LOG_I(PHY, "Destroying UL_INFO mutex\n");
pthread_mutex_destroy(&eNB->UL_INFO_mutex);
int i;
if (eNB->single_thread_flag==0) {
for (i=0;i<2;i++) {
LOG_I(PHY, "Joining rxtx[%d] mutex/cond\n",i);
pthread_join( proc_rxtx[i].pthread_rxtx, (void**)&status );
LOG_I(PHY, "Destroying rxtx[%d] mutex/cond\n",i);
pthread_mutex_destroy( &proc_rxtx[i].mutex_rxtx );
pthread_cond_destroy( &proc_rxtx[i].cond_rxtx );
}
for (i=0;i<2;i++) {
LOG_I(PHY, "Joining rxtx[%d] mutex/cond\n",i);
pthread_join( proc_rxtx[i].pthread_rxtx, (void**)&status );
LOG_I(PHY, "Destroying rxtx[%d] mutex/cond\n",i);
pthread_mutex_destroy( &proc_rxtx[i].mutex_rxtx );
pthread_cond_destroy( &proc_rxtx[i].cond_rxtx );
}
}
}
@@ -1105,8 +1342,8 @@ void init_eNB(int single_thread_flag,int wait_for_sync) {
#endif
eNB->td = ulsch_decoding_data;//(single_thread_flag==1) ? ulsch_decoding_data_2thread : ulsch_decoding_data;
eNB->te = dlsch_encoding;//(single_thread_flag==1) ? dlsch_encoding_2threads : dlsch_encoding;
eNB->td = ulsch_decoding_data_all;//(get_nprocs()<=4) ? ulsch_decoding_data : ulsch_decoding_data_2thread;
eNB->te = dlsch_encoding_all;//(get_nprocs()<=4) ? dlsch_encoding : dlsch_encoding_2threads;
LOG_I(PHY,"Registering with MAC interface module\n");
+701 -439
View File
File diff suppressed because it is too large Load Diff
+28 -5
View File
@@ -134,6 +134,7 @@ volatile int oai_exit = 0;
static clock_source_t clock_source = internal,time_source=internal;
static int wait_for_sync = 0;
static int send_dmrssync = 0;
unsigned int mmapped_dma=0;
int single_thread_flag=1;
@@ -217,6 +218,10 @@ extern PHY_VARS_UE* init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms,
extern void init_eNB_afterRU(void);
int transmission_mode=1;
int emulate_rf = 0;
int numerology = 0;
int codingw = 0;
int fepw = 0;
@@ -632,6 +637,7 @@ void init_openair0(void) {
int card;
int i;
for (card=0; card<MAX_CARDS; card++) {
@@ -639,6 +645,8 @@ void init_openair0(void) {
openair0_cfg[card].configFilename = NULL;
if(frame_parms[0]->N_RB_DL == 100) {
if(numerology == 0)
{
if (frame_parms[0]->threequarter_fs) {
openair0_cfg[card].sample_rate=23.04e6;
openair0_cfg[card].samples_per_frame = 230400;
@@ -650,6 +658,22 @@ void init_openair0(void) {
openair0_cfg[card].tx_bw = 10e6;
openair0_cfg[card].rx_bw = 10e6;
}
}else if(numerology == 1)
{
openair0_cfg[card].sample_rate=61.44e6;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].tx_bw = 20e6;
openair0_cfg[card].rx_bw = 20e6;
}else if(numerology == 2)
{
openair0_cfg[card].sample_rate=122.88e6;
openair0_cfg[card].samples_per_frame = 307200;
openair0_cfg[card].tx_bw = 20e6;
openair0_cfg[card].rx_bw = 20e6;
}else
{
printf("Un supported numerology\n");
}
} else if(frame_parms[0]->N_RB_DL == 50) {
openair0_cfg[card].sample_rate=15.36e6;
openair0_cfg[card].samples_per_frame = 153600;
@@ -905,7 +929,6 @@ int main( int argc, char **argv )
int ret;
#endif
start_background_system();
if ( load_configmodule(argc,argv) == NULL) {
exit_fun("[SOFTMODEM] Error, configuration module init failed\n");
}
@@ -1168,7 +1191,7 @@ int main( int argc, char **argv )
printf("About to Init RU threads RC.nb_RU:%d\n", RC.nb_RU);
if (RC.nb_RU >0) {
printf("Initializing RU threads\n");
init_RU(rf_config_file,clock_source,time_source);
init_RU(rf_config_file,clock_source,time_source,send_dmrssync);
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) {
RC.ru[ru_id]->rf_map.card=0;
RC.ru[ru_id]->rf_map.chain=CC_id+chain_offset;
@@ -1210,9 +1233,6 @@ int main( int argc, char **argv )
sync_var=0;
pthread_cond_broadcast(&sync_cond);
pthread_mutex_unlock(&sync_mutex);
printf("About to call end_configmodule() from %s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
end_configmodule();
printf("Called end_configmodule() from %s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
// wait for end of program
printf("TYPE <CTRL-C> TO TERMINATE\n");
@@ -1272,6 +1292,9 @@ int main( int argc, char **argv )
}
free_lte_top();
printf("About to call end_configmodule() from %s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
end_configmodule();
printf("Called end_configmodule() from %s() %s:%d\n", __FUNCTION__, __FILE__, __LINE__);
pthread_cond_destroy(&sync_cond);
pthread_mutex_destroy(&sync_mutex);
+45 -32
View File
@@ -63,6 +63,7 @@
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
#define CONFIG_HLP_DMAMAP "sets flag for improved EXMIMO UE performance\n"
#define CONFIG_HLP_EXCCLK "tells hardware to use an external clock reference\n"
#define CONFIG_HLP_DMRSSYNC "tells RU to insert DMRS in subframe 1 slot 0"
#define CONFIG_HLP_USIM "use XOR autentication algo in case of test usim mode\n"
#define CONFIG_HLP_NOSNGLT "Disables single-thread mode in lte-softmodem\n"
#define CONFIG_HLP_TADV "Set timing_advance\n"
@@ -85,6 +86,12 @@
#define CONFIG_HLP_TPORT "tracer port\n"
#define CONFIG_HLP_NOTWAIT "don't wait for tracer, start immediately\n"
#define CONFIG_HLP_TNOFORK "to ease debugging with gdb\n"
#define CONFIG_HLP_NUMEROLOGY "adding numerology for 5G\n"
#define CONFIG_HLP_CODINGW "coding worker thread enable(disable by defult)\n"
#define CONFIG_HLP_FEPW "FEP worker thread enabled(disable by defult)\n"
#define CONFIG_HLP_EMULATE_RF "Emulated RF enabled(disable by defult)\n"
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
/***************************************************************************************************************************************/
@@ -139,35 +146,39 @@ extern int16_t dlsch_demod_shift;
/* optname helpstr paramflags XXXptr defXXXval type numelt */
/*---------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_PARAMS_DESC { \
{"rf-config-file", CONFIG_HLP_RFCFGF, 0, strptr:(char **)&rf_config_file, defstrval:NULL, TYPE_STRING, sizeof(rf_config_file)}, \
{"ulsch-max-errors", CONFIG_HLP_ULMAXE, 0, uptr:&ULSCH_max_consecutive_errors, defuintval:0, TYPE_UINT, 0}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&phy_test, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&usim_test, defintval:0, TYPE_UINT8, 0}, \
{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"threadIQ", NULL, 0, iptr:&(threads.iq), defintval:1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:1, TYPE_INT, 0}, \
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:DEFAULT_DLF, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
{"K" , CONFIG_HLP_ITTIL, PARAMFLAG_NOFREE, strptr:&itti_dump_file, defstrval:"/tmp/itti.dump", TYPE_STRING, 0}, \
{"m" , CONFIG_HLP_DLMCS, 0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS, 0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
{"W" , CONFIG_HLP_L2MONW, 0, strptr:(char **)&in_ip, defstrval:"127.0.0.1", TYPE_STRING, sizeof(in_ip)}, \
{"P" , CONFIG_HLP_L2MONP, 0, strptr:(char **)&in_path, defstrval:"/tmp/oai_opt.pcap", TYPE_STRING, sizeof(in_path)}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&ouput_vcd, defintval:0, TYPE_INT, 0}, \
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"rf-config-file", CONFIG_HLP_RFCFGF, 0, strptr:(char **)&rf_config_file, defstrval:NULL, TYPE_STRING, sizeof(rf_config_file)},\
{"ulsch-max-errors", CONFIG_HLP_ULMAXE, 0, uptr:&ULSCH_max_consecutive_errors, defuintval:0, TYPE_UINT, 0}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&phy_test, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&usim_test, defintval:0, TYPE_UINT8, 0}, \
{"mmapped-dma", CONFIG_HLP_DMAMAP, PARAMFLAG_BOOL, uptr:&mmapped_dma, defintval:0, TYPE_INT, 0}, \
{"external-clock", CONFIG_HLP_EXCCLK, PARAMFLAG_BOOL, uptr:&clock_source, defintval:0, TYPE_INT, 0}, \
{"wait-for-sync", NULL, PARAMFLAG_BOOL, iptr:&wait_for_sync, defintval:0, TYPE_INT, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"threadIQ", NULL, 0, iptr:&(threads.iq), defintval:1, TYPE_INT, 0}, \
{"threadOneSubframe", NULL, 0, iptr:&(threads.one), defintval:1, TYPE_INT, 0}, \
{"threadTwoSubframe", NULL, 0, iptr:&(threads.two), defintval:1, TYPE_INT, 0}, \
{"threadThreeSubframe", NULL, 0, iptr:&(threads.three), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcOne", NULL, 0, iptr:&(threads.slot1_proc_one), defintval:1, TYPE_INT, 0}, \
{"threadSlot1ProcTwo", NULL, 0, iptr:&(threads.slot1_proc_two), defintval:1, TYPE_INT, 0}, \
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
{"K" , CONFIG_HLP_ITTIL, PARAMFLAG_NOFREE, strptr:&itti_dump_file, defstrval:"/tmp/itti.dump", TYPE_STRING, 0}, \
{"m" , CONFIG_HLP_DLMCS, 0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS, 0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
{"W" , CONFIG_HLP_L2MONW, 0, strptr:(char **)&in_ip, defstrval:"127.0.0.1", TYPE_STRING, sizeof(in_ip)}, \
{"P" , CONFIG_HLP_L2MONP, 0, strptr:(char **)&in_path, defstrval:"/tmp/oai_opt.pcap", TYPE_STRING, sizeof(in_path)}, \
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, iptr:&ouput_vcd, defintval:0, TYPE_INT, 0}, \
{"q" , CONFIG_HLP_STMON, PARAMFLAG_BOOL, iptr:&opp_enabled, defintval:0, TYPE_INT, 0}, \
{"S" , CONFIG_HLP_MSLOTS, PARAMFLAG_BOOL, u8ptr:&exit_missed_slots, defintval:1, TYPE_UINT8, 0}, \
{"T" , CONFIG_HLP_TDD, PARAMFLAG_BOOL, iptr:&tddflag, defintval:0, TYPE_INT, 0}, \
{"numerology" , CONFIG_HLP_NUMEROLOGY, PARAMFLAG_BOOL, iptr:&numerology, defintval:0, TYPE_INT, 0}, \
{"emulate-rf" , CONFIG_HLP_EMULATE_RF, PARAMFLAG_BOOL, iptr:&emulate_rf, defintval:0, TYPE_INT, 0}, \
{"codingw" , CONFIG_HLP_CODINGW, PARAMFLAG_BOOL, iptr:&codingw, defintval:0, TYPE_INT, 0}, \
{"fepw" , CONFIG_HLP_FEPW, PARAMFLAG_BOOL, iptr:&fepw, defintval:0, TYPE_INT, 0}, \
{"nbiot-disable", CONFIG_HLP_DISABLNBIOT,PARAMFLAG_BOOL, iptr:&nonbiotflag, defintval:0, TYPE_INT, 0} \
}
@@ -245,7 +256,7 @@ extern void stop_eNB(int);
extern void kill_eNB_proc(int inst);
// In lte-ru.c
extern void init_RU(const char*,clock_source_t clock_source,clock_source_t time_source);
extern void init_RU(const char*,clock_source_t clock_source,clock_source_t time_source,int send_dmrssync);
extern void init_RU_proc(RU_t *ru);
extern void stop_RU(int nb_ru);
extern void kill_RU_proc(int inst);
@@ -262,8 +273,10 @@ extern void reset_opp_meas(void);
extern void print_opp_meas(void);
extern void init_fep_thread(PHY_VARS_eNB *, pthread_attr_t *);
extern void init_td_thread(PHY_VARS_eNB *, pthread_attr_t *);
extern void init_te_thread(PHY_VARS_eNB *, pthread_attr_t *);
extern void init_td_thread(PHY_VARS_eNB *);
extern void init_te_thread(PHY_VARS_eNB *);
extern void kill_td_thread(PHY_VARS_eNB *);
extern void kill_te_thread(PHY_VARS_eNB *);
PHY_VARS_UE* init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t UE_id,
+4 -1
View File
@@ -213,7 +213,10 @@ extern PHY_VARS_UE* init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms,
int transmission_mode=1;
int emulate_rf = 0;
int numerology = 0;
int codingw = 0;
int fepw = 0;
/* struct for ethernet specific parameters given in eNB conf file */
eth_params_t *eth_params;
+2
View File
@@ -43,6 +43,7 @@
#include <getopt.h>
#include <sys/sysinfo.h>
#include "rt_wrapper.h"
#include <errno.h>
#include "openair1/PHY/defs.h"
@@ -283,6 +284,7 @@ void thread_top_init(char *thread_name,
if (sched_setattr(0, &attr, flags) < 0 ) {
perror("[SCHED] eNB tx thread: sched_setattr failed\n");
fprintf(stderr,"sched_setattr Error = %s",strerror(errno));
exit(1);
}
+2 -2
View File
@@ -497,7 +497,7 @@ void do_UL_sig(channel_desc_t *UE2RU[NUMBER_OF_UE_MAX][NUMBER_OF_RU_MAX][MAX_NUM
if (((double)PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm[subframe] +
UE2RU[UE_id][ru_id][CC_id]->path_loss_dB) <= -125.0) {
// don't simulate a UE that is too weak
LOG_D(OCM,"[SIM][UL] ULPOWERS UE %d tx_pwr %d dBm (num_RE %d) for subframe %d (sf_offset %d)\n",
LOG_D(PHY,"[SIM][UL] ULPOWERS UE %d tx_pwr %d dBm (num_RE %d) for subframe %d (sf_offset %d)\n",
UE_id,
PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm[subframe],
PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE[subframe],
@@ -516,7 +516,7 @@ void do_UL_sig(channel_desc_t *UE2RU[NUMBER_OF_UE_MAX][NUMBER_OF_RU_MAX][MAX_NUM
1,
NULL,
PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE[subframe]); // This make the previous argument the total power
LOG_D(OCM,"[SIM][UL] ULPOWERS UE %d tx_pwr %f dBm (target %d dBm, num_RE %d) for subframe %d (sf_offset %d)\n",
LOG_D(PHY,"[SIM][UL] ULPOWERS UE %d tx_pwr %f dBm (target %d dBm, num_RE %d) for subframe %d (sf_offset %d)\n",
UE_id,
10*log10(tx_pwr*PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE[subframe]),
PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm[subframe],
+12 -2
View File
@@ -195,6 +195,11 @@ time_stats_t oaisim_stats_f;
time_stats_t dl_chan_stats;
time_stats_t ul_chan_stats;
int emulate_rf = 0;
int numerology = 0;
int codingw = 0;
int fepw = 0;
// this should reflect the channel models in openair1/SIMULATION/TOOLS/defs.h
mapping small_scale_names[] = {
{ "custom", custom }, { "SCM_A", SCM_A },
@@ -740,8 +745,12 @@ l2l1_task (void *args_p)
while (all_done==0) {
pthread_mutex_lock(&subframe_mutex);
int subframe_ru_mask_local = subframe_ru_mask; //((1<<NB_RU)-1));
int subframe_UE_mask_local = subframe_UE_mask;
int subframe_ru_mask_local = (subframe_select(&RC.ru[0]->frame_parms,(sf+4)%10)!=SF_UL) ? subframe_ru_mask : ((1<<NB_RU)-1);
int subframe_UE_mask_local = (subframe_select(&RC.ru[0]->frame_parms,(sf+4)%10)!=SF_DL) ? subframe_UE_mask : ((1<<NB_UE_INST)-1);
//int subframe_UE_mask_local = (RC.ru[0]->frame_parms.frame_type == FDD || subframe_select(&RC.ru[0]->frame_parms,(sf+4)%10)!=SF_DL) ? subframe_UE_mask : ((1<<NB_UE_INST)-1);
pthread_mutex_unlock(&subframe_mutex);
LOG_D(EMU,"Frame %d, Subframe %d, NB_RU %d, NB_UE %d: Checking masks %x,%x\n",frame,sf,NB_RU,NB_UE_INST,subframe_ru_mask_local,subframe_UE_mask_local);
if ((subframe_ru_mask_local == ((1<<NB_RU)-1)) &&
@@ -1065,6 +1074,7 @@ void set_UE_defaults(int nb_ue) {
PHY_vars_UE_g[UE_id][CC_id]->pdcch_vars[i][0]->agregationLevel = 0xFF;
}
PHY_vars_UE_g[UE_id][CC_id]->current_dlsch_cqi[0] = 10;
PHY_vars_UE_g[UE_id][CC_id]->tx_power_max_dBm = 23;
}
}
}
+2 -2
View File
@@ -443,13 +443,13 @@ int olg_config(void)
//set_log(OCM, LOG_INFO, 20);
//set_log(OTG, LOG_INFO, 1);
set_comp_log(OCG, LOG_ERR, 0x15,1);
set_comp_log(EMU, LOG_DEBUG, 0x15,20);
set_comp_log(EMU, LOG_INFO, 0x15,20);
set_comp_log(MAC, LOG_TRACE, 0x15,1);
set_comp_log(RLC, LOG_TRACE, 0x15,1);
set_comp_log(PHY, LOG_TRACE, 0x15, 1);
set_comp_log(PDCP, LOG_DEBUG, 0x15,1);
set_comp_log(RRC, LOG_DEBUG, 0x15,1);
set_comp_log(OCM, LOG_DEBUG, 0x15,20);
set_comp_log(OCM, LOG_INFO, 0x15,20);
set_comp_log(OTG, LOG_DEBUG, 0x15,1);
set_comp_log(OMG, LOG_NOTICE, 0x15,1);
set_comp_log(OPT, LOG_ERR, 0x15,1);
+22 -18
View File
@@ -1072,7 +1072,7 @@ int ru_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **
*ptimestamp = last_ru_rx_timestamp[ru_id][CC_id];
LOG_D(EMU,"RU_trx_read nsamps %d TS(%llu,%llu) => subframe %d\n",nsamps,
LOG_D(PHY,"RU_trx_read nsamps %d TS(%llu,%llu) => subframe %d\n",nsamps,
(unsigned long long)current_ru_rx_timestamp[ru_id][CC_id],
(unsigned long long)last_ru_rx_timestamp[ru_id][CC_id],
(int)((*ptimestamp/RC.ru[ru_id]->frame_parms.samples_per_tti)%10));
@@ -1087,20 +1087,27 @@ int ru_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **
subframe = (last_ru_rx_timestamp[ru_id][CC_id]/RC.ru[ru_id]->frame_parms.samples_per_tti)%10;
LOG_D(EMU,"RU_trx_read generating UL subframe %d (Ts %llu, current TS %llu)\n",
subframe,(unsigned long long)*ptimestamp,
(unsigned long long)current_ru_rx_timestamp[ru_id][CC_id]);
do_UL_sig(UE2RU,
enb_data,
ue_data,
subframe,
0, // abstraction_flag
&RC.ru[ru_id]->frame_parms,
0, // frame is only used for abstraction
ru_id,
CC_id);
if (RC.ru[ru_id]->frame_parms.frame_type == FDD ||
subframe_select(&RC.ru[ru_id]->frame_parms,subframe) != SF_DL) {
LOG_D(PHY,"RU_trx_read generating UL subframe %d (Ts %llu, current TS %llu)\n",
//if (subframe_select(&RC.ru[ru_id]->frame_parms,subframe) != SF_DL || RC.ru[ru_id]->frame_parms.frame_type == FDD) {
//LOG_D(EMU,"RU_trx_read generating UL subframe %d (Ts %llu, current TS %llu)\n",
subframe,(unsigned long long)*ptimestamp,
(unsigned long long)current_ru_rx_timestamp[ru_id][CC_id]);
do_UL_sig(UE2RU,
enb_data,
ue_data,
subframe,
0, // abstraction_flag
&RC.ru[ru_id]->frame_parms,
0, // frame is only used for abstraction
ru_id,
CC_id);
}
last_ru_rx_timestamp[ru_id][CC_id] += RC.ru[ru_id]->frame_parms.samples_per_tti;
sample_count += RC.ru[ru_id]->frame_parms.samples_per_tti;
}
@@ -1352,9 +1359,6 @@ void init_devices(void){
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_set_freq_func = UE_trx_set_freq;
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_set_gains_func = UE_trx_set_gains;
last_UE_rx_timestamp[UE_id][CC_id] = 0;
}
}
}