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@@ -102,18 +102,22 @@ mpdcch_scrambling (LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, uint16
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// 9 symbols without DMRS = 9*12*6 REs = 648 REs
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// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
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// Total = 648+216 = 864 REs = 1728 bits
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static uint16_t mpdcch5ss1tab[864];
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static uint16_t mpdcch5ss1p107108tab[864];
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static uint16_t mpdcch5ss1p109110tab[864];
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void init_mpdcch5ss1p107108tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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void init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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int l,k,kmod,re;
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LOG_I(PHY,"Inititalizing mpdcch5tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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LOG_I(PHY,"Inititalizing mpdcchss15tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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for (l=1,re=0;l<14;l++) {
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for (k=0;k<72;k++){
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kmod = k % 12;
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if (((l!=5) && (l!=6) && (l!=12) && (l!=13)) ||
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10)))
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mpdcch5tab[re++]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10))) {
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mpdcch5ss1p109110tab[re]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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mpdcch5ss1p107108tab[re]=1+mpdcch5ss1p109110tab[re];
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re++;
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}
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}
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}
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AssertFatal(re==864,"RE count not equal to 864\n");
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@@ -121,44 +125,78 @@ void init_mpdcch5ss1p107108tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *e
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// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
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// start symbol is symbol 2 and L'=24 => all 6 PRBs in the set
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// 8 symbols without DMRS = 9*12*6 REs = 576 REs
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// 8 symbols without DMRS = 8*12*6 REs = 576 REs
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// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
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// Total = 576+216 = 792 REs = 1584 bits
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static uint16_t mpdcch5ss2tab[864];
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void init_mpdcch5ss2p107108tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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static uint16_t mpdcch5ss2p107108tab[792];
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static uint16_t mpdcch5ss2p109110tab[792];
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void init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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int l,k,kmod,re;
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LOG_I(PHY,"Inititalizing mpdcch5tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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LOG_I(PHY,"Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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for (l=2,re=0;l<14;l++) {
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for (k=0;k<72;k++){
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kmod = k % 12;
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if (((l!=5) && (l!=6) && (l!=12) && (l!=13)) ||
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10)))
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mpdcch5tab[re++]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10))) {
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mpdcch5ss2p109110tab[re]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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mpdcch5ss2p107108tab[re]=1+mpdcch5ss2p109110tab[re];
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re++;
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}
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}
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}
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AssertFatal(re==792,"RE count not equal to 792\n");
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}
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// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
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// start symbol is symbol 3 and L'=24 => all 6 PRBs in the set
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// 7 symbols without DMRS = 7*12*6 REs = 504 REs
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// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*6 REs = 216 REs
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// Total = 504+216 = 720 REs = 1440 bits
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static uint16_t mpdcch5ss3p107108tab[720];
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static uint16_t mpdcch5ss3p109110tab[720];
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void init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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int l,k,kmod,re;
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LOG_I(PHY,"Inititalizing mpdcch5ss3tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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for (l=3,re=0;l<14;l++) {
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for (k=0;k<72;k++){
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kmod = k % 12;
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if (((l!=5) && (l!=6) && (l!=12) && (l!=13)) ||
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10))) {
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mpdcch5ss3p109110tab[re]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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mpdcch5ss3p107108tab[re]=1+mpdcch5ss3p109110tab[re];
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re++;
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}
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}
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}
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AssertFatal(re==720,"RE count not equal to 792\n");
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}
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// this table is the allocation of modulated MPDCCH format 3 symbols to REs, antenna ports 107,108
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// with start symbol 1, using L'=16 => first 4 PRBs in the set
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// 8 symbols without DMRS = 9*12*4 REs = 432 REs
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// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*4 REs = 144 REs
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// Total = 432+144 = 576 = 16CCE*36RE/CCE
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static uint16_t mpdcch3ss1tab[864];
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static uint16_t mpdcch3ss1p107108tab[576];
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static uint16_t mpdcch3ss1p109110tab[576];
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void init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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int l,k,kmod,re;
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LOG_I(PHY,"Inititalizing mpdcch3ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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LOG_I(PHY,"Inititalizing mpdcch3ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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for (l=1,re=0;l<14;l++) {
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for (k=0;k<48;k++){
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kmod = k % 12;
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if (((l!=5) && (l!=6) && (l!=12) && (l!=13)) ||
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10)))
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mpdcch5tab[re++]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10))) {
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mpdcch3ss1p109110tab[re]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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mpdcch3ss1p107108tab[re]=1+mpdcch3ss1p109110tab[re];
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re++;
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}
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}
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}
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AssertFatal(re==864,"RE count not equal to 864\n");
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AssertFatal(re==576,"RE count not equal to 864\n");
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}
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// this table is the allocation of modulated MPDCCH format 2 symbols to REs, antenna ports 107,108
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@@ -166,23 +204,29 @@ void init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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// 8 symbols without DMRS = 9*12*2 REs = 216 REs
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// 4 symbols with DMRS (3 REs stolen per symbol = 4*9*2 REs = 72 REs
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// Total = 216+72 = 288 = 8CCE*36RE/CCE
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static uint16_t mpdcch2ss1tab[864];
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static uint16_t mpdcch2ss1p107108tab[288];
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static uint16_t mpdcch2ss1p109110tab[288];
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void init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB *eNB) {
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int l,k,kmod,re;
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LOG_I(PHY,"Inititalizing mpdcch3ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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LOG_I(PHY,"Inititalizing mpdcch2ss1tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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for (l=1,re=0;l<14;l++) {
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for (k=0;k<48;k++){
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kmod = k % 12;
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if (((l!=5) && (l!=6) && (l!=12) && (l!=13)) ||
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10)))
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mpdcch5tab[re++]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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(((l==5)||(l==6)||(l==12)||(l==13))&&(kmod!=0)&&(kmod!=5)&&(kmod!=10))) {
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mpdcch2ss1p109110tab[re]=(l*eNB->frame_parms.ofdm_symbol_size)+k;
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mpdcch2ss1p107108tab[re]=1+mpdcch2ss1p109110tab[re];
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re++;
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}
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}
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}
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AssertFatal(re==864,"RE count not equal to 864\n");
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AssertFatal(re==288,"RE count not equal to 288\n");
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}
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extern uint8_t *generate_dci0(uint8_t *dci,
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uint8_t *e,
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uint8_t DCI_LENGTH,
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@@ -190,6 +234,27 @@ extern uint8_t *generate_dci0(uint8_t *dci,
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uint8_t aggregation_level,
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uint16_t rnti);
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uint16_t mpdcch_dmrs_tab[12*6];
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void init_mpdcch_dmrs_tab(uint16_t oss) {
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int re = 5*oss;
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int pos = 0;
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for (int symb=0;symb<4;symb++) {
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for (int prb=0;prb<6;prb++,re+=12) {
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mpdcch_dmrs_tab[pos++] = re;
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mpdcch_dmrs_tab[pos++] = re+5;
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mpdcch_dmrs_tab[pos++] = re+10;
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}
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if (symb == 0) re=6*oss;
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else if (symb == 1) re=12*oss;
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else if (symb == 2) re=13*oss;
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}
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}
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void
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generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int32_t ** txdataF)
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{
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@@ -201,18 +266,20 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
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int i;
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int gain_lin_QPSK;
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uint8_t bitsperCCE;
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uint16_t *mpdcchtab;
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uint32_t x1, x2, s = 0;
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uint8_t Nacc = 4;
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uint16_t j0, j, idelta;
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uint16_t i0;
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int off;
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// Assumption: only handle a single MPDCCH per narrowband
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if (mpdcch->start_symbol == 1)
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bitsperCCE = 72;
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else if (mpdcch->start_symbol == 2)
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bitsperCCE = 66;
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else if (mpdcch->start_symbol == 3)
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bitsperCCE = 60;
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for (i=0;i<mpdcch->num_dci;i++) {
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mdci = &mpdcch->mdci_alloc[i];
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AssertFatal (fp->frame_type == FDD, "TDD is not yet supported for MPDCCH\n");
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AssertFatal (fp->Ncp == NORMAL, "Extended Prefix not yet supported for MPDCCH\n");
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AssertFatal (mdci->L <= 24, "L is %d\n", mdci->L);
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@@ -221,12 +288,47 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
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AssertFatal (mdci->number_of_prb_pairs == 6, "2 or 4 PRB pairs not support yet for MPDCCH\n");
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AssertFatal (mdci->reps > 0, "mdci->reps==0\n");
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// 9 REs/EREG * 4 EREG/ECCE => 36 REs/ECCE => 72 bits/ECCE, so same as regular PDCCH channel encoding
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// These are to avoid unimplemented things
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AssertFatal (mdci->reps == 1, "number of repetitions (%d) must be one for now\n",mdci->reps);
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AssertFatal (mdci->ce_mode != 1, "CE mode B not activataed yet\n");
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AssertFatal (mdci->L != 24, "Only 2+4 and aggregation 24 for now\n");
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i0 = mdci->i0;
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// antenna index
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int a_index = mdci->rnti & 3;
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if ((mdci->start_symbol == 1) && (a_index<2)) {
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mpdcchtab = mpdcch5ss1p107108tab;
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bitsperCCE = 72;
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}
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else if ((mdci->start_symbol == 1) && (a_index>1)) {
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mpdcchtab = mpdcch5ss1p109110tab;
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bitsperCCE = 72;
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}
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else if ((mdci->start_symbol == 2) && (a_index<2)) {
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mpdcchtab = mpdcch5ss2p107108tab;
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bitsperCCE = 66;
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}
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else if ((mdci->start_symbol == 2) && (a_index>1)) {
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mpdcchtab = mpdcch5ss2p109110tab;
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bitsperCCE = 66;
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}
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else if ((mdci->start_symbol == 3) && (a_index<2)) {
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mpdcchtab = mpdcch5ss2p107108tab;
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bitsperCCE = 60;
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}
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else if ((mdci->start_symbol == 3) && (a_index<2)) {
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mpdcchtab = mpdcch5ss2p109110tab;
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bitsperCCE = 60;
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}
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else
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AssertFatal(1==0,"Illegal combination start_symbol %d, a_index %d\n",mdci->start_symbol,a_index);
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// Note: We only have to run this every Nacc subframes during repetitions, data and scrambling are constant, but we do it for now to simplify during testing
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generate_dci0(mdci->dci_pdu,
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mpdcch->e+(72*mdci->firstCCE),
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mpdcch->e+(bitsperCCE*mdci->firstCCE),
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mdci->dci_length,
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bitsperCCE,
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mdci->L,
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@@ -261,8 +363,27 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
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// first RE of narrowband
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// mpdcchtab5 below contains the mapping from each coded symbol to relative RE avoiding the DMRS
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int nb_i0;
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switch (fp->N_RB_DL) {
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int re_offset = fp->first_carrier_offset + 1 + ((fp->N_RB_DL == 100) ? 1 : 0) + mdci->narrowband * 12 * 6;
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case 6:
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case 25:
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nb_i0=0;
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break;
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case 15:
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case 50:
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case 75:
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nb_i0=1;
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break;
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case 100:
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nb_i0=2;
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break;
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default:
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AssertFatal(1==0,"Illegal N_RB_DL %d\n",fp->N_RB_DL);
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break;
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}
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int re_offset = fp->first_carrier_offset + (12*nb_i0) + mdci->narrowband * 12 * 6;
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if (re_offset > fp->ofdm_symbol_size)
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re_offset -= (fp->ofdm_symbol_size - 1);
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int32_t *txF = &txdataF[0][re_offset];
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@@ -274,10 +395,64 @@ generate_mdci_top (PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp, int
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e_ptr++;
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((int16_t *) & yIQ)[1] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
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e_ptr++;
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txF[mpdcch5tab[i + (36 * mdci->firstCCE)]] = yIQ;
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txF[mpdcchtab[i + ((bitsperCCE>>1) * mdci->firstCCE)]] = yIQ;
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LOG_I(PHY,"mpdcch pos %d: %d => (%d,%d)\n",i,mpdcchtab[i + ((bitsperCCE>>2) * mdci->firstCCE)],((int16_t *) & yIQ)[0],((int16_t *) & yIQ)[1]);
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}
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if (a_index>1) off=0;
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else off=1;
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// pilot scrambling initiatlization (note: this is for a single repetition)
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// x1 is set in lte_gold_generic
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// rule for BL/CE UEs from Section 6.10.3A.1 in 36.211
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if ((mdci->rnti == 0xFFFE) || (mdci->ce_mode == 2)) // CEModeB Note: also for mdci->rnti==SC_RNTI
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Nacc = fp->frame_type == FDD ? 4 : 10;
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else
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Nacc = 1;
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if (fp->frame_type == FDD || Nacc == 1)
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idelta = 0;
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else
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idelta = Nacc - 2;
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j0 = (i0 + idelta) / Nacc;
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j = (i - i0) / Nacc;
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uint32_t a = ((((j0 + j) * Nacc) % 10)+1);
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uint32_t b = ((mdci->dmrs_scrambling_init<<1)+1) << 16;
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x2 = a*b;
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LOG_I(PHY,"mpdcch_dmrs cinit %d\n",x2);
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// add MPDCCH pilots
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int reset = 1;
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for (i=0; i < (24*6) ; i+=2) {
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if ((i & 0x1f) == 0) {
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s = lte_gold_generic (&x1, &x2, reset);
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reset = 0;
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}
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((int16_t *) & yIQ)[0] = (((s>>(i & 0x1f))&1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
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((int16_t *) & yIQ)[1] = (((s>>((i+1) & 0x1f))&1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
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txF[off+mpdcch_dmrs_tab[(i>>1)]] = yIQ;
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LOG_I(PHY,"mpdcch_dmrs pos %d: %d => (%d,%d)\n",i,mpdcch_dmrs_tab[(i>>1)],((int16_t *) & yIQ)[0],((int16_t *) & yIQ)[1]);
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}
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}
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}
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void init_mpdcch(PHY_VARS_eNB *eNB) {
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init_mpdcch5ss1tab_normal_regular_subframe_evenNRBDL(eNB);
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init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(eNB);
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init_mpdcch5ss3tab_normal_regular_subframe_evenNRBDL(eNB);
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init_mpdcch3ss1tab_normal_regular_subframe_evenNRBDL(eNB);
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init_mpdcch2ss1tab_normal_regular_subframe_evenNRBDL(eNB);
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init_mpdcch_dmrs_tab(eNB->frame_parms.ofdm_symbol_size);
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}
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#endif
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