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testing with 2x2 and 4x4 with N310, small modifications in nr_ru_procedures and usrp_lib.cpp for multiple antennas

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Eurecom
2021-06-01 09:48:20 +02:00
parent ac4670990c
commit d249c1ef80
4 changed files with 53 additions and 49 deletions
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executables/nr-ru.c
+2
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@@ -1397,6 +1397,7 @@ void *ru_thread( void *param ) {
}
}
// At this point, all information for subframe has been received on FH interface
res = pullTpool(gNB->resp_L1, gNB->threadPool);
syncMsg = (processingData_L1_t *)NotifiedFifoData(res);
@@ -1409,6 +1410,7 @@ void *ru_thread( void *param ) {
res->key = proc->tti_rx;
pushTpool(gNB->threadPool, res);
}
printf( "Exiting ru_thread \n");
openair1/PHY/INIT/nr_init_ru.c
+29 -27
View File
@@ -121,37 +121,39 @@ int nr_phy_init_RU(RU_t *ru) {
RC.nb_nr_L1_inst,NUMBER_OF_gNB_MAX);
LOG_E(PHY,"[INIT] %s() RC.nb_nr_L1_inst:%d \n", __FUNCTION__, RC.nb_nr_L1_inst);
int beam_count = 0;
if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0
beam_count++;
}
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
int l_ind = 0;
for (i=0; i<RC.nb_nr_L1_inst; i++) {
if (ru->do_precoding == 1) {
int beam_count = 0;
if (ru->nb_tx>1) {//Enable beamforming when nb_tx > 1
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01)//64 bit-map with the MSB @2⁶³ corresponds to SSB ssb_index 0
beam_count++;
}
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
int l_ind = 0;
for (i=0; i<RC.nb_nr_L1_inst; i++) {
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
AssertFatal(ru->bw_list[i],"ru->bw_list[%d] is null\n",i);
for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
AssertFatal(ru->bw_list[i],"ru->bw_list[%d] is null\n",i);
for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++;
} // for j
//}
} // for p
} //for i
}
l_ind++;
} // for j
//}
} // for p
} //for i
}
ru->common.beam_id = (uint8_t**)malloc16_clear(ru->nb_tx*sizeof(uint8_t*));
for(i=0; i< ru->nb_tx; ++i) {
ru->common.beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(ru->common.beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
ru->common.beam_id = (uint8_t**)malloc16_clear(ru->nb_tx*sizeof(uint8_t*));
for(i=0; i< ru->nb_tx; ++i) {
ru->common.beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
memset(ru->common.beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
}
}
} // !=IF5
openair1/SCHED_NR/nr_ru_procedures.c
+13 -13
View File
@@ -305,15 +305,16 @@ static void *nr_feptx_thread(void *param) {
////////////precoding////////////
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 1);
start_meas(&ru->precoding_stats);
if (aa==0 && l==0) start_meas(&ru->precoding_stats);
for(i=0; i<ru->nb_log_antennas; ++i) {
memcpy((void*) &ru->common.beam_id[i][slot*fp->symbols_per_slot+l],
(void*) &ru->gNB_list[0]->common_vars.beam_id[i][slot*fp->symbols_per_slot+l],
(fp->symbols_per_slot>>1)*sizeof(uint8_t));
if (ru->do_precoding == 1) {
for(i=0; i<ru->nb_log_antennas; ++i) {
memcpy((void*) &ru->common.beam_id[i][slot*fp->symbols_per_slot+l],
(void*) &ru->gNB_list[0]->common_vars.beam_id[i][slot*fp->symbols_per_slot+l],
(fp->symbols_per_slot>>1)*sizeof(uint8_t));
}
}
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
memcpy((void*)&ru->common.txdataF_BF[0][l*fp->ofdm_symbol_size],
(void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset + l*fp->ofdm_symbol_size],
@@ -321,10 +322,9 @@ static void *nr_feptx_thread(void *param) {
}
else if (ru->do_precoding == 0) {
int gNB_tx = ru->gNB_list[0]->frame_parms.nb_antennas_tx;
for (int aa=0;aa<ru->nb_tx;aa++)
memcpy((void*)&ru->common.txdataF_BF[aa][l*fp->ofdm_symbol_size],
(void*)&ru->gNB_list[0]->common_vars.txdataF[aa%gNB_tx][txdataF_offset + l*fp->ofdm_symbol_size],
(fp->samples_per_slot_wCP>>1)*sizeof(int32_t));
memcpy((void*)&ru->common.txdataF_BF[aa][l*fp->ofdm_symbol_size],
(void*)&ru->gNB_list[0]->common_vars.txdataF[aa%gNB_tx][txdataF_offset + l*fp->ofdm_symbol_size],
(fp->samples_per_slot_wCP>>1)*sizeof(int32_t));
}
else {
bw = ru->beam_weights[0];
@@ -340,13 +340,13 @@ static void *nr_feptx_thread(void *param) {
txdataF_offset);//here
}
}
stop_meas(&ru->precoding_stats);
if (aa==0 && l==0) stop_meas(&ru->precoding_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->index+1 , 0);
////////////FEPTX////////////
start_meas(&ru->ofdm_mod_stats);
if (aa==0 && l==0) start_meas(&ru->ofdm_mod_stats);
nr_feptx0(ru,slot,start,fp->symbols_per_slot>>1,aa);
stop_meas(&ru->ofdm_mod_stats);
if (aa==0 && l==0) stop_meas(&ru->ofdm_mod_stats);
if (release_thread(&feptx->mutex_feptx,&feptx->instance_cnt_feptx,"NR feptx thread")<0) break;
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+9 -9
View File
@@ -385,14 +385,14 @@ static int trx_usrp_write(openair0_device *device,
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
__m256i buff_tx[cc<2?2:cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
__m128i buff_tx[cc<2?2:cc][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
@@ -522,14 +522,14 @@ void *trx_usrp_write_thread(void * arg){
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tx[8][nsamps2];
__m256i buff_tx[cc<2?2:cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tx[8][nsamps2];
__m128i buff_tx[cc<2?2:cc][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tx[8][nsamps2];
int16x8_t buff_tx[cc<2?2:cc][nsamps2];
#else
#error Unsupported CPU architecture, USRP device cannot be built
#endif
@@ -623,14 +623,14 @@ static int trx_usrp_read(openair0_device *device, openair0_timestamp *ptimestamp
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
nsamps2 = (nsamps+7)>>3;
__m256i buff_tmp[2][nsamps2];
__m256i buff_tmp[cc<2 ? 2 : cc][nsamps2];
#else
nsamps2 = (nsamps+3)>>2;
__m128i buff_tmp[2][nsamps2];
__m128i buff_tmp[cc<2 ? 2 : cc][nsamps2];
#endif
#elif defined(__arm__)
nsamps2 = (nsamps+3)>>2;
int16x8_t buff_tmp[2][nsamps2];
int16x8_t buff_tmp[cc<2 ? 2 : cc][nsamps2];
#endif
samples_received=0;