adding phy_procedures_nrUE_TX to ulsim
- adding SCHED_NR_UE_LIB to ulsim compilation library - fixing linking compilation problems - using fapi_nr_dci_pdu_rel15_t struct to initialize PUSCH - test_input random data is set in phy_procedures_nrUE_TX instead of ulsim
This commit is contained in:
committed by
Thomas Schlichter
parent
46968b1216
commit
d34868e693
@@ -2583,7 +2583,7 @@ add_executable(nr_ulsim
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${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulsim.c
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${OPENAIR_DIR}/common/utils/backtrace.c
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${T_SOURCE})
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target_link_libraries(nr_ulsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
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target_link_libraries(nr_ulsim -Wl,--start-group UTIL SIMU PHY_COMMON PHY_NR PHY_NR_UE SCHED_NR_LIB SCHED_NR_UE_LIB CONFIG_LIB -Wl,--end-group m pthread ${ATLAS_LIBRARIES} ${T_LIB} dl)
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foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
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@@ -1057,7 +1057,6 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
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/*! \brief Fill up NR_UE_ULSCH_t and NR_UL_UE_HARQ_t structs
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@param[in] UE, Pointer to PHY_VARS_NR_UE struct
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@param[in] nr_ul_pdcch_params, pointer to temp_nfapi_nr_ul_config_pdcch_parameters_rel15_t struct
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@param[in] thread_id, thread id
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@param[in] gNB_id, gNB id
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@param[in] harq_pid, harq id
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@@ -1065,11 +1064,9 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
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*/
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int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
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temp_nfapi_nr_ul_config_pdcch_parameters_rel15_t *nr_ul_pdcch_params,
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uint8_t thread_id,
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int gNB_id,
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unsigned char harq_pid,
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unsigned char *test_input);
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unsigned char harq_pid);
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/*! \brief Perform PUSCH scrambling. TS 38.211 V15.4.0 subclause 6.3.1.1
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@param[in] in, Pointer to input bits
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@@ -1100,7 +1097,8 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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unsigned char harq_pid,
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uint8_t slot,
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uint8_t thread_id,
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int eNB_id);
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int eNB_id,
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unsigned char *test_input);
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/** \brief This function does IFFT for PUSCH
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@@ -48,23 +48,31 @@
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#endif
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int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
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temp_nfapi_nr_ul_config_pdcch_parameters_rel15_t *nr_ul_pdcch_params,
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uint8_t thread_id,
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int gNB_id,
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unsigned char harq_pid,
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unsigned char *test_input){
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unsigned char harq_pid){
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int N_PRB_oh, N_RE_prime, cwd_idx, length_dmrs, Nid_cell;
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int nb_rb, Nsymb_pusch, first_rb, nb_codewords;
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uint16_t n_rnti;
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fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
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NR_UE_ULSCH_t *ulsch_ue;
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NR_UL_UE_HARQ_t *harq_process_ul_ue;
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ul_dci_pdu = &UE->dci_ind.dci_list[0].dci;
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//--------------------------Temporary configuration-----------------------------//
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length_dmrs = 1;
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n_rnti = 0x1234;
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Nid_cell = 0;
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nb_rb = 50;
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first_rb = 90;
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Nsymb_pusch = 12;
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nb_codewords = (ul_dci_pdu->precod_nbr_layers>4)?2:1;
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//------------------------------------------------------------------------------//
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for (cwd_idx = 0; cwd_idx < nr_ul_pdcch_params->nb_codewords; cwd_idx++) {
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for (cwd_idx = 0; cwd_idx < nb_codewords; cwd_idx++) {
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ulsch_ue = UE->ulsch[thread_id][gNB_id][cwd_idx];
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harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
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@@ -72,30 +80,29 @@ int generate_ue_ulsch_params(PHY_VARS_NR_UE *UE,
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ulsch_ue->length_dmrs = length_dmrs;
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ulsch_ue->rnti = n_rnti;
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ulsch_ue->Nid_cell = Nid_cell;
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ulsch_ue->Nsc_pusch = nr_ul_pdcch_params->nb_rb*NR_NB_SC_PER_RB;
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ulsch_ue->Nsymb_pusch = nr_ul_pdcch_params->n_symb;
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ulsch_ue->Nsc_pusch = nb_rb*NR_NB_SC_PER_RB;
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ulsch_ue->Nsymb_pusch = Nsymb_pusch;
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ulsch_ue->nb_re_dmrs = UE->dmrs_UplinkConfig.pusch_maxLength*(UE->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4;
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N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
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N_RE_prime = NR_NB_SC_PER_RB*nr_ul_pdcch_params->n_symb - ulsch_ue->nb_re_dmrs - N_PRB_oh;
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N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
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N_RE_prime = NR_NB_SC_PER_RB*Nsymb_pusch - ulsch_ue->nb_re_dmrs - N_PRB_oh;
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if (harq_process_ul_ue) {
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harq_process_ul_ue->mcs = nr_ul_pdcch_params->Imcs;
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harq_process_ul_ue->Nl = nr_ul_pdcch_params->Nl;
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harq_process_ul_ue->nb_rb = nr_ul_pdcch_params->nb_rb;
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harq_process_ul_ue->first_rb = nr_ul_pdcch_params->first_rb;
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harq_process_ul_ue->number_of_symbols = nr_ul_pdcch_params->n_symb;
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harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nr_ul_pdcch_params->nb_rb*nr_ul_pdcch_params->nb_codewords;
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harq_process_ul_ue->rvidx = nr_ul_pdcch_params->rvidx;
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harq_process_ul_ue->a = test_input;
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harq_process_ul_ue->TBS = nr_compute_tbs(nr_ul_pdcch_params->Imcs,
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nr_ul_pdcch_params->nb_rb,
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nr_ul_pdcch_params->n_symb,
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harq_process_ul_ue->mcs = ul_dci_pdu->mcs;
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harq_process_ul_ue->Nl = ul_dci_pdu->precod_nbr_layers;
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harq_process_ul_ue->nb_rb = nb_rb;
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harq_process_ul_ue->first_rb = first_rb;
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harq_process_ul_ue->number_of_symbols = Nsymb_pusch;
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harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb*nb_codewords;
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harq_process_ul_ue->rvidx = ul_dci_pdu->rv;
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harq_process_ul_ue->TBS = nr_compute_tbs(ul_dci_pdu->mcs,
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nb_rb,
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Nsymb_pusch,
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ulsch_ue->nb_re_dmrs,
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length_dmrs,
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nr_ul_pdcch_params->Nl);
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ul_dci_pdu->precod_nbr_layers);
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}
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@@ -248,7 +255,8 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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unsigned char harq_pid,
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uint8_t slot,
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uint8_t thread_id,
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int eNB_id) {
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int eNB_id,
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unsigned char *test_input) {
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unsigned int available_bits;
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uint8_t mod_order, cwd_index, num_of_codewords;
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@@ -277,6 +285,8 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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ulsch_ue = UE->ulsch[thread_id][eNB_id][cwd_index];
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harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
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harq_process_ul_ue->a = test_input;
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/////////////////////////ULSCH coding/////////////////////////
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///////////
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@@ -15,6 +15,10 @@ typedef struct {
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int nr_tti_tx;
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/// NR TTI index within subframe_rx [0 .. ttis_per_subframe - 1] to act upon for reception
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int nr_tti_rx;
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/// NR slot index within frame_tx [0 .. slots_per_frame - 1] to act upon for transmission
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int nr_slot_tx;
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/// NR slot index within frame_rx [0 .. slots_per_frame - 1] to act upon for transmission
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int nr_slot_rx;
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//#endif
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/// subframe to act upon for transmission
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int subframe_tx;
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@@ -112,7 +112,7 @@ int phy_procedures_RN_UE_RX(unsigned char last_slot, unsigned char next_slot, re
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@param mode calib/normal mode
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@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
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*/
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void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type);
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void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id, uint8_t thread_id);
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/*! \brief Scheduling for UE RX procedures in normal subframes.
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@param last_slot Index of last slot (0-19)
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@param phy_vars_ue Pointer to UE variables on which to act
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@@ -2460,131 +2460,78 @@ void ue_pucch_procedures(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
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}
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#endif
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void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type) {
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void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id, uint8_t thread_id) {
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NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
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fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
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NR_UE_ULSCH_t *ulsch_ue;
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NR_UL_UE_HARQ_t *harq_process_ul_ue;
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//int32_t ulsch_start=0;
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int nr_tti_tx = proc->nr_tti_tx;
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int slot_tx = proc->nr_slot_tx;
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int frame_tx = proc->frame_tx;
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unsigned int aa;
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uint8_t isSubframeSRS;
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/*
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uint8_t next1_thread_id = ue->current_thread_id[proc->nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[proc->nr_tti_rx]+1);
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uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
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*/
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unsigned char *test_input;
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int harq_pid, i, TBS;
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
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LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, nr_tti_tx);
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#if T_TRACER
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T(T_UE_PHY_UL_TICK, T_INT(ue->Mod_id), T_INT(frame_tx%1024), T_INT(nr_tti_tx));
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#endif
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LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
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ue->generate_ul_signal[eNB_id] = 0;
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#if UE_TIMING_TRACE
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start_meas(&ue->phy_proc_tx);
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#endif
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#ifdef EMOS
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//phy_procedures_emos_UE_TX(next_slot);
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#endif
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ul_dci_pdu = &ue->dci_ind.dci_list[0].dci;
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ue->tx_power_dBm[nr_tti_tx]=-127;
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harq_pid = 0; //temporary implementation
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if (abstraction_flag==0) {
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for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
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memset(&ue->common_vars.txdataF[aa][nr_tti_tx*frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti],
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0,
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frame_parms->ofdm_symbol_size*frame_parms->symbols_per_tti*sizeof(int32_t));
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}
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}
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if (ue->UE_mode[eNB_id] != PRACH) {
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// check cell srs nr_tti_rx and ue srs nr_tti_rx. This has an impact on pusch encoding
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isSubframeSRS = nr_is_srs_occasion_common(&ue->frame_parms,proc->frame_tx,proc->nr_tti_tx);
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generate_ue_ulsch_params(ue,
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0,
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gNB_id,
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harq_pid);
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ue_compute_srs_occasion(ue,proc,eNB_id,isSubframeSRS);
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ulsch_ue = ue->ulsch[thread_id][gNB_id][0]; // cwd_index = 0
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harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
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ue_ulsch_uespec_procedures(ue,proc,eNB_id,abstraction_flag);
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}
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TBS = nr_compute_tbs(ul_dci_pdu->mcs, harq_process_ul_ue->nb_rb, ulsch_ue->Nsymb_pusch, ulsch_ue->nb_re_dmrs, ulsch_ue->length_dmrs, ul_dci_pdu->precod_nbr_layers);
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test_input = (unsigned char *) malloc16(sizeof(unsigned char) * TBS / 8);
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for (i = 0; i < TBS / 8; i++)
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test_input[i] = (unsigned char) rand();
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nr_ue_ulsch_procedures(ue,
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harq_pid,
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slot_tx,
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0,
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gNB_id,
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test_input);
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/*
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if (ue->UE_mode[eNB_id] == PUSCH) {
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// check if we need to use PUCCH 1a/1b
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ue_pucch_procedures(ue,proc,eNB_id,abstraction_flag);
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// check if we need to use SRS
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ue_srs_procedures(ue,proc,eNB_id,abstraction_flag);
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} // UE_mode==PUSCH
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*/
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#ifdef CBA
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if ((ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_cba_scheduling_flag >= 1) &&
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(ue->ulsch[eNB_id]->harq_processes[harq_pid]->status == CBA_ACTIVE)) {
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ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag=0; //-=1
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// ue->ulsch[eNB_id]->harq_processes[harq_pid]->status= IDLE;
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first_rb = ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb;
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nb_rb = ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb;
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//cba_mcs=ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs;
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input_buffer_length = ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS/8;
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access_mode=CBA_ACCESS;
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LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d: CBA num dci %d\n",
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Mod_id,frame_tx,nr_tti_tx,
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ue->ulsch[eNB_id]->num_cba_dci[nr_tti_tx]);
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/*mac_xface->ue_get_sdu(Mod_id,
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CC_id,
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frame_tx,
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proc->subframe_tx,
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nr_tti_tx%(ue->frame_parms.ttis_per_subframe),
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eNB_id,
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ulsch_input_buffer,
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input_buffer_length,
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&access_mode);*/
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ue->ulsch[eNB_id]->num_cba_dci[nr_tti_tx]=0;
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if (access_mode > UNKNOWN_ACCESS) {
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if (abstraction_flag==0) {
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if (ulsch_encoding(ulsch_input_buffer,
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ue,
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harq_pid,
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eNB_id,
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proc->nr_tti_rx,
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ue->transmission_mode[eNB_id],0,
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0)!=0) { // Nbundled, to be updated!!!!
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LOG_E(PHY,"ulsch_coding.c: FATAL ERROR: returning\n");
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return;
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}
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}
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#ifdef PHY_ABSTRACTION
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else {
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ulsch_encoding_emul(ulsch_input_buffer,ue,eNB_id,proc->nr_tti_rx,harq_pid,0);
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}
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#endif
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} else {
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ue->ulsch[eNB_id]->harq_processes[harq_pid]->status= IDLE;
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//reset_cba_uci(ue->ulsch[eNB_id]->o);
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LOG_N(PHY,"[UE %d] Frame %d, nr_tti_rx %d: CBA transmission cancelled or postponed\n",
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Mod_id, frame_tx,nr_tti_tx);
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}
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}
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#endif // end CBA
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if (abstraction_flag == 0) {
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ulsch_common_procedures(ue,proc, (ue->generate_ul_signal[eNB_id] == 0));
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} // mode != PRACH
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nr_ue_pusch_common_procedures(ue,
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slot_tx,
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ul_dci_pdu->precod_nbr_layers,
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&ue->frame_parms);
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/*
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if ((ue->UE_mode[eNB_id] == PRACH) &&
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(ue->frame_parms.prach_config_common.prach_Config_enabled==1)) {
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@@ -2598,54 +2545,19 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
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else {
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ue->generate_prach=0;
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}
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*/
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// reset DL ACK/NACK status
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uint8_t N_bundled = 0;
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if (ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0] != NULL)
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{
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nr_reset_ack(&ue->frame_parms,
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ue->dlsch[ue->current_thread_id[proc->nr_tti_rx]][eNB_id][0]->harq_ack,
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nr_tti_tx,
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proc->nr_tti_rx,
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||||
ue->ulsch[eNB_id]->o_ACK,
|
||||
&N_bundled,
|
||||
0);
|
||||
/*
|
||||
nr_reset_ack(&ue->frame_parms,
|
||||
ue->dlsch[next1_thread_id][eNB_id][0]->harq_ack,
|
||||
nr_tti_tx,
|
||||
proc->nr_tti_rx,
|
||||
ue->ulsch[eNB_id]->o_ACK,
|
||||
&N_bundled,
|
||||
0);
|
||||
nr_reset_ack(&ue->frame_parms,
|
||||
ue->dlsch[next2_thread_id][eNB_id][0]->harq_ack,
|
||||
nr_tti_tx,
|
||||
proc->nr_tti_rx,
|
||||
ue->ulsch[eNB_id]->o_ACK,
|
||||
&N_bundled,
|
||||
0);
|
||||
*/
|
||||
}
|
||||
|
||||
if (ue->dlsch_SI[eNB_id] != NULL)
|
||||
nr_reset_ack(&ue->frame_parms,
|
||||
ue->dlsch_SI[eNB_id]->harq_ack,
|
||||
nr_tti_tx,
|
||||
proc->nr_tti_rx,
|
||||
ue->ulsch[eNB_id]->o_ACK,
|
||||
&N_bundled,
|
||||
0);
|
||||
|
||||
|
||||
LOG_D(PHY,"****** end TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, nr_tti_tx);
|
||||
LOG_D(PHY,"****** end TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX, VCD_FUNCTION_OUT);
|
||||
#if UE_TIMING_TRACE
|
||||
stop_meas(&ue->phy_proc_tx);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
void phy_procedures_UE_S_TX(PHY_VARS_NR_UE *ue,uint8_t eNB_id,uint8_t abstraction_flag,relaying_type_t r_type)
|
||||
{
|
||||
int aa;//i,aa;
|
||||
@@ -2669,7 +2581,7 @@ void phy_procedures_UE_S_TX(PHY_VARS_NR_UE *ue,uint8_t eNB_id,uint8_t abstractio
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
*/
|
||||
|
||||
void nr_ue_measurement_procedures(uint16_t l, // symbol index of each slot [0..6]
|
||||
PHY_VARS_NR_UE *ue,
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
#include "PHY/defs_nr_UE.h"
|
||||
#include <openair1/SCHED/sched_common.h>
|
||||
#include <openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h>
|
||||
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
|
||||
|
||||
#ifndef NO_RAT_NR
|
||||
|
||||
@@ -50,7 +51,9 @@
|
||||
|
||||
#endif
|
||||
|
||||
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
|
||||
|
||||
|
||||
//int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
|
||||
uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
|
||||
uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
|
||||
/*
|
||||
@@ -112,6 +115,11 @@ void nr_generate_pucch3_4(int32_t **txdataF,
|
||||
//extern uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id);
|
||||
//extern uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id);
|
||||
|
||||
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe){
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*******************************************************************
|
||||
*
|
||||
* NAME : pucch_procedures_ue_nr
|
||||
|
||||
@@ -30,6 +30,8 @@
|
||||
#include "common/utils/LOG/log.h"
|
||||
#include "common/ran_context.h"
|
||||
|
||||
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
|
||||
|
||||
#include "SIMULATION/TOOLS/sim.h"
|
||||
#include "SIMULATION/RF/rf.h"
|
||||
|
||||
@@ -49,6 +51,7 @@
|
||||
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
|
||||
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
|
||||
#include "SCHED_NR/sched_nr.h"
|
||||
#include "SCHED_NR_UE/defs.h"
|
||||
#include "PHY/TOOLS/tools_defs.h"
|
||||
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
|
||||
|
||||
@@ -62,6 +65,8 @@ PHY_VARS_gNB *gNB;
|
||||
PHY_VARS_NR_UE *UE;
|
||||
RAN_CONTEXT_t RC;
|
||||
|
||||
|
||||
|
||||
double cpuf;
|
||||
|
||||
// dummy functions
|
||||
@@ -97,6 +102,8 @@ NR_IF_Module_init(int Mod_id) {
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
short conjugate[8]__attribute__((aligned(16))) = {-1,1,-1,1,-1,1,-1,1};
|
||||
|
||||
|
||||
void exit_function(const char *file, const char *function, const int line, const char *s) {
|
||||
const char *msg = s == NULL ? "no comment" : s;
|
||||
@@ -137,7 +144,7 @@ int main(int argc, char **argv) {
|
||||
FILE *output_fd = NULL;
|
||||
//uint8_t write_output_file = 0;
|
||||
int trial, n_trials = 1, n_errors = 0, n_false_positive = 0;
|
||||
uint8_t n_tx = 1, n_rx = 1, nb_codewords = 1;
|
||||
uint8_t n_tx = 1, n_rx = 1;
|
||||
//uint8_t transmission_mode = 1;
|
||||
uint16_t Nid_cell = 0;
|
||||
channel_desc_t *gNB2UE;
|
||||
@@ -167,7 +174,8 @@ int main(int argc, char **argv) {
|
||||
cpuf = get_cpu_freq_GHz();
|
||||
|
||||
|
||||
temp_nfapi_nr_ul_config_pdcch_parameters_rel15_t nr_ul_pdcch_params;
|
||||
fapi_nr_dci_pdu_rel15_t *ul_dci_pdu;
|
||||
UE_nr_rxtx_proc_t UE_proc;
|
||||
|
||||
|
||||
if (load_configmodule(argc, argv) == 0) {
|
||||
@@ -383,6 +391,9 @@ int main(int argc, char **argv) {
|
||||
gNB_proc.frame_rx = frame;
|
||||
gNB_proc.slot_rx = slot;
|
||||
|
||||
UE_proc.nr_slot_tx = slot;
|
||||
UE_proc.frame_tx = frame;
|
||||
|
||||
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
|
||||
frame_parms->nb_antennas_tx = n_tx;
|
||||
frame_parms->nb_antennas_rx = n_rx;
|
||||
@@ -425,13 +436,11 @@ int main(int argc, char **argv) {
|
||||
}
|
||||
}
|
||||
|
||||
nr_ul_pdcch_params.nb_codewords = nb_codewords;
|
||||
nr_ul_pdcch_params.Imcs = Imcs;
|
||||
nr_ul_pdcch_params.n_symb = nb_symb_sch;
|
||||
nr_ul_pdcch_params.nb_rb = nb_rb;
|
||||
nr_ul_pdcch_params.first_rb = start_rb;
|
||||
nr_ul_pdcch_params.Nl = 1;
|
||||
nr_ul_pdcch_params.rvidx = 0;
|
||||
ul_dci_pdu = &UE->dci_ind.dci_list[0].dci;
|
||||
|
||||
ul_dci_pdu->mcs = Imcs;
|
||||
ul_dci_pdu->rv = 0;
|
||||
ul_dci_pdu->precod_nbr_layers = 1;
|
||||
|
||||
unsigned char harq_pid = 0;
|
||||
unsigned int TBS = 8424;
|
||||
@@ -442,7 +451,7 @@ int main(int argc, char **argv) {
|
||||
|
||||
mod_order = nr_get_Qm(Imcs, 1);
|
||||
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
|
||||
TBS = nr_compute_tbs(Imcs, nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, nr_ul_pdcch_params.Nl);
|
||||
TBS = nr_compute_tbs(Imcs, nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, ul_dci_pdu->precod_nbr_layers);
|
||||
|
||||
NR_gNB_ULSCH_t *ulsch_gNB = gNB->ulsch[UE_id+1][0];
|
||||
ulsch_gNB->harq_processes[harq_pid]->G = available_bits; // [hna] temp until length_dmrs and nb_re_dmrs are signaled
|
||||
@@ -458,43 +467,22 @@ int main(int argc, char **argv) {
|
||||
rel15_ul->ulsch_pdu_rel15.number_symbols = nb_symb_sch;
|
||||
rel15_ul->ulsch_pdu_rel15.Qm = mod_order;
|
||||
rel15_ul->ulsch_pdu_rel15.mcs = Imcs;
|
||||
rel15_ul->ulsch_pdu_rel15.rv = nr_ul_pdcch_params.rvidx;
|
||||
rel15_ul->ulsch_pdu_rel15.n_layers = nr_ul_pdcch_params.Nl;
|
||||
rel15_ul->ulsch_pdu_rel15.rv = 0;
|
||||
rel15_ul->ulsch_pdu_rel15.n_layers = ul_dci_pdu->precod_nbr_layers;
|
||||
///////////////////////////////////////////////////
|
||||
|
||||
unsigned char *estimated_output_bit;
|
||||
unsigned char *test_input_bit;
|
||||
unsigned char *test_input;
|
||||
unsigned int errors_bit = 0;
|
||||
uint32_t errors_scrambling = 0;
|
||||
|
||||
test_input = (unsigned char *) malloc16(sizeof(unsigned char) * TBS / 8);
|
||||
test_input_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
|
||||
estimated_output_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
|
||||
|
||||
/////////////////////////phy_procedures_nr_ue_TX///////////////////////
|
||||
///////////
|
||||
|
||||
for (i = 0; i < TBS / 8; i++)
|
||||
test_input[i] = (unsigned char) rand();
|
||||
|
||||
generate_ue_ulsch_params(UE,
|
||||
&nr_ul_pdcch_params,
|
||||
0,
|
||||
gNB_id,
|
||||
harq_pid,
|
||||
test_input);
|
||||
|
||||
nr_ue_ulsch_procedures(UE,
|
||||
harq_pid,
|
||||
slot,
|
||||
0,
|
||||
gNB_id);
|
||||
|
||||
nr_ue_pusch_common_procedures(UE,
|
||||
slot,
|
||||
nr_ul_pdcch_params.Nl,
|
||||
&UE->frame_parms);
|
||||
phy_procedures_nrUE_TX(UE, &UE_proc, gNB_id, 0);
|
||||
|
||||
///////////
|
||||
////////////////////////////////////////////////////
|
||||
@@ -555,7 +543,7 @@ int main(int argc, char **argv) {
|
||||
for (i = 0; i < TBS; i++) {
|
||||
|
||||
estimated_output_bit[i] = (ulsch_gNB->harq_processes[harq_pid]->b[i/8] & (1 << (i & 7))) >> (i & 7);
|
||||
test_input_bit[i] = (test_input[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
|
||||
test_input_bit[i] = (ulsch_ue[0]->harq_processes[harq_pid]->b[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
|
||||
|
||||
if (estimated_output_bit[i] != test_input_bit[i]) {
|
||||
if(errors_bit == 0)
|
||||
|
||||
@@ -114,6 +114,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
|
||||
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
|
||||
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe);
|
||||
|
||||
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
|
||||
|
||||
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format);
|
||||
|
||||
@@ -123,6 +124,7 @@ uint32_t get_ssb_slot(uint32_t ssb_index);
|
||||
|
||||
uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
|
||||
|
||||
|
||||
void nr_ue_process_mac_pdu(
|
||||
module_id_t module_idP,
|
||||
uint8_t CC_id,
|
||||
|
||||
@@ -2006,11 +2006,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe){
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
*/
|
||||
|
||||
|
||||
void nr_ue_process_mac_pdu(
|
||||
|
||||
Reference in New Issue
Block a user