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split phy_procedures_eNB_TX into sub-modules for better understanding. No functional differences.

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This commit is contained in:
Raymond Knopp
2016-05-15 14:10:04 -07:00
parent e2c3222802
commit d3d423f51e
19 changed files with 1440 additions and 1570 deletions
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openair1/PHY/LTE_TRANSPORT/defs.h
+3 -1
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@@ -726,7 +726,9 @@ typedef enum {format0,
format2B,
format2C,
format2D,
format3
format3,
format3A,
format4
} DCI_format_t;
typedef enum {
openair1/PHY/LTE_TRANSPORT/prach.c
+1 -1
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@@ -638,7 +638,7 @@ int32_t generate_prach( PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id, uint8_t subfra
prach_start = ((subframe*phy_vars_ue->lte_frame_parms.samples_per_tti)<<1)-phy_vars_ue->N_TA_offset;
#else
#if defined(EXMIMO) || defined(OAI_USRP)
prach_start = (phy_vars_ue->rx_offset+subframe*phy_vars_ue->lte_frame_parms.samples_per_tti-openair_daq_vars.timing_advance-phy_vars_ue->N_TA_offset);
prach_start = (phy_vars_ue->rx_offset+subframe*phy_vars_ue->lte_frame_parms.samples_per_tti-phy_vars_ue->hw_timing_advance-phy_vars_ue->N_TA_offset);
if (prach_start<0)
prach_start+=(phy_vars_ue->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
openair1/PHY/LTE_TRANSPORT/print_stats.c
+2 -2
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@@ -102,7 +102,7 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t
len += sprintf(&buffer[len], "[UE PROC] RX Gain %d dB\n",phy_vars_ue->rx_total_gain_dB);
#endif
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
len += sprintf(&buffer[len], "[UE_PROC] Frequency offset %d Hz (%d), estimated carrier frequency %f Hz\n",phy_vars_ue->lte_ue_common_vars.freq_offset,openair_daq_vars.freq_offset,openair0_cfg[0].rx_freq[0]-phy_vars_ue->lte_ue_common_vars.freq_offset);
len += sprintf(&buffer[len], "[UE_PROC] Frequency offset %d Hz, estimated carrier frequency %f Hz\n",phy_vars_ue->lte_ue_common_vars.freq_offset,openair0_cfg[0].rx_freq[0]-phy_vars_ue->lte_ue_common_vars.freq_offset);
#endif
len += sprintf(&buffer[len], "[UE PROC] UE mode = %s (%d)\n",mode_string[phy_vars_ue->UE_mode[0]],phy_vars_ue->UE_mode[0]);
len += sprintf(&buffer[len], "[UE PROC] timing_advance = %d\n",phy_vars_ue->timing_advance);
@@ -529,7 +529,7 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t
#endif
len += sprintf(&buffer[len], "[UE PROC] DLSCH Bitrate %dkbps\n",(phy_vars_ue->bitrate[0]/1000));
len += sprintf(&buffer[len], "[UE PROC] Total Received Bits %dkbits\n",(phy_vars_ue->total_received_bits[0]/1000));
len += sprintf(&buffer[len], "[UE PROC] IA receiver %d\n",openair_daq_vars.use_ia_receiver);
len += sprintf(&buffer[len], "[UE PROC] IA receiver %d\n",phy_vars_ue->use_ia_receiver);
}
openair1/PHY/TOOLS/lte_phy_scope.c
+2 -2
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@@ -47,11 +47,11 @@ static void ia_receiver_on_off( FL_OBJECT *button, long arg)
if (fl_get_button(button)) {
fl_set_object_label(button, "IA Receiver ON");
openair_daq_vars.use_ia_receiver = 1;
// PHY_vars_UE_g[0][0]->use_ia_receiver = 1;
fl_set_object_color(button, FL_GREEN, FL_GREEN);
} else {
fl_set_object_label(button, "IA Receiver OFF");
openair_daq_vars.use_ia_receiver = 0;
// PHY_vars_UE_g[0][0]->use_ia_receiver = 0;
fl_set_object_color(button, FL_RED, FL_RED);
}
}
openair1/PHY/TOOLS/lte_phy_scope.h
-1
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@@ -37,7 +37,6 @@
#include "../defs.h"
#include "../../SCHED/defs.h" // for OPENAIR_DAQ_VARS
extern OPENAIR_DAQ_VARS openair_daq_vars;
/* Forms and Objects */
typedef struct {
openair1/PHY/defs.h
+14
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@@ -330,6 +330,15 @@ typedef struct PHY_VARS_eNB_s {
MU_MIMO_mode mu_mimo_mode[NUMBER_OF_UE_MAX];
/// target_ue_dl_mcs : only for debug purposes
uint32_t target_ue_dl_mcs;
/// target_ue_ul_mcs : only for debug purposes
uint32_t target_ue_ul_mcs;
/// target_ue_dl_rballoc : only for debug purposes
uint32_t ue_dl_rb_alloc;
/// target ul PRBs : only for debug
uint32_t ue_ul_nb_rb;
///check for Total Transmissions
uint32_t check_for_total_transmissions;
@@ -347,6 +356,8 @@ typedef struct PHY_VARS_eNB_s {
uint32_t total_transmitted_bits;
uint32_t total_system_throughput;
int hw_timing_advance;
time_stats_t phy_proc;
time_stats_t phy_proc_tx;
time_stats_t phy_proc_rx;
@@ -577,6 +588,7 @@ typedef struct {
// uint8_t prach_timer;
int rx_offset; /// Timing offset
int timing_advance; ///timing advance signalled from eNB
int hw_timing_advance;
int N_TA_offset; ///timing offset used in TDD
/// Flag to tell if UE is secondary user (cognitive mode)
unsigned char is_secondary_ue;
@@ -645,6 +657,8 @@ typedef struct {
time_stats_t phy_proc_tx;
time_stats_t phy_proc_rx;
uint32_t use_ia_receiver;
time_stats_t ofdm_mod_stats;
time_stats_t ulsch_encoding_stats;
time_stats_t ulsch_modulation_stats;
openair1/SCHED/defs.h
+2 -1
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@@ -86,7 +86,7 @@ enum openair_SYNCH_STATUS {
#define DAQ_AGC_OFF 0
/*
typedef struct {
boolean_t is_eNB;
uint8_t mode;
@@ -133,6 +133,7 @@ typedef struct {
uint32_t get_frame_done;
uint32_t use_ia_receiver;
} OPENAIR_DAQ_VARS;
*/
#ifndef USER_MODE
int32_t openair_sched_init(void);
openair1/SCHED/extern.h
-1
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@@ -75,7 +75,6 @@ extern int openair_sched_status;
extern int synch_wait_cnt;
extern OPENAIR_DAQ_VARS openair_daq_vars;
extern int16_t hundred_times_delta_TF[100];
extern uint16_t hundred_times_log10_NPRB[100];
openair1/SCHED/phy_mac_stub.c
+33 -33
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@@ -234,7 +234,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
@@ -253,7 +253,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
@@ -265,7 +265,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
@@ -284,7 +284,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
@@ -301,7 +301,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
@@ -320,7 +320,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
@@ -332,7 +332,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
@@ -351,7 +351,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
@@ -367,7 +367,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
@@ -386,7 +386,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
@@ -398,7 +398,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
@@ -417,7 +417,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = phy_vars_eNB->target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
@@ -438,14 +438,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = phy_vars_eNB->target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = phy_vars_eNB->target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = phy_vars_eNB->ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
} else if (transmission_mode==5) {
@@ -462,13 +462,13 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu1E.mcs = phy_vars_eNB->target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rballoc = phy_vars_eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
@@ -479,7 +479,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
//DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = phy_vars_eNB->target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28);
@@ -531,8 +531,8 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,2,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.rballoc = computeRIV(25,2,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
@@ -551,10 +551,10 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.rballoc = computeRIV(25,2+phy_vars_eNB->ue_ul_nb_rb,phy_vars_eNB->ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.rballoc = computeRIV(25,0,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
@@ -611,11 +611,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu.rballoc = phy_vars_eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.mcs = phy_vars_eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
@@ -632,7 +632,7 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.mcs = phy_vars_eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
@@ -649,11 +649,11 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = 1;
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu1E.mcs = phy_vars_eNB->target_ue_dl_mcs;
DLSCH_alloc_pdu1E.harq_pid = 1;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rballoc = phy_vars_eNB->ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
@@ -705,8 +705,8 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.rballoc = computeRIV(25,0,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
@@ -725,10 +725,10 @@ void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eN
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.rballoc = computeRIV(25,2+phy_vars_eNB->ue_ul_nb_rb,phy_vars_eNB->ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.rballoc = computeRIV(25,0,phy_vars_eNB->ue_ul_nb_rb);
UL_alloc_pdu.mcs = phy_vars_eNB->target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
openair1/SCHED/phy_procedures_lte_eNb.c
+1324 -1419
View File
File diff suppressed because it is too large Load Diff
openair1/SCHED/phy_procedures_lte_ue.c
+17 -54
View File
@@ -115,7 +115,7 @@ extern int rx_sig_fifo;
extern uint32_t downlink_frequency[MAX_NUM_CCs][4];
#endif
#ifdef USER_MODE
void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid)
{
@@ -286,7 +286,7 @@ void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe)
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_mag0,300*nsymb,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1);
}
#endif
void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
@@ -367,13 +367,11 @@ void process_timing_advance_rar(PHY_VARS_UE *phy_vars_ue,uint16_t timing_advance
timing_advance = timing_advance - (1<<11);
*/
if (openair_daq_vars.manual_timing_advance == 0) {
phy_vars_ue->timing_advance = timing_advance*4;
phy_vars_ue->timing_advance = timing_advance*4;
}
#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, received (rar) timing_advance %d, HW timing advance %d\n",phy_vars_ue->Mod_id,phy_vars_ue->frame_rx, phy_vars_ue->timing_advance,openair_daq_vars.timing_advance);
LOG_I(PHY,"[UE %d] Frame %d, received (rar) timing_advance %d, HW timing advance %d\n",phy_vars_ue->Mod_id,phy_vars_ue->frame_rx, phy_vars_ue->timing_advance);
#endif
}
@@ -386,11 +384,8 @@ void process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance)
// timing advance has Q1.5 format
timing_advance = timing_advance - 31;
if (openair_daq_vars.manual_timing_advance == 0) {
//if ( (frame % 100) == 0) {
//if ((timing_advance > 3) || (timing_advance < -3) )
PHY_vars_UE_g[Mod_id][CC_id]->timing_advance = PHY_vars_UE_g[Mod_id][CC_id]->timing_advance+timing_advance*4; //this is for 25RB only!!!
}
PHY_vars_UE_g[Mod_id][CC_id]->timing_advance = PHY_vars_UE_g[Mod_id][CC_id]->timing_advance+timing_advance*4; //this is for 25RB only!!!
LOG_I(PHY,"[UE %d] Got timing advance %d from MAC, new value %d\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
@@ -1223,7 +1218,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)//this is the EXPRESS MIMO case
ulsch_start = (phy_vars_ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-
openair_daq_vars.timing_advance-
phy_vars_ue->hw_timing_advance-
phy_vars_ue->timing_advance-
phy_vars_ue->N_TA_offset+5)%(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti);
#else //this is the normal case
@@ -1234,7 +1229,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
Mod_id,frame_tx,subframe_tx,
ulsch_start,
phy_vars_ue->rx_offset,
openair_daq_vars.timing_advance,
phy_vars_ue->hw_timing_advance,
phy_vars_ue->timing_advance,
phy_vars_ue->N_TA_offset);
@@ -1525,14 +1520,7 @@ void lte_ue_measurement_procedures(uint16_t l, PHY_VARS_UE *phy_vars_ue,uint8_t
// AGC
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL, VCD_FUNCTION_IN);
#if defined EXMIMO
if ((openair_daq_vars.rx_gain_mode == DAQ_AGC_ON) &&
(mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) )
if (phy_vars_ue->frame_rx%100==0)
gain_control_all(dB_fixed(phy_vars_ue->PHY_measurements.rssi),0);
#else
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
@@ -1540,7 +1528,7 @@ void lte_ue_measurement_procedures(uint16_t l, PHY_VARS_UE *phy_vars_ue,uint8_t
#endif
#endif
#endif
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL, VCD_FUNCTION_OUT);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_IN);
eNB_id = 0;
@@ -1554,29 +1542,6 @@ void lte_ue_measurement_procedures(uint16_t l, PHY_VARS_UE *phy_vars_ue,uint8_t
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_OUT);
/* if (openair_daq_vars.auto_freq_correction == 1) {
if (frame_rx % 100 == 0) {
if ((phy_vars_ue->lte_ue_common_vars.freq_offset>100) && (openair_daq_vars.freq_offset < 1000)) {
openair_daq_vars.freq_offset+=100;
#if defined(EXMIMO) && defined(DRIVER2013)
for (aa = 0; aa<4; aa++) {
p_exmimo_config->rf.rf_freq_rx[aa] = downlink_frequency[aa]+=openair_daq_vars.freq_offset;
p_exmimo_config->rf.rf_freq_tx[aa] = downlink_frequency[aa]+=openair_daq_vars.freq_offset;
}
#endif
}
else if ((phy_vars_ue->lte_ue_common_vars.freq_offset<-100) && (openair_daq_vars.freq_offset > -1000)) {
openair_daq_vars.freq_offset-=100;
#if defined(EXMIMO) && defined(DRIVER2013)
for (aa = 0; aa<4; aa++) {
p_exmimo_config->rf.rf_freq_rx[aa] = downlink_frequency[aa]+=openair_daq_vars.freq_offset;
p_exmimo_config->rf.rf_freq_tx[aa] = downlink_frequency[aa]+=openair_daq_vars.freq_offset;
}
#endif
}
}
}*/
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_MEASUREMENT_PROCEDURES, VCD_FUNCTION_OUT);
@@ -1681,9 +1646,7 @@ void restart_phy(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_fla
// first_run = 1;
if (abstraction_flag ==0 ) {
openair_daq_vars.mode = openair_NOT_SYNCHED;
phy_vars_ue->UE_mode[eNB_id] = NOT_SYNCHED;
openair_daq_vars.sync_state=0;
} else {
phy_vars_ue->UE_mode[eNB_id] = PRACH;
phy_vars_ue->prach_resources[eNB_id]=NULL;
@@ -1691,8 +1654,8 @@ void restart_phy(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_fla
phy_vars_ue->frame_rx = -1;
phy_vars_ue->frame_tx = -1;
openair_daq_vars.synch_wait_cnt=0;
openair_daq_vars.sched_cnt=-1;
// phy_vars_ue->synch_wait_cnt=0;
// phy_vars_ue->sched_cnt=-1;
phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors_conseq=0;
phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors=0;
@@ -2564,7 +2527,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
if ((phy_vars_ue->transmission_mode[eNB_id] == 5) &&
(phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->dl_power_off==0) &&
(openair_daq_vars.use_ia_receiver ==1)) {
(phy_vars_ue->use_ia_receiver ==1)) {
dual_stream_UE = 1;
eNB_id_i = phy_vars_ue->n_connected_eNB;
i_mod = phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->Qm;
@@ -2975,9 +2938,9 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
if (ret == (1+phy_vars_ue->dlsch_ue_ra[eNB_id]->max_turbo_iterations)) {
phy_vars_ue->dlsch_ra_errors[eNB_id]++;
LOG_D(PHY,"[UE %d] Frame %d, subframe %d, received RA in error\n",phy_vars_ue->Mod_id,frame_rx,subframe_prev);
#ifdef USER_MODE
//dump_dlsch_ra(phy_vars_ue,eNB_id,subframe_prev);
#endif
// dump_dlsch_ra(phy_vars_ue,eNB_id,subframe_prev); exit(-1);
// oai_exit=1;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_OUT);
stop_meas(&phy_vars_ue->phy_proc_rx);
@@ -3107,7 +3070,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
if ((phy_vars_ue->transmission_mode[eNB_id] == 5) &&
(phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->dl_power_off==0) &&
(openair_daq_vars.use_ia_receiver ==1)) {
(phy_vars_ue->use_ia_receiver ==1)) {
dual_stream_UE = 1;
eNB_id_i = phy_vars_ue->n_connected_eNB;
i_mod = phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->Qm;
@@ -3176,7 +3139,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
if ((phy_vars_ue->transmission_mode[eNB_id] == 5) &&
(phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->dl_power_off==0) &&
(openair_daq_vars.use_ia_receiver ==1)) {
(phy_vars_ue->use_ia_receiver ==1)) {
dual_stream_UE = 1;
eNB_id_i = phy_vars_ue->n_connected_eNB;
i_mod = phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->Qm;
openair1/SCHED/vars.h
-1
View File
@@ -28,7 +28,6 @@
*******************************************************************************/
#include "defs.h"
OPENAIR_DAQ_VARS openair_daq_vars;
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+1 -9
View File
@@ -569,17 +569,9 @@ schedule_ue_spec(
eNB_UE_stats->DL_cqi[0], MIN_CQI_VALUE, MAX_CQI_VALUE);
*/
eNB_UE_stats->dlsch_mcs1 = cqi_to_mcs[eNB_UE_stats->DL_cqi[0]];
eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
eNB_UE_stats->dlsch_mcs1 = eNB_UE_stats->dlsch_mcs1;//cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
#ifdef EXMIMO
if (mac_xface->get_transmission_mode(module_idP,CC_id, rnti)==5) {
eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1,16);
}
#endif
// store stats
UE_list->eNB_UE_stats[CC_id][UE_id].dl_cqi= eNB_UE_stats->DL_cqi[0];
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+4 -4
View File
@@ -826,14 +826,14 @@ void schedule_ulsch_rnti(module_id_t module_idP,
UE_list->eNB_UE_stats[CC_id][UE_id].normalized_rx_power=normalized_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].target_rx_power=target_rx_power;
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs1=UE_template->pre_assigned_mcs_ul;
mcs = cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
mcs = UE_template->pre_assigned_mcs_ul;//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
if ((cqi_req==1) && (mcs>19)) {
mcs=19;
}
if (UE_template->pre_allocated_rb_table_index_ul >=0) {
rb_table_index=UE_template->pre_allocated_rb_table_index_ul;
} else {
mcs=cmin (10, openair_daq_vars.target_ue_ul_mcs);
mcs=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs);
rb_table_index=5; // for PHR
}
@@ -1171,7 +1171,7 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
required_rbs[cba_group] = 0;
num_cba_resources[cba_group]=0;
active_UEs[cba_group]=0;
mcs[cba_group]=openair_daq_vars.target_ue_ul_mcs;
mcs[cba_group]=10;//openair_daq_vars.target_ue_ul_mcs;
}
//LOG_D(MAC, "[eNB ] CBA granted ues are %d\n",granted_UEs );
@@ -1219,7 +1219,7 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
}
}
mcs[cba_group]= cmin(mcs[cba_group],openair_daq_vars.target_ue_ul_mcs);
mcs[cba_group]= mcs[cba_group];//cmin(mcs[cba_group],openair_daq_vars.target_ue_ul_mcs);
if (available_rbs < min_rb_unit )
break;
openair2/LAYER2/MAC/pre_processor.c
+1 -1
View File
@@ -178,7 +178,7 @@ void assign_rbs_required (module_id_t Mod_id,
*/
eNB_UE_stats[CC_id]->dlsch_mcs1=cqi_to_mcs[eNB_UE_stats[CC_id]->DL_cqi[0]];
eNB_UE_stats[CC_id]->dlsch_mcs1 = cmin(eNB_UE_stats[CC_id]->dlsch_mcs1,openair_daq_vars.target_ue_dl_mcs);
eNB_UE_stats[CC_id]->dlsch_mcs1 = eNB_UE_stats[CC_id]->dlsch_mcs1;//cmin(eNB_UE_stats[CC_id]->dlsch_mcs1,openair_daq_vars.target_ue_dl_mcs);
}
targets/RT/USER/lte-softmodem.c
+22 -27
View File
@@ -114,15 +114,14 @@ unsigned short config_frames[4] = {2,9,11,13};
#endif
// In lte-enb.c
int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_cfg, openair0_rf_map rf_map[MAX_NUM_CCs]);
extern int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_cfg, openair0_rf_map rf_map[MAX_NUM_CCs]);
extern void init_eNB(void);
extern void stop_eNB(void);
extern void kill_eNB_proc(void);
// In lte-ue.c
int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg, openair0_rf_map rf_map[MAX_NUM_CCs]);
void fill_ue_band_info(void);
extern int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg, openair0_rf_map rf_map[MAX_NUM_CCs]);
extern void fill_ue_band_info(void);
extern void init_UE(void);
#ifdef XFORMS
@@ -1139,6 +1138,7 @@ int main( int argc, char **argv )
memset(tx_max_power,0,sizeof(int)*MAX_NUM_CCs);
set_latency_target();
// det defaults
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms[CC_id] = (LTE_DL_FRAME_PARMS*) malloc(sizeof(LTE_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
@@ -1342,7 +1342,7 @@ int main( int argc, char **argv )
else
UE[CC_id]->mac_enabled = 1;
if (UE[CC_id]->mac_enabled == 0) {
if (UE[CC_id]->mac_enabled == 0) { //set default UL parameters for testing mode
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
@@ -1373,13 +1373,6 @@ int main( int argc, char **argv )
}
openair_daq_vars.manual_timing_advance = 0;
openair_daq_vars.rx_gain_mode = DAQ_AGC_ON;
openair_daq_vars.auto_freq_correction = 0;
openair_daq_vars.use_ia_receiver = 0;
// printf("tx_max_power = %d -> amp %d\n",tx_max_power,get_tx_amp(tx_max_power,tx_max_power));
} else {
//this is eNB
@@ -1390,12 +1383,10 @@ int main( int argc, char **argv )
PHY_vars_eNB_g[0][CC_id] = init_lte_eNB(frame_parms[CC_id],0,frame_parms[CC_id]->Nid_cell,cooperation_flag,transmission_mode,abstraction_flag);
PHY_vars_eNB_g[0][CC_id]->CC_id = CC_id;
if (phy_test==1)
PHY_vars_eNB_g[0][CC_id]->mac_enabled = 0;
else
PHY_vars_eNB_g[0][CC_id]->mac_enabled = 1;
if (phy_test==1) PHY_vars_eNB_g[0][CC_id]->mac_enabled = 0;
else PHY_vars_eNB_g[0][CC_id]->mac_enabled = 1;
if (PHY_vars_eNB_g[0][CC_id]->mac_enabled == 0) {
if (PHY_vars_eNB_g[0][CC_id]->mac_enabled == 0) { //set default parameters for testing mode
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
@@ -1413,7 +1404,6 @@ int main( int argc, char **argv )
PHY_vars_eNB_g[0][CC_id]->rx_total_gain_eNB_dB = (int)rx_gain[CC_id][0];
//already taken care of in lte-softmodem.c
PHY_vars_eNB_g[0][CC_id]->N_TA_offset = 0;
}
@@ -1422,11 +1412,6 @@ int main( int argc, char **argv )
NB_eNB_INST=1;
NB_INST=1;
openair_daq_vars.ue_dl_rb_alloc=0x1fff;
openair_daq_vars.target_ue_dl_mcs=target_dl_mcs;
openair_daq_vars.ue_ul_nb_rb=6;
openair_daq_vars.target_ue_ul_mcs=target_ul_mcs;
}
fill_modeled_runtime_table(runtime_phy_rx,runtime_phy_tx);
@@ -1644,11 +1629,16 @@ int main( int argc, char **argv )
// connect the TX/RX buffers
if (UE_flag==1) {
for (CC_id=0;CC_id<MAX_NUM_CCs; CC_id++) {
#ifdef OAI_USRP
openair_daq_vars.timing_advance = timing_advance;
UE[CC_id]->hw_timing_advance = timing_advance;
#else
openair_daq_vars.timing_advance = 160;
UE[CC_id]->hw_timing_advance = 160;
#endif
}
if (setup_ue_buffers(UE,&openair0_cfg[0],rf_map)!=0) {
printf("Error setting up eNB buffer\n");
exit(-1);
@@ -1673,7 +1663,8 @@ int main( int argc, char **argv )
}
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
} else {
openair_daq_vars.timing_advance = 0;
if (setup_eNB_buffers(PHY_vars_eNB_g[0],&openair0_cfg[0],rf_map)!=0) {
printf("Error setting up eNB buffer\n");
@@ -1684,6 +1675,7 @@ int main( int argc, char **argv )
// Set LSBs for antenna switch (ExpressMIMO)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
PHY_vars_eNB_g[0][CC_id]->hw_timing_advance = 0;
for (i=0; i<frame_parms[CC_id]->samples_per_tti*10; i++)
for (aa=0; aa<frame_parms[CC_id]->nb_antennas_tx; aa++)
PHY_vars_eNB_g[0][CC_id]->lte_eNB_common_vars.txdata[0][aa][i] = 0x00010001;
@@ -1730,13 +1722,16 @@ int main( int argc, char **argv )
sprintf (title, "LTE DL SCOPE UE");
fl_show_form (form_ue[UE_id]->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
/*
if (openair_daq_vars.use_ia_receiver) {
fl_set_button(form_ue[UE_id]->button_0,1);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver ON");
} else {
fl_set_button(form_ue[UE_id]->button_0,0);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver OFF");
}
}*/
fl_set_button(form_ue[UE_id]->button_0,0);
fl_set_object_label(form_ue[UE_id]->button_0, "IA Receiver OFF");
}
ret = pthread_create(&forms_thread, NULL, scope_thread, NULL);
targets/RT/USER/lte-ue.c
+2 -2
View File
@@ -1622,7 +1622,7 @@ int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg,
return(-1);
}
/*
if (frame_parms->frame_type == TDD) {
if (frame_parms->N_RB_DL == 100)
N_TA_offset = 624;
@@ -1631,7 +1631,7 @@ int setup_ue_buffers(PHY_VARS_UE **phy_vars_ue, openair0_config_t *openair0_cfg,
else if (frame_parms->N_RB_DL == 25)
N_TA_offset = 624/4;
}
*/
// replace RX signal buffers with mmaped HW versions
rxdata = (int32_t**)malloc16( frame_parms->nb_antennas_rx*sizeof(int32_t*) );
targets/SIMU/USER/oaisim.c
+1 -1
View File
@@ -500,7 +500,7 @@ l2l1_task (void *args_p)
sprintf (title, "LTE DL SCOPE eNB %d to UE %d CC_id %d", eNB_inst, UE_inst, CC_id);
fl_show_form (form_ue[CC_id][UE_inst]->lte_phy_scope_ue, FL_PLACE_HOTSPOT, FL_FULLBORDER, title);
if (openair_daq_vars.use_ia_receiver == 1) {
if (PHY_vars_UE_g[UE_inst][CC_id]->use_ia_receiver == 1) {
fl_set_button(form_ue[CC_id][UE_inst]->button_0,1);
fl_set_object_label(form_ue[CC_id][UE_inst]->button_0, "IA Receiver ON");
fl_set_object_color(form_ue[CC_id][UE_inst]->button_0, FL_GREEN, FL_GREEN);
targets/SIMU/USER/oaisim_functions.c
+11 -10
View File
@@ -951,22 +951,23 @@ void init_openair1(void)
number_of_cards = 1;
openair_daq_vars.rx_rf_mode = 1;
openair_daq_vars.tdd = 1;
openair_daq_vars.rx_gain_mode = DAQ_AGC_ON;
// openair_daq_vars.rx_rf_mode = 1;
// openair_daq_vars.tdd = 1;
// openair_daq_vars.rx_gain_mode = DAQ_AGC_ON;
openair_daq_vars.dlsch_transmission_mode = oai_emulation.info.transmission_mode[0];
// openair_daq_vars.dlsch_transmission_mode = oai_emulation.info.transmission_mode[0];
//#warning "NN->FK: OAI EMU channel abstraction does not work for MCS higher than"
openair_daq_vars.target_ue_dl_mcs = cmin(target_dl_mcs,16);
openair_daq_vars.target_ue_ul_mcs = target_ul_mcs;
openair_daq_vars.ue_dl_rb_alloc=0x1fff;
openair_daq_vars.ue_ul_nb_rb=6;
openair_daq_vars.dlsch_rate_adaptation = rate_adaptation_flag;
openair_daq_vars.use_ia_receiver = 0;
// openair_daq_vars.target_ue_dl_mcs = cmin(target_dl_mcs,16);
// openair_daq_vars.target_ue_ul_mcs = target_ul_mcs;
// openair_daq_vars.ue_dl_rb_alloc=0x1fff;
// openair_daq_vars.ue_ul_nb_rb=6;
// openair_daq_vars.dlsch_rate_adaptation = rate_adaptation_flag;
//N_TA_offset
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
for (UE_id=0; UE_id<NB_UE_INST; UE_id++) {
PHY_vars_UE_g[UE_id][CC_id]->use_ia_receiver = 0;
if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.frame_type == TDD) {
if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.N_RB_DL == 100)
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 624;