pf_dl(): refactor NR_pdsch_sched usage
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@@ -759,33 +759,28 @@ static void pf_dl(module_id_t module_id,
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continue;
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}
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NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
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sched_pdsch->dl_harq_pid = sched_ctrl->available_dl_harq.head;
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/* MCS has been set above */
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sched_pdsch->time_domain_allocation = get_dl_tda(mac, slot);
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AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
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int tda = get_dl_tda(mac, slot);
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AssertFatal(tda >= 0,"Unable to find PDSCH time domain allocation in list\n");
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const int coresetid = sched_ctrl->coreset->controlResourceSetId;
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sched_pdsch->tda_info = get_dl_tda_info(dl_bwp,
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NR_tda_info_t tda_info = get_dl_tda_info(dl_bwp,
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sched_ctrl->search_space->searchSpaceType->present,
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sched_pdsch->time_domain_allocation,
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tda,
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scc->dmrs_TypeA_Position,
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1,
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TYPE_C_RNTI_,
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coresetid,
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false);
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AssertFatal(sched_pdsch->tda_info.valid_tda, "Invalid TDA from get_dl_tda_info\n");
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AssertFatal(tda_info.valid_tda, "Invalid TDA from get_dl_tda_info\n");
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NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
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const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
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const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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uint16_t *rballoc_mask = mac->common_channels[CC_id].vrb_map[beam.idx];
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sched_pdsch->bwp_info = get_pdsch_bwp_start_size(mac, iterator->UE);
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bwp_info_t bwp_info = get_pdsch_bwp_start_size(mac, iterator->UE);
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int rbStart = 0; // WRT BWP start
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int rbStop = sched_pdsch->bwp_info.bwpSize - 1;
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int bwp_start = sched_pdsch->bwp_info.bwpStart;
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int rbStop = bwp_info.bwpSize - 1;
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int bwp_start = bwp_info.bwpStart;
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// Freq-demain allocation
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while (rbStart < rbStop && (rballoc_mask[rbStart + bwp_start] & slbitmap))
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rbStart++;
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@@ -831,7 +826,7 @@ static void pf_dl(module_id_t module_id,
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* allocation after CCE alloc fail would be more complex) */
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int alloc = -1;
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if (!get_FeedbackDisabled(iterator->UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, sched_pdsch->dl_harq_pid)) {
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if (!get_FeedbackDisabled(iterator->UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, sched_ctrl->available_dl_harq.head)) {
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int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, ul_bwp->pucch_Config, CCEIndex);
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alloc = nr_acknack_scheduling(mac, iterator->UE, frame, slot, iterator->UE->UE_beam_index, r_pucch, 0);
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if (alloc < 0) {
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@@ -846,40 +841,48 @@ static void pf_dl(module_id_t module_id,
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fill_pdcch_vrb_map(mac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, beam.idx);
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int l = get_dl_nrOfLayers(sched_ctrl, dl_bwp->dci_format);
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sched_pdsch->nrOfLayers = l;
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sched_pdsch->mcs = iterator->selected_mcs;
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sched_pdsch->pm_index = get_pm_index(mac, iterator->UE, dl_bwp->dci_format, l, mac->radio_config.pdsch_AntennaPorts.XP);
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sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, tda_info, sched_pdsch->nrOfLayers);
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sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
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sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
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sched_pdsch->pucch_allocation = alloc;
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uint32_t TBS = 0;
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uint16_t rbSize;
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NR_sched_pdsch_t sched_pdsch = {
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// rbSize below
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.rbStart = rbStart,
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.mcs = iterator->selected_mcs,
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.R = nr_get_code_rate_dl(iterator->selected_mcs, dl_bwp->mcsTableIdx),
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.Qm = nr_get_Qm_dl(iterator->selected_mcs, dl_bwp->mcsTableIdx),
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// tb_size below
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.dl_harq_pid = sched_ctrl->available_dl_harq.head,
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.pucch_allocation = alloc,
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.pm_index = get_pm_index(mac, iterator->UE, dl_bwp->dci_format, l, mac->radio_config.pdsch_AntennaPorts.XP),
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.nrOfLayers = l,
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.bwp_info = bwp_info,
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.dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, l),
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.time_domain_allocation = tda,
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.tda_info = tda_info,
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};
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// Fix me: currently, the RLC does not give us the total number of PDUs
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// awaiting. Therefore, for the time being, we put a fixed overhead of 12
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// (for 4 PDUs) and optionally + 2 for TA. Once RLC gives the number of
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// PDUs, we replace with 3 * numPDUs
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const int oh = 3 * 4 + 2 * (frame == (sched_ctrl->ta_frame + 100) % 1024);
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//const int oh = 3 * sched_ctrl->dl_pdus_total + 2 * (frame == (sched_ctrl->ta_frame + 100) % 1024);
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nr_find_nb_rb(sched_pdsch->Qm,
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sched_pdsch->R,
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nr_find_nb_rb(sched_pdsch.Qm,
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sched_pdsch.R,
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1, // no transform precoding for DL
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sched_pdsch->nrOfLayers,
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tda_info->nrOfSymbols,
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sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
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sched_pdsch.nrOfLayers,
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tda_info.nrOfSymbols,
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sched_pdsch.dmrs_parms.N_PRB_DMRS * sched_pdsch.dmrs_parms.N_DMRS_SLOT,
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sched_ctrl->num_total_bytes + oh,
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min_rbSize,
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max_rbSize,
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&TBS,
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&rbSize);
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sched_pdsch->rbSize = rbSize;
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sched_pdsch->rbStart = rbStart;
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sched_pdsch->tb_size = TBS;
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/* transmissions: directly allocate */
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n_rb_sched[beam.idx] -= sched_pdsch->rbSize;
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&sched_pdsch.tb_size,
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&sched_pdsch.rbSize);
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for (int rb = bwp_start; rb < sched_pdsch->rbSize; rb++)
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rballoc_mask[rb + sched_pdsch->rbStart] |= slbitmap;
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sched_ctrl->sched_pdsch = sched_pdsch;
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/* transmissions: directly allocate */
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n_rb_sched[beam.idx] -= sched_pdsch.rbSize;
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for (int rb = bwp_start; rb < sched_pdsch.rbSize; rb++)
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rballoc_mask[rb + sched_pdsch.rbStart] |= slbitmap;
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remainUEs[beam.idx]--;
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iterator++;
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