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Fix for dlsch issue on caracal

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1. Reducing rx gain at UE. Existing gain seems to saturate the receiver with full bw allocaiton.
2. Setting different dlsch bitmap for phytest mode.
This commit is contained in:
Sakthivel Velumani
2021-02-01 13:47:45 +01:00
parent a25309363a
commit d973db9273
2 changed files with 5 additions and 2 deletions
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ci-scripts/xml_files/gnb_nr_ue_usrp_run.xml
+1 -1
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@@ -52,7 +52,7 @@
<testCase id="090102">
<class>Initialize_OAI_UE</class>
<desc>Initialize NR UE USRP</desc>
<Initialize_OAI_UE_args>--phy-test --usrp-args "addr=192.168.30.2,second_addr=192.168.50.2,clock_source=external,time_source=external" --ue-rxgain 75 --rrc_config_path .</Initialize_OAI_UE_args>
<Initialize_OAI_UE_args>--phy-test --usrp-args "addr=192.168.30.2,second_addr=192.168.50.2,clock_source=external,time_source=external" --ue-rxgain 50 --rrc_config_path .</Initialize_OAI_UE_args>
<air_interface>NR</air_interface>
</testCase>