Correct slot calculation in nr_acknack_scheduling()
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@@ -1598,11 +1598,11 @@ int nr_acknack_scheduling(int mod_id,
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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// initializing the values for FDD
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int nr_slots_period = n_slots_frame;
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int first_ul_slot_tdd = slot + minfbtime;
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int next_ul_slot = slot + minfbtime;
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int first_ul_slot_period = 0;
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if(tdd){
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nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
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first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
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next_ul_slot = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
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first_ul_slot_period = tdd->nrofDownlinkSlots;
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}
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else
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@@ -1746,8 +1746,8 @@ int nr_acknack_scheduling(int mod_id,
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AssertFatal(pucch->sr_flag + pucch->dai_c == 0,
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"expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n",
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UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot);
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const int s = first_ul_slot_tdd;
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pucch->frame = (s < n_slots_frame - 1) ? frame : (frame + 1) % 1024;
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const int s = next_ul_slot;
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pucch->frame = s < n_slots_frame ? frame : (frame + 1) % 1024;
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pucch->ul_slot = s % n_slots_frame;
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}
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