rearrangement of handle_uci function for acknack
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@@ -348,93 +348,98 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
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return offset;
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}
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void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10) {
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void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
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nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
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NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats) {
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// TODO
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int max_harq_rounds = 4; // TODO define macro
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int num_ucis = UL_info->uci_ind.num_ucis;
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nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
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for (int i = 0; i < num_ucis; i++) {
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switch (uci_list[i].pdu_type) {
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case NFAPI_NR_UCI_PUSCH_PDU_TYPE: break;
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if (uci_01 != NULL) {
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// handle harq
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int harq_idx_s = 0;
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case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
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// handle harq
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int harq_idx_s = 0;
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// tpc (power control)
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sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
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// iterate over received harq bits
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for (int harq_bit = 0; harq_bit < uci_pdu->harq->num_harq; harq_bit++) {
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// search for the right harq process
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for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) {
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// if the gNB received ack with a good confidence
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if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
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if ((uci_pdu->harq->harq_list[harq_bit].harq_value == 1) &&
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(uci_pdu->harq->harq_confidence_level == 0)) {
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// toggle NDI and reset round
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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else
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sched_ctrl->harq_processes[harq_idx].round++;
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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harq_idx_s = harq_idx + 1;
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// if the max harq rounds was reached
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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stats->dlsch_errors++;
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}
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break;
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}
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// if feedback slot processing is aborted
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else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
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(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
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sched_ctrl->harq_processes[harq_idx].round++;
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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}
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// iterate over received harq bits
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for (int harq_bit = 0; harq_bit < uci_01->harq->num_harq; harq_bit++) {
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// search for the right harq process
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for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) {
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// if the gNB received ack with a good confidence
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if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
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if ((uci_01->harq->harq_list[harq_bit].harq_value == 1) &&
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(uci_01->harq->harq_confidence_level == 0)) {
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// toggle NDI and reset round
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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}
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break;
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}
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case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
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nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
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int harq_idx_s = 0;
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int acknack;
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// tpc (power control)
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sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
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// iterate over received harq bits
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for (int harq_bit = 0; harq_bit < uci_pdu->harq.harq_bit_len; harq_bit++) {
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acknack = ((uci_pdu->harq.harq_payload[harq_bit>>3])>>harq_bit)&0x01;
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for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) {
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// if the gNB received ack with a good confidence or if the max harq rounds was reached
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if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
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// TODO add some confidence level for when there is no CRC
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if (((uci_pdu->harq.harq_crc != 1) && acknack) ||
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(sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds)) {
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// toggle NDI and reset round
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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else
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sched_ctrl->harq_processes[harq_idx].round++;
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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harq_idx_s = harq_idx + 1;
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break;
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}
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else
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sched_ctrl->harq_processes[harq_idx].round++;
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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harq_idx_s = harq_idx + 1;
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// if the max harq rounds was reached
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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stats->dlsch_errors++;
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}
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break;
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}
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// if feedback slot processing is aborted
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else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
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(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
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sched_ctrl->harq_processes[harq_idx].round++;
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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}
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break;
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}
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}
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}
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UL_info->uci_ind.num_ucis = 0;
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if (uci_234 != NULL) {
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int harq_idx_s = 0;
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int acknack;
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// iterate over received harq bits
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for (int harq_bit = 0; harq_bit < uci_234->harq.harq_bit_len; harq_bit++) {
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acknack = ((uci_234->harq.harq_payload[harq_bit>>3])>>harq_bit)&0x01;
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for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) {
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// if the gNB received ack with a good confidence or if the max harq rounds was reached
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if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
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// TODO add some confidence level for when there is no CRC
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if ((uci_234->harq.harq_crc != 1) && acknack) {
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// toggle NDI and reset round
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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else
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sched_ctrl->harq_processes[harq_idx].round++;
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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harq_idx_s = harq_idx + 1;
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// if the max harq rounds was reached
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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stats->dlsch_errors++;
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}
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break;
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}
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// if feedback slot processing is aborted
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else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
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(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
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sched_ctrl->harq_processes[harq_idx].round++;
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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}
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}
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}
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}
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}
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/* functionalities of this function have been moved to nr_schedule_uss_dlsch_phytest */
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@@ -131,6 +131,11 @@ int configure_fapi_dl_pdu(int Mod_id,
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uint16_t *rbSize,
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uint16_t *rbStart);
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void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
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nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
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NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats);
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void config_uldci(NR_BWP_Uplink_t *ubwp,
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nfapi_nr_pusch_pdu_t *pusch_pdu,
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
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@@ -78,6 +78,43 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
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}
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void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10) {
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int num_ucis = UL_info->uci_ind.num_ucis;
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nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
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for (int i = 0; i < num_ucis; i++) {
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switch (uci_list[i].pdu_type) {
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case NFAPI_NR_UCI_PUSCH_PDU_TYPE: break;
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case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
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// tpc (power control)
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sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
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if( (uci_pdu->pduBitmap>>1) & 0x01)
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nr_rx_acknack(NULL,uci_pdu,NULL,UL_info,sched_ctrl,stats);
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break;
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}
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case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
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nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
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// tpc (power control)
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sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
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if( (uci_pdu->pduBitmap>>1) & 0x01)
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nr_rx_acknack(NULL,NULL,uci_pdu,UL_info,sched_ctrl,stats);
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break;
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}
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}
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}
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UL_info->uci_ind.num_ucis = 0;
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}
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void handle_nr_ulsch(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats) {
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