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Merge remote-tracking branch 'origin/RA-notation' into develop_integration_w46

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This commit is contained in:
Cedric Roux
2017-11-17 15:27:38 +01:00
parent 4a3489887a d01aa2d08a
commit e190c4e2bc
26 changed files with 20388 additions and 17096 deletions
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openair2/LAYER2/MAC/config.c
+1174 -850
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openair2/LAYER2/MAC/defs.h
+886 -895
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openair2/LAYER2/MAC/eNB_scheduler.c
+615 -403
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openair2/LAYER2/MAC/eNB_scheduler_RA.c
+1531 -1190
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openair2/LAYER2/MAC/eNB_scheduler_bch.c
+783 -675
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openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+1431 -1220
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openair2/LAYER2/MAC/eNB_scheduler_mch.c
+705 -566
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openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+3797 -3009
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openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+1353 -1067
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openair2/LAYER2/MAC/extern.h
+16 -18
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@@ -35,7 +35,7 @@
#ifdef USER_MODE
//#include "stdio.h"
#endif //USER_MODE
#endif //USER_MODE
#include "PHY/defs.h"
#include "defs.h"
@@ -56,8 +56,8 @@ extern UE_RRC_INST *UE_rrc_inst;
extern UE_MAC_INST *UE_mac_inst;
extern eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
extern eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
extern eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
extern eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
@@ -79,28 +79,26 @@ extern uint32_t RRC_CONNECTION_FLAG;
extern uint8_t rb_table[34];
extern DCI0_5MHz_TDD_1_6_t UL_alloc_pdu;
extern DCI0_5MHz_TDD_1_6_t UL_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t RA_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t DLSCH_alloc_pdu1A;
extern DCI1A_5MHz_TDD_1_6_t BCCH_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t RA_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t DLSCH_alloc_pdu1A;
extern DCI1A_5MHz_TDD_1_6_t BCCH_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t CCCH_alloc_pdu;
extern DCI1_5MHz_TDD_t DLSCH_alloc_pdu;
extern DCI1A_5MHz_TDD_1_6_t CCCH_alloc_pdu;
extern DCI1_5MHz_TDD_t DLSCH_alloc_pdu;
extern DCI0_5MHz_FDD_t UL_alloc_pdu_fdd;
extern DCI0_5MHz_FDD_t UL_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t DLSCH_alloc_pdu1A_fdd;
extern DCI1A_5MHz_FDD_t RA_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t BCCH_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t DLSCH_alloc_pdu1A_fdd;
extern DCI1A_5MHz_FDD_t RA_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t BCCH_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t CCCH_alloc_pdu_fdd;
extern DCI1_5MHz_FDD_t DLSCH_alloc_pdu_fdd;
extern DCI1A_5MHz_FDD_t CCCH_alloc_pdu_fdd;
extern DCI1_5MHz_FDD_t DLSCH_alloc_pdu_fdd;
extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu1;
extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
extern DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#endif //DEF_H
#endif //DEF_H
openair2/LAYER2/MAC/flexran_agent_mac_proto.h
+120 -92
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@@ -17,7 +17,7 @@
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
*/
/*! \file flexran_agent_mac_proto.h
* \brief MAC functions for FlexRAN agent
@@ -39,150 +39,178 @@
/*
* slice specific scheduler
*/
typedef void (*slice_scheduler)(module_id_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
typedef void (*slice_scheduler) (module_id_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* top level flexran scheduler used by the eNB scheduler
*/
void flexran_schedule_ue_spec_default(mid_t mod_id,
uint32_t frame,
void flexran_schedule_ue_spec_default(mid_t mod_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for embb
*/
void
flexran_schedule_ue_spec_embb(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_embb(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for urllc
*/
void
flexran_schedule_ue_spec_urllc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_urllc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for mmtc
*/
void
flexran_schedule_ue_spec_mmtc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_mmtc(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* slice specific scheduler for best effort traffic
*/
void
flexran_schedule_ue_spec_be(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_be(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* common flexran scheduler function
*/
void
flexran_schedule_ue_spec_common(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage **dl_info);
flexran_schedule_ue_spec_common(mid_t mod_id,
int slice_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage,
int total_rbs);
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
int flexran_slice_member(int UE_id,
int slice_id);
int flexran_slice_member(int UE_id, int slice_id);
int flexran_slice_maxmcs(int slice_id) ;
int flexran_slice_maxmcs(int slice_id);
void _store_dlsch_buffer (module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframeP);
void _store_dlsch_buffer(module_id_t Mod_id,
int slice_id,
frame_t frameP, sub_frame_t subframeP);
void _assign_rbs_required (module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframe,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES],
int min_rb_unit[MAX_NUM_CCs]);
void _assign_rbs_required(module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframe,
uint16_t
nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_allowed_slice[MAX_NUM_CCs]
[MAX_NUM_SLICES], int min_rb_unit[MAX_NUM_CCs]);
void _dlsch_scheduler_pre_processor (module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag);
void _dlsch_scheduler_pre_processor(module_id_t Mod_id,
int slice_id,
frame_t frameP,
sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag);
void _dlsch_scheduler_pre_processor_reset (int module_idP,
int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
void _dlsch_scheduler_pre_processor_reset(int module_idP,
int UE_id,
uint8_t CC_id,
int frameP,
int subframeP,
int N_RBG,
uint16_t
nb_rbs_required[MAX_NUM_CCs]
[NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_required_remaining
[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_allowed_slice[MAX_NUM_CCs]
[MAX_NUM_SLICES],
unsigned char
rballoc_sub[MAX_NUM_CCs]
[N_RBG_MAX],
unsigned char
MIMO_mode_indicator[MAX_NUM_CCs]
[N_RBG_MAX]);
void _dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
int UE_id,
uint8_t CC_id,
int N_RBG,
int transmission_mode,
int min_rb_unit,
uint8_t N_RB_DL,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
void _dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
int UE_id,
uint8_t CC_id,
int N_RBG,
int transmission_mode,
int min_rb_unit,
uint8_t N_RB_DL,
uint16_t
nb_rbs_required[MAX_NUM_CCs]
[NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_required_remaining
[MAX_NUM_CCs]
[NUMBER_OF_UE_MAX],
unsigned char
rballoc_sub[MAX_NUM_CCs]
[N_RBG_MAX],
unsigned char
MIMO_mode_indicator
[MAX_NUM_CCs][N_RBG_MAX]);
/*
* Default scheduler used by the eNB agent
*/
void flexran_schedule_ue_spec_default(mid_t mod_id, uint32_t frame, uint32_t subframe,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info);
void flexran_schedule_ue_spec_default(mid_t mod_id, uint32_t frame,
uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/*
* Data plane function for applying the DL decisions of the scheduler
*/
void flexran_apply_dl_scheduling_decisions(mid_t mod_id, uint32_t frame, uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage *dl_scheduling_info);
void flexran_apply_dl_scheduling_decisions(mid_t mod_id, uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage *
dl_scheduling_info);
/*
* Data plane function for applying the UE specific DL decisions of the scheduler
*/
void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id, uint32_t frame, uint32_t subframe, int *mbsfn_flag,
uint32_t n_dl_ue_data, Protocol__FlexDlData **dl_ue_data);
void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
uint32_t n_dl_ue_data,
Protocol__FlexDlData **
dl_ue_data);
/*
* Data plane function for filling the DCI structure
*/
void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti, Protocol__FlexDlDci *dl_dci);
void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
Protocol__FlexDlDci * dl_dci);
#endif
openair2/LAYER2/MAC/flexran_agent_scheduler_dataplane.c
+487 -450
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@@ -17,7 +17,7 @@
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
*/
/*! \file flexran_agent_scheduler_dataplane.c
* \brief data plane procedures related to eNB scheduling
@@ -57,495 +57,532 @@
#include "flexran_agent_common.h"
#include "SIMULATION/TOOLS/defs.h" // for taus
#include "SIMULATION/TOOLS/defs.h" // for taus
void flexran_apply_dl_scheduling_decisions(mid_t mod_id,
void
flexran_apply_dl_scheduling_decisions(mid_t mod_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage *
dl_scheduling_info)
{
Protocol__FlexDlMacConfig *mac_config =
dl_scheduling_info->dl_mac_config_msg;
// Check if there is anything to schedule for random access
if (mac_config->n_dl_rar > 0) {
/*TODO: call the random access data plane function */
}
// Check if there is anything to schedule for paging/broadcast
if (mac_config->n_dl_broadcast > 0) {
/*TODO: call the broadcast/paging data plane function */
}
// Check if there is anything to schedule for the UEs
if (mac_config->n_dl_ue_data > 0) {
flexran_apply_ue_spec_scheduling_decisions(mod_id, frame, subframe,
mbsfn_flag,
mac_config->
n_dl_ue_data,
mac_config->dl_ue_data);
}
}
void
flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage *dl_scheduling_info) {
uint32_t n_dl_ue_data,
Protocol__FlexDlData **
dl_ue_data)
{
Protocol__FlexDlMacConfig *mac_config = dl_scheduling_info->dl_mac_config_msg;
uint8_t CC_id;
int UE_id;
mac_rlc_status_resp_t rlc_status;
unsigned char ta_len = 0;
unsigned char header_len = 0, header_len_tmp = 0;
unsigned char sdu_lcids[11], offset, num_sdus = 0;
uint16_t nb_rb;
uint16_t TBS, sdu_lengths[11], rnti, padding = 0, post_padding = 0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
uint8_t round = 0;
uint8_t harq_pid = 0;
// LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
uint16_t sdu_length_total = 0;
short ta_update = 0;
eNB_MAC_INST *eNB = &eNB_mac_inst[mod_id];
UE_list_t *UE_list = &eNB->UE_list;
// static int32_t tpc_accumulated=0;
UE_sched_ctrl *ue_sched_ctl;
// Check if there is anything to schedule for random access
if (mac_config->n_dl_rar > 0) {
/*TODO: call the random access data plane function*/
}
int last_sdu_header_len = 0;
// Check if there is anything to schedule for paging/broadcast
if (mac_config->n_dl_broadcast > 0) {
/*TODO: call the broadcast/paging data plane function*/
}
int i, j;
// Check if there is anything to schedule for the UEs
if (mac_config->n_dl_ue_data > 0) {
flexran_apply_ue_spec_scheduling_decisions(mod_id, frame, subframe, mbsfn_flag,
mac_config->n_dl_ue_data, mac_config->dl_ue_data);
}
}
Protocol__FlexDlData *dl_data;
Protocol__FlexDlDci *dl_dci;
uint32_t rlc_size, n_lc, lcid;
void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
uint32_t n_dl_ue_data,
Protocol__FlexDlData **dl_ue_data) {
// For each UE-related command
for (i = 0; i < n_dl_ue_data; i++) {
uint8_t CC_id;
int UE_id;
mac_rlc_status_resp_t rlc_status;
unsigned char ta_len=0;
unsigned char header_len = 0, header_len_tmp = 0;
unsigned char sdu_lcids[11],offset,num_sdus=0;
uint16_t nb_rb;
uint16_t TBS, sdu_lengths[11],rnti,padding=0,post_padding=0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
uint8_t round = 0;
uint8_t harq_pid = 0;
// LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
uint16_t sdu_length_total = 0;
short ta_update = 0;
eNB_MAC_INST *eNB = &eNB_mac_inst[mod_id];
UE_list_t *UE_list = &eNB->UE_list;
// static int32_t tpc_accumulated=0;
UE_sched_ctrl *ue_sched_ctl;
dl_data = dl_ue_data[i];
dl_dci = dl_data->dl_dci;
int last_sdu_header_len = 0;
CC_id = dl_data->serv_cell_index;
// frame_parms[CC_id] = mac_xface->get_lte_frame_parms(mod_id, CC_id);
int i, j;
rnti = dl_data->rnti;
UE_id = find_ue(rnti, PHY_vars_eNB_g[mod_id][CC_id]);
Protocol__FlexDlData *dl_data;
Protocol__FlexDlDci *dl_dci;
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
eNB_UE_stats = mac_xface->get_eNB_UE_stats(mod_id, CC_id, rnti);
uint32_t rlc_size, n_lc, lcid;
// For each UE-related command
for (i = 0; i < n_dl_ue_data; i++) {
dl_data = dl_ue_data[i];
dl_dci = dl_data->dl_dci;
round = dl_dci->rv[0];
harq_pid = dl_dci->harq_process;
CC_id = dl_data->serv_cell_index;
// frame_parms[CC_id] = mac_xface->get_lte_frame_parms(mod_id, CC_id);
rnti = dl_data->rnti;
UE_id = find_ue(rnti, PHY_vars_eNB_g[mod_id][CC_id]);
//LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d] Scheduling harq %d\n", frame, subframe, harq_pid);
// LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d]Now scheduling harq_pid %d (round %d)\n", frame, subframe, harq_pid, round);
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
eNB_UE_stats = mac_xface->get_eNB_UE_stats(mod_id,CC_id,rnti);
round = dl_dci->rv[0];
harq_pid = dl_dci->harq_process;
//LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d] Scheduling harq %d\n", frame, subframe, harq_pid);
// LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d]Now scheduling harq_pid %d (round %d)\n", frame, subframe, harq_pid, round);
// If this is a new transmission
if (round == 0) {
// First we have to deal with the creation of the PDU based on the message instructions
rlc_status.bytes_in_buffer = 0;
// If this is a new transmission
if (round == 0) {
// First we have to deal with the creation of the PDU based on the message instructions
rlc_status.bytes_in_buffer = 0;
TBS = dl_dci->tbs_size[0];
if (dl_data->n_ce_bitmap > 0) {
//Check if there is TA command and set the length appropriately
ta_len = (dl_data->ce_bitmap[0] & PROTOCOL__FLEX_CE_TYPE__FLPCET_TA) ? 2 : 0;
}
TBS = dl_dci->tbs_size[0];
num_sdus = 0;
sdu_length_total = 0;
n_lc = dl_data->n_rlc_pdu;
// Go through each one of the channel commands and create SDUs
header_len = 0;
last_sdu_header_len = 0;
for (j = 0; j < n_lc; j++) {
sdu_lengths[j] = 0;
lcid = dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->logical_channel_id;
rlc_size = dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->size;
LOG_D(MAC,"[TEST] [eNB %d] [Frame %d] [Subframe %d], LCID %d, CC_id %d, Requesting %d bytes from RLC (RRC message)\n",
mod_id, frame, subframe, lcid, CC_id, rlc_size);
if (rlc_size > 0) {
rlc_status = mac_rlc_status_ind(mod_id,
rnti,
mod_id,
frame,
subframe,
ENB_FLAG_YES,
MBMS_FLAG_NO,
lcid,
0);
if (rlc_status.bytes_in_buffer > 0) {
if (rlc_status.bytes_in_buffer < rlc_size) {
rlc_size = rlc_status.bytes_in_buffer;
if (dl_data->n_ce_bitmap > 0) {
//Check if there is TA command and set the length appropriately
ta_len =
(dl_data->
ce_bitmap[0] & PROTOCOL__FLEX_CE_TYPE__FLPCET_TA) ? 2
: 0;
}
if (rlc_size <= 2) {
rlc_size = 3;
}
num_sdus = 0;
sdu_length_total = 0;
rlc_status = mac_rlc_status_ind(mod_id,
rnti,
mod_id,
frame,
subframe,
ENB_FLAG_YES,
MBMS_FLAG_NO,
lcid,
rlc_size); // transport block set size
LOG_D(MAC, "[TEST] RLC can give %d bytes for LCID %d during second call\n", rlc_status.bytes_in_buffer, lcid);
if (rlc_status.bytes_in_buffer > 0) {
sdu_lengths[j] = mac_rlc_data_req(mod_id,
rnti,
mod_id,
frame,
ENB_FLAG_YES,
MBMS_FLAG_NO,
lcid,
rlc_size, //not used
(char *)&dlsch_buffer[sdu_length_total]);
LOG_D(MAC,"[eNB %d][LCID %d] CC_id %d Got %d bytes from RLC\n",mod_id, lcid, CC_id, sdu_lengths[j]);
sdu_length_total += sdu_lengths[j];
sdu_lcids[j] = lcid;
UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[lcid] += 1;
UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[lcid] += sdu_lengths[j];
if (sdu_lengths[j] < 128) {
header_len += 2;
last_sdu_header_len = 2;
} else {
header_len += 3;
last_sdu_header_len = 3;
}
num_sdus++;
}
}
}
} // SDU creation end
if (((sdu_length_total + header_len + ta_len) > 0)) {
header_len_tmp = header_len;
// If we have only a single SDU, header length becomes 1
if ((num_sdus) == 1) {
//if (header_len == 2 || header_len == 3) {
header_len = 1;
} else {
header_len = (header_len - last_sdu_header_len) + 1;
}
// If we need a 1 or 2 bit padding or no padding at all
if ((TBS - header_len - sdu_length_total - ta_len) <= 2
|| (TBS - header_len - sdu_length_total - ta_len) > TBS) { //protect from overflow
padding = (TBS - header_len - sdu_length_total - ta_len);
post_padding = 0;
} else { // The last sdu needs to have a length field, since we add padding
padding = 0;
header_len = header_len_tmp;
post_padding = TBS - sdu_length_total - header_len - ta_len; // 1 is for the postpadding header
}
if (ta_len > 0) {
// Reset the measurement
ta_update = flexran_get_TA(mod_id, UE_id, CC_id);
ue_sched_ctl->ta_timer = 20;
eNB_UE_stats->timing_advance_update = 0;
} else {
ta_update = 0;
}
n_lc = dl_data->n_rlc_pdu;
// Go through each one of the channel commands and create SDUs
header_len = 0;
last_sdu_header_len = 0;
for (j = 0; j < n_lc; j++) {
sdu_lengths[j] = 0;
lcid =
dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->logical_channel_id;
rlc_size = dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->size;
LOG_D(MAC,
"[TEST] [eNB %d] [Frame %d] [Subframe %d], LCID %d, CC_id %d, Requesting %d bytes from RLC (RRC message)\n",
mod_id, frame, subframe, lcid, CC_id, rlc_size);
if (rlc_size > 0) {
rlc_status = mac_rlc_status_ind(mod_id,
rnti,
mod_id,
frame,
subframe,
ENB_FLAG_YES,
MBMS_FLAG_NO, lcid, 0);
if (rlc_status.bytes_in_buffer > 0) {
if (rlc_status.bytes_in_buffer < rlc_size) {
rlc_size = rlc_status.bytes_in_buffer;
}
if (rlc_size <= 2) {
rlc_size = 3;
}
rlc_status = mac_rlc_status_ind(mod_id, rnti, mod_id, frame, subframe, ENB_FLAG_YES, MBMS_FLAG_NO, lcid, rlc_size); // transport block set size
LOG_D(MAC,
"[TEST] RLC can give %d bytes for LCID %d during second call\n",
rlc_status.bytes_in_buffer, lcid);
if (rlc_status.bytes_in_buffer > 0) {
sdu_lengths[j] = mac_rlc_data_req(mod_id, rnti, mod_id, frame, ENB_FLAG_YES, MBMS_FLAG_NO, lcid, rlc_size, //not used
(char *)
&dlsch_buffer
[sdu_length_total]);
LOG_D(MAC,
"[eNB %d][LCID %d] CC_id %d Got %d bytes from RLC\n",
mod_id, lcid, CC_id, sdu_lengths[j]);
sdu_length_total += sdu_lengths[j];
sdu_lcids[j] = lcid;
UE_list->
eNB_UE_stats[CC_id][UE_id].num_pdu_tx[lcid]
+= 1;
UE_list->
eNB_UE_stats[CC_id][UE_id].num_bytes_tx
[lcid] += sdu_lengths[j];
if (sdu_lengths[j] < 128) {
header_len += 2;
last_sdu_header_len = 2;
} else {
header_len += 3;
last_sdu_header_len = 3;
}
num_sdus++;
}
}
}
} // SDU creation end
if (((sdu_length_total + header_len + ta_len) > 0)) {
header_len_tmp = header_len;
// If we have only a single SDU, header length becomes 1
if ((num_sdus) == 1) {
//if (header_len == 2 || header_len == 3) {
header_len = 1;
} else {
header_len = (header_len - last_sdu_header_len) + 1;
}
// If we need a 1 or 2 bit padding or no padding at all
if ((TBS - header_len - sdu_length_total - ta_len) <= 2 || (TBS - header_len - sdu_length_total - ta_len) > TBS) { //protect from overflow
padding =
(TBS - header_len - sdu_length_total - ta_len);
post_padding = 0;
} else { // The last sdu needs to have a length field, since we add padding
padding = 0;
header_len = header_len_tmp;
post_padding = TBS - sdu_length_total - header_len - ta_len; // 1 is for the postpadding header
}
if (ta_len > 0) {
// Reset the measurement
ta_update = flexran_get_TA(mod_id, UE_id, CC_id);
ue_sched_ctl->ta_timer = 20;
eNB_UE_stats->timing_advance_update = 0;
} else {
ta_update = 0;
}
// If there is nothing to schedule, just leave
if ((sdu_length_total) <= 0) {
harq_pid_updated[UE_id][harq_pid] = 1;
harq_pid_round[UE_id][harq_pid] = 0;
continue;
}
// LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d] TBS is %d and bytes are %d\n", frame, subframe, TBS, sdu_length_total);
offset = generate_dlsch_header((unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], num_sdus, //num_sdus
sdu_lengths, //
sdu_lcids, 255, // no drx
ta_update, // timing advance
NULL, // contention res id
padding, post_padding);
// If there is nothing to schedule, just leave
if ((sdu_length_total) <= 0) {
harq_pid_updated[UE_id][harq_pid] = 1;
harq_pid_round[UE_id][harq_pid] = 0;
continue;
}
// LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d] TBS is %d and bytes are %d\n", frame, subframe, TBS, sdu_length_total);
offset = generate_dlsch_header((unsigned char*)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
num_sdus, //num_sdus
sdu_lengths, //
sdu_lcids,
255, // no drx
ta_update, // timing advance
NULL, // contention res id
padding,
post_padding);
#ifdef DEBUG_eNB_SCHEDULER
LOG_T(MAC,"[eNB %d] First 16 bytes of DLSCH : \n");
for (i=0; i<16; i++) {
LOG_T(MAC,"%x.",dlsch_buffer[i]);
}
LOG_T(MAC,"\n");
LOG_T(MAC, "[eNB %d] First 16 bytes of DLSCH : \n");
for (i = 0; i < 16; i++) {
LOG_T(MAC, "%x.", dlsch_buffer[i]);
}
LOG_T(MAC, "\n");
#endif
// cycle through SDUs and place in dlsch_buffer
memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset],dlsch_buffer,sdu_length_total);
// memcpy(&eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset],dcch_buffer,sdu_lengths[0]);
// fill remainder of DLSCH with random data
for (j=0; j<(TBS-sdu_length_total-offset); j++) {
UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset+sdu_length_total+j] = (char)(taus()&0xff);
}
//eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset+sdu_lengths[0]+j] = (char)(taus()&0xff);
if (opt_enabled == 1) {
trace_pdu(1, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0],
TBS, mod_id, 3, UE_RNTI(mod_id, UE_id),
eNB->frame, eNB->subframe,0,0);
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n",
mod_id, CC_id, frame, UE_RNTI(mod_id,UE_id), TBS);
}
// store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1;
UE_list->eNB_UE_stats[CC_id][UE_id].dl_cqi= eNB_UE_stats->DL_cqi[0];
UE_list->eNB_UE_stats[CC_id][UE_id].crnti= rnti;
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status=mac_eNB_get_rrc_status(mod_id, rnti);
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
//nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
//Find the number of resource blocks and set them to the template for retransmissions
nb_rb = get_min_rb_unit(mod_id, CC_id);
uint16_t stats_tbs = mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb);
// cycle through SDUs and place in dlsch_buffer
memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].
payload[0][offset], dlsch_buffer, sdu_length_total);
// memcpy(&eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset],dcch_buffer,sdu_lengths[0]);
while (stats_tbs < TBS) {
nb_rb += get_min_rb_unit(mod_id, CC_id);
stats_tbs = mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb);
// fill remainder of DLSCH with random data
for (j = 0; j < (TBS - sdu_length_total - offset); j++) {
UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset +
sdu_length_total
+ j] =
(char) (taus() & 0xff);
}
//eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset+sdu_lengths[0]+j] = (char)(taus()&0xff);
if (opt_enabled == 1) {
trace_pdu(1,
(uint8_t *)
UE_list->DLSCH_pdu[CC_id][0][UE_id].
payload[0], TBS, mod_id, 3, UE_RNTI(mod_id,
UE_id),
eNB->frame, eNB->subframe, 0, 0);
LOG_D(OPT,
"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n",
mod_id, CC_id, frame, UE_RNTI(mod_id, UE_id),
TBS);
}
// store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx += sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx += 1;
UE_list->eNB_UE_stats[CC_id][UE_id].dl_cqi =
eNB_UE_stats->DL_cqi[0];
UE_list->eNB_UE_stats[CC_id][UE_id].crnti = rnti;
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status =
mac_eNB_get_rrc_status(mod_id, rnti);
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
//nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
//Find the number of resource blocks and set them to the template for retransmissions
nb_rb = get_min_rb_unit(mod_id, CC_id);
uint16_t stats_tbs =
mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb);
while (stats_tbs < TBS) {
nb_rb += get_min_rb_unit(mod_id, CC_id);
stats_tbs =
mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb);
}
// LOG_I(FLEXRAN_AGENT, "The MCS was %d\n", dl_dci->mcs[0]);
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb;
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used +=
nb_rb;
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1 =
dl_dci->mcs[0];
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2 =
dl_dci->mcs[0];
UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS;
UE_list->eNB_UE_stats[CC_id][UE_id].overhead_bytes =
TBS - sdu_length_total;
UE_list->eNB_UE_stats[CC_id][UE_id].total_sdu_bytes +=
sdu_length_total;
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes += TBS;
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus += 1;
//eNB_UE_stats->dlsch_mcs1 = cqi_to_mcs[eNB_UE_stats->DL_cqi[0]];
//eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
} else {
LOG_D(FLEXRAN_AGENT,
"No need to schedule a dci after all. Just drop it\n");
harq_pid_updated[UE_id][harq_pid] = 1;
harq_pid_round[UE_id][harq_pid] = 0;
continue;
}
} else {
// No need to create anything apart of DCI in case of retransmission
/*TODO: Must add these */
// eNB_UE_stats->dlsch_trials[round]++;
//UE_list->eNB_UE_stats[CC_id][UE_id].num_retransmission+=1;
//UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used_retx=nb_rb;
//UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_retx+=nb_rb;
//UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used_retx=nCCECC_id];
}
// LOG_I(FLEXRAN_AGENT, "The MCS was %d\n", dl_dci->mcs[0]);
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb;
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used += nb_rb;
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=dl_dci->mcs[0];
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=dl_dci->mcs[0];
UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS;
UE_list->eNB_UE_stats[CC_id][UE_id].overhead_bytes= TBS - sdu_length_total;
UE_list->eNB_UE_stats[CC_id][UE_id].total_sdu_bytes+= sdu_length_total;
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes+= TBS;
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus+=1;
//eNB_UE_stats->dlsch_mcs1 = cqi_to_mcs[eNB_UE_stats->DL_cqi[0]];
//eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
} else {
LOG_D(FLEXRAN_AGENT, "No need to schedule a dci after all. Just drop it\n");
harq_pid_updated[UE_id][harq_pid] = 1;
harq_pid_round[UE_id][harq_pid] = 0;
continue;
}
} else {
// No need to create anything apart of DCI in case of retransmission
/*TODO: Must add these */
// eNB_UE_stats->dlsch_trials[round]++;
//UE_list->eNB_UE_stats[CC_id][UE_id].num_retransmission+=1;
//UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used_retx=nb_rb;
//UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_retx+=nb_rb;
//UE_list->eNB_UE_stats[CC_id][UE_id].ncce_used_retx=nCCECC_id];
// UE_list->UE_template[CC_id][UE_id].oldNDI[dl_dci->harq_process] = dl_dci->ndi[0];
// eNB_UE_stats->dlsch_mcs1 = dl_dci->mcs[0];
//Fill the proper DCI of OAI
flexran_fill_oai_dci(mod_id, CC_id, rnti, dl_dci);
}
// UE_list->UE_template[CC_id][UE_id].oldNDI[dl_dci->harq_process] = dl_dci->ndi[0];
// eNB_UE_stats->dlsch_mcs1 = dl_dci->mcs[0];
//Fill the proper DCI of OAI
flexran_fill_oai_dci(mod_id, CC_id, rnti, dl_dci);
}
}
void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
Protocol__FlexDlDci *dl_dci) {
void *DLSCH_dci = NULL;
DCI_PDU *DCI_pdu;
void
flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
Protocol__FlexDlDci * dl_dci)
{
unsigned char harq_pid = 0;
// unsigned char round = 0;
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
int size_bits = 0, size_bytes = 0;
eNB_MAC_INST *eNB = &eNB_mac_inst[mod_id];
UE_list_t *UE_list = &eNB->UE_list;
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
void *DLSCH_dci = NULL;
DCI_PDU *DCI_pdu;
int UE_id = find_ue(rnti, PHY_vars_eNB_g[mod_id][CC_id]);
unsigned char harq_pid = 0;
// unsigned char round = 0;
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
int size_bits = 0, size_bytes = 0;
eNB_MAC_INST *eNB = &eNB_mac_inst[mod_id];
UE_list_t *UE_list = &eNB->UE_list;
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
uint32_t format;
int UE_id = find_ue(rnti, PHY_vars_eNB_g[mod_id][CC_id]);
harq_pid = dl_dci->harq_process;
// round = dl_dci->rv[0];
// Note this code is for a specific DCI format
DLSCH_dci = (void *)UE_list->UE_template[CC_id][UE_id].DLSCH_DCI[harq_pid];
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(mod_id, CC_id);
uint32_t format;
if (dl_dci->has_tpc == 1) {
// Check if tpc has been set and reset measurement */
if ((dl_dci->tpc == 0) || (dl_dci->tpc == 2)) {
eNB_UE_stats = mac_xface->get_eNB_UE_stats(mod_id, CC_id, rnti);
eNB_UE_stats->Po_PUCCH_update = 0;
harq_pid = dl_dci->harq_process;
// round = dl_dci->rv[0];
// Note this code is for a specific DCI format
DLSCH_dci =
(void *) UE_list->UE_template[CC_id][UE_id].DLSCH_DCI[harq_pid];
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(mod_id, CC_id);
if (dl_dci->has_tpc == 1) {
// Check if tpc has been set and reset measurement */
if ((dl_dci->tpc == 0) || (dl_dci->tpc == 2)) {
eNB_UE_stats =
mac_xface->get_eNB_UE_stats(mod_id, CC_id, rnti);
eNB_UE_stats->Po_PUCCH_update = 0;
}
}
}
switch (frame_parms[CC_id]->N_RB_DL) {
case 6:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_1_5MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
size_bits = sizeof_DCI1_1_5MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_1_5MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
size_bits = sizeof_DCI1_1_5MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
case 25:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_5MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_5MHz_TDD_t);
size_bits = sizeof_DCI1_5MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_5MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_5MHz_FDD_t);
size_bits = sizeof_DCI1_5MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
case 50:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_10MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_10MHz_TDD_t);
size_bits = sizeof_DCI1_10MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_10MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_10MHz_FDD_t);
size_bits = sizeof_DCI1_10MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
case 100:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_20MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_20MHz_TDD_t);
size_bits = sizeof_DCI1_20MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_20MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_20MHz_FDD_t);
size_bits = sizeof_DCI1_20MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
}
//Set format to the proper type
switch(dl_dci->format) {
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1:
format = format1;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1A:
format = format1A;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1B:
format = format1B;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1C:
format = format1C;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D:
format = format1E_2A_M10PRB;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2:
format = format2;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A:
format = format2A;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2B:
format = format2B;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_3:
format = 3;
break;
default:
/*TODO: Need to deal with unsupported DCI type*/
return;
}
add_ue_spec_dci(DCI_pdu,
DLSCH_dci,
rnti,
size_bytes,
dl_dci->aggr_level,
size_bits,
format,
0);
switch (frame_parms[CC_id]->N_RB_DL) {
case 6:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_1_5MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
size_bits = sizeof_DCI1_1_5MHz_TDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_1_5MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
size_bits = sizeof_DCI1_1_5MHz_FDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
case 25:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_5MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_5MHz_TDD_t);
size_bits = sizeof_DCI1_5MHz_TDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_5MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_5MHz_FDD_t);
size_bits = sizeof_DCI1_5MHz_FDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
case 50:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_10MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_10MHz_TDD_t);
size_bits = sizeof_DCI1_10MHz_TDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_10MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_10MHz_FDD_t);
size_bits = sizeof_DCI1_10MHz_FDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
case 100:
if (frame_parms[CC_id]->frame_type == TDD) {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_TDD_1(DCI1_20MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_20MHz_TDD_t);
size_bits = sizeof_DCI1_20MHz_TDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
} else {
if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1) {
FILL_DCI_FDD_1(DCI1_20MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_20MHz_FDD_t);
size_bits = sizeof_DCI1_20MHz_FDD_t;
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO
} else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO
}
}
break;
}
//Set format to the proper type
switch (dl_dci->format) {
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1:
format = format1;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1A:
format = format1A;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1B:
format = format1B;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1C:
format = format1C;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D:
format = format1E_2A_M10PRB;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2:
format = format2;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A:
format = format2A;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2B:
format = format2B;
break;
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_3:
format = 3;
break;
default:
/*TODO: Need to deal with unsupported DCI type */
return;
}
add_ue_spec_dci(DCI_pdu,
DLSCH_dci,
rnti,
size_bytes, dl_dci->aggr_level, size_bits, format, 0);
}
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue.c
+1764 -1428
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue_remote.c
+152 -130
View File
@@ -17,7 +17,7 @@
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
*/
/*! \file flexran_agent_scheduler_dlsch_ue_remote.c
* \brief procedures related to remote scheduling in the DLSCH transport channel
@@ -44,137 +44,159 @@ int queue_initialized = 0;
//uint32_t period = 10;
//uint32_t sched [] = {1, 2, 3};
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subframe,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info) {
void
flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame,
uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info)
{
//if ((subframe == skip_subframe) && (frame % period == 0)) {
// LOG_I(MAC, "Will skip subframe %d %d\n", subframe, frame);
// for (int i = 0; i < 3; i++) {
// LOG_I(MAC, "%d\n", sched[i]);
// }
//}
/* if (frame == 500 && subframe == 1) { */
/* char policy[] = "rrc: \n - ul_scheduler: \n behavior : tester_function\n parameters:\n period: !!int 3\nmac: \n - dl_scheduler: \n parameters: \n period : !!int 40\n skip_subframe : !!int 3\n sched : [!!int 4, !!int 5, !!int 6]"; */
/* apply_reconfiguration_policy(mod_id, policy, strlen(policy)); */
/* } */
eNB_MAC_INST *eNB;
if (!queue_initialized) {
TAILQ_INIT(&queue_head);
queue_initialized = 1;
}
eNB = &eNB_mac_inst[mod_id];
dl_mac_config_element_t *dl_config_elem;
int diff;
LOG_D(MAC, "[TEST] Current frame and subframe %d, %d\n", frame, subframe);
// First we check to see if we have a scheduling decision for this sfn_sf already in our queue
while(queue_head.tqh_first != NULL) {
dl_config_elem = queue_head.tqh_first;
diff = get_sf_difference(mod_id, dl_config_elem->dl_info->dl_mac_config_msg->sfn_sf);
// Check if this decision is for now, for a later or a previous subframe
if ( diff == 0) { // Now
LOG_D(MAC, "Found a decision for this subframe in the queue. Let's use it!\n");
TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs);
*dl_info = dl_config_elem->dl_info;
free(dl_config_elem);
eNB->eNB_stats[mod_id].sched_decisions++;
return;
} else if (diff < 0) { //previous subframe , delete message and free memory
LOG_D(MAC, "Found a decision for a previous subframe in the queue. Let's get rid of it\n");
TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs);
flexran_agent_mac_destroy_dl_config(dl_config_elem->dl_info);
free(dl_config_elem);
eNB->eNB_stats[mod_id].sched_decisions++;
eNB->eNB_stats[mod_id].missed_deadlines++;
} else { // next subframe, nothing to do now
LOG_D(MAC, "Found a decision for a future subframe in the queue. Nothing to do now\n");
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
return;
}
}
//Done with the local cache. Now we need to check if something new arrived
flexran_agent_get_pending_dl_mac_config(mod_id, dl_info);
while (*dl_info != NULL) {
diff = get_sf_difference(mod_id, (*dl_info)->dl_mac_config_msg->sfn_sf);
if (diff == 0) { // Got a command for this sfn_sf
LOG_D(MAC, "Found a decision for this subframe pending. Let's use it\n");
eNB->eNB_stats[mod_id].sched_decisions++;
return;
} else if (diff < 0) {
LOG_D(MAC, "Found a decision for a previous subframe. Let's get rid of it\n");
flexran_agent_mac_destroy_dl_config(*dl_info);
*dl_info = NULL;
flexran_agent_get_pending_dl_mac_config(mod_id, dl_info);
eNB->eNB_stats[mod_id].sched_decisions++;
eNB->eNB_stats[mod_id].missed_deadlines++;
} else { // Intended for future subframe. Store it in local cache
LOG_D(MAC, "Found a decision for a future subframe in the queue. Let's store it in the cache\n");
dl_mac_config_element_t *e = malloc(sizeof(dl_mac_config_element_t));
e->dl_info = *dl_info;
TAILQ_INSERT_TAIL(&queue_head, e, configs);
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
// No need to look for another. Messages arrive ordered
return;
}
}
// We found no pending command, so we will simply pass an empty one
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
}
int get_sf_difference(mid_t mod_id, uint32_t sfn_sf) {
int diff_in_subframes;
uint16_t current_frame = flexran_get_current_system_frame_num(mod_id);
uint16_t current_subframe = flexran_get_current_subframe(mod_id);
uint32_t current_sfn_sf = flexran_get_sfn_sf(mod_id);
if (sfn_sf == current_sfn_sf) {
return 0;
}
uint16_t frame_mask = ((1<<12) - 1);
uint16_t frame = (sfn_sf & (frame_mask << 4)) >> 4;
uint16_t sf_mask = ((1<<4) - 1);
uint16_t subframe = (sfn_sf & sf_mask);
LOG_D(MAC, "[TEST] Target frame and subframe %d, %d\n", frame, subframe);
if (frame == current_frame) {
return subframe - current_subframe;
} else if (frame > current_frame) {
diff_in_subframes = ((frame*10)+subframe) - ((current_frame*10)+current_subframe);
// diff_in_subframes = 9 - current_subframe;
//diff_in_subframes += (subframe + 1);
//diff_in_subframes += (frame-2) * 10;
if (diff_in_subframes > SCHED_AHEAD_SUBFRAMES) {
return -1;
} else {
return 1;
}
} else { //frame < current_frame
//diff_in_subframes = 9 - current_subframe;
//diff_in_subframes += (subframe + 1);
//if (frame > 0) {
// diff_in_subframes += (frame - 1) * 10;
//if ((subframe == skip_subframe) && (frame % period == 0)) {
// LOG_I(MAC, "Will skip subframe %d %d\n", subframe, frame);
// for (int i = 0; i < 3; i++) {
// LOG_I(MAC, "%d\n", sched[i]);
// }
//}
//diff_in_subframes += (1023 - current_frame) * 10;
diff_in_subframes = 10240 - ((current_frame*10)+current_subframe) + ((frame*10)+subframe);
if (diff_in_subframes > SCHED_AHEAD_SUBFRAMES) {
return -1;
} else {
return 1;
/* if (frame == 500 && subframe == 1) { */
/* char policy[] = "rrc: \n - ul_scheduler: \n behavior : tester_function\n parameters:\n period: !!int 3\nmac: \n - dl_scheduler: \n parameters: \n period : !!int 40\n skip_subframe : !!int 3\n sched : [!!int 4, !!int 5, !!int 6]"; */
/* apply_reconfiguration_policy(mod_id, policy, strlen(policy)); */
/* } */
eNB_MAC_INST *eNB;
if (!queue_initialized) {
TAILQ_INIT(&queue_head);
queue_initialized = 1;
}
eNB = &eNB_mac_inst[mod_id];
dl_mac_config_element_t *dl_config_elem;
int diff;
LOG_D(MAC, "[TEST] Current frame and subframe %d, %d\n", frame,
subframe);
// First we check to see if we have a scheduling decision for this sfn_sf already in our queue
while (queue_head.tqh_first != NULL) {
dl_config_elem = queue_head.tqh_first;
diff =
get_sf_difference(mod_id,
dl_config_elem->dl_info->
dl_mac_config_msg->sfn_sf);
// Check if this decision is for now, for a later or a previous subframe
if (diff == 0) { // Now
LOG_D(MAC,
"Found a decision for this subframe in the queue. Let's use it!\n");
TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs);
*dl_info = dl_config_elem->dl_info;
free(dl_config_elem);
eNB->eNB_stats[mod_id].sched_decisions++;
return;
} else if (diff < 0) { //previous subframe , delete message and free memory
LOG_D(MAC,
"Found a decision for a previous subframe in the queue. Let's get rid of it\n");
TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs);
flexran_agent_mac_destroy_dl_config(dl_config_elem->dl_info);
free(dl_config_elem);
eNB->eNB_stats[mod_id].sched_decisions++;
eNB->eNB_stats[mod_id].missed_deadlines++;
} else { // next subframe, nothing to do now
LOG_D(MAC,
"Found a decision for a future subframe in the queue. Nothing to do now\n");
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
return;
}
}
//Done with the local cache. Now we need to check if something new arrived
flexran_agent_get_pending_dl_mac_config(mod_id, dl_info);
while (*dl_info != NULL) {
diff =
get_sf_difference(mod_id,
(*dl_info)->dl_mac_config_msg->sfn_sf);
if (diff == 0) { // Got a command for this sfn_sf
LOG_D(MAC,
"Found a decision for this subframe pending. Let's use it\n");
eNB->eNB_stats[mod_id].sched_decisions++;
return;
} else if (diff < 0) {
LOG_D(MAC,
"Found a decision for a previous subframe. Let's get rid of it\n");
flexran_agent_mac_destroy_dl_config(*dl_info);
*dl_info = NULL;
flexran_agent_get_pending_dl_mac_config(mod_id, dl_info);
eNB->eNB_stats[mod_id].sched_decisions++;
eNB->eNB_stats[mod_id].missed_deadlines++;
} else { // Intended for future subframe. Store it in local cache
LOG_D(MAC,
"Found a decision for a future subframe in the queue. Let's store it in the cache\n");
dl_mac_config_element_t *e =
malloc(sizeof(dl_mac_config_element_t));
e->dl_info = *dl_info;
TAILQ_INSERT_TAIL(&queue_head, e, configs);
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
// No need to look for another. Messages arrive ordered
return;
}
}
// We found no pending command, so we will simply pass an empty one
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
}
int get_sf_difference(mid_t mod_id, uint32_t sfn_sf)
{
int diff_in_subframes;
uint16_t current_frame = flexran_get_current_system_frame_num(mod_id);
uint16_t current_subframe = flexran_get_current_subframe(mod_id);
uint32_t current_sfn_sf = flexran_get_sfn_sf(mod_id);
if (sfn_sf == current_sfn_sf) {
return 0;
}
uint16_t frame_mask = ((1 << 12) - 1);
uint16_t frame = (sfn_sf & (frame_mask << 4)) >> 4;
uint16_t sf_mask = ((1 << 4) - 1);
uint16_t subframe = (sfn_sf & sf_mask);
LOG_D(MAC, "[TEST] Target frame and subframe %d, %d\n", frame,
subframe);
if (frame == current_frame) {
return subframe - current_subframe;
} else if (frame > current_frame) {
diff_in_subframes =
((frame * 10) + subframe) - ((current_frame * 10) +
current_subframe);
// diff_in_subframes = 9 - current_subframe;
//diff_in_subframes += (subframe + 1);
//diff_in_subframes += (frame-2) * 10;
if (diff_in_subframes > SCHED_AHEAD_SUBFRAMES) {
return -1;
} else {
return 1;
}
} else { //frame < current_frame
//diff_in_subframes = 9 - current_subframe;
//diff_in_subframes += (subframe + 1);
//if (frame > 0) {
// diff_in_subframes += (frame - 1) * 10;
//}
//diff_in_subframes += (1023 - current_frame) * 10;
diff_in_subframes =
10240 - ((current_frame * 10) + current_subframe) +
((frame * 10) + subframe);
if (diff_in_subframes > SCHED_AHEAD_SUBFRAMES) {
return -1;
} else {
return 1;
}
}
}
}
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue_remote.h
+6 -5
View File
@@ -17,7 +17,7 @@
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
*/
/*! \file flexran_agent_scheduler_dlsch_ue_remote.h
* \brief Local stub for remote scheduler used by the controller
@@ -46,8 +46,8 @@
#define SCHED_AHEAD_SUBFRAMES 20
typedef struct dl_mac_config_element_s {
Protocol__FlexranMessage *dl_info;
TAILQ_ENTRY(dl_mac_config_element_s) configs;
Protocol__FlexranMessage *dl_info;
TAILQ_ENTRY(dl_mac_config_element_s) configs;
} dl_mac_config_element_t;
TAILQ_HEAD(DlMacConfigHead, dl_mac_config_element_s);
@@ -55,8 +55,9 @@ TAILQ_HEAD(DlMacConfigHead, dl_mac_config_element_s);
/*
* Default scheduler used by the eNB agent
*/
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subframe,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info);
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame,
uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
// Find the difference in subframes from the given subframe
openair2/LAYER2/MAC/flexran_dci_conversions.h
+2 -2
View File
@@ -17,7 +17,7 @@
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
*/
/*! \file flexran_dci_conversions.h
* \brief Conversion helpers from flexran messages to OAI formats DCI
@@ -47,5 +47,5 @@
((TYPE*)DCI)->mcs = FLEXRAN_DCI->mcs[0]; \
((TYPE*)DCI)->TPC = FLEXRAN_DCI->tpc; \
((TYPE*)DCI)->ndi = FLEXRAN_DCI->ndi[0];
#endif
openair2/LAYER2/MAC/l1_helpers.c
+22 -14
View File
@@ -34,28 +34,36 @@
#include "UTIL/LOG/log.h"
#include "proto.h"
int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP,uint8_t CC_id)
int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP, uint8_t CC_id)
{
RACH_ConfigCommon_t *rach_ConfigCommon = NULL;
RACH_ConfigCommon_t *rach_ConfigCommon = NULL;
AssertFatal(CC_id==0,
"Transmission on secondary CCs is not supported yet\n");
AssertFatal(UE_mac_inst[module_idP].radioResourceConfigCommon!=NULL,
"[UE %d] CCid %d FATAL radioResourceConfigCommon is NULL !!!\n",module_idP,CC_id);
AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n");
AssertFatal(UE_mac_inst[module_idP].radioResourceConfigCommon != NULL,
"[UE %d] CCid %d FATAL radioResourceConfigCommon is NULL !!!\n",
module_idP, CC_id);
rach_ConfigCommon = &UE_mac_inst[module_idP].radioResourceConfigCommon->rach_ConfigCommon;
rach_ConfigCommon =
&UE_mac_inst[module_idP].radioResourceConfigCommon->
rach_ConfigCommon;
return(-120 + (rach_ConfigCommon->powerRampingParameters.preambleInitialReceivedTargetPower<<1) +
get_DELTA_PREAMBLE(module_idP,CC_id));
return (-120 +
(rach_ConfigCommon->
powerRampingParameters.preambleInitialReceivedTargetPower <<
1) + get_DELTA_PREAMBLE(module_idP, CC_id));
}
int8_t get_deltaP_rampup(module_id_t module_idP,uint8_t CC_id)
int8_t get_deltaP_rampup(module_id_t module_idP, uint8_t CC_id)
{
AssertFatal(CC_id==0,
"Transmission on secondary CCs is not supported yet\n");
AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n");
LOG_D(MAC,"[PUSCH]%d dB\n",UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER<<1);
return((int8_t)(UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER<<1));
LOG_D(MAC, "[PUSCH]%d dB\n",
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER << 1);
return ((int8_t)
(UE_mac_inst[module_idP].
RA_PREAMBLE_TRANSMISSION_COUNTER << 1));
}
openair2/LAYER2/MAC/lte_transport_init.c
+88 -88
View File
@@ -29,104 +29,104 @@
void init_transport_channels(unsigned char transmission_mode)
{
// init DCI structures for testing
// init DCI structures for testing
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = UL_RB_ALLOC;
UL_alloc_pdu.mcs = 2;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cqi_req = 1;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = UL_RB_ALLOC;
UL_alloc_pdu.mcs = 2;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cqi_req = 1;
/*
BCCH_alloc_pdu.type = 1;
BCCH_alloc_pdu.vrb_type = 0;
BCCH_alloc_pdu.rballoc = BCCH_RB_ALLOC;
BCCH_alloc_pdu.ndi = 1;
BCCH_alloc_pdu.rv = 1;
BCCH_alloc_pdu.mcs = 1;
BCCH_alloc_pdu.harq_pid = 0;
BCCH_alloc_pdu.TPC = 1; // set to 3 PRB
/*
BCCH_alloc_pdu.type = 1;
BCCH_alloc_pdu.vrb_type = 0;
BCCH_alloc_pdu.rballoc = BCCH_RB_ALLOC;
BCCH_alloc_pdu.ndi = 1;
BCCH_alloc_pdu.rv = 1;
BCCH_alloc_pdu.mcs = 1;
BCCH_alloc_pdu.harq_pid = 0;
BCCH_alloc_pdu.TPC = 1; // set to 3 PRB
// for FDD mode
BCCH_alloc_pdu_fdd.type = 1;
BCCH_alloc_pdu_fdd.vrb_type = 0;
BCCH_alloc_pdu_fdd.rballoc = BCCH_RB_ALLOC;
BCCH_alloc_pdu_fdd.ndi = 1;
BCCH_alloc_pdu_fdd.rv = 1;
BCCH_alloc_pdu_fdd.mcs = 1;
BCCH_alloc_pdu_fdd.harq_pid = 0;
BCCH_alloc_pdu_fdd.TPC = 1; // set to 3 PRB
*/
// for FDD mode
BCCH_alloc_pdu_fdd.type = 1;
BCCH_alloc_pdu_fdd.vrb_type = 0;
BCCH_alloc_pdu_fdd.rballoc = BCCH_RB_ALLOC;
BCCH_alloc_pdu_fdd.ndi = 1;
BCCH_alloc_pdu_fdd.rv = 1;
BCCH_alloc_pdu_fdd.mcs = 1;
BCCH_alloc_pdu_fdd.harq_pid = 0;
BCCH_alloc_pdu_fdd.TPC = 1; // set to 3 PRB
*/
DLSCH_alloc_pdu1A.type = 1;
DLSCH_alloc_pdu1A.vrb_type = 0;
DLSCH_alloc_pdu1A.rballoc = BCCH_RB_ALLOC;
DLSCH_alloc_pdu1A.ndi = 1;
DLSCH_alloc_pdu1A.rv = 1;
DLSCH_alloc_pdu1A.mcs = 2;
DLSCH_alloc_pdu1A.harq_pid = 0;
DLSCH_alloc_pdu1A.TPC = 1; // set to 3 PRB
DLSCH_alloc_pdu1A.type = 1;
DLSCH_alloc_pdu1A.vrb_type = 0;
DLSCH_alloc_pdu1A.rballoc = BCCH_RB_ALLOC;
DLSCH_alloc_pdu1A.ndi = 1;
DLSCH_alloc_pdu1A.rv = 1;
DLSCH_alloc_pdu1A.mcs = 2;
DLSCH_alloc_pdu1A.harq_pid = 0;
DLSCH_alloc_pdu1A.TPC = 1; // set to 3 PRB
DLSCH_alloc_pdu1A_fdd.type = 1;
DLSCH_alloc_pdu1A_fdd.vrb_type = 0;
DLSCH_alloc_pdu1A_fdd.rballoc = BCCH_RB_ALLOC;
DLSCH_alloc_pdu1A_fdd.ndi = 1;
DLSCH_alloc_pdu1A_fdd.rv = 1;
DLSCH_alloc_pdu1A_fdd.mcs = 2;
DLSCH_alloc_pdu1A_fdd.harq_pid = 0;
DLSCH_alloc_pdu1A_fdd.TPC = 1; // set to 3 PRB
DLSCH_alloc_pdu1A_fdd.type = 1;
DLSCH_alloc_pdu1A_fdd.vrb_type = 0;
DLSCH_alloc_pdu1A_fdd.rballoc = BCCH_RB_ALLOC;
DLSCH_alloc_pdu1A_fdd.ndi = 1;
DLSCH_alloc_pdu1A_fdd.rv = 1;
DLSCH_alloc_pdu1A_fdd.mcs = 2;
DLSCH_alloc_pdu1A_fdd.harq_pid = 0;
DLSCH_alloc_pdu1A_fdd.TPC = 1; // set to 3 PRB
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = RA_RB_ALLOC;
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 0;
RA_alloc_pdu.mcs = 0;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = RA_RB_ALLOC;
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 0;
RA_alloc_pdu.mcs = 0;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
RA_alloc_pdu_fdd.type = 1;
RA_alloc_pdu_fdd.vrb_type = 0;
RA_alloc_pdu_fdd.rballoc = RA_RB_ALLOC;
RA_alloc_pdu_fdd.ndi = 1;
RA_alloc_pdu_fdd.rv = 1;
RA_alloc_pdu_fdd.mcs = 1;
RA_alloc_pdu_fdd.harq_pid = 0;
RA_alloc_pdu_fdd.TPC = 1;
RA_alloc_pdu_fdd.type = 1;
RA_alloc_pdu_fdd.vrb_type = 0;
RA_alloc_pdu_fdd.rballoc = RA_RB_ALLOC;
RA_alloc_pdu_fdd.ndi = 1;
RA_alloc_pdu_fdd.rv = 1;
RA_alloc_pdu_fdd.mcs = 1;
RA_alloc_pdu_fdd.harq_pid = 0;
RA_alloc_pdu_fdd.TPC = 1;
DLSCH_alloc_pdu1.rballoc = 0xf;
DLSCH_alloc_pdu1.TPC = 0;
DLSCH_alloc_pdu1.dai = 0;
DLSCH_alloc_pdu1.harq_pid = 0;
DLSCH_alloc_pdu1.tb_swap = 0;
DLSCH_alloc_pdu1.mcs1 = 4;
DLSCH_alloc_pdu1.ndi1 = 1;
DLSCH_alloc_pdu1.rv1 = 0;
DLSCH_alloc_pdu1.rballoc = 0xf;
DLSCH_alloc_pdu1.TPC = 0;
DLSCH_alloc_pdu1.dai = 0;
DLSCH_alloc_pdu1.harq_pid = 0;
DLSCH_alloc_pdu1.tb_swap = 0;
DLSCH_alloc_pdu1.mcs1 = 4;
DLSCH_alloc_pdu1.ndi1 = 1;
DLSCH_alloc_pdu1.rv1 = 0;
// Forget second codeword
if (transmission_mode == 6) {
DLSCH_alloc_pdu1.tpmi = 5; // PUSCH_PRECODING0
} else {
DLSCH_alloc_pdu1.tpmi = 0;
}
// Forget second codeword
if (transmission_mode == 6) {
DLSCH_alloc_pdu1.tpmi = 5; // PUSCH_PRECODING0
} else {
DLSCH_alloc_pdu1.tpmi = 0;
}
DLSCH_alloc_pdu2.rah = 0;
DLSCH_alloc_pdu2.rballoc = DLSCH_RB_ALLOC;
DLSCH_alloc_pdu2.TPC = 0;
DLSCH_alloc_pdu2.dai = 0;
DLSCH_alloc_pdu2.harq_pid = 0;
DLSCH_alloc_pdu2.tb_swap = 0;
DLSCH_alloc_pdu2.mcs1 = 4;
DLSCH_alloc_pdu2.ndi1 = 1;
DLSCH_alloc_pdu2.rv1 = 0;
DLSCH_alloc_pdu2.rah = 0;
DLSCH_alloc_pdu2.rballoc = DLSCH_RB_ALLOC;
DLSCH_alloc_pdu2.TPC = 0;
DLSCH_alloc_pdu2.dai = 0;
DLSCH_alloc_pdu2.harq_pid = 0;
DLSCH_alloc_pdu2.tb_swap = 0;
DLSCH_alloc_pdu2.mcs1 = 4;
DLSCH_alloc_pdu2.ndi1 = 1;
DLSCH_alloc_pdu2.rv1 = 0;
// Forget second codeword
if (transmission_mode == 6) {
DLSCH_alloc_pdu2.tpmi = 5; // PUSCH_PRECODING0
} else {
DLSCH_alloc_pdu2.tpmi = 0;
}
// Forget second codeword
if (transmission_mode == 6) {
DLSCH_alloc_pdu2.tpmi = 5; // PUSCH_PRECODING0
} else {
DLSCH_alloc_pdu2.tpmi = 0;
}
}
openair2/LAYER2/MAC/main.c
+168 -237
View File
@@ -48,66 +48,72 @@
extern RAN_CONTEXT_t RC;
void dl_phy_sync_success(module_id_t module_idP,
frame_t frameP,
unsigned char eNB_index,
uint8_t first_sync) //init as MR
void dl_phy_sync_success(module_id_t module_idP, frame_t frameP, unsigned char eNB_index, uint8_t first_sync) //init as MR
{
LOG_D(MAC,"[UE %d] Frame %d: PHY Sync to eNB_index %d successful \n", module_idP, frameP, eNB_index);
LOG_D(MAC, "[UE %d] Frame %d: PHY Sync to eNB_index %d successful \n",
module_idP, frameP, eNB_index);
#if defined(ENABLE_USE_MME)
int mme_enabled=1;
int mme_enabled = 1;
#else
int mme_enabled=0;
int mme_enabled = 0;
#endif
if (first_sync==1 && !(mme_enabled==1)) {
//layer2_init_UE(module_idP);
openair_rrc_ue_init(module_idP,eNB_index);
} else
{
rrc_in_sync_ind(module_idP,frameP,eNB_index);
}
}
void mac_UE_out_of_sync_ind(module_id_t module_idP, frame_t frameP, uint16_t eNB_index)
{
// Mac_rlc_xface->mac_out_of_sync_ind(Mod_id, frameP, eNB_index);
}
int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active, uint8_t HO_active)
{
int i;
LOG_I(MAC,"[MAIN] Init function start:Nb_UE_INST=%d\n",NB_UE_INST);
if (NB_UE_INST>0) {
UE_mac_inst = (UE_MAC_INST*)malloc16(NB_UE_INST*sizeof(UE_MAC_INST));
AssertFatal(UE_mac_inst!=NULL,
"[MAIN] Can't ALLOCATE %zu Bytes for %d UE_MAC_INST with size %zu \n",NB_UE_INST*sizeof(UE_MAC_INST),NB_UE_INST,sizeof(UE_MAC_INST));
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d UE_MAC_INST @ %p\n",NB_UE_INST*sizeof(UE_MAC_INST),NB_UE_INST,UE_mac_inst);
bzero(UE_mac_inst,NB_UE_INST*sizeof(UE_MAC_INST));
for(i=0; i<NB_UE_INST; i++) {
ue_init_mac(i);
if (first_sync == 1 && !(mme_enabled == 1)) {
//layer2_init_UE(module_idP);
openair_rrc_ue_init(module_idP, eNB_index);
} else {
rrc_in_sync_ind(module_idP, frameP, eNB_index);
}
} else {
UE_mac_inst = NULL;
}
}
void
mac_UE_out_of_sync_ind(module_id_t module_idP, frame_t frameP,
uint16_t eNB_index)
{
// Mac_rlc_xface->mac_out_of_sync_ind(Mod_id, frameP, eNB_index);
}
LOG_I(MAC,"[MAIN] calling RRC\n");
openair_rrc_top_init_ue(eMBMS_active, uecap_xer, cba_group_active,HO_active);
int
mac_top_init_ue(int eMBMS_active, char *uecap_xer,
uint8_t cba_group_active, uint8_t HO_active)
{
LOG_I(MAC,"[MAIN][INIT] Init function finished\n");
int i;
return(0);
LOG_I(MAC, "[MAIN] Init function start:Nb_UE_INST=%d\n", NB_UE_INST);
if (NB_UE_INST > 0) {
UE_mac_inst =
(UE_MAC_INST *) malloc16(NB_UE_INST * sizeof(UE_MAC_INST));
AssertFatal(UE_mac_inst != NULL,
"[MAIN] Can't ALLOCATE %zu Bytes for %d UE_MAC_INST with size %zu \n",
NB_UE_INST * sizeof(UE_MAC_INST), NB_UE_INST,
sizeof(UE_MAC_INST));
LOG_D(MAC, "[MAIN] ALLOCATE %zu Bytes for %d UE_MAC_INST @ %p\n",
NB_UE_INST * sizeof(UE_MAC_INST), NB_UE_INST, UE_mac_inst);
bzero(UE_mac_inst, NB_UE_INST * sizeof(UE_MAC_INST));
for (i = 0; i < NB_UE_INST; i++) {
ue_init_mac(i);
}
} else {
UE_mac_inst = NULL;
}
LOG_I(MAC, "[MAIN] calling RRC\n");
openair_rrc_top_init_ue(eMBMS_active, uecap_xer, cba_group_active,
HO_active);
LOG_I(MAC, "[MAIN][INIT] Init function finished\n");
return (0);
}
@@ -115,183 +121,107 @@ int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
void mac_top_init_eNB()
{
module_id_t i,j;
int list_el;
UE_list_t *UE_list;
eNB_MAC_INST *mac;
module_id_t i, j;
int list_el;
UE_list_t *UE_list;
eNB_MAC_INST *mac;
LOG_I(MAC,"[MAIN] Init function start:nb_macrlc_inst=%d\n",RC.nb_macrlc_inst);
LOG_I(MAC, "[MAIN] Init function start:nb_macrlc_inst=%d\n",
RC.nb_macrlc_inst);
if (RC.nb_macrlc_inst>0) {
RC.mac = (eNB_MAC_INST**)malloc16(RC.nb_macrlc_inst*sizeof(eNB_MAC_INST*));
AssertFatal(RC.mac != NULL,"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst*sizeof(eNB_MAC_INST*),
RC.nb_macrlc_inst,
sizeof(eNB_MAC_INST));
for (i=0;i<RC.nb_macrlc_inst;i++) {
RC.mac[i] = (eNB_MAC_INST*)malloc16(sizeof(eNB_MAC_INST));
AssertFatal(RC.mac != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst*sizeof(eNB_MAC_INST*),RC.nb_macrlc_inst,sizeof(eNB_MAC_INST));
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",sizeof(eNB_MAC_INST),RC.nb_macrlc_inst,RC.mac);
bzero(RC.mac[i],sizeof(eNB_MAC_INST));
RC.mac[i]->Mod_id = i;
for (j=0;j<MAX_NUM_CCs;j++) {
RC.mac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
RC.mac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
for (int k=0;k<10;k++) RC.mac[i]->UL_req_tmp[j][k].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.mac[i]->hi_dci0_pdu_list[j];
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0;
}
if (RC.nb_macrlc_inst > 0) {
RC.mac =
(eNB_MAC_INST **) malloc16(RC.nb_macrlc_inst *
sizeof(eNB_MAC_INST *));
AssertFatal(RC.mac != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst * sizeof(eNB_MAC_INST *),
RC.nb_macrlc_inst, sizeof(eNB_MAC_INST));
for (i = 0; i < RC.nb_macrlc_inst; i++) {
RC.mac[i] = (eNB_MAC_INST *) malloc16(sizeof(eNB_MAC_INST));
AssertFatal(RC.mac != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst * sizeof(eNB_MAC_INST *),
RC.nb_macrlc_inst, sizeof(eNB_MAC_INST));
LOG_D(MAC,
"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",
sizeof(eNB_MAC_INST), RC.nb_macrlc_inst, RC.mac);
bzero(RC.mac[i], sizeof(eNB_MAC_INST));
RC.mac[i]->Mod_id = i;
for (j = 0; j < MAX_NUM_CCs; j++) {
RC.mac[i]->DL_req[j].dl_config_request_body.
dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
RC.mac[i]->UL_req[j].ul_config_request_body.
ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
for (int k = 0; k < 10; k++)
RC.mac[i]->UL_req_tmp[j][k].
ul_config_request_body.ul_config_pdu_list =
RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].
hi_dci0_request_body.hi_dci0_pdu_list =
RC.mac[i]->hi_dci0_pdu_list[j];
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list =
RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0;
}
}
AssertFatal(rlc_module_init() == 0,
"Could not initialize RLC layer\n");
// These should be out of here later
pdcp_layer_init();
rrc_init_global_param();
} else {
RC.mac = NULL;
}
AssertFatal(rlc_module_init()==0,"Could not initialize RLC layer\n");
// These should be out of here later
pdcp_layer_init ();
rrc_init_global_param();
} else {
RC.mac = NULL;
}
// Initialize Linked-List for Active UEs
for(i=0; i<RC.nb_macrlc_inst; i++) {
mac = RC.mac[i];
// Initialize Linked-List for Active UEs
for (i = 0; i < RC.nb_macrlc_inst; i++) {
mac = RC.mac[i];
mac->if_inst = IF_Module_init(i);
mac->if_inst = IF_Module_init(i);
UE_list = &mac->UE_list;
UE_list = &mac->UE_list;
UE_list->num_UEs=0;
UE_list->head=-1;
UE_list->head_ul=-1;
UE_list->avail=0;
UE_list->num_UEs = 0;
UE_list->head = -1;
UE_list->head_ul = -1;
UE_list->avail = 0;
for (list_el=0; list_el<NUMBER_OF_UE_MAX-1; list_el++) {
UE_list->next[list_el]=list_el+1;
UE_list->next_ul[list_el]=list_el+1;
for (list_el = 0; list_el < NUMBER_OF_UE_MAX - 1; list_el++) {
UE_list->next[list_el] = list_el + 1;
UE_list->next_ul[list_el] = list_el + 1;
}
UE_list->next[list_el] = -1;
UE_list->next_ul[list_el] = -1;
}
UE_list->next[list_el]=-1;
UE_list->next_ul[list_el]=-1;
}
}
void mac_init_cell_params(int Mod_idP,int CC_idP) {
void mac_init_cell_params(int Mod_idP, int CC_idP)
{
int j;
RA_TEMPLATE *RA_template;
UE_TEMPLATE *UE_template;
int size_bytes1,size_bytes2,size_bits1,size_bits2;
int j;
UE_TEMPLATE *UE_template;
LOG_D(MAC,"[MAIN][eNB %d] CC_id %d initializing RA_template\n",Mod_idP, CC_idP);
LOG_D(MAC, "[MSC_NEW][FRAME 00000][MAC_eNB][MOD %02d][]\n", Mod_idP);
COMMON_channels_t *cc = &RC.mac[Mod_idP]->common_channels[CC_idP];
LOG_D(MAC, "[MSC_NEW][FRAME 00000][MAC_eNB][MOD %02d][]\n", Mod_idP);
COMMON_channels_t *cc = &RC.mac[Mod_idP]->common_channels[CC_idP];
RA_template = (RA_TEMPLATE *)&cc->RA_template[0];
for (j=0; j<NB_RA_PROC_MAX; j++) {
if ( cc->tdd_Config != NULL) {
switch (cc->mib->message.dl_Bandwidth) {
case MasterInformationBlock__dl_Bandwidth_n6:
size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
break;
case MasterInformationBlock__dl_Bandwidth_n25:
size_bytes1 = sizeof(DCI1A_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_5MHz_TDD_1_6_t;
break;
case MasterInformationBlock__dl_Bandwidth_n50:
size_bytes1 = sizeof(DCI1A_10MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_10MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_10MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_10MHz_TDD_1_6_t;
break;
case MasterInformationBlock__dl_Bandwidth_n100:
size_bytes1 = sizeof(DCI1A_20MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_20MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_20MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_20MHz_TDD_1_6_t;
break;
default:
size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
break;
}
} else {
switch (cc->mib->message.dl_Bandwidth) {
case MasterInformationBlock__dl_Bandwidth_n6:
size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
break;
case MasterInformationBlock__dl_Bandwidth_n25:
size_bytes1 = sizeof(DCI1A_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_5MHz_FDD_t;
break;
case MasterInformationBlock__dl_Bandwidth_n50:
size_bytes1 = sizeof(DCI1A_10MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_10MHz_FDD_t);
size_bits1 = sizeof_DCI1A_10MHz_FDD_t;
size_bits2 = sizeof_DCI1A_10MHz_FDD_t;
break;
case MasterInformationBlock__dl_Bandwidth_n100:
size_bytes1 = sizeof(DCI1A_20MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_20MHz_FDD_t);
size_bits1 = sizeof_DCI1A_20MHz_FDD_t;
size_bits2 = sizeof_DCI1A_20MHz_FDD_t;
break;
default:
size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
break;
}
memset(&RC.mac[Mod_idP]->eNB_stats, 0, sizeof(eNB_STATS));
UE_template =
(UE_TEMPLATE *) & RC.mac[Mod_idP]->UE_list.UE_template[CC_idP][0];
for (j = 0; j < NUMBER_OF_UE_MAX; j++) {
UE_template[j].rnti = 0;
// initiallize the eNB to UE statistics
memset(&RC.mac[Mod_idP]->UE_list.eNB_UE_stats[CC_idP][j], 0,
sizeof(eNB_UE_STATS));
}
memcpy((void *)&RA_template[j].RA_alloc_pdu1[0],(void *)&RA_alloc_pdu,size_bytes1);
memcpy((void *)&RA_template[j].RA_alloc_pdu2[0],(void *)&DLSCH_alloc_pdu1A,size_bytes2);
RA_template[j].RA_dci_size_bytes1 = size_bytes1;
RA_template[j].RA_dci_size_bytes2 = size_bytes2;
RA_template[j].RA_dci_size_bits1 = size_bits1;
RA_template[j].RA_dci_size_bits2 = size_bits2;
RA_template[j].RA_dci_fmt1 = format1A;
RA_template[j].RA_dci_fmt2 = format1A;
}
memset (&RC.mac[Mod_idP]->eNB_stats,0,sizeof(eNB_STATS));
UE_template = (UE_TEMPLATE *)&RC.mac[Mod_idP]->UE_list.UE_template[CC_idP][0];
for (j=0; j<NUMBER_OF_UE_MAX; j++) {
UE_template[j].rnti=0;
// initiallize the eNB to UE statistics
memset (&RC.mac[Mod_idP]->UE_list.eNB_UE_stats[CC_idP][j],0,sizeof(eNB_UE_STATS));
}
}
@@ -300,17 +230,17 @@ int rlcmac_init_global_param(void)
{
LOG_I(MAC,"[MAIN] CALLING RLC_MODULE_INIT...\n");
LOG_I(MAC, "[MAIN] CALLING RLC_MODULE_INIT...\n");
if (rlc_module_init()!=0) {
return(-1);
}
if (rlc_module_init() != 0) {
return (-1);
}
pdcp_layer_init ();
pdcp_layer_init();
LOG_I(MAC,"[MAIN] Init Global Param Done\n");
LOG_I(MAC, "[MAIN] Init Global Param Done\n");
return 0;
return 0;
}
@@ -318,29 +248,31 @@ void mac_top_cleanup(void)
{
#ifndef USER_MODE
pdcp_module_cleanup ();
pdcp_module_cleanup();
#endif
if (NB_UE_INST>0) {
free (UE_mac_inst);
}
if (NB_UE_INST > 0) {
free(UE_mac_inst);
}
if (RC.nb_macrlc_inst>0) {
free(RC.mac);
}
if (RC.nb_macrlc_inst > 0) {
free(RC.mac);
}
}
int l2_init_ue(int eMBMS_active, char *uecap_xer,uint8_t cba_group_active, uint8_t HO_active)
int
l2_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
uint8_t HO_active)
{
LOG_I(MAC,"[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
// NB_NODE=2;
// NB_INST=2;
LOG_I(MAC, "[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
// NB_NODE=2;
// NB_INST=2;
rlcmac_init_global_param();
LOG_I(MAC,"[MAIN] init UE MAC functions \n");
mac_top_init_ue(eMBMS_active,uecap_xer,cba_group_active,HO_active);
return(1);
rlcmac_init_global_param();
LOG_I(MAC, "[MAIN] init UE MAC functions \n");
mac_top_init_ue(eMBMS_active, uecap_xer, cba_group_active, HO_active);
return (1);
}
int l2_init_eNB()
@@ -348,13 +280,12 @@ int l2_init_eNB()
LOG_I(MAC,"[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
LOG_I(MAC, "[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
rlcmac_init_global_param();
rlcmac_init_global_param();
LOG_D(MAC,"[MAIN] ALL INIT OK\n");
LOG_D(MAC, "[MAIN] ALL INIT OK\n");
return(1);
return (1);
}
openair2/LAYER2/MAC/openair2_proc.c
-405
View File
@@ -1,405 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file openair2_proc.c
\brief MAC layer online statistics
\author Navid Nikaein
\date 2013 - 2014
\version 1.0
@ingroup _mac
*/
#ifndef USER_MODE
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#endif
#include "LAYER2/MAC/defs.h"
#include "LAYER2/MAC/extern.h"
//#include "RRC/LITE/extern.h"
//#include "LAYER2/PDCP/pdcp.h"
#include "proto.h"
extern RAN_CONTEXT_t RC;
int openair2_stats_read(char *buffer, char **my_buffer, off_t off, int length)
{
int len = 0,fg,Overhead, Sign;
unsigned int i,j,k,kk;
unsigned int ue_id, eNB_id;
unsigned int Mod_id = 0,CH_index;
unsigned int stat_tx_pdcp_sdu;
unsigned int stat_tx_pdcp_bytes;
unsigned int stat_tx_pdcp_sdu_discarded;
unsigned int stat_tx_pdcp_bytes_discarded;
unsigned int stat_tx_data_pdu;
unsigned int stat_tx_data_bytes;
unsigned int stat_tx_retransmit_pdu_by_status;
unsigned int stat_tx_retransmit_bytes_by_status;
unsigned int stat_tx_retransmit_pdu;
unsigned int stat_tx_retransmit_bytes;
unsigned int stat_tx_control_pdu;
unsigned int stat_tx_control_bytes;
unsigned int stat_rx_pdcp_sdu;
unsigned int stat_rx_pdcp_bytes;
unsigned int stat_rx_data_pdus_duplicate;
unsigned int stat_rx_data_bytes_duplicate;
unsigned int stat_rx_data_pdu;
unsigned int stat_rx_data_bytes;
unsigned int stat_rx_data_pdu_dropped;
unsigned int stat_rx_data_bytes_dropped;
unsigned int stat_rx_data_pdu_out_of_window;
unsigned int stat_rx_data_bytes_out_of_window;
unsigned int stat_rx_control_pdu;
unsigned int stat_rx_control_bytes;
unsigned int stat_timer_reordering_timed_out;
unsigned int stat_timer_poll_retransmit_timed_out;
unsigned int stat_timer_status_prohibit_timed_out;
// UE part
for (ue_id=0; ue_id<NUM_UE_INST; ue_id++) {
// mod_id used for PDCP and RLC
Mod_id = NB_eNB_INST + ue_id ;
len+=sprintf(&buffer[len],"UE RX TTI: %d\n",UE_mac_inst[ue_id].rxFrame);
for (enb_id= 0; enb_id <NB_SIG_CNX_UE; enb_id++) {
switch (mac_get_rrc_status(ue_id,0,enb_id) > RRC_CONNECTED) {
case RRC_RECONFIGURED :
case RRC_CONNECTED:
case RRC_SI_RECEIVED:
case RRC_IDLE:
break;
if (mac_get_rrc_status(ue_id,0,enb_id) > RRC_CONNECTED) {
// if (UE_mac_inst[ue_id].Dcch_lchan[CH_index].Active==1) {
len+=sprintf(&buffer[len],"eNB %d: Wideband SINR %d dB---\n",
CH_index,UE_mac_inst[Mod_id].Def_meas[CH_index].Wideband_sinr);
len+=sprintf(&buffer[len],"CH %d: Subband SINR (dB) :",
CH_index);
for (fg=0; fg<NUMBER_OF_MEASUREMENT_SUBBANDS; fg++) {
len+=sprintf(&buffer[len],"%d ",UE_mac_inst[Mod_id].Def_meas[CH_index].Sinr_meas[0][fg]);
}
len+=sprintf(&buffer[len],"\n");
len+=sprintf(&buffer[len],"BCCH %d, NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Bcch_lchan[CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Bcch_lchan[CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Bcch_lchan[CH_index].Lchan_info.NB_RX_ERRORS);
len+=sprintf(&buffer[len],"CCCH %d, NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Ccch_lchan[CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Ccch_lchan[CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Ccch_lchan[CH_index].Lchan_info.NB_RX_ERRORS);
len+=sprintf(&buffer[len],"LCHAN %d (DCCH), NB_TX_MAC = %d (%d bits/TTI, %d kbits/sec), NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.NB_TX,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.output_rate,
(10*UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.output_rate)>>5,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.NB_RX_ERRORS);
for(i=1; i<NB_RAB_MAX; i++) {
if (UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Active==1) {
Overhead=UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.output_rate - Pdcp_stats_tx_rate[k][CH_index][i];
if(Overhead<0) {
Overhead=-Overhead;
Sign=-1;
} else {
Sign=1;
}
len+=sprintf(&buffer[len],"[PDCP]LCHAN %d: NB_TX = %d ,Tx_rate =(%d bits/TTI ,%d Kbits/s), NB_RX = %d ,Rx_rate =(%d bits/TTI ,%d Kbits/s) , LAYER2 TX OVERHEAD: %d Kbits/s\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
Pdcp_stats_tx[k][CH_index][i],
Pdcp_stats_tx_rate[k][CH_index][i],
(10*Pdcp_stats_tx_rate[k][CH_index][i])>>5,
Pdcp_stats_rx[k][CH_index][i],
Pdcp_stats_rx_rate[k][CH_index][i],
(10*Pdcp_stats_rx_rate[k][CH_index][i])>>5,
Sign*(10*Overhead)>>5);
int status = rlc_stat_req (k,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
&stat_tx_pdcp_sdu,
&stat_tx_pdcp_bytes,
&stat_tx_pdcp_sdu_discarded,
&stat_tx_pdcp_bytes_discarded,
&stat_tx_data_pdu,
&stat_tx_data_bytes,
&stat_tx_retransmit_pdu_by_status,
&stat_tx_retransmit_bytes_by_status,
&stat_tx_retransmit_pdu,
&stat_tx_retransmit_bytes,
&stat_tx_control_pdu,
&stat_tx_control_bytes,
&stat_rx_pdcp_sdu,
&stat_rx_pdcp_bytes,
&stat_rx_data_pdus_duplicate,
&stat_rx_data_bytes_duplicate,
&stat_rx_data_pdu,
&stat_rx_data_bytes,
&stat_rx_data_pdu_dropped,
&stat_rx_data_bytes_dropped,
&stat_rx_data_pdu_out_of_window,
&stat_rx_data_bytes_out_of_window,
&stat_rx_control_pdu,
&stat_rx_control_bytes,
&stat_timer_reordering_timed_out,
&stat_timer_poll_retransmit_timed_out,
&stat_timer_status_prohibit_timed_out) ;
if (status == RLC_OP_STATUS_OK) {
len+=sprintf(&buffer[len],"RLC LCHAN %d, NB_SDU_TO_TX = %d\tNB_SDU_DISC %d\tNB_RX_SDU %d\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
tx_pdcp_sdu,
tx_pdcp_sdu_discarded,
rx_sdu);
len+=sprintf(&buffer[len],"RLC LCHAN %d, NB_TB_TX_DATA = %d\tNB_TB_TX_CONTROL %d\tNB_TX_TB_RETRANS %d",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
tx_data_pdu,
tx_control_pdu,
tx_retransmit_pdu);
len+=sprintf(&buffer[len],"\tRLC LCHAN %d, NB_TX_TB_RETRANS_BY_STATUS = %d\tNB_TX_TB_RETRANS_PADD %d\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
tx_retransmit_pdu_by_status,
tx_retransmit_pdu_unblock);
len+=sprintf(&buffer[len],"RLC LCHAN %d, NB_RX_DATA = %d\tNB_RX_TB_OUT_WIN %d\tNB_RX_TB_CORRUPT %d\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
rx_data_pdu,
rx_data_pdu_out_of_window,
rx_error_pdu);
}
len+=sprintf(&buffer[len],"[MAC]: LCHAN %d, NB_TX_MAC = %d (%d bits/TTI, %d kbits/s), NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_TX,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.output_rate,
(10*UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.output_rate)>>5,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX_ERRORS);
len+=sprintf(&buffer[len]," TX per TB: ");
for(kk=0; kk<MAX_NUMBER_TB_PER_LCHAN/2; kk++) {
len+=sprintf(&buffer[len],"%d . ",UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_TX_TB[kk]);
}
len+=sprintf(&buffer[len],"\n");
len+=sprintf(&buffer[len]," RXerr per TB: ");
for(kk=0; kk<MAX_NUMBER_TB_PER_LCHAN/2; kk++)
len+=sprintf(&buffer[len],"%d/%d . ",UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX_ERRORS_TB[kk],
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX_TB[kk]);
len+=sprintf(&buffer[len],"\n");
}
}
}
}
#endif //PHY_EMUL_ONE_MACHINE
}
else if(Mac_rlc_xface->Is_cluster_head[k] ==1) {
Mod_id=k;
len+=sprintf(&buffer[len],
"-------------------------------------------------------------------CH %d: TTI: %d------------------------------------------------------------------\n",
NODE_ID[Mod_id],Mac_rlc_xface->frame);
for(i=1; i<=NB_CNX_CH; i++) {
if (CH_mac_inst[Mod_id].Dcch_lchan[i].Active==1) {
len+=sprintf(&buffer[len],"\nMR index %d: DL SINR (feedback) %d dB, CQI: %s\n\n",
i,//CH_rrc_inst[Mod_id].Info.UE_list[i].L2_id[0],
CH_mac_inst[Mod_id].Def_meas[i].Wideband_sinr);
//print_cqi(CH_mac_inst[Mod_id].Def_meas[i].cqi));
len+=sprintf(&buffer[len],
"[MAC] LCHAN %d (DCCH), NB_TX_MAC= %d (%d bits/TTI, %d kbits/s), NB_RX_MAC= %d (errors %d, sacch errors %d, sach errors %d, sach_missing %d)\n\n",
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.Lchan_id.Index,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_TX,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.output_rate,
(10*CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.output_rate)>>5,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_ERRORS,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_SACCH_ERRORS,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_SACH_ERRORS,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_SACH_MISSING);
for(j=0; j<NB_RAB_MAX; j++) {
if (CH_mac_inst[Mod_id].Dtch_lchan[j][i].Active==1) {
Overhead=CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.output_rate - Pdcp_stats_tx_rate[k][i][j];
if(Overhead<0) {
Overhead=-Overhead;
Sign=-1;
} else {
Sign=1;
}
len+=sprintf(&buffer[len],
"[PDCP]LCHAN %d: NB_TX = %d ,Tx_rate =(%d bits/TTI ,%d Kbits/s), NB_RX = %d ,Rx_rate =(%d bits/TTI ,%d Kbits/s), LAYER2 TX OVERHEAD= %d Kbits/s\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
Pdcp_stats_tx[k][i][j],
Pdcp_stats_tx_rate[k][i][j],
(10*Pdcp_stats_tx_rate[k][i][j])>>5,
Pdcp_stats_rx[k][i][j],
Pdcp_stats_rx_rate[k][i][j],
(10*Pdcp_stats_rx_rate[k][i][j])>>5,
Sign*(10*Overhead)>>5);
int status = rlc_stat_req (k,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
&tx_pdcp_sdu,
&tx_pdcp_sdu_discarded,
&tx_retransmit_pdu_unblock,
&tx_retransmit_pdu_by_status,
&tx_retransmit_pdu,
&tx_data_pdu,
&tx_control_pdu,
&rx_sdu,
&rx_error_pdu,
&rx_data_pdu,
&rx_data_pdu_out_of_window,
&rx_control_pdu) ;
/*
if (status == RLC_OP_STATUS_OK) {
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_SDU_TO_TX = %d\tNB_SDU_DISC %d\tNB_RX_SDU %d\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
tx_pdcp_sdu,
tx_pdcp_sdu_discarded,
rx_sdu);
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_TB_TX_DATA = %d\tNB_TB_TX_CONTROL %d\tNB_TX_TB_RETRANS %\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
tx_data_pdu,
tx_control_pdu,
tx_retransmit_pdu);
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_TX_TB_RETRANS_BY_STATUS = %d\tNB_TX_TB_RETRANS_PADD %d\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
tx_retransmit_pdu_by_status,
tx_retransmit_pdu_unblock);
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_RX_DATA = %d\tNB_RX_TB_OUT_WIN %d\tNB_RX_TB_CORRUPT %d\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
rx_data_pdu,
rx_data_pdu_out_of_window,
rx_error_pdu);
}
*/
len+=sprintf(&buffer[len],
"[MAC]LCHAN %d (CNX %d,RAB %d), NB_TX_MAC= %d (%d bits/TTI, %d kbit/s), NB_RX_MAC= %d (errors %d, sacch_errors %d, sach_errors %d, sach_missing %d)\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
i,j,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_TX,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.output_rate,
(10*CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.output_rate)>>5,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_ERRORS,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_SACCH_ERRORS,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_SACH_ERRORS,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_SACH_MISSING);
len+=sprintf(&buffer[len],"[MAC][SCHEDULER] TX Arrival Rate %d, TX Service Rate %d, RX Arrival rate %d, RX Service rate %d, NB_BW_REQ_RX %d\n\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Arrival_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Tx_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Req_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Rx_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_BW_REQ_RX);
/*
len+=sprintf(&buffer[len]," TX per TB: ");
for(kk=0;kk<MAX_NUMBER_TB_PER_LCHAN/2;kk++)
len+=sprintf(&buffer[len],"%d.",CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_TX_TB[kk]);
len+=sprintf(&buffer[len],"\n");
len+=sprintf(&buffer[len]," RXerr per TB: ");
for(kk=0;kk<MAX_NUMBER_TB_PER_LCHAN/2;kk++)
len+=sprintf(&buffer[len],"%d/%d . ",CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_ERRORS_TB[kk],
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_TB[kk]);
len+=sprintf(&buffer[len],"\n");
*/
}
}
}
}
}
}
return len;
}
#ifndef USER_MODE
static struct proc_dir_entry *proc_openair2_root;
/*
* Initialize the module and add the /proc file.
*/
int add_openair2_stats()
{
//#ifdef KERNEL_VERSION_GREATER_THAN_2629
struct proc_dir_entry *pde;
//#endif
proc_openair2_root = proc_mkdir("openair2",0);
//#ifdef KERNEL_VERSION_GREATER_THAN_2629
// pde = proc_create_entry("lchan_stats", S_IFREG | S_IRUGO, proc_openair2_root);
pde = create_proc_read_entry("lchan_stats", S_IFREG | S_IRUGO, proc_openair2_root, (read_proc_t*)&openair2_stats_read, NULL);
if (!pde) {
printk("[OPENAIR][ERROR] can't create proc entry !\n");
}
//#else
//create_proc_info_entry("lchan_stats", S_IFREG | S_IRUGO, proc_openair2_root, openair2_stats_read);
//#endif
return 0;
}
/*
* Unregister the file when the module is closed.
*/
void remove_openair2_stats()
{
if (proc_openair2_root) {
printk("[OPENAIR][CLEANUP] Removing openair proc entry\n");
remove_proc_entry("lchan_stats", proc_openair2_root);
//#ifdef KERNEL_VERSION_GREATER_THAN_2629
//#else
remove_proc_entry("openair2",NULL);
//#endif;
}
}
#endif
openair2/LAYER2/MAC/pre_processor.c
+1478 -1162
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/proto.h
+432 -339
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/ra_procedures.c
+548 -426
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File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/rar_tools.c
+188 -211
View File
@@ -40,269 +40,246 @@
#define DEBUG_RAR
extern unsigned int localRIV2alloc_LUT25[512];
extern unsigned int distRIV2alloc_LUT25[512];
extern unsigned int localRIV2alloc_LUT25[512];
extern unsigned int distRIV2alloc_LUT25[512];
extern unsigned short RIV2nb_rb_LUT25[512];
extern unsigned short RIV2first_rb_LUT25[512];
extern RAN_CONTEXT_t RC;
//------------------------------------------------------------------------------
unsigned short fill_rar(
const module_id_t module_idP,
const int CC_id,
const frame_t frameP,
uint8_t* const dlsch_buffer,
const uint16_t N_RB_UL,
const uint8_t input_buffer_length
)
unsigned short
fill_rar(const module_id_t module_idP,
const int CC_id,
RA_t * ra,
const frame_t frameP,
uint8_t * const dlsch_buffer,
const uint16_t N_RB_UL, const uint8_t input_buffer_length)
//------------------------------------------------------------------------------
{
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i,ra_idx = -1;
RA_TEMPLATE *RA_template;
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
uint8_t *rar = (uint8_t *) (dlsch_buffer + 1);
AssertFatal(CC_id < MAX_NUM_CCs, "CC_id %u < MAX_NUM_CCs %u", CC_id, MAX_NUM_CCs);
for (i=0; i<NB_RA_PROC_MAX; i++) {
if (RC.mac[module_idP]->common_channels[CC_id].RA_template[i].generate_rar == 1) {
ra_idx=i;
RC.mac[module_idP]->common_channels[CC_id].RA_template[i].generate_rar = 0;
break;
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = ra->preamble_index; // Respond to Preamble 0 only for the moment
rar[4] = (uint8_t) (ra->rnti >> 8);
rar[5] = (uint8_t) (ra->rnti & 0xff);
//ra->timing_offset = 0;
ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
ra->msg3_first_rb = 6;
ra->msg3_nb_rb = 1;
uint16_t rballoc = mac_computeRIV(N_RB_UL, ra->msg3_first_rb, ra->msg3_nb_rb); // first PRB only for UL Grant
rar[1] |= (rballoc >> 7) & 7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
rar[2] = ((uint8_t) (rballoc & 0xff)) << 1; // 7 LSBs of rballoc
ra->msg3_mcs = 10;
ra->msg3_TPC = 3;
ra->msg3_ULdelay = 0;
ra->msg3_cqireq = 0;
rar[2] |= ((ra->msg3_mcs & 0x8) >> 3); // mcs 10
rar[3] =
(((ra->msg3_mcs & 0x7) << 5)) | ((ra->msg3_TPC & 7) << 2) |
((ra->msg3_ULdelay & 1) << 1) | (ra->msg3_cqireq & 1);
if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, module_idP, 2, 1,
RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe,
0, 0);
LOG_D(OPT,
"[eNB %d][RAPROC] CC_id %d RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
module_idP, CC_id, frameP, ra->rnti, rarh->RAPID,
input_buffer_length);
}
}
RA_template = &RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx];
//DevAssert( ra_idx != -1 );
if (ra_idx==-1)
return(0);
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = RA_template->preamble_index; // Respond to Preamble 0 only for the moment
rar[4] = (uint8_t)(RA_template->rnti>>8);
rar[5] = (uint8_t)(RA_template->rnti&0xff);
//RA_template->timing_offset = 0;
RA_template->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RA_template->timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RA_template->timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
RA_template->msg3_first_rb=6;
RA_template->msg3_nb_rb=1;
uint16_t rballoc = mac_computeRIV(N_RB_UL,RA_template->msg3_first_rb,RA_template->msg3_nb_rb); // first PRB only for UL Grant
rar[1] |= (rballoc>>7)&7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
rar[2] = ((uint8_t)(rballoc&0xff))<<1; // 7 LSBs of rballoc
RA_template->msg3_mcs = 10;
RA_template->msg3_TPC = 3;
RA_template->msg3_ULdelay = 0;
RA_template->msg3_cqireq = 0;
rar[2] |= ((RA_template->msg3_mcs&0x8)>>3); // mcs 10
rar[3] = (((RA_template->msg3_mcs&0x7)<<5)) | ((RA_template->msg3_TPC&7)<<2) | ((RA_template->msg3_ULdelay&1)<<1) | (RA_template->msg3_cqireq&1);
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Generating RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ra_idx %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
module_idP, CC_id,
frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
ra_idx,
RA_template->rnti,
rarh->RAPID,RC.mac[module_idP]->common_channels[CC_id].RA_template[0].preamble_index,
RA_template->timing_offset);
if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, module_idP, 2, 1,
RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe, 0, 0);
LOG_D(OPT,"[eNB %d][RAPROC] CC_id %d RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
module_idP, CC_id, frameP, RA_template->rnti,
rarh->RAPID, input_buffer_length);
}
return(RA_template->rnti);
return (ra->rnti);
}
#ifdef Rel14
//------------------------------------------------------------------------------
unsigned short fill_rar_br(eNB_MAC_INST *eNB,
int CC_id,
RA_TEMPLATE *RA_template,
const frame_t frameP,
const sub_frame_t subframeP,
uint8_t* const dlsch_buffer,
const uint8_t ce_level
)
unsigned short
fill_rar_br(eNB_MAC_INST * eNB,
int CC_id,
RA_t * ra,
const frame_t frameP,
const sub_frame_t subframeP,
uint8_t * const dlsch_buffer, const uint8_t ce_level)
//------------------------------------------------------------------------------
{
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
// uint8_t nb,reps;
uint8_t rballoc;
uint8_t mcs,TPC,ULdelay,cqireq;
int input_buffer_length;
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
COMMON_channels_t *cc = &eNB->common_channels[CC_id];
uint8_t *rar = (uint8_t *) (dlsch_buffer + 1);
// uint8_t nb,reps;
uint8_t rballoc;
uint8_t mcs, TPC, ULdelay, cqireq;
int input_buffer_length;
AssertFatal(RA_template != NULL, "RA is null \n");
AssertFatal(ra != NULL, "RA is null \n");
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = RA_template->preamble_index; // Respond to Preamble 0 only for the moment
RA_template->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RA_template->timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RA_template->timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = ra->preamble_index; // Respond to Preamble 0 only for the moment
ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
int N_NB_index;
int N_NB_index;
AssertFatal(1==0,"RAR for BL/CE Still to be finished ...\n");
AssertFatal(1 == 0, "RAR for BL/CE Still to be finished ...\n");
// Copy the Msg2 narrowband
RA_template->msg34_narrowband = RA_template->msg2_narrowband;
// Copy the Msg2 narrowband
ra->msg34_narrowband = ra->msg2_narrowband;
if (ce_level<2) { //CE Level 0,1, CEmodeA
input_buffer_length =6;
if (ce_level < 2) { //CE Level 0,1, CEmodeA
input_buffer_length = 6;
N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth);
N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth);
rar[4] = (uint8_t)(RA_template->rnti>>8);
rar[5] = (uint8_t)(RA_template->rnti&0xff);
//cc->RA_template[ra_idx].timing_offset = 0;
// nb = 0;
rballoc = mac_computeRIV(6,1+ce_level,1); // one PRB only for UL Grant in position 1+ce_level within Narrowband
rar[1] |= (rballoc&15)<<(4-N_NB_index); // Hopping = 0 (bit 3), 3 MSBs of rballoc
rar[4] = (uint8_t) (ra->rnti >> 8);
rar[5] = (uint8_t) (ra->rnti & 0xff);
//cc->ra[ra_idx].timing_offset = 0;
// nb = 0;
rballoc = mac_computeRIV(6, 1 + ce_level, 1); // one PRB only for UL Grant in position 1+ce_level within Narrowband
rar[1] |= (rballoc & 15) << (4 - N_NB_index); // Hopping = 0 (bit 3), 3 MSBs of rballoc
// reps = 4;
mcs = 7;
TPC = 3; // no power increase
ULdelay = 0;
cqireq = 0;
rar[2] |= ((mcs&0x8)>>3); // mcs 10
rar[3] = (((mcs&0x7)<<5)) | ((TPC&7)<<2) | ((ULdelay&1)<<1) | (cqireq&1);
}
else { // CE level 2,3 => CEModeB
// reps = 4;
mcs = 7;
TPC = 3; // no power increase
ULdelay = 0;
cqireq = 0;
rar[2] |= ((mcs & 0x8) >> 3); // mcs 10
rar[3] =
(((mcs & 0x7) << 5)) | ((TPC & 7) << 2) | ((ULdelay & 1) << 1)
| (cqireq & 1);
} else { // CE level 2,3 => CEModeB
input_buffer_length =5;
input_buffer_length = 5;
rar[3] = (uint8_t)(RA_template->rnti>>8);
rar[4] = (uint8_t)(RA_template->rnti&0xff);
}
LOG_D(MAC,"[RAPROC] Frame %d Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
ce_level,
RA_template->rnti,
rarh->RAPID,RA_template->preamble_index,
RA_template->timing_offset);
rar[3] = (uint8_t) (ra->rnti >> 8);
rar[4] = (uint8_t) (ra->rnti & 0xff);
}
LOG_D(MAC,
"[RAPROC] Frame %d Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2], rar[3],
rar[4], rar[5], ce_level, ra->rnti, rarh->RAPID,
ra->preamble_index, ra->timing_offset);
if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, eNB->Mod_id, 2, 1,
eNB->frame, eNB->subframe, 0, 0);
LOG_D(OPT,"[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
frameP, RA_template->rnti,
rarh->RAPID, input_buffer_length);
}
if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, eNB->Mod_id, 2, 1,
eNB->frame, eNB->subframe, 0, 0);
LOG_D(OPT,
"[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
frameP, ra->rnti, rarh->RAPID, input_buffer_length);
}
return(RA_template->rnti);
return (ra->rnti);
}
#endif
//------------------------------------------------------------------------------
uint16_t
ue_process_rar(
const module_id_t module_idP,
const int CC_id,
const frame_t frameP,
const rnti_t ra_rnti,
uint8_t* const dlsch_buffer,
rnti_t* const t_crnti,
const uint8_t preamble_index,
uint8_t* selected_rar_buffer // output argument for storing the selected RAR header and RAR payload
)
uint16_t ue_process_rar(const module_id_t module_idP, const int CC_id, const frame_t frameP, const rnti_t ra_rnti, uint8_t * const dlsch_buffer, rnti_t * const t_crnti, const uint8_t preamble_index, uint8_t * selected_rar_buffer // output argument for storing the selected RAR header and RAR payload
)
//------------------------------------------------------------------------------
{
uint16_t ret = 0; // return value
uint16_t ret = 0; // return value
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer;
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *) (dlsch_buffer + 1);
// get the last RAR payload for working with CMW500
uint8_t n_rarpy = 0; // number of RAR payloads
uint8_t n_rarh = 0; // number of MAC RAR subheaders
uint8_t best_rx_rapid = -1; // the closest RAPID receive from all RARs
while (1) {
n_rarh++;
if (rarh->T == 1) {
n_rarpy++;
LOG_D(MAC, "RAPID %d\n", rarh->RAPID);
}
// get the last RAR payload for working with CMW500
uint8_t n_rarpy = 0; // number of RAR payloads
uint8_t n_rarh = 0; // number of MAC RAR subheaders
uint8_t best_rx_rapid = -1; // the closest RAPID receive from all RARs
while (1) {
n_rarh++;
if (rarh->T == 1) {
n_rarpy++;
LOG_D(MAC, "RAPID %d\n", rarh->RAPID);
}
if (rarh->RAPID == preamble_index) {
LOG_D(PHY, "Found RAR with the intended RAPID %d\n", rarh->RAPID);
rar = (uint8_t *)(dlsch_buffer+n_rarh + (n_rarpy-1)*6);
break;
}
if (rarh->RAPID == preamble_index) {
LOG_D(PHY, "Found RAR with the intended RAPID %d\n",
rarh->RAPID);
rar = (uint8_t *) (dlsch_buffer + n_rarh + (n_rarpy - 1) * 6);
break;
}
if (abs((int)rarh->RAPID - (int)preamble_index) < abs((int)best_rx_rapid - (int)preamble_index)) {
best_rx_rapid = rarh->RAPID;
rar = (uint8_t *)(dlsch_buffer+n_rarh + (n_rarpy-1)*6);
}
if (abs((int) rarh->RAPID - (int) preamble_index) <
abs((int) best_rx_rapid - (int) preamble_index)) {
best_rx_rapid = rarh->RAPID;
rar = (uint8_t *) (dlsch_buffer + n_rarh + (n_rarpy - 1) * 6);
}
if (rarh->E == 0) {
LOG_I(PHY, "No RAR found with the intended RAPID. The closest RAPID in all RARs is %d\n", best_rx_rapid);
break;
} else {
rarh++;
}
};
LOG_D(MAC, "number of RAR subheader %d; number of RAR pyloads %d\n", n_rarh, n_rarpy);
if (rarh->E == 0) {
LOG_I(PHY,
"No RAR found with the intended RAPID. The closest RAPID in all RARs is %d\n",
best_rx_rapid);
break;
} else {
rarh++;
}
};
LOG_D(MAC, "number of RAR subheader %d; number of RAR pyloads %d\n",
n_rarh, n_rarpy);
if (CC_id>0) {
LOG_W(MAC,"Should not have received RAR on secondary CCs! \n");
return(0xffff);
}
if (CC_id > 0) {
LOG_W(MAC, "Should not have received RAR on secondary CCs! \n");
return (0xffff);
}
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",module_idP,frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
rarh->RAPID,preamble_index);
LOG_I(MAC,
"[eNB %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",
module_idP, frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2],
rar[3], rar[4], rar[5], rarh->RAPID, preamble_index);
#ifdef DEBUG_RAR
LOG_D(MAC,"[UE %d][RAPROC] rarh->E %d\n",module_idP,rarh->E);
LOG_D(MAC,"[UE %d][RAPROC] rarh->T %d\n",module_idP,rarh->T);
LOG_D(MAC,"[UE %d][RAPROC] rarh->RAPID %d\n",module_idP,rarh->RAPID);
LOG_D(MAC, "[UE %d][RAPROC] rarh->E %d\n", module_idP, rarh->E);
LOG_D(MAC, "[UE %d][RAPROC] rarh->T %d\n", module_idP, rarh->T);
LOG_D(MAC, "[UE %d][RAPROC] rarh->RAPID %d\n", module_idP,
rarh->RAPID);
// LOG_I(MAC,"[UE %d][RAPROC] rar->R %d\n",module_idP,rar->R);
LOG_D(MAC,"[UE %d][RAPROC] rar->Timing_Advance_Command %d\n",module_idP,(((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
// LOG_I(MAC,"[UE %d][RAPROC] rar->hopping_flag %d\n",module_idP,rar->hopping_flag);
// LOG_I(MAC,"[UE %d][RAPROC] rar->rb_alloc %d\n",module_idP,rar->rb_alloc);
// LOG_I(MAC,"[UE %d][RAPROC] rar->mcs %d\n",module_idP,rar->mcs);
// LOG_I(MAC,"[UE %d][RAPROC] rar->TPC %d\n",module_idP,rar->TPC);
// LOG_I(MAC,"[UE %d][RAPROC] rar->UL_delay %d\n",module_idP,rar->UL_delay);
// LOG_I(MAC,"[UE %d][RAPROC] rar->cqi_req %d\n",module_idP,rar->cqi_req);
LOG_D(MAC,"[UE %d][RAPROC] rar->t_crnti %x\n",module_idP,(uint16_t)rar[5]+(rar[4]<<8));
// LOG_I(MAC,"[UE %d][RAPROC] rar->R %d\n",module_idP,rar->R);
LOG_D(MAC, "[UE %d][RAPROC] rar->Timing_Advance_Command %d\n",
module_idP, (((uint16_t) (rar[0] & 0x7f)) << 4) + (rar[1] >> 4));
// LOG_I(MAC,"[UE %d][RAPROC] rar->hopping_flag %d\n",module_idP,rar->hopping_flag);
// LOG_I(MAC,"[UE %d][RAPROC] rar->rb_alloc %d\n",module_idP,rar->rb_alloc);
// LOG_I(MAC,"[UE %d][RAPROC] rar->mcs %d\n",module_idP,rar->mcs);
// LOG_I(MAC,"[UE %d][RAPROC] rar->TPC %d\n",module_idP,rar->TPC);
// LOG_I(MAC,"[UE %d][RAPROC] rar->UL_delay %d\n",module_idP,rar->UL_delay);
// LOG_I(MAC,"[UE %d][RAPROC] rar->cqi_req %d\n",module_idP,rar->cqi_req);
LOG_D(MAC, "[UE %d][RAPROC] rar->t_crnti %x\n", module_idP,
(uint16_t) rar[5] + (rar[4] << 8));
#endif
if (opt_enabled) {
LOG_D(OPT,"[UE %d][RAPROC] CC_id %d RAR Frame %d trace pdu for ra-RNTI %x\n",
module_idP, CC_id, frameP, ra_rnti);
trace_pdu(1, (uint8_t*)dlsch_buffer, n_rarh + n_rarpy*6, module_idP, 2, ra_rnti,
UE_mac_inst[module_idP].rxFrame, UE_mac_inst[module_idP].rxSubframe, 0, 0);
}
if (opt_enabled) {
LOG_D(OPT,
"[UE %d][RAPROC] CC_id %d RAR Frame %d trace pdu for ra-RNTI %x\n",
module_idP, CC_id, frameP, ra_rnti);
trace_pdu(1, (uint8_t *) dlsch_buffer, n_rarh + n_rarpy * 6,
module_idP, 2, ra_rnti, UE_mac_inst[module_idP].rxFrame,
UE_mac_inst[module_idP].rxSubframe, 0, 0);
}
if (preamble_index == rarh->RAPID) {
*t_crnti = (uint16_t)rar[5]+(rar[4]<<8);//rar->t_crnti;
UE_mac_inst[module_idP].crnti = *t_crnti;//rar->t_crnti;
//return(rar->Timing_Advance_Command);
ret = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
} else {
UE_mac_inst[module_idP].crnti=0;
ret = (0xffff);
}
if (preamble_index == rarh->RAPID) {
*t_crnti = (uint16_t) rar[5] + (rar[4] << 8); //rar->t_crnti;
UE_mac_inst[module_idP].crnti = *t_crnti; //rar->t_crnti;
//return(rar->Timing_Advance_Command);
ret = ((((uint16_t) (rar[0] & 0x7f)) << 4) + (rar[1] >> 4));
} else {
UE_mac_inst[module_idP].crnti = 0;
ret = (0xffff);
}
// move the selected RAR to the front of the RA_PDSCH buffer
memcpy(selected_rar_buffer+0, (uint8_t*)rarh, 1);
memcpy(selected_rar_buffer+1, (uint8_t*)rar , 6);
// move the selected RAR to the front of the RA_PDSCH buffer
memcpy(selected_rar_buffer + 0, (uint8_t *) rarh, 1);
memcpy(selected_rar_buffer + 1, (uint8_t *) rar, 6);
return ret;
return ret;
}
openair2/LAYER2/MAC/ue_procedures.c
+2582 -2161
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/vars.h
+60 -53
View File
@@ -34,25 +34,32 @@
#define __MAC_VARS_H__
#ifdef USER_MODE
//#include "stdio.h"
#endif //USER_MODE
#endif //USER_MODE
#include "PHY/defs.h"
#include "defs.h"
#include "COMMON/mac_rrc_primitives.h"
const uint32_t BSR_TABLE[BSR_TABLE_SIZE]= {0,10,12,14,17,19,22,26,31,36,42,49,57,67,78,91,
105,125,146,171,200,234,274,321,376,440,515,603,706,826,967,1132,
1326,1552,1817,2127,2490,2915,3413,3995,4677,5467,6411,7505,8787,10287,12043,14099,
16507,19325,22624,26487,31009,36304,42502,49759,58255,68201,79846,93479,109439, 128125,150000, 300000
};
// extended bsr table--currently not used
const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE] = {0,10,13,16,19,23,29,35,43,53,65,80,98,120,147,
181,223,274,337,414,509,625,769,945,1162,1429,
1757,2161,2657,3267,4017,4940,6074,7469,9185,
11294,13888,17077,20999,25822,31752,39045,48012,
59039,72598,89272,109774,134986,165989,204111,
250990,308634,379519,466683,573866,705666,867737,
1067031,1312097,1613447,1984009,2439678,3000000,
6000000};
const uint32_t BSR_TABLE[BSR_TABLE_SIZE] =
{ 0, 10, 12, 14, 17, 19, 22, 26, 31, 36, 42, 49, 57, 67, 78, 91,
105, 125, 146, 171, 200, 234, 274, 321, 376, 440, 515, 603, 706, 826,
967, 1132,
1326, 1552, 1817, 2127, 2490, 2915, 3413, 3995, 4677, 5467, 6411, 7505,
8787, 10287, 12043, 14099,
16507, 19325, 22624, 26487, 31009, 36304, 42502, 49759, 58255, 68201,
79846, 93479, 109439, 128125, 150000, 300000
};
// extended bsr table--currently not used
const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE] =
{ 0, 10, 13, 16, 19, 23, 29, 35, 43, 53, 65, 80, 98, 120, 147,
181, 223, 274, 337, 414, 509, 625, 769, 945, 1162, 1429,
1757, 2161, 2657, 3267, 4017, 4940, 6074, 7469, 9185,
11294, 13888, 17077, 20999, 25822, 31752, 39045, 48012,
59039, 72598, 89272, 109774, 134986, 165989, 204111,
250990, 308634, 379519, 466683, 573866, 705666, 867737,
1067031, 1312097, 1613447, 1984009, 2439678, 3000000,
6000000
};
//#define MAX_SIZE_OF_AGG3 576
//#define MAX_SIZE_OF_AGG2 288
@@ -64,24 +71,26 @@ const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE] = {0,10,13,16,19,23,29,35,43,5
* this is also dependent to transmission mode, where an offset could be defined
*/
// the follwoing three tables are calibrated for TXMODE 1 and 2
const uint8_t cqi2fmt0_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]= {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 37 bits
//{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 43
{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE = 44
const uint8_t cqi2fmt0_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE] = {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 37 bits
//{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 43
{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE = 44
};
const uint8_t cqi2fmt1x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]= {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size < 38 bits
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE < 43
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE < 47
{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE < 55
const uint8_t cqi2fmt1x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE] = {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size < 38 bits
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE < 43
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE < 47
{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE < 55
};
const uint8_t cqi2fmt2x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]= {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 47 bits
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 55
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 59
{3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0} // 20_DCI0_CRC_SIZE = 64
const uint8_t cqi2fmt2x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE] = {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 47 bits
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 55
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 59
{3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0} // 20_DCI0_CRC_SIZE = 64
};
//uint32_t EBSR_Level[63]={0,10,13,16,19,23,29,35,43,53,65,80,98,120,147,181};
@@ -89,7 +98,7 @@ const uint8_t cqi2fmt2x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]= {
uint32_t RRC_CONNECTION_FLAG;
UE_MAC_INST *UE_mac_inst; //[NB_MODULE_MAX];
UE_MAC_INST *UE_mac_inst; //[NB_MODULE_MAX];
MAC_RLC_XFACE *Mac_rlc_xface;
/// Primary component carrier index of eNB
@@ -97,39 +106,39 @@ int pCC_id[NUMBER_OF_eNB_MAX];
eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
eNB_ULSCH_INFO eNB_ulsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; // eNBxUE = 8x8
#ifdef OPENAIR2
unsigned char NB_eNB_INST=0;
unsigned char NB_UE_INST=0;
unsigned char NB_RN_INST=0;
unsigned char NB_INST=0;
unsigned char NB_eNB_INST = 0;
unsigned char NB_UE_INST = 0;
unsigned char NB_RN_INST = 0;
unsigned char NB_INST = 0;
#endif
DCI0_5MHz_TDD_1_6_t UL_alloc_pdu;
DCI0_5MHz_TDD_1_6_t UL_alloc_pdu;
DCI1A_5MHz_TDD_1_6_t DLSCH_alloc_pdu1A;
DCI1A_5MHz_TDD_1_6_t RA_alloc_pdu;
DCI1A_5MHz_TDD_1_6_t BCCH_alloc_pdu;
DCI1A_5MHz_TDD_1_6_t DLSCH_alloc_pdu1A;
DCI1A_5MHz_TDD_1_6_t RA_alloc_pdu;
DCI1A_5MHz_TDD_1_6_t BCCH_alloc_pdu;
DCI1A_5MHz_TDD_1_6_t CCCH_alloc_pdu;
DCI1_5MHz_TDD_t DLSCH_alloc_pdu;
DCI1A_5MHz_TDD_1_6_t CCCH_alloc_pdu;
DCI1_5MHz_TDD_t DLSCH_alloc_pdu;
#if defined(Rel10) || defined(Rel14)
DCI1C_5MHz_t MCCH_alloc_pdu;
DCI1C_5MHz_t MCCH_alloc_pdu;
#endif
DCI0_5MHz_FDD_t UL_alloc_pdu_fdd;
DCI0_5MHz_FDD_t UL_alloc_pdu_fdd;
DCI1A_5MHz_FDD_t DLSCH_alloc_pdu1A_fdd;
DCI1A_5MHz_FDD_t RA_alloc_pdu_fdd;
DCI1A_5MHz_FDD_t BCCH_alloc_pdu_fdd;
DCI1A_5MHz_FDD_t DLSCH_alloc_pdu1A_fdd;
DCI1A_5MHz_FDD_t RA_alloc_pdu_fdd;
DCI1A_5MHz_FDD_t BCCH_alloc_pdu_fdd;
DCI1A_5MHz_FDD_t CCCH_alloc_pdu_fdd;
DCI1_5MHz_FDD_t DLSCH_alloc_pdu_fdd;
DCI1A_5MHz_FDD_t CCCH_alloc_pdu_fdd;
DCI1_5MHz_FDD_t DLSCH_alloc_pdu_fdd;
DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu1;
DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
@@ -137,5 +146,3 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#endif