maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'origin/RA-notation' into develop_integration_w46

Browse Source
This commit is contained in:
Cedric Roux
2017-11-17 15:27:38 +01:00
parent 4a3489887a d01aa2d08a
commit e190c4e2bc
26 changed files with 20388 additions and 17096 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/LAYER2/MAC/config.c
+731 -407
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/defs.h
+63 -72
View File
@@ -90,12 +90,12 @@
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
// Mask for identifying subframe for MBMS // Mask for identifying subframe for MBMS
#define MBSFN_TDD_SF3 0x80// for TDD #define MBSFN_TDD_SF3 0x80 // for TDD
#define MBSFN_TDD_SF4 0x40 #define MBSFN_TDD_SF4 0x40
#define MBSFN_TDD_SF7 0x20 #define MBSFN_TDD_SF7 0x20
#define MBSFN_TDD_SF8 0x10 #define MBSFN_TDD_SF8 0x10
#define MBSFN_TDD_SF9 0x08 #define MBSFN_TDD_SF9 0x08
#define MBSFN_FDD_SF1 0x80// for FDD #define MBSFN_FDD_SF1 0x80 // for FDD
#define MBSFN_FDD_SF2 0x40 #define MBSFN_FDD_SF2 0x40
#define MBSFN_FDD_SF3 0x20 #define MBSFN_FDD_SF3 0x20
#define MBSFN_FDD_SF6 0x10 #define MBSFN_FDD_SF6 0x10
@@ -172,7 +172,7 @@ typedef struct {
uint8_t RAPID:6; uint8_t RAPID:6;
uint8_t T:1; uint8_t T:1;
uint8_t E:1; uint8_t E:1;
} __attribute__((__packed__))RA_HEADER_RAPID; } __attribute__ ((__packed__)) RA_HEADER_RAPID;
/*!\brief MAC header of Random Access Response for backoff indicator (BI)*/ /*!\brief MAC header of Random Access Response for backoff indicator (BI)*/
typedef struct { typedef struct {
@@ -180,7 +180,7 @@ typedef struct {
uint8_t R:2; uint8_t R:2;
uint8_t T:1; uint8_t T:1;
uint8_t E:1; uint8_t E:1;
} __attribute__((__packed__))RA_HEADER_BI; } __attribute__ ((__packed__)) RA_HEADER_BI;
/* /*
typedef struct { typedef struct {
uint64_t padding:16; uint64_t padding:16;
@@ -217,7 +217,7 @@ typedef struct {
uint8_t R:2; // octet 1 MSB uint8_t R:2; // octet 1 MSB
uint8_t L:7; // octet 2 LSB uint8_t L:7; // octet 2 LSB
uint8_t F:1; // octet 2 MSB uint8_t F:1; // octet 2 MSB
} __attribute__((__packed__))SCH_SUBHEADER_SHORT; } __attribute__ ((__packed__)) SCH_SUBHEADER_SHORT;
/*!\brief MAC subheader long with 15bit Length field */ /*!\brief MAC subheader long with 15bit Length field */
typedef struct { typedef struct {
uint8_t LCID:5; // octet 1 LSB uint8_t LCID:5; // octet 1 LSB
@@ -227,19 +227,19 @@ typedef struct {
uint8_t F:1; // octet 2 MSB uint8_t F:1; // octet 2 MSB
uint8_t L_LSB:8; uint8_t L_LSB:8;
uint8_t padding; uint8_t padding;
} __attribute__((__packed__))SCH_SUBHEADER_LONG; } __attribute__ ((__packed__)) SCH_SUBHEADER_LONG;
/*!\brief MAC subheader short without length field */ /*!\brief MAC subheader short without length field */
typedef struct { typedef struct {
uint8_t LCID:5; uint8_t LCID:5;
uint8_t E:1; uint8_t E:1;
uint8_t R:2; uint8_t R:2;
} __attribute__((__packed__))SCH_SUBHEADER_FIXED; } __attribute__ ((__packed__)) SCH_SUBHEADER_FIXED;
/*!\brief mac control element: short buffer status report for a specific logical channel group ID*/ /*!\brief mac control element: short buffer status report for a specific logical channel group ID*/
typedef struct { typedef struct {
uint8_t Buffer_size:6; // octet 1 LSB uint8_t Buffer_size:6; // octet 1 LSB
uint8_t LCGID:2; // octet 1 MSB uint8_t LCGID:2; // octet 1 MSB
} __attribute__((__packed__))BSR_SHORT; } __attribute__ ((__packed__)) BSR_SHORT;
typedef BSR_SHORT BSR_TRUNCATED; typedef BSR_SHORT BSR_TRUNCATED;
/*!\brief mac control element: long buffer status report for all logical channel group ID*/ /*!\brief mac control element: long buffer status report for all logical channel group ID*/
@@ -248,63 +248,63 @@ typedef struct {
uint8_t Buffer_size2:6; uint8_t Buffer_size2:6;
uint8_t Buffer_size1:6; uint8_t Buffer_size1:6;
uint8_t Buffer_size0:6; uint8_t Buffer_size0:6;
} __attribute__((__packed__))BSR_LONG; } __attribute__ ((__packed__)) BSR_LONG;
#define BSR_LONG_SIZE (sizeof(BSR_LONG)) #define BSR_LONG_SIZE (sizeof(BSR_LONG))
/*!\brief mac control element: timing advance */ /*!\brief mac control element: timing advance */
typedef struct { typedef struct {
uint8_t TA:6; uint8_t TA:6;
uint8_t R:2; uint8_t R:2;
} __attribute__((__packed__))TIMING_ADVANCE_CMD; } __attribute__ ((__packed__)) TIMING_ADVANCE_CMD;
/*!\brief mac control element: power headroom report */ /*!\brief mac control element: power headroom report */
typedef struct { typedef struct {
uint8_t PH:6; uint8_t PH:6;
uint8_t R:2; uint8_t R:2;
} __attribute__((__packed__))POWER_HEADROOM_CMD; } __attribute__ ((__packed__)) POWER_HEADROOM_CMD;
/*! \brief MIB payload */ /*! \brief MIB payload */
typedef struct { typedef struct {
uint8_t payload[3] ; uint8_t payload[3];
} __attribute__((__packed__))MIB_PDU; } __attribute__ ((__packed__)) MIB_PDU;
/*! \brief CCCH payload */ /*! \brief CCCH payload */
typedef struct { typedef struct {
uint8_t payload[CCCH_PAYLOAD_SIZE_MAX] ; uint8_t payload[CCCH_PAYLOAD_SIZE_MAX];
} __attribute__((__packed__))CCCH_PDU; } __attribute__ ((__packed__)) CCCH_PDU;
/*! \brief BCCH payload */ /*! \brief BCCH payload */
typedef struct { typedef struct {
uint8_t payload[BCCH_PAYLOAD_SIZE_MAX] ; uint8_t payload[BCCH_PAYLOAD_SIZE_MAX];
} __attribute__((__packed__))BCCH_PDU; } __attribute__ ((__packed__)) BCCH_PDU;
/*! \brief RAR payload */ /*! \brief RAR payload */
typedef struct { typedef struct {
uint8_t payload[RAR_PAYLOAD_SIZE_MAX]; uint8_t payload[RAR_PAYLOAD_SIZE_MAX];
} __attribute__ ((__packed__)) RAR_PDU; } __attribute__ ((__packed__)) RAR_PDU;
/*! \brief BCCH payload */ /*! \brief BCCH payload */
typedef struct { typedef struct {
uint8_t payload[PCCH_PAYLOAD_SIZE_MAX] ; uint8_t payload[PCCH_PAYLOAD_SIZE_MAX];
} __attribute__((__packed__))PCCH_PDU; } __attribute__ ((__packed__)) PCCH_PDU;
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
/*! \brief MCCH payload */ /*! \brief MCCH payload */
typedef struct { typedef struct {
uint8_t payload[MCCH_PAYLOAD_SIZE_MAX] ; uint8_t payload[MCCH_PAYLOAD_SIZE_MAX];
} __attribute__((__packed__))MCCH_PDU; } __attribute__ ((__packed__)) MCCH_PDU;
/*!< \brief MAC control element for activation and deactivation of component carriers */ /*!< \brief MAC control element for activation and deactivation of component carriers */
typedef struct { typedef struct {
uint8_t C7:1;/*!< \brief Component carrier 7 */ uint8_t C7:1; /*!< \brief Component carrier 7 */
uint8_t C6:1;/*!< \brief Component carrier 6 */ uint8_t C6:1; /*!< \brief Component carrier 6 */
uint8_t C5:1;/*!< \brief Component carrier 5 */ uint8_t C5:1; /*!< \brief Component carrier 5 */
uint8_t C4:1;/*!< \brief Component carrier 4 */ uint8_t C4:1; /*!< \brief Component carrier 4 */
uint8_t C3:1;/*!< \brief Component carrier 3 */ uint8_t C3:1; /*!< \brief Component carrier 3 */
uint8_t C2:1;/*!< \brief Component carrier 2 */ uint8_t C2:1; /*!< \brief Component carrier 2 */
uint8_t C1:1;/*!< \brief Component carrier 1 */ uint8_t C1:1; /*!< \brief Component carrier 1 */
uint8_t R:1;/*!< \brief Reserved */ uint8_t R:1; /*!< \brief Reserved */
} __attribute__((__packed__))CC_ELEMENT; } __attribute__ ((__packed__)) CC_ELEMENT;
/*! \brief MAC control element: MCH Scheduling Information */ /*! \brief MAC control element: MCH Scheduling Information */
typedef struct { typedef struct {
uint8_t stop_sf_MSB:3; // octet 1 LSB uint8_t stop_sf_MSB:3; // octet 1 LSB
uint8_t lcid:5; // octet 2 MSB uint8_t lcid:5; // octet 2 MSB
uint8_t stop_sf_LSB:8; uint8_t stop_sf_LSB:8;
} __attribute__((__packed__))MSI_ELEMENT; } __attribute__ ((__packed__)) MSI_ELEMENT;
#endif #endif
/*! \brief Values of CCCH LCID for DLSCH */ /*! \brief Values of CCCH LCID for DLSCH */
#define CCCH_LCHANID 0 #define CCCH_LCHANID 0
@@ -396,9 +396,18 @@ typedef struct {
#include "PHY/impl_defs_top.h" #include "PHY/impl_defs_top.h"
/*!\brief RA process state*/
typedef enum {
IDLE = 0,
MSG2,
WAITMSG3,
MSG4,
WAITMSG4ACK
} RA_state;
/*!\brief UE ULSCH scheduling states*/ /*!\brief UE ULSCH scheduling states*/
typedef enum { typedef enum {
S_UL_NONE =0, S_UL_NONE = 0,
S_UL_WAITING, S_UL_WAITING,
S_UL_SCHEDULED, S_UL_SCHEDULED,
S_UL_BUFFERED, S_UL_BUFFERED,
@@ -407,7 +416,7 @@ typedef enum {
/*!\brief UE DLSCH scheduling states*/ /*!\brief UE DLSCH scheduling states*/
typedef enum { typedef enum {
S_DL_NONE =0, S_DL_NONE = 0,
S_DL_WAITING, S_DL_WAITING,
S_DL_SCHEDULED, S_DL_SCHEDULED,
S_DL_BUFFERED, S_DL_BUFFERED,
@@ -416,7 +425,7 @@ typedef enum {
/*!\brief scheduling policy for the contention-based access */ /*!\brief scheduling policy for the contention-based access */
typedef enum { typedef enum {
CBA_ES=0, /// equal share of RB among groups w CBA_ES = 0, /// equal share of RB among groups w
CBA_ES_S, /// equal share of RB among groups with small allocation CBA_ES_S, /// equal share of RB among groups with small allocation
CBA_PF, /// proportional fair (kind of) CBA_PF, /// proportional fair (kind of)
CBA_PF_S, /// proportional fair (kind of) with small RB allocation CBA_PF_S, /// proportional fair (kind of) with small RB allocation
@@ -846,25 +855,7 @@ typedef struct {
/*! \brief eNB template for the Random access information */ /*! \brief eNB template for the Random access information */
typedef struct { typedef struct {
/// Flag to indicate this process is active /// Flag to indicate this process is active
boolean_t RA_active; RA_state state;
/// Size of DCI for RA-Response (bytes)
uint8_t RA_dci_size_bytes1;
/// Size of DCI for RA-Response (bits)
uint8_t RA_dci_size_bits1;
/// Actual DCI to transmit for RA-Response
uint8_t RA_alloc_pdu1[(MAX_DCI_SIZE_BITS>>3)+1];
/// DCI format for RA-Response (should be 1A)
uint8_t RA_dci_fmt1;
/// Size of DCI for Msg4/ContRes (bytes)
uint8_t RA_dci_size_bytes2;
/// Size of DCI for Msg4/ContRes (bits)
uint8_t RA_dci_size_bits2;
/// Actual DCI to transmit for Msg4/ContRes
uint8_t RA_alloc_pdu2[(MAX_DCI_SIZE_BITS>>3)+1];
/// DCI format for Msg4/ContRes (should be 1A)
uint8_t RA_dci_fmt2;
/// Flag to indicate the eNB should generate RAR. This is triggered by detection of PRACH
uint8_t generate_rar;
/// Subframe where preamble was received /// Subframe where preamble was received
uint8_t preamble_subframe; uint8_t preamble_subframe;
/// Subframe where Msg2 is to be sent /// Subframe where Msg2 is to be sent
@@ -879,10 +870,6 @@ typedef struct {
sub_frame_t Msg4_subframe; sub_frame_t Msg4_subframe;
/// Frame where Msg4 is to be sent /// Frame where Msg4 is to be sent
frame_t Msg4_frame; frame_t Msg4_frame;
/// Flag to indicate the eNB should generate Msg4 upon reception of SDU from RRC. This is triggered by first ULSCH reception at eNB for new user.
uint8_t generate_Msg4;
/// Flag to indicate that eNB is waiting for ACK that UE has received Msg3.
uint8_t wait_ack_Msg4;
/// harq_pid used for Msg4 transmission /// harq_pid used for Msg4 transmission
uint8_t harq_pid; uint8_t harq_pid;
/// UE RNTI allocated during RAR /// UE RNTI allocated during RAR
@@ -922,7 +909,7 @@ typedef struct {
uint8_t msg2_narrowband; uint8_t msg2_narrowband;
uint8_t msg34_narrowband; uint8_t msg34_narrowband;
#endif #endif
} RA_TEMPLATE; } RA_t;
/*! \brief subband bitmap confguration (for ALU icic algo purpose), in test phase */ /*! \brief subband bitmap confguration (for ALU icic algo purpose), in test phase */
@@ -936,7 +923,8 @@ typedef struct {
/*! \brief UE list used by eNB to order UEs/CC for scheduling*/ /*! \brief UE list used by eNB to order UEs/CC for scheduling*/
typedef struct { typedef struct {
/// Dedicated information for UEs /// Dedicated information for UEs
struct PhysicalConfigDedicated *physicalConfigDedicated[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; struct PhysicalConfigDedicated
*physicalConfigDedicated[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
/// DLSCH pdu /// DLSCH pdu
DLSCH_PDU DLSCH_pdu[MAX_NUM_CCs][2][NUMBER_OF_UE_MAX]; DLSCH_PDU DLSCH_pdu[MAX_NUM_CCs][2][NUMBER_OF_UE_MAX];
/// DCI template and MAC connection parameters for UEs /// DCI template and MAC connection parameters for UEs
@@ -993,7 +981,7 @@ typedef struct {
/// Outgoing RAR pdu for PHY /// Outgoing RAR pdu for PHY
RAR_PDU RAR_pdu; RAR_PDU RAR_pdu;
/// Template for RA computations /// Template for RA computations
RA_TEMPLATE RA_template[NB_RA_PROC_MAX]; RA_t ra[NB_RA_PROC_MAX];
/// VRB map for common channels /// VRB map for common channels
uint8_t vrb_map[100]; uint8_t vrb_map[100];
/// VRB map for common channels and retransmissions by PHICH /// VRB map for common channels and retransmissions by PHICH
@@ -1055,23 +1043,28 @@ typedef struct eNB_MAC_INST_s {
/// NFAPI Config Request Structure /// NFAPI Config Request Structure
nfapi_config_request_t config[MAX_NUM_CCs]; nfapi_config_request_t config[MAX_NUM_CCs];
/// Preallocated DL pdu list /// Preallocated DL pdu list
nfapi_dl_config_request_pdu_t dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU]; nfapi_dl_config_request_pdu_t
dl_config_pdu_list[MAX_NUM_CCs][MAX_NUM_DL_PDU];
/// NFAPI DL Config Request Structure /// NFAPI DL Config Request Structure
nfapi_dl_config_request_t DL_req[MAX_NUM_CCs]; nfapi_dl_config_request_t DL_req[MAX_NUM_CCs];
/// Preallocated UL pdu list /// Preallocated UL pdu list
nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU]; nfapi_ul_config_request_pdu_t
ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
/// Preallocated UL pdu list for ULSCH (n+k delay) /// Preallocated UL pdu list for ULSCH (n+k delay)
nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU]; nfapi_ul_config_request_pdu_t
ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU];
/// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place /// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place
nfapi_ul_config_request_t UL_req[MAX_NUM_CCs]; nfapi_ul_config_request_t UL_req[MAX_NUM_CCs];
/// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests /// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests
nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10]; nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10];
/// Preallocated HI_DCI0 pdu list /// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU]; nfapi_hi_dci0_request_pdu_t
hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure /// NFAPI HI/DCI0 Config Request Structure
nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs]; nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs];
/// Prealocated TX pdu list /// Prealocated TX pdu list
nfapi_tx_request_pdu_t tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU]; nfapi_tx_request_pdu_t
tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU];
/// NFAPI DL PDU structure /// NFAPI DL PDU structure
nfapi_tx_request_t TX_req[MAX_NUM_CCs]; nfapi_tx_request_t TX_req[MAX_NUM_CCs];
/// UL handle /// UL handle
@@ -1122,7 +1115,7 @@ typedef enum {
/*!\brief UE layer 2 status */ /*!\brief UE layer 2 status */
typedef enum { typedef enum {
CONNECTION_OK=0, CONNECTION_OK = 0,
CONNECTION_LOST, CONNECTION_LOST,
PHY_RESYNCH, PHY_RESYNCH,
PHY_HO_PRACH PHY_HO_PRACH
@@ -1214,7 +1207,8 @@ typedef struct {
struct PhysicalConfigDedicated *physicalConfigDedicated; struct PhysicalConfigDedicated *physicalConfigDedicated;
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
/// pointer to RRC PHY configuration SCEll /// pointer to RRC PHY configuration SCEll
struct PhysicalConfigDedicatedSCell_r10 *physicalConfigDedicatedSCell_r10; struct PhysicalConfigDedicatedSCell_r10
*physicalConfigDedicatedSCell_r10;
#endif #endif
/// pointer to TDD Configuration (NULL for FDD) /// pointer to TDD Configuration (NULL for FDD)
TDD_Config_t *tdd_Config; TDD_Config_t *tdd_Config;
@@ -1298,7 +1292,7 @@ typedef struct {
/// MCCH status /// MCCH status
uint8_t mcch_status; uint8_t mcch_status;
/// MSI status /// MSI status
uint8_t msi_status;// could be an array if there are >1 MCH in one MBSFN area uint8_t msi_status; // could be an array if there are >1 MCH in one MBSFN area
#endif #endif
//#ifdef CBA //#ifdef CBA
/// CBA RNTI for each group /// CBA RNTI for each group
@@ -1311,7 +1305,7 @@ typedef struct {
/// UE ULSCH tx processing time inlcuding RLC interface (rlc_data_req) and mac header generation /// UE ULSCH tx processing time inlcuding RLC interface (rlc_data_req) and mac header generation
time_stats_t tx_ulsch_sdu; time_stats_t tx_ulsch_sdu;
/// UE DLSCH rx processing time inlcuding RLC interface (mac_rrc_data_ind or mac_rlc_status_ind+mac_rlc_data_ind) and mac header parser /// UE DLSCH rx processing time inlcuding RLC interface (mac_rrc_data_ind or mac_rlc_status_ind+mac_rlc_data_ind) and mac header parser
time_stats_t rx_dlsch_sdu ; time_stats_t rx_dlsch_sdu;
/// UE query for MCH subframe processing time /// UE query for MCH subframe processing time
time_stats_t ue_query_mch; time_stats_t ue_query_mch;
/// UE MCH rx processing time /// UE MCH rx processing time
@@ -1330,6 +1324,3 @@ typedef struct {
#include "proto.h" #include "proto.h"
/*@}*/ /*@}*/
#endif /*__LAYER2_MAC_DEFS_H__ */ #endif /*__LAYER2_MAC_DEFS_H__ */
openair2/LAYER2/MAC/eNB_scheduler.c
+392 -180
View File
@@ -60,7 +60,7 @@
#endif #endif
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI)
# include "intertask_interface.h" #include "intertask_interface.h"
#endif #endif
#define ENABLE_MAC_PAYLOAD_DEBUG #define ENABLE_MAC_PAYLOAD_DEBUG
@@ -68,15 +68,16 @@
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
uint16_t pdcch_order_table[6] = {31,31,511,2047,2047,8191}; uint16_t pdcch_order_table[6] = { 31, 31, 511, 2047, 2047, 8191 };
void schedule_SRS(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP) void
schedule_SRS(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{ {
eNB_MAC_INST *eNB = RC.mac[module_idP]; eNB_MAC_INST *eNB = RC.mac[module_idP];
UE_list_t *UE_list = &eNB->UE_list; UE_list_t *UE_list = &eNB->UE_list;
nfapi_ul_config_request_body_t *ul_req; nfapi_ul_config_request_body_t *ul_req;
int CC_id,UE_id; int CC_id, UE_id;
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels; COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
SoundingRS_UL_ConfigCommon_t *soundingRS_UL_ConfigCommon; SoundingRS_UL_ConfigCommon_t *soundingRS_UL_ConfigCommon;
struct SoundingRS_UL_ConfigDedicated *soundingRS_UL_ConfigDedicated; struct SoundingRS_UL_ConfigDedicated *soundingRS_UL_ConfigDedicated;
@@ -85,60 +86,116 @@ void schedule_SRS(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
uint8_t srs_SubframeConfig; uint8_t srs_SubframeConfig;
// table for TSFC (Period) and deltaSFC (offset) // table for TSFC (Period) and deltaSFC (offset)
const uint16_t deltaTSFCTabType1[15][2] = { {1,1},{1,2},{2,2},{1,5},{2,5},{4,5},{8,5},{3,5},{12,5},{1,10},{2,10},{4,10},{8,10},{351,10},{383,10} }; // Table 5.5.3.3-2 3GPP 36.211 FDD const uint16_t deltaTSFCTabType1[15][2] = { {1, 1}, {1, 2}, {2, 2}, {1, 5}, {2, 5}, {4, 5}, {8, 5}, {3, 5}, {12, 5}, {1, 10}, {2, 10}, {4, 10}, {8, 10}, {351, 10}, {383, 10} }; // Table 5.5.3.3-2 3GPP 36.211 FDD
const uint16_t deltaTSFCTabType2[14][2] = { {2,5},{6,5},{10,5},{18,5},{14,5},{22,5},{26,5},{30,5},{70,10},{74,10},{194,10},{326,10},{586,10},{210,10} }; // Table 5.5.3.3-2 3GPP 36.211 TDD const uint16_t deltaTSFCTabType2[14][2] = { {2, 5}, {6, 5}, {10, 5}, {18, 5}, {14, 5}, {22, 5}, {26, 5}, {30, 5}, {70, 10}, {74, 10}, {194, 10}, {326, 10}, {586, 10}, {210, 10} }; // Table 5.5.3.3-2 3GPP 36.211 TDD
uint16_t srsPeriodicity,srsOffset; uint16_t srsPeriodicity, srsOffset;
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
soundingRS_UL_ConfigCommon = &cc[CC_id].radioResourceConfigCommon->soundingRS_UL_ConfigCommon; soundingRS_UL_ConfigCommon =
&cc[CC_id].radioResourceConfigCommon->
soundingRS_UL_ConfigCommon;
// check if SRS is enabled in this frame/subframe // check if SRS is enabled in this frame/subframe
if (soundingRS_UL_ConfigCommon) { if (soundingRS_UL_ConfigCommon) {
srs_SubframeConfig = soundingRS_UL_ConfigCommon->choice.setup.srs_SubframeConfig; srs_SubframeConfig =
soundingRS_UL_ConfigCommon->choice.setup.
srs_SubframeConfig;
if (cc[CC_id].tdd_Config == NULL) { // FDD if (cc[CC_id].tdd_Config == NULL) { // FDD
deltaTSFC = deltaTSFCTabType1[srs_SubframeConfig][0]; deltaTSFC = deltaTSFCTabType1[srs_SubframeConfig][0];
TSFC = deltaTSFCTabType1[srs_SubframeConfig][1]; TSFC = deltaTSFCTabType1[srs_SubframeConfig][1];
} } else { // TDD
else { // TDD
deltaTSFC = deltaTSFCTabType2[srs_SubframeConfig][0]; deltaTSFC = deltaTSFCTabType2[srs_SubframeConfig][0];
TSFC = deltaTSFCTabType2[srs_SubframeConfig][1]; TSFC = deltaTSFCTabType2[srs_SubframeConfig][1];
} }
// Sounding reference signal subframes are the subframes satisfying ns/2 mod TSFC (- deltaTSFC // Sounding reference signal subframes are the subframes satisfying ns/2 mod TSFC (- deltaTSFC
uint16_t tmp = (subframeP % TSFC); uint16_t tmp = (subframeP % TSFC);
if((1<<tmp) & deltaTSFC) { if ((1 << tmp) & deltaTSFC) {
// This is an SRS subframe, loop over UEs // This is an SRS subframe, loop over UEs
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) { for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
if (RC.mac[module_idP]->UE_list.active[UE_id]!=TRUE) continue; if (RC.mac[module_idP]->UE_list.active[UE_id] != TRUE)
ul_req = &RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body; continue;
ul_req =
&RC.mac[module_idP]->UL_req[CC_id].
ul_config_request_body;
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet // drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP,UE_id)) < RRC_CONNECTED) continue; if (mac_eNB_get_rrc_status
(module_idP,
UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED)
continue;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated != NULL, "physicalConfigDedicated is null for UE %d\n",UE_id); AssertFatal(UE_list->UE_template[CC_id]
[UE_id].physicalConfigDedicated != NULL,
"physicalConfigDedicated is null for UE %d\n",
UE_id);
if ((soundingRS_UL_ConfigDedicated = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->soundingRS_UL_ConfigDedicated)!=NULL) { if ((soundingRS_UL_ConfigDedicated =
if (soundingRS_UL_ConfigDedicated->present == SoundingRS_UL_ConfigDedicated_PR_setup) { UE_list->UE_template[CC_id]
get_srs_pos(&cc[CC_id], soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex, &srsPeriodicity, &srsOffset); [UE_id].
if (((10*frameP+subframeP) % srsPeriodicity) == srsOffset) { physicalConfigDedicated->soundingRS_UL_ConfigDedicated)
!= NULL) {
if (soundingRS_UL_ConfigDedicated->present ==
SoundingRS_UL_ConfigDedicated_PR_setup) {
get_srs_pos(&cc[CC_id],
soundingRS_UL_ConfigDedicated->choice.
setup.srs_ConfigIndex,
&srsPeriodicity, &srsOffset);
if (((10 * frameP +
subframeP) % srsPeriodicity) ==
srsOffset) {
// Prorgram SRS // Prorgram SRS
ul_req->srs_present = 1; ul_req->srs_present = 1;
nfapi_ul_config_request_pdu_t* ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus]; nfapi_ul_config_request_pdu_t
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t)); * ul_config_pdu =
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_SRS_PDU_TYPE; &ul_req->
ul_config_pdu->pdu_size = 2+(uint8_t)(2+sizeof(nfapi_ul_config_srs_pdu)); ul_config_pdu_list
ul_config_pdu->srs_pdu.srs_pdu_rel8.size = (uint8_t)sizeof(nfapi_ul_config_srs_pdu);; [ul_req->number_of_pdus];
ul_config_pdu->srs_pdu.srs_pdu_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti; memset((void *) ul_config_pdu, 0,
ul_config_pdu->srs_pdu.srs_pdu_rel8.srs_bandwidth = soundingRS_UL_ConfigDedicated->choice.setup.srs_Bandwidth; sizeof
ul_config_pdu->srs_pdu.srs_pdu_rel8.frequency_domain_position = soundingRS_UL_ConfigDedicated->choice.setup.freqDomainPosition; (nfapi_ul_config_request_pdu_t));
ul_config_pdu->srs_pdu.srs_pdu_rel8.srs_hopping_bandwidth = soundingRS_UL_ConfigDedicated->choice.setup.srs_HoppingBandwidth;; ul_config_pdu->pdu_type =
ul_config_pdu->srs_pdu.srs_pdu_rel8.transmission_comb = soundingRS_UL_ConfigDedicated->choice.setup.transmissionComb; NFAPI_UL_CONFIG_SRS_PDU_TYPE;
ul_config_pdu->srs_pdu.srs_pdu_rel8.i_srs = soundingRS_UL_ConfigDedicated->choice.setup.srs_ConfigIndex; ul_config_pdu->pdu_size =
ul_config_pdu->srs_pdu.srs_pdu_rel8.sounding_reference_cyclic_shift = soundingRS_UL_ConfigDedicated->choice.setup.cyclicShift; 2 + (uint8_t) (2 +
sizeof
(nfapi_ul_config_srs_pdu));
ul_config_pdu->srs_pdu.srs_pdu_rel8.size =
(uint8_t)
sizeof(nfapi_ul_config_srs_pdu);;
ul_config_pdu->srs_pdu.srs_pdu_rel8.rnti =
UE_list->UE_template[CC_id][UE_id].
rnti;
ul_config_pdu->srs_pdu.
srs_pdu_rel8.srs_bandwidth =
soundingRS_UL_ConfigDedicated->
choice.setup.srs_Bandwidth;
ul_config_pdu->srs_pdu.
srs_pdu_rel8.frequency_domain_position
=
soundingRS_UL_ConfigDedicated->
choice.setup.freqDomainPosition;
ul_config_pdu->srs_pdu.
srs_pdu_rel8.srs_hopping_bandwidth =
soundingRS_UL_ConfigDedicated->
choice.setup.srs_HoppingBandwidth;;
ul_config_pdu->srs_pdu.
srs_pdu_rel8.transmission_comb =
soundingRS_UL_ConfigDedicated->
choice.setup.transmissionComb;
ul_config_pdu->srs_pdu.srs_pdu_rel8.i_srs =
soundingRS_UL_ConfigDedicated->
choice.setup.srs_ConfigIndex;
ul_config_pdu->srs_pdu.
srs_pdu_rel8.sounding_reference_cyclic_shift
=
soundingRS_UL_ConfigDedicated->
choice.setup.cyclicShift;
// ul_config_pdu->srs_pdu.srs_pdu_rel10.antenna_port = ;// // ul_config_pdu->srs_pdu.srs_pdu_rel10.antenna_port = ;//
// ul_config_pdu->srs_pdu.srs_pdu_rel13.number_of_combs = ;// // ul_config_pdu->srs_pdu.srs_pdu_rel13.number_of_combs = ;//
RC.mac[module_idP]->UL_req[CC_id].sfn_sf = (frameP<<4)+subframeP; RC.mac[module_idP]->UL_req[CC_id].sfn_sf =
(frameP << 4) + subframeP;
ul_req->number_of_pdus++; ul_req->number_of_pdus++;
} // if (((10*frameP+subframeP) % srsPeriodicity) == srsOffset) } // if (((10*frameP+subframeP) % srsPeriodicity) == srsOffset)
} // if (soundingRS_UL_ConfigDedicated->present == SoundingRS_UL_ConfigDedicated_PR_setup) } // if (soundingRS_UL_ConfigDedicated->present == SoundingRS_UL_ConfigDedicated_PR_setup)
@@ -146,73 +203,121 @@ void schedule_SRS(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
} // for (UE_id ... } // for (UE_id ...
} // if((1<<tmp) & deltaTSFC) } // if((1<<tmp) & deltaTSFC)
}// SRS config } // SRS config
} }
} }
void schedule_CSI(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP) void
schedule_CSI(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{ {
eNB_MAC_INST *eNB = RC.mac[module_idP]; eNB_MAC_INST *eNB = RC.mac[module_idP];
UE_list_t *UE_list = &eNB->UE_list; UE_list_t *UE_list = &eNB->UE_list;
COMMON_channels_t *cc; COMMON_channels_t *cc;
nfapi_ul_config_request_body_t *ul_req; nfapi_ul_config_request_body_t *ul_req;
int CC_id,UE_id; int CC_id, UE_id;
struct CQI_ReportPeriodic *cqi_ReportPeriodic; struct CQI_ReportPeriodic *cqi_ReportPeriodic;
uint16_t Npd,N_OFFSET_CQI; uint16_t Npd, N_OFFSET_CQI;
int H; int H;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
cc = &eNB->common_channels[CC_id]; cc = &eNB->common_channels[CC_id];
for (UE_id=0; UE_id < NUMBER_OF_UE_MAX; UE_id++) { for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
if (UE_list->active[UE_id] != TRUE) continue; if (UE_list->active[UE_id] != TRUE)
continue;
ul_req = &RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body; ul_req =
&RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body;
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet // drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP,UE_id)) < RRC_CONNECTED) continue; if (mac_eNB_get_rrc_status
(module_idP, UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED)
continue;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated != NULL, "physicalConfigDedicated is null for UE %d\n",UE_id); AssertFatal(UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated
!= NULL,
"physicalConfigDedicated is null for UE %d\n",
UE_id);
if (UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig) { if (UE_list->
if ((cqi_ReportPeriodic = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->cqi_ReportConfig->cqi_ReportPeriodic)!=NULL && UE_template[CC_id][UE_id].physicalConfigDedicated->
(cqi_ReportPeriodic->present!=CQI_ReportPeriodic_PR_release)) { cqi_ReportConfig) {
if ((cqi_ReportPeriodic =
UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated->
cqi_ReportConfig->cqi_ReportPeriodic) != NULL
&& (cqi_ReportPeriodic->present !=
CQI_ReportPeriodic_PR_release)) {
//Rel8 Periodic CQI/PMI/RI reporting //Rel8 Periodic CQI/PMI/RI reporting
get_csi_params(cc,cqi_ReportPeriodic,&Npd,&N_OFFSET_CQI,&H); get_csi_params(cc, cqi_ReportPeriodic, &Npd,
&N_OFFSET_CQI, &H);
if ((((frameP*10)+subframeP)%Npd) == N_OFFSET_CQI) { // CQI opportunity if ((((frameP * 10) + subframeP) % Npd) == N_OFFSET_CQI) { // CQI opportunity
UE_list->UE_sched_ctrl[UE_id].feedback_cnt[CC_id]=(((frameP*10)+subframeP)/Npd)%H; UE_list->UE_sched_ctrl[UE_id].feedback_cnt[CC_id] =
(((frameP * 10) + subframeP) / Npd) % H;
// Program CQI // Program CQI
nfapi_ul_config_request_pdu_t* ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus]; nfapi_ul_config_request_pdu_t *ul_config_pdu =
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t)); &ul_req->ul_config_pdu_list[ul_req->
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE; number_of_pdus];
ul_config_pdu->pdu_size = 2+(uint8_t)(2+sizeof(nfapi_ul_config_uci_cqi_pdu)); memset((void *) ul_config_pdu, 0,
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti; sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.pucch_index = cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex; ul_config_pdu->pdu_type =
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.dl_cqi_pmi_size = get_rel8_dl_cqi_pmi_size(&UE_list->UE_sched_ctrl[UE_id], NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE;
CC_id, ul_config_pdu->pdu_size =
cc, 2 + (uint8_t) (2 +
get_tmode(module_idP,CC_id,UE_id), sizeof
(nfapi_ul_config_uci_cqi_pdu));
ul_config_pdu->uci_cqi_pdu.
ue_information.ue_information_rel8.rnti =
UE_list->UE_template[CC_id][UE_id].rnti;
ul_config_pdu->uci_cqi_pdu.
cqi_information.cqi_information_rel8.
pucch_index =
cqi_ReportPeriodic->choice.
setup.cqi_PUCCH_ResourceIndex;
ul_config_pdu->uci_cqi_pdu.
cqi_information.cqi_information_rel8.
dl_cqi_pmi_size =
get_rel8_dl_cqi_pmi_size
(&UE_list->UE_sched_ctrl[UE_id], CC_id, cc,
get_tmode(module_idP, CC_id, UE_id),
cqi_ReportPeriodic); cqi_ReportPeriodic);
ul_req->number_of_pdus++; ul_req->number_of_pdus++;
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
// PUT rel10-13 UCI options here // PUT rel10-13 UCI options here
#endif #endif
} } else
else if ((cqi_ReportPeriodic->choice.setup.ri_ConfigIndex) && if ((cqi_ReportPeriodic->choice.setup.
((((frameP*10)+subframeP)%((H*Npd)<<(*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex/161)))== ri_ConfigIndex)
N_OFFSET_CQI + (*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex%161))) { // RI opportunity && ((((frameP * 10) + subframeP) % ((H * Npd) << (*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex / 161))) == N_OFFSET_CQI + (*cqi_ReportPeriodic->choice.setup.ri_ConfigIndex % 161))) { // RI opportunity
// Program RI // Program RI
nfapi_ul_config_request_pdu_t* ul_config_pdu = &ul_req->ul_config_pdu_list[ul_req->number_of_pdus]; nfapi_ul_config_request_pdu_t *ul_config_pdu =
memset((void*)ul_config_pdu,0,sizeof(nfapi_ul_config_request_pdu_t)); &ul_req->ul_config_pdu_list[ul_req->
ul_config_pdu->pdu_type = NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE; number_of_pdus];
ul_config_pdu->pdu_size = 2+(uint8_t)(2+sizeof(nfapi_ul_config_uci_cqi_pdu)); memset((void *) ul_config_pdu, 0,
ul_config_pdu->uci_cqi_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti; sizeof(nfapi_ul_config_request_pdu_t));
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.pucch_index = cqi_ReportPeriodic->choice.setup.cqi_PUCCH_ResourceIndex; ul_config_pdu->pdu_type =
ul_config_pdu->uci_cqi_pdu.cqi_information.cqi_information_rel8.dl_cqi_pmi_size = (cc->p_eNB==2)?1:2; NFAPI_UL_CONFIG_UCI_CQI_PDU_TYPE;
RC.mac[module_idP]->UL_req[CC_id].sfn_sf = (frameP<<4)+subframeP; ul_config_pdu->pdu_size =
2 + (uint8_t) (2 +
sizeof
(nfapi_ul_config_uci_cqi_pdu));
ul_config_pdu->uci_cqi_pdu.
ue_information.ue_information_rel8.rnti =
UE_list->UE_template[CC_id][UE_id].rnti;
ul_config_pdu->uci_cqi_pdu.
cqi_information.cqi_information_rel8.
pucch_index =
cqi_ReportPeriodic->choice.
setup.cqi_PUCCH_ResourceIndex;
ul_config_pdu->uci_cqi_pdu.
cqi_information.cqi_information_rel8.
dl_cqi_pmi_size = (cc->p_eNB == 2) ? 1 : 2;
RC.mac[module_idP]->UL_req[CC_id].sfn_sf =
(frameP << 4) + subframeP;
ul_req->number_of_pdus++; ul_req->number_of_pdus++;
} }
@@ -222,7 +327,8 @@ void schedule_CSI(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
} // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { } // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
} }
void schedule_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) void
schedule_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{ {
eNB_MAC_INST *eNB = RC.mac[module_idP]; eNB_MAC_INST *eNB = RC.mac[module_idP];
UE_list_t *UE_list = &eNB->UE_list; UE_list_t *UE_list = &eNB->UE_list;
@@ -236,34 +342,51 @@ void schedule_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
int i; int i;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
RC.mac[module_idP]->UL_req[CC_id].sfn_sf = (frameP << 4) + subframeP; RC.mac[module_idP]->UL_req[CC_id].sfn_sf =
(frameP << 4) + subframeP;
for (UE_id = 0; UE_id<NUMBER_OF_UE_MAX; UE_id++) { for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
if (RC.mac[module_idP]->UE_list.active[UE_id]!=TRUE) continue; if (RC.mac[module_idP]->UE_list.active[UE_id] != TRUE)
continue;
ul_req = &RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body; ul_req =
&RC.mac[module_idP]->UL_req[CC_id].ul_config_request_body;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated != NULL, "physicalConfigDedicated is null for UE %d\n",UE_id); AssertFatal(UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated
!= NULL,
"physicalConfigDedicated is null for UE %d\n",
UE_id);
// drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet // drop the allocation if the UE hasn't send RRCConnectionSetupComplete yet
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP,UE_id)) < RRC_CONNECTED) continue; if (mac_eNB_get_rrc_status
(module_idP, UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED)
continue;
if ((SRconfig = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig)!=NULL) { if ((SRconfig =
UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated->
schedulingRequestConfig) != NULL) {
if (SRconfig->present == SchedulingRequestConfig_PR_setup) { if (SRconfig->present == SchedulingRequestConfig_PR_setup) {
if (SRconfig->choice.setup.sr_ConfigIndex <= 4) { // 5 ms SR period if (SRconfig->choice.setup.sr_ConfigIndex <= 4) { // 5 ms SR period
if ((subframeP%5) != SRconfig->choice.setup.sr_ConfigIndex) if ((subframeP % 5) !=
SRconfig->choice.setup.sr_ConfigIndex)
continue; continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 14) { // 10 ms SR period } else if (SRconfig->choice.setup.sr_ConfigIndex <= 14) { // 10 ms SR period
if (subframeP!=(SRconfig->choice.setup.sr_ConfigIndex-5)) if (subframeP !=
(SRconfig->choice.setup.sr_ConfigIndex - 5))
continue; continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 34) { // 20 ms SR period } else if (SRconfig->choice.setup.sr_ConfigIndex <= 34) { // 20 ms SR period
if ((10*(frameP&1)+subframeP) != (SRconfig->choice.setup.sr_ConfigIndex-15)) if ((10 * (frameP & 1) + subframeP) !=
(SRconfig->choice.setup.sr_ConfigIndex - 15))
continue; continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 74) { // 40 ms SR period } else if (SRconfig->choice.setup.sr_ConfigIndex <= 74) { // 40 ms SR period
if ((10*(frameP&3)+subframeP) != (SRconfig->choice.setup.sr_ConfigIndex-35)) if ((10 * (frameP & 3) + subframeP) !=
(SRconfig->choice.setup.sr_ConfigIndex - 35))
continue; continue;
} else if (SRconfig->choice.setup.sr_ConfigIndex <= 154) { // 80 ms SR period } else if (SRconfig->choice.setup.sr_ConfigIndex <= 154) { // 80 ms SR period
if ((10*(frameP&7)+subframeP) != (SRconfig->choice.setup.sr_ConfigIndex-75)) if ((10 * (frameP & 7) + subframeP) !=
(SRconfig->choice.setup.sr_ConfigIndex - 75))
continue; continue;
} }
} // SRconfig->present == SchedulingRequestConfig_PR_setup) } // SRconfig->present == SchedulingRequestConfig_PR_setup)
@@ -271,113 +394,178 @@ void schedule_SR(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
// if we get here there is some PUCCH1 reception to schedule for SR // if we get here there is some PUCCH1 reception to schedule for SR
skip_ue=0; skip_ue = 0;
is_harq = 0; is_harq = 0;
// check that there is no existing UL grant for ULSCH which overrides the SR // check that there is no existing UL grant for ULSCH which overrides the SR
for (i = 0; i < ul_req->number_of_pdus; i++) { for (i = 0; i < ul_req->number_of_pdus; i++) {
if (((ul_req->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE)|| if (((ul_req->ul_config_pdu_list[i].pdu_type ==
(ul_req->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE)|| NFAPI_UL_CONFIG_ULSCH_PDU_TYPE)
(ul_req->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE)|| || (ul_req->ul_config_pdu_list[i].pdu_type ==
(ul_req->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE))&& NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE)
(ul_req->ul_config_pdu_list[i].ulsch_pdu.ulsch_pdu_rel8.rnti == UE_list->UE_template[CC_id][UE_id].rnti)) { || (ul_req->ul_config_pdu_list[i].pdu_type ==
skip_ue=1; NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE)
|| (ul_req->ul_config_pdu_list[i].pdu_type ==
NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE))
&& (ul_req->ul_config_pdu_list[i].
ulsch_pdu.ulsch_pdu_rel8.rnti ==
UE_list->UE_template[CC_id][UE_id].rnti)) {
skip_ue = 1;
break; break;
} }
/* if there is already an HARQ pdu, convert to SR_HARQ */ /* if there is already an HARQ pdu, convert to SR_HARQ */
else if ((ul_req->ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE)&& else if ((ul_req->ul_config_pdu_list[i].pdu_type ==
(ul_req->ul_config_pdu_list[i].uci_harq_pdu.ue_information.ue_information_rel8.rnti == UE_list->UE_template[CC_id][UE_id].rnti)) { NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE)
&& (ul_req->ul_config_pdu_list[i].
uci_harq_pdu.ue_information.
ue_information_rel8.rnti ==
UE_list->UE_template[CC_id][UE_id].rnti)) {
is_harq = 1; is_harq = 1;
break; break;
} }
} }
// drop the allocation because ULSCH with handle it with BSR // drop the allocation because ULSCH with handle it with BSR
if (skip_ue==1) continue; if (skip_ue == 1)
continue;
LOG_D(MAC,"Frame %d, Subframe %d : Scheduling SR for UE %d/%x\n",frameP,subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].rnti); LOG_D(MAC,
"Frame %d, Subframe %d : Scheduling SR for UE %d/%x\n",
frameP, subframeP, UE_id,
UE_list->UE_template[CC_id][UE_id].rnti);
// check Rel10 or Rel8 SR // check Rel10 or Rel8 SR
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
if ((UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2) && if ((UE_list->
(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020)&& UE_template[CC_id][UE_id].physicalConfigDedicated->ext2)
(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020)) { && (UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated->
ext2->schedulingRequestConfig_v1020)
&& (UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated->
ext2->schedulingRequestConfig_v1020)) {
sr.sr_information_rel10.number_of_pucch_resources = 1; sr.sr_information_rel10.number_of_pucch_resources = 1;
sr.sr_information_rel10.pucch_index_p1 = *UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->ext2->schedulingRequestConfig_v1020->sr_PUCCH_ResourceIndexP1_r10; sr.sr_information_rel10.pucch_index_p1 =
*UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated->
ext2->
schedulingRequestConfig_v1020->sr_PUCCH_ResourceIndexP1_r10;
} else } else
#endif #endif
{ {
sr.sr_information_rel8.pucch_index = UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->schedulingRequestConfig->choice.setup.sr_PUCCH_ResourceIndex; sr.sr_information_rel8.pucch_index =
UE_list->
UE_template[CC_id][UE_id].physicalConfigDedicated->
schedulingRequestConfig->choice.setup.
sr_PUCCH_ResourceIndex;
} }
/* if there is already an HARQ pdu, convert to SR_HARQ */ /* if there is already an HARQ pdu, convert to SR_HARQ */
if (is_harq) { if (is_harq) {
nfapi_ul_config_harq_information h = ul_req->ul_config_pdu_list[i].uci_harq_pdu.harq_information; nfapi_ul_config_harq_information h =
ul_req->ul_config_pdu_list[i].pdu_type = NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE; ul_req->ul_config_pdu_list[i].uci_harq_pdu.
ul_req->ul_config_pdu_list[i].uci_sr_harq_pdu.sr_information = sr; harq_information;
ul_req->ul_config_pdu_list[i].uci_sr_harq_pdu.harq_information = h; ul_req->ul_config_pdu_list[i].pdu_type =
NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE;
ul_req->ul_config_pdu_list[i].uci_sr_harq_pdu.
sr_information = sr;
ul_req->ul_config_pdu_list[i].uci_sr_harq_pdu.
harq_information = h;
} else { } else {
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].pdu_type = NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE; ul_req->ul_config_pdu_list[ul_req->number_of_pdus].
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].uci_sr_pdu.ue_information.ue_information_rel8.rnti = UE_list->UE_template[CC_id][UE_id].rnti; pdu_type = NFAPI_UL_CONFIG_UCI_SR_PDU_TYPE;
ul_req->ul_config_pdu_list[ul_req->number_of_pdus].uci_sr_pdu.sr_information = sr; ul_req->ul_config_pdu_list[ul_req->
number_of_pdus].uci_sr_pdu.
ue_information.ue_information_rel8.rnti =
UE_list->UE_template[CC_id][UE_id].rnti;
ul_req->ul_config_pdu_list[ul_req->
number_of_pdus].uci_sr_pdu.
sr_information = sr;
ul_req->number_of_pdus++; ul_req->number_of_pdus++;
} /* if (is_harq) */ } /* if (is_harq) */
} // for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) } // for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id])
} // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) } // for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
} }
void check_ul_failure(module_id_t module_idP,int CC_id,int UE_id, void
check_ul_failure(module_id_t module_idP, int CC_id, int UE_id,
frame_t frameP, sub_frame_t subframeP) frame_t frameP, sub_frame_t subframeP)
{ {
UE_list_t *UE_list = &RC.mac[module_idP]->UE_list; UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
nfapi_dl_config_request_t *DL_req = &RC.mac[module_idP]->DL_req[0]; nfapi_dl_config_request_t *DL_req = &RC.mac[module_idP]->DL_req[0];
uint16_t rnti = UE_RNTI(module_idP,UE_id); uint16_t rnti = UE_RNTI(module_idP, UE_id);
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels; COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
// check uplink failure // check uplink failure
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer>0)&& if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 0) &&
(UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync==0)) { (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 0)) {
LOG_I(MAC,"UE %d rnti %x: UL Failure timer %d \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer); LOG_I(MAC, "UE %d rnti %x: UL Failure timer %d \n", UE_id, rnti,
if (UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent==0) { UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent=1; if (UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent == 0) {
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 1;
// add a format 1A dci for this UE to request an RA procedure (only one UE per subframe) // add a format 1A dci for this UE to request an RA procedure (only one UE per subframe)
nfapi_dl_config_request_pdu_t* dl_config_pdu = &DL_req[CC_id].dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].dl_config_request_body.number_pdu]; nfapi_dl_config_request_pdu_t *dl_config_pdu =
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t)); &DL_req[CC_id].
dl_config_request_body.dl_config_pdu_list[DL_req[CC_id].
dl_config_request_body.number_pdu];
memset((void *) dl_config_pdu, 0,
sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE; dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t)(2+sizeof(nfapi_dl_config_dci_dl_pdu)); dl_config_pdu->pdu_size =
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format = NFAPI_DL_DCI_FORMAT_1A; (uint8_t) (2 + sizeof(nfapi_dl_config_dci_dl_pdu));
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level = get_aggregation(get_bw_index(module_idP,CC_id),UE_list->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format1A); dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.dci_format =
NFAPI_DL_DCI_FORMAT_1A;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level =
get_aggregation(get_bw_index(module_idP, CC_id),
UE_list->UE_sched_ctrl[UE_id].
dl_cqi[CC_id], format1A);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti; dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti = rnti;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 1; // CRNTI : see Table 4-10 from SCF082 - nFAPI specifications dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type = 1; // CRNTI : see Table 4-10 from SCF082 - nFAPI specifications
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.transmission_power = 6000; // equal to RS power
AssertFatal((cc[CC_id].mib->message.dl_Bandwidth >=0) && (cc[CC_id].mib->message.dl_Bandwidth<6), AssertFatal((cc[CC_id].mib->message.dl_Bandwidth >= 0)
"illegal dl_Bandwidth %d\n",(int)cc[CC_id].mib->message.dl_Bandwidth); && (cc[CC_id].mib->message.dl_Bandwidth < 6),
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = pdcch_order_table[cc[CC_id].mib->message.dl_Bandwidth]; "illegal dl_Bandwidth %d\n",
(int) cc[CC_id].mib->message.dl_Bandwidth);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.
resource_block_coding =
pdcch_order_table[cc[CC_id].mib->message.dl_Bandwidth];
DL_req[CC_id].dl_config_request_body.number_dci++; DL_req[CC_id].dl_config_request_body.number_dci++;
DL_req[CC_id].dl_config_request_body.number_pdu++; DL_req[CC_id].dl_config_request_body.number_pdu++;
LOG_I(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d), resource_block_coding %d \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding); LOG_I(MAC,
} "UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d), resource_block_coding %d \n",
else { // ra_pdcch_sent==1 UE_id, rnti,
LOG_I(MAC,"UE %d rnti %x: sent PDCCH order for RAPROC waiting (failure timer %d) \n",UE_id,rnti,UE_list->UE_sched_ctrl[UE_id].ul_failure_timer); UE_list->UE_sched_ctrl[UE_id].ul_failure_timer,
dl_config_pdu->dci_dl_pdu.
dci_dl_pdu_rel8.resource_block_coding);
} else { // ra_pdcch_sent==1
LOG_I(MAC,
"UE %d rnti %x: sent PDCCH order for RAPROC waiting (failure timer %d) \n",
UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 40) == 0) if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 40) == 0)
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent=0; // resend every 4 frames UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 0; // resend every 4 frames
} }
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer++; UE_list->UE_sched_ctrl[UE_id].ul_failure_timer++;
// check threshold // check threshold
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 200) { if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 200) {
// inform RRC of failure and clear timer // inform RRC of failure and clear timer
LOG_I(MAC,"UE %d rnti %x: UL Failure after repeated PDCCH orders: Triggering RRC \n",UE_id,rnti); LOG_I(MAC,
mac_eNB_rrc_ul_failure(module_idP,CC_id,frameP,subframeP,rnti); "UE %d rnti %x: UL Failure after repeated PDCCH orders: Triggering RRC \n",
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer=0; UE_id, rnti);
UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync=1; mac_eNB_rrc_ul_failure(module_idP, CC_id, frameP, subframeP,
rnti);
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync = 1;
} }
} // ul_failure_timer>0 } // ul_failure_timer>0
} }
void clear_nfapi_information(eNB_MAC_INST *eNB,int CC_idP,frame_t frameP,sub_frame_t subframeP) void
clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
frame_t frameP, sub_frame_t subframeP)
{ {
nfapi_dl_config_request_t *DL_req = &eNB->DL_req[0]; nfapi_dl_config_request_t *DL_req = &eNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &eNB->UL_req[0]; nfapi_ul_config_request_t *UL_req = &eNB->UL_req[0];
@@ -392,7 +580,8 @@ void clear_nfapi_information(eNB_MAC_INST *eNB,int CC_idP,frame_t frameP,sub_fra
DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0; DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000; DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4); HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf =
subframeP + (frameP << 4);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0; HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
@@ -406,7 +595,8 @@ void clear_nfapi_information(eNB_MAC_INST *eNB,int CC_idP,frame_t frameP,sub_fra
} }
void copy_ulreq(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP) void
copy_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
{ {
int CC_id; int CC_id;
eNB_MAC_INST *eNB; eNB_MAC_INST *eNB;
@@ -415,30 +605,34 @@ void copy_ulreq(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP)
eNB = RC.mac[module_idP]; eNB = RC.mac[module_idP];
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
ul_req_tmp = &eNB->UL_req_tmp[CC_id][subframeP].ul_config_request_body; ul_req_tmp =
&eNB->UL_req_tmp[CC_id][subframeP].ul_config_request_body;
ul_req = &eNB->UL_req[CC_id].ul_config_request_body; ul_req = &eNB->UL_req[CC_id].ul_config_request_body;
eNB->UL_req[CC_id].sfn_sf = (frameP<<4) + subframeP; eNB->UL_req[CC_id].sfn_sf = (frameP << 4) + subframeP;
ul_req->number_of_pdus = ul_req_tmp->number_of_pdus; ul_req->number_of_pdus = ul_req_tmp->number_of_pdus;
ul_req_tmp->number_of_pdus = 0; ul_req_tmp->number_of_pdus = 0;
memcpy((void*)ul_req->ul_config_pdu_list, memcpy((void *) ul_req->ul_config_pdu_list,
(void*)ul_req_tmp->ul_config_pdu_list, (void *) ul_req_tmp->ul_config_pdu_list,
ul_req->number_of_pdus*sizeof(nfapi_ul_config_request_pdu_t)); ul_req->number_of_pdus *
sizeof(nfapi_ul_config_request_pdu_t));
} }
} }
void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP) void
eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
sub_frame_t subframeP)
{ {
int mbsfn_status[MAX_NUM_CCs]; int mbsfn_status[MAX_NUM_CCs];
protocol_ctxt_t ctxt; protocol_ctxt_t ctxt;
int CC_id,i; //,next_i; int CC_id, i; //,next_i;
UE_list_t *UE_list=&RC.mac[module_idP]->UE_list; UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
rnti_t rnti; rnti_t rnti;
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels; COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
@@ -449,68 +643,82 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
start_meas(&RC.mac[module_idP]->eNB_scheduler); start_meas(&RC.mac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,
VCD_FUNCTION_IN);
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
mbsfn_status[CC_id]=0; mbsfn_status[CC_id] = 0;
// clear vrb_maps // clear vrb_maps
memset(cc[CC_id].vrb_map,0,100); memset(cc[CC_id].vrb_map, 0, 100);
memset(cc[CC_id].vrb_map_UL,0,100); memset(cc[CC_id].vrb_map_UL, 0, 100);
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
cc[CC_id].mcch_active =0; cc[CC_id].mcch_active = 0;
#endif #endif
RC.mac[module_idP]->frame = frameP; RC.mac[module_idP]->frame = frameP;
RC.mac[module_idP]->subframe = subframeP; RC.mac[module_idP]->subframe = subframeP;
clear_nfapi_information(RC.mac[module_idP],CC_id,frameP,subframeP); clear_nfapi_information(RC.mac[module_idP], CC_id, frameP,
subframeP);
} }
// refresh UE list based on UEs dropped by PHY in previous subframe // refresh UE list based on UEs dropped by PHY in previous subframe
for (i = 0; i < NUMBER_OF_UE_MAX; i++) { for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
if (UE_list->active[i] != TRUE) continue; if (UE_list->active[i] != TRUE)
continue;
rnti = UE_RNTI(module_idP, i); rnti = UE_RNTI(module_idP, i);
CC_id = UE_PCCID(module_idP, i); CC_id = UE_PCCID(module_idP, i);
if ((frameP==0)&&(subframeP==0)) { if ((frameP == 0) && (subframeP == 0)) {
LOG_I(MAC,"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n", rnti, LOG_I(MAC,
UE_list->UE_sched_ctrl[i].ul_out_of_sync==0 ? "in synch" : "out of sync", "UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
rnti,
UE_list->UE_sched_ctrl[i].ul_out_of_sync ==
0 ? "in synch" : "out of sync",
UE_list->UE_template[CC_id][i].phr_info, UE_list->UE_template[CC_id][i].phr_info,
UE_list->UE_sched_ctrl[i].dl_cqi[CC_id], UE_list->UE_sched_ctrl[i].dl_cqi[CC_id],
(UE_list->UE_sched_ctrl[i].pusch_snr[CC_id]-128)/2, (UE_list->UE_sched_ctrl[i].pusch_snr[CC_id] - 128) / 2,
(UE_list->UE_sched_ctrl[i].pucch1_snr[CC_id]-128)/2); (UE_list->UE_sched_ctrl[i].pucch1_snr[CC_id] - 128) / 2);
} }
RC.eNB[module_idP][CC_id]->pusch_stats_bsr[i][(frameP*10)+subframeP]=-63; RC.eNB[module_idP][CC_id]->pusch_stats_bsr[i][(frameP * 10) +
if (i==UE_list->head) subframeP] = -63;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BSR,RC.eNB[module_idP][CC_id]->pusch_stats_bsr[i][(frameP*10)+subframeP]); if (i == UE_list->head)
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME
(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BSR,
RC.eNB[module_idP][CC_id]->
pusch_stats_bsr[i][(frameP * 10) + subframeP]);
// increment this, it is cleared when we receive an sdu // increment this, it is cleared when we receive an sdu
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer++; RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer++;
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].cqi_req_timer++; RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].cqi_req_timer++;
LOG_D(MAC,"UE %d/%x : ul_inactivity %d, cqi_req %d\n",i,rnti, LOG_D(MAC, "UE %d/%x : ul_inactivity %d, cqi_req %d\n", i, rnti,
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ul_inactivity_timer, RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].
ul_inactivity_timer,
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].cqi_req_timer); RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].cqi_req_timer);
check_ul_failure(module_idP,CC_id,i,frameP,subframeP); check_ul_failure(module_idP, CC_id, i, frameP, subframeP);
} }
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frameP, subframeP,module_idP); PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,
NOT_A_RNTI, frameP, subframeP,
module_idP);
pdcp_run(&ctxt); pdcp_run(&ctxt);
rrc_rx_tx(&ctxt, rrc_rx_tx(&ctxt, 0, // eNB index, unused in eNB
0, // eNB index, unused in eNB
CC_id); CC_id);
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
if (cc[CC_id].MBMS_flag >0) { if (cc[CC_id].MBMS_flag > 0) {
start_meas(&RC.mac[module_idP]->schedule_mch); start_meas(&RC.mac[module_idP]->schedule_mch);
mbsfn_status[CC_id] = schedule_MBMS(module_idP,CC_id,frameP,subframeP); mbsfn_status[CC_id] =
schedule_MBMS(module_idP, CC_id, frameP, subframeP);
stop_meas(&RC.mac[module_idP]->schedule_mch); stop_meas(&RC.mac[module_idP]->schedule_mch);
} }
} }
@@ -518,31 +726,35 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, sub_frame
#endif #endif
// This schedules MIB // This schedules MIB
if ((subframeP==0) && (frameP&3) == 0) schedule_mib(module_idP,frameP,subframeP); if ((subframeP == 0) && (frameP & 3) == 0)
schedule_mib(module_idP, frameP, subframeP);
// This schedules SI for legacy LTE and eMTC starting in subframeP // This schedules SI for legacy LTE and eMTC starting in subframeP
schedule_SI(module_idP,frameP,subframeP); schedule_SI(module_idP, frameP, subframeP);
// This schedules Random-Access for legacy LTE and eMTC starting in subframeP // This schedules Random-Access for legacy LTE and eMTC starting in subframeP
schedule_RA(module_idP,frameP,subframeP); schedule_RA(module_idP, frameP, subframeP);
// copy previously scheduled UL resources (ULSCH + HARQ) // copy previously scheduled UL resources (ULSCH + HARQ)
copy_ulreq(module_idP,frameP,subframeP); copy_ulreq(module_idP, frameP, subframeP);
// This schedules SRS in subframeP // This schedules SRS in subframeP
schedule_SRS(module_idP,frameP,subframeP); schedule_SRS(module_idP, frameP, subframeP);
// This schedules ULSCH in subframeP (dci0) // This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP,frameP,subframeP); schedule_ulsch(module_idP, frameP, subframeP);
// This schedules UCI_SR in subframeP // This schedules UCI_SR in subframeP
schedule_SR(module_idP,frameP,subframeP); schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP // This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP); schedule_CSI(module_idP, frameP, subframeP);
// This schedules DLSCH in subframeP // This schedules DLSCH in subframeP
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status); schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
// Allocate CCEs for good after scheduling is done // Allocate CCEs for good after scheduling is done
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) allocate_CCEs(module_idP,CC_id,subframeP,0); for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
stop_meas(&RC.mac[module_idP]->eNB_scheduler); stop_meas(&RC.mac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,
VCD_FUNCTION_OUT);
} }
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+953 -612
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/eNB_scheduler_bch.c
+412 -304
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+757 -546
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/eNB_scheduler_mch.c
+329 -190
View File
@@ -52,7 +52,7 @@
#include "pdcp.h" #include "pdcp.h"
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI)
# include "intertask_interface.h" #include "intertask_interface.h"
#endif #endif
#include "SIMULATION/TOOLS/defs.h" // for taus #include "SIMULATION/TOOLS/defs.h" // for taus
@@ -63,58 +63,75 @@
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
int8_t get_mbsfn_sf_alloction (module_id_t module_idP, uint8_t CC_id, uint8_t mbsfn_sync_area) int8_t
get_mbsfn_sf_alloction(module_id_t module_idP, uint8_t CC_id,
uint8_t mbsfn_sync_area)
{ {
// currently there is one-to-one mapping between sf allocation pattern and sync area // currently there is one-to-one mapping between sf allocation pattern and sync area
if (mbsfn_sync_area > MAX_MBSFN_AREA) { if (mbsfn_sync_area > MAX_MBSFN_AREA) {
LOG_W(MAC,"[eNB %d] CC_id %d MBSFN synchronization area %d out of range\n ", module_idP, CC_id, mbsfn_sync_area); LOG_W(MAC,
"[eNB %d] CC_id %d MBSFN synchronization area %d out of range\n ",
module_idP, CC_id, mbsfn_sync_area);
return -1; return -1;
} else if (RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[mbsfn_sync_area] != NULL) { } else if (RC.mac[module_idP]->
common_channels[CC_id].mbsfn_SubframeConfig[mbsfn_sync_area]
!= NULL) {
return mbsfn_sync_area; return mbsfn_sync_area;
} else { } else {
LOG_W(MAC,"[eNB %d] CC_id %d MBSFN Subframe Config pattern %d not found \n ", module_idP, CC_id, mbsfn_sync_area); LOG_W(MAC,
"[eNB %d] CC_id %d MBSFN Subframe Config pattern %d not found \n ",
module_idP, CC_id, mbsfn_sync_area);
return -1; return -1;
} }
} }
int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_frame_t subframeP) int
schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sub_frame_t subframeP)
{ {
int mcch_flag=0,mtch_flag=0, msi_flag=0; int mcch_flag = 0, mtch_flag = 0, msi_flag = 0;
int mbsfn_period =0;// 1<<(RC.mac[module_idP]->mbsfn_SubframeConfig[0]->radioframeAllocationPeriod); int mbsfn_period = 0; // 1<<(RC.mac[module_idP]->mbsfn_SubframeConfig[0]->radioframeAllocationPeriod);
int mcch_period = 0;//32<<(RC.mac[module_idP]->mbsfn_AreaInfo[0]->mcch_Config_r9.mcch_RepetitionPeriod_r9); int mcch_period = 0; //32<<(RC.mac[module_idP]->mbsfn_AreaInfo[0]->mcch_Config_r9.mcch_RepetitionPeriod_r9);
int mch_scheduling_period = 8<<(RC.mac[module_idP]->common_channels[CC_id].pmch_Config[0]->mch_SchedulingPeriod_r9); int mch_scheduling_period =
8 << (RC.mac[module_idP]->common_channels[CC_id].
pmch_Config[0]->mch_SchedulingPeriod_r9);
unsigned char mcch_sdu_length; unsigned char mcch_sdu_length;
unsigned char header_len_mcch=0,header_len_msi=0,header_len_mtch=0, header_len_mtch_temp=0, header_len_mcch_temp=0, header_len_msi_temp=0; unsigned char header_len_mcch = 0, header_len_msi =
int ii=0, msi_pos=0; 0, header_len_mtch = 0, header_len_mtch_temp =
0, header_len_mcch_temp = 0, header_len_msi_temp = 0;
int ii = 0, msi_pos = 0;
int mcch_mcs = -1; int mcch_mcs = -1;
uint16_t TBS,j=-1,padding=0,post_padding=0; uint16_t TBS, j = -1, padding = 0, post_padding = 0;
mac_rlc_status_resp_t rlc_status; mac_rlc_status_resp_t rlc_status;
int num_mtch; int num_mtch;
int msi_length,i,k; int msi_length, i, k;
unsigned char sdu_lcids[11], num_sdus=0, offset=0; unsigned char sdu_lcids[11], num_sdus = 0, offset = 0;
uint16_t sdu_lengths[11], sdu_length_total=0; uint16_t sdu_lengths[11], sdu_length_total = 0;
unsigned char mch_buffer[MAX_DLSCH_PAYLOAD_BYTES]; // check the max value, this is for dlsch only unsigned char mch_buffer[MAX_DLSCH_PAYLOAD_BYTES]; // check the max value, this is for dlsch only
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id]; COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
cc->MCH_pdu.Pdu_size=0; cc->MCH_pdu.Pdu_size = 0;
for (i=0; for (i = 0; i < cc->num_active_mbsfn_area; i++) {
i< cc->num_active_mbsfn_area;
i++ ) {
// assume, that there is always a mapping // assume, that there is always a mapping
if ((j=get_mbsfn_sf_alloction(module_idP,CC_id,i)) == -1) { if ((j = get_mbsfn_sf_alloction(module_idP, CC_id, i)) == -1) {
return 0; return 0;
} }
mbsfn_period = 1<<(cc->mbsfn_SubframeConfig[j]->radioframeAllocationPeriod); mbsfn_period =
mcch_period = 32<<(cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_RepetitionPeriod_r9); 1 << (cc->mbsfn_SubframeConfig[j]->radioframeAllocationPeriod);
msi_pos=0; mcch_period =
ii=0; 32 << (cc->mbsfn_AreaInfo[i]->
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d : Checking MBSFN Sync Area %d/%d with SF allocation %d/%d for MCCH and MTCH (mbsfn period %d, mcch period %d)\n", mcch_Config_r9.mcch_RepetitionPeriod_r9);
module_idP, CC_id, frameP, subframeP,i,cc->num_active_mbsfn_area, msi_pos = 0;
j,cc->num_sf_allocation_pattern,mbsfn_period,mcch_period); ii = 0;
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d : Checking MBSFN Sync Area %d/%d with SF allocation %d/%d for MCCH and MTCH (mbsfn period %d, mcch period %d)\n",
module_idP, CC_id, frameP, subframeP, i,
cc->num_active_mbsfn_area, j, cc->num_sf_allocation_pattern,
mbsfn_period, mcch_period);
switch (cc->mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) { switch (cc->mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) {
@@ -140,28 +157,43 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
if (cc->mbsfn_SubframeConfig[j]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) { // one-frameP format if (cc->mbsfn_SubframeConfig[j]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) { // one-frameP format
// Find the first subframeP in this MCH to transmit MSI // Find the first subframeP in this MCH to transmit MSI
if (frameP % mch_scheduling_period == cc->mbsfn_SubframeConfig[j]->radioframeAllocationOffset ) { if (frameP % mch_scheduling_period ==
cc->mbsfn_SubframeConfig[j]->
radioframeAllocationOffset) {
while (ii == 0) { while (ii == 0) {
ii = cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & (0x80>>msi_pos); ii = cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & (0x80 >> msi_pos);
msi_pos++; msi_pos++;
} }
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d : sync area %d sf allocation pattern %d sf alloc %x msi pos is %d \n", LOG_D(MAC,
module_idP, CC_id, frameP, subframeP,i,j, "[eNB %d] CC_id %d Frame %d subframeP %d : sync area %d sf allocation pattern %d sf alloc %x msi pos is %d \n",
cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0], msi_pos); module_idP, CC_id, frameP, subframeP, i, j,
cc->mbsfn_SubframeConfig[j]->
subframeAllocation.choice.oneFrame.buf[0],
msi_pos);
} }
// Check if the subframeP is for MSI, MCCH or MTCHs and Set the correspoding flag to 1 // Check if the subframeP is for MSI, MCCH or MTCHs and Set the correspoding flag to 1
switch (subframeP) { switch (subframeP) {
case 1: case 1:
if (cc->tdd_Config == NULL) { if (cc->tdd_Config == NULL) {
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF1) ==
MBSFN_FDD_SF1) {
if (msi_pos == 1) { if (msi_pos == 1) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF1) ==
MBSFN_FDD_SF1)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -173,13 +205,22 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
case 2: case 2:
if (cc->tdd_Config == NULL) { if (cc->tdd_Config == NULL) {
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF2) ==
MBSFN_FDD_SF2) {
if (msi_pos == 2) { if (msi_pos == 2) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF2) ==
MBSFN_FDD_SF2)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -191,26 +232,44 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
case 3: case 3:
if (cc->tdd_Config != NULL) { // TDD if (cc->tdd_Config != NULL) { // TDD
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF3) ==
MBSFN_TDD_SF3) {
if (msi_pos == 1) { if (msi_pos == 1) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF3) ==
MBSFN_TDD_SF3)) {
mcch_flag = 1; mcch_flag = 1;
} }
mtch_flag = 1; mtch_flag = 1;
} }
} else { // FDD } else { // FDD
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF3) ==
MBSFN_FDD_SF3) {
if (msi_pos == 3) { if (msi_pos == 3) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF3) ==
MBSFN_FDD_SF3)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -222,13 +281,22 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
case 4: case 4:
if (cc->tdd_Config != NULL) { if (cc->tdd_Config != NULL) {
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF4) ==
MBSFN_TDD_SF4) {
if (msi_pos == 2) { if (msi_pos == 2) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF4) ==
MBSFN_TDD_SF4)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -240,13 +308,22 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
case 6: case 6:
if (cc->tdd_Config == NULL) { if (cc->tdd_Config == NULL) {
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF6) ==
MBSFN_FDD_SF6) {
if (msi_pos == 4) { if (msi_pos == 4) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF6) ==
MBSFN_FDD_SF6)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -258,26 +335,44 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
case 7: case 7:
if (cc->tdd_Config != NULL) { // TDD if (cc->tdd_Config != NULL) { // TDD
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF7) ==
MBSFN_TDD_SF7) {
if (msi_pos == 3) { if (msi_pos == 3) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF7) ==
MBSFN_TDD_SF7)) {
mcch_flag = 1; mcch_flag = 1;
} }
mtch_flag = 1; mtch_flag = 1;
} }
} else { // FDD } else { // FDD
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF7) ==
MBSFN_FDD_SF7) {
if (msi_pos == 5) { if (msi_pos == 5) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF7) ==
MBSFN_FDD_SF7)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -289,26 +384,44 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
case 8: case 8:
if (cc->tdd_Config != NULL) { //TDD if (cc->tdd_Config != NULL) { //TDD
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF8) ==
MBSFN_TDD_SF8) {
if (msi_pos == 4) { if (msi_pos == 4) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF8) ==
MBSFN_TDD_SF8)) {
mcch_flag = 1; mcch_flag = 1;
} }
mtch_flag = 1; mtch_flag = 1;
} }
} else { // FDD } else { // FDD
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF8) ==
MBSFN_FDD_SF8) {
if (msi_pos == 6) { if (msi_pos == 6) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF8) ==
MBSFN_FDD_SF8)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -320,13 +433,22 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
case 9: case 9:
if (cc->tdd_Config != NULL) { if (cc->tdd_Config != NULL) {
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF9) == MBSFN_TDD_SF9) { if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF9) ==
MBSFN_TDD_SF9) {
if (msi_pos == 5) { if (msi_pos == 5) {
msi_flag = 1; msi_flag = 1;
} }
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) && if ((frameP % mcch_period ==
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF9) == MBSFN_TDD_SF9) ) { cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF9) ==
MBSFN_TDD_SF9)) {
mcch_flag = 1; mcch_flag = 1;
} }
@@ -335,12 +457,15 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
} }
break; break;
}// end switch } // end switch
// sf allocation is non-overlapping // sf allocation is non-overlapping
if ((msi_flag==1) || (mcch_flag==1) || (mtch_flag==1)) { if ((msi_flag == 1) || (mcch_flag == 1)
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d Subframe %d: sync area %d SF alloc %d: msi flag %d, mcch flag %d, mtch flag %d\n", || (mtch_flag == 1)) {
module_idP, CC_id, frameP, subframeP,i,j,msi_flag,mcch_flag,mtch_flag); LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d Subframe %d: sync area %d SF alloc %d: msi flag %d, mcch flag %d, mtch flag %d\n",
module_idP, CC_id, frameP, subframeP, i, j,
msi_flag, mcch_flag, mtch_flag);
break; break;
} }
} else { // four-frameP format } else { // four-frameP format
@@ -348,18 +473,16 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
} }
} // end of for loop } // end of for loop
cc->msi_active=0; cc->msi_active = 0;
cc->mcch_active=0; cc->mcch_active = 0;
cc->mtch_active=0; cc->mtch_active = 0;
// Calculate the mcs // Calculate the mcs
if ((msi_flag==1) || (mcch_flag==1)) { if ((msi_flag == 1) || (mcch_flag == 1)) {
cc->MCH_pdu.mcs = mcch_mcs; cc->MCH_pdu.mcs = mcch_mcs;
} else if (mtch_flag == 1) { // only MTCH in this subframeP } else if (mtch_flag == 1) { // only MTCH in this subframeP
cc->MCH_pdu.mcs = cc->pmch_Config[0]->dataMCS_r9; cc->MCH_pdu.mcs = cc->pmch_Config[0]->dataMCS_r9;
} }
// 2nd: Create MSI, get MCCH from RRC and MTCHs from RLC // 2nd: Create MSI, get MCCH from RRC and MTCHs from RLC
// there is MSI (MCH Scheduling Info) // there is MSI (MCH Scheduling Info)
@@ -370,105 +493,102 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
msi_ptr = &msi_control_element[0]; msi_ptr = &msi_control_element[0];
((MSI_ELEMENT *) msi_ptr)->lcid = MCCH_LCHANID; //MCCH ((MSI_ELEMENT *) msi_ptr)->lcid = MCCH_LCHANID; //MCCH
if (mcch_flag==1) { if (mcch_flag == 1) {
((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0; ((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0;
((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0; ((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0;
} else { // no mcch for this MSP } else { // no mcch for this MSP
((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0x7;// stop value is 2047 ((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0x7; // stop value is 2047
((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0xff; ((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0xff;
} }
msi_ptr+= sizeof(MSI_ELEMENT); msi_ptr += sizeof(MSI_ELEMENT);
//Header for MTCHs //Header for MTCHs
num_mtch = cc->mbms_SessionList[0]->list.count; num_mtch = cc->mbms_SessionList[0]->list.count;
for (k=0; k<num_mtch; k++) { // loop for all session in this MCH (MCH[0]) at this moment for (k = 0; k < num_mtch; k++) { // loop for all session in this MCH (MCH[0]) at this moment
((MSI_ELEMENT *) msi_ptr)->lcid = cc->mbms_SessionList[0]->list.array[k]->logicalChannelIdentity_r9;//mtch_lcid; ((MSI_ELEMENT *) msi_ptr)->lcid = cc->mbms_SessionList[0]->list.array[k]->logicalChannelIdentity_r9; //mtch_lcid;
((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0; // last subframeP of this mtch (only one mtch now) ((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0; // last subframeP of this mtch (only one mtch now)
((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0xB; ((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0xB;
msi_ptr+=sizeof(MSI_ELEMENT); msi_ptr += sizeof(MSI_ELEMENT);
} }
msi_length = msi_ptr-msi_control_element; msi_length = msi_ptr - msi_control_element;
if (msi_length<128) { if (msi_length < 128) {
header_len_msi = 2; header_len_msi = 2;
} else { } else {
header_len_msi = 3; header_len_msi = 3;
} }
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d : MSI->MCH, length of MSI is %d bytes \n", LOG_D(MAC,
module_idP,CC_id,frameP,msi_length); "[eNB %d] CC_id %d Frame %d : MSI->MCH, length of MSI is %d bytes \n",
module_idP, CC_id, frameP, msi_length);
//LOG_D(MAC,"Scheduler: MSI is transmitted in this subframeP \n" ); //LOG_D(MAC,"Scheduler: MSI is transmitted in this subframeP \n" );
// LOG_D(MAC,"Scheduler: MSI length is %d bytes\n",msi_length); // LOG_D(MAC,"Scheduler: MSI length is %d bytes\n",msi_length);
// Store MSI data to mch_buffer[0] // Store MSI data to mch_buffer[0]
memcpy((char *)&mch_buffer[sdu_length_total], memcpy((char *) &mch_buffer[sdu_length_total],
msi_control_element, msi_control_element, msi_length);
msi_length);
sdu_lcids[num_sdus] = MCH_SCHDL_INFO; sdu_lcids[num_sdus] = MCH_SCHDL_INFO;
sdu_lengths[num_sdus] = msi_length; sdu_lengths[num_sdus] = msi_length;
sdu_length_total += sdu_lengths[num_sdus]; sdu_length_total += sdu_lengths[num_sdus];
LOG_I(MAC,"[eNB %d] CC_id %d Create %d bytes for MSI\n", module_idP, CC_id, sdu_lengths[num_sdus]); LOG_I(MAC, "[eNB %d] CC_id %d Create %d bytes for MSI\n",
module_idP, CC_id, sdu_lengths[num_sdus]);
num_sdus++; num_sdus++;
cc->msi_active=1; cc->msi_active = 1;
} }
// there is MCCH // there is MCCH
if (mcch_flag == 1) { if (mcch_flag == 1) {
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d Subframe %d: Schedule MCCH MESSAGE (area %d, sfAlloc %d)\n", LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d Subframe %d: Schedule MCCH MESSAGE (area %d, sfAlloc %d)\n",
module_idP, CC_id, frameP, subframeP, i, j); module_idP, CC_id, frameP, subframeP, i, j);
mcch_sdu_length = mac_rrc_data_req(module_idP, mcch_sdu_length = mac_rrc_data_req(module_idP, CC_id, frameP, MCCH, 1, &cc->MCCH_pdu.payload[0], 1, // this is eNB
CC_id,
frameP,
MCCH,1,
&cc->MCCH_pdu.payload[0],
1,// this is eNB
module_idP, // index module_idP, // index
i); // this is the mbsfn sync area index i); // this is the mbsfn sync area index
if (mcch_sdu_length > 0) { if (mcch_sdu_length > 0) {
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d : MCCH->MCH, Received %d bytes from RRC \n", LOG_D(MAC,
module_idP,CC_id,frameP,subframeP,mcch_sdu_length); "[eNB %d] CC_id %d Frame %d subframeP %d : MCCH->MCH, Received %d bytes from RRC \n",
module_idP, CC_id, frameP, subframeP, mcch_sdu_length);
header_len_mcch = 2; header_len_mcch = 2;
if (cc->tdd_Config != NULL) { if (cc->tdd_Config != NULL) {
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d: Scheduling MCCH->MCH (TDD) for MCCH message %d bytes (mcs %d )\n", LOG_D(MAC,
module_idP, CC_id, "[eNB %d] CC_id %d Frame %d subframeP %d: Scheduling MCCH->MCH (TDD) for MCCH message %d bytes (mcs %d )\n",
frameP,subframeP, module_idP, CC_id, frameP, subframeP,
mcch_sdu_length, mcch_sdu_length, mcch_mcs);
mcch_mcs);
} else { } else {
LOG_I(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d: Scheduling MCCH->MCH (FDD) for MCCH message %d bytes (mcs %d)\n", LOG_I(MAC,
module_idP, CC_id, "[eNB %d] CC_id %d Frame %d subframeP %d: Scheduling MCCH->MCH (FDD) for MCCH message %d bytes (mcs %d)\n",
frameP, subframeP, module_idP, CC_id, frameP, subframeP,
mcch_sdu_length, mcch_sdu_length, mcch_mcs);
mcch_mcs);
} }
cc->mcch_active=1; cc->mcch_active = 1;
memcpy((char *)&mch_buffer[sdu_length_total], memcpy((char *) &mch_buffer[sdu_length_total],
&cc->MCCH_pdu.payload[0], &cc->MCCH_pdu.payload[0], mcch_sdu_length);
mcch_sdu_length);
sdu_lcids[num_sdus] = MCCH_LCHANID; sdu_lcids[num_sdus] = MCCH_LCHANID;
sdu_lengths[num_sdus] = mcch_sdu_length; sdu_lengths[num_sdus] = mcch_sdu_length;
if (sdu_lengths[num_sdus]>128) { if (sdu_lengths[num_sdus] > 128) {
header_len_mcch = 3; header_len_mcch = 3;
} }
sdu_length_total += sdu_lengths[num_sdus]; sdu_length_total += sdu_lengths[num_sdus];
LOG_D(MAC,"[eNB %d] CC_id %d Got %d bytes for MCCH from RRC \n",module_idP,CC_id,sdu_lengths[num_sdus]); LOG_D(MAC,
"[eNB %d] CC_id %d Got %d bytes for MCCH from RRC \n",
module_idP, CC_id, sdu_lengths[num_sdus]);
num_sdus++; num_sdus++;
} }
} }
TBS = get_TBS_DL(cc->MCH_pdu.mcs, to_prb(cc->mib->message.dl_Bandwidth)); TBS =
get_TBS_DL(cc->MCH_pdu.mcs, to_prb(cc->mib->message.dl_Bandwidth));
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
// do not let mcch and mtch multiplexing when relaying is active // do not let mcch and mtch multiplexing when relaying is active
// for sync area 1, so not transmit data // for sync area 1, so not transmit data
@@ -500,35 +620,43 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
*/ */
// get MTCH data from RLC (like for DTCH) // get MTCH data from RLC (like for DTCH)
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d: Schedule MTCH (area %d, sfAlloc %d)\n",module_idP,CC_id,frameP,subframeP,i,j); LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d: Schedule MTCH (area %d, sfAlloc %d)\n",
module_idP, CC_id, frameP, subframeP, i, j);
header_len_mtch = 3; header_len_mtch = 3;
LOG_D(MAC,"[eNB %d], CC_id %d, Frame %d, MTCH->MCH, Checking RLC status (rab %d, tbs %d, len %d)\n", LOG_D(MAC,
module_idP,CC_id,frameP,MTCH,TBS, "[eNB %d], CC_id %d, Frame %d, MTCH->MCH, Checking RLC status (rab %d, tbs %d, len %d)\n",
TBS-header_len_mcch-header_len_msi-sdu_length_total-header_len_mtch); module_idP, CC_id, frameP, MTCH, TBS,
TBS - header_len_mcch - header_len_msi - sdu_length_total -
header_len_mtch);
rlc_status = mac_rlc_status_ind(module_idP,0,frameP,subframeP,module_idP,ENB_FLAG_YES,MBMS_FLAG_YES,MTCH, rlc_status =
TBS-header_len_mcch-header_len_msi-sdu_length_total-header_len_mtch); mac_rlc_status_ind(module_idP, 0, frameP, subframeP,
LOG_D(MAC,"e-MBMS log channel %u frameP %d, subframeP %d, rlc_status.bytes_in_buffer is %d\n", module_idP, ENB_FLAG_YES, MBMS_FLAG_YES,
MTCH,frameP,subframeP, rlc_status.bytes_in_buffer);
if (rlc_status.bytes_in_buffer >0) {
LOG_I(MAC,"[eNB %d][MBMS USER-PLANE], CC_id %d, Frame %d, MTCH->MCH, Requesting %d bytes from RLC (header len mtch %d)\n",
module_idP,CC_id,frameP,TBS-header_len_mcch-header_len_msi-sdu_length_total-header_len_mtch,header_len_mtch);
sdu_lengths[num_sdus] = mac_rlc_data_req(
module_idP,
0,
module_idP,
frameP,
ENB_FLAG_YES,
MBMS_FLAG_YES,
MTCH, MTCH,
0, //not used TBS - header_len_mcch - header_len_msi -
(char*)&mch_buffer[sdu_length_total]); sdu_length_total - header_len_mtch);
LOG_D(MAC,
"e-MBMS log channel %u frameP %d, subframeP %d, rlc_status.bytes_in_buffer is %d\n",
MTCH, frameP, subframeP, rlc_status.bytes_in_buffer);
if (rlc_status.bytes_in_buffer > 0) {
LOG_I(MAC,
"[eNB %d][MBMS USER-PLANE], CC_id %d, Frame %d, MTCH->MCH, Requesting %d bytes from RLC (header len mtch %d)\n",
module_idP, CC_id, frameP,
TBS - header_len_mcch - header_len_msi -
sdu_length_total - header_len_mtch, header_len_mtch);
sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP, 0, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_YES, MTCH, 0, //not used
(char *)
&mch_buffer
[sdu_length_total]);
//sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP,frameP, MBMS_FLAG_NO, MTCH+(MAX_NUM_RB*(NUMBER_OF_UE_MAX+1)), (char*)&mch_buffer[sdu_length_total]); //sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP,frameP, MBMS_FLAG_NO, MTCH+(MAX_NUM_RB*(NUMBER_OF_UE_MAX+1)), (char*)&mch_buffer[sdu_length_total]);
LOG_I(MAC,"[eNB %d][MBMS USER-PLANE] CC_id %d Got %d bytes for MTCH %d\n",module_idP,CC_id,sdu_lengths[num_sdus],MTCH); LOG_I(MAC,
cc->mtch_active=1; "[eNB %d][MBMS USER-PLANE] CC_id %d Got %d bytes for MTCH %d\n",
module_idP, CC_id, sdu_lengths[num_sdus], MTCH);
cc->mtch_active = 1;
sdu_lcids[num_sdus] = MTCH; sdu_lcids[num_sdus] = MTCH;
sdu_length_total += sdu_lengths[num_sdus]; sdu_length_total += sdu_lengths[num_sdus];
@@ -541,13 +669,13 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
header_len_mtch = 0; header_len_mtch = 0;
} }
} }
#if defined(Rel10) || defined(Rel14) #if defined(Rel10) || defined(Rel14)
// } // }
#endif #endif
// FINAL STEP: Prepare and multiplexe MSI, MCCH and MTCHs // FINAL STEP: Prepare and multiplexe MSI, MCCH and MTCHs
if ((sdu_length_total + header_len_msi + header_len_mcch + header_len_mtch) >0) { if ((sdu_length_total + header_len_msi + header_len_mcch +
header_len_mtch) > 0) {
// Adjust the last subheader // Adjust the last subheader
/* if ((msi_flag==1) || (mcch_flag==1)) { /* if ((msi_flag==1) || (mcch_flag==1)) {
RC.mac[module_idP]->MCH_pdu.mcs = mcch_mcs; RC.mac[module_idP]->MCH_pdu.mcs = mcch_mcs;
@@ -560,87 +688,97 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
header_len_mcch_temp = header_len_mcch; header_len_mcch_temp = header_len_mcch;
header_len_msi_temp = header_len_msi; header_len_msi_temp = header_len_msi;
if (header_len_mtch>0) { if (header_len_mtch > 0) {
header_len_mtch=1; // remove Length field in the subheader for the last PDU header_len_mtch = 1; // remove Length field in the subheader for the last PDU
} else if (header_len_mcch>0) { } else if (header_len_mcch > 0) {
header_len_mcch=1; header_len_mcch = 1;
} else { } else {
header_len_msi=1; header_len_msi = 1;
} }
// Calculate the padding // Calculate the padding
if ((TBS - header_len_mtch - header_len_mcch - header_len_msi - sdu_length_total) < 0) { if ((TBS - header_len_mtch - header_len_mcch - header_len_msi -
LOG_E(MAC,"Error in building MAC PDU, TBS %d < PDU %d \n", sdu_length_total) < 0) {
TBS, header_len_mtch + header_len_mcch + header_len_msi + sdu_length_total); LOG_E(MAC, "Error in building MAC PDU, TBS %d < PDU %d \n",
TBS,
header_len_mtch + header_len_mcch + header_len_msi +
sdu_length_total);
return 0; return 0;
} else if ((TBS - header_len_mtch - header_len_mcch - header_len_msi - sdu_length_total) <= 2) { } else
padding = (TBS - header_len_mtch - header_len_mcch - header_len_msi - sdu_length_total); if ((TBS - header_len_mtch - header_len_mcch - header_len_msi -
sdu_length_total) <= 2) {
padding =
(TBS - header_len_mtch - header_len_mcch - header_len_msi -
sdu_length_total);
post_padding = 0; post_padding = 0;
} else { // using post_padding, give back the Length field of subheader for the last PDU } else { // using post_padding, give back the Length field of subheader for the last PDU
padding = 0; padding = 0;
if (header_len_mtch>0) { if (header_len_mtch > 0) {
header_len_mtch = header_len_mtch_temp; header_len_mtch = header_len_mtch_temp;
} else if (header_len_mcch>0) { } else if (header_len_mcch > 0) {
header_len_mcch = header_len_mcch_temp; header_len_mcch = header_len_mcch_temp;
} else { } else {
header_len_msi = header_len_msi_temp; header_len_msi = header_len_msi_temp;
} }
post_padding = TBS - sdu_length_total - header_len_msi - header_len_mcch - header_len_mtch; post_padding =
TBS - sdu_length_total - header_len_msi - header_len_mcch -
header_len_mtch;
} }
// Generate the MAC Header for MCH // Generate the MAC Header for MCH
// here we use the function for DLSCH because DLSCH & MCH have the same Header structure // here we use the function for DLSCH because DLSCH & MCH have the same Header structure
offset = generate_dlsch_header((unsigned char*)cc->MCH_pdu.payload, offset = generate_dlsch_header((unsigned char *) cc->MCH_pdu.payload, num_sdus, sdu_lengths, sdu_lcids, 255, // no drx
num_sdus,
sdu_lengths,
sdu_lcids,
255, // no drx
31, // no timing advance 31, // no timing advance
NULL, // no contention res id NULL, // no contention res id
padding, padding, post_padding);
post_padding);
cc->MCH_pdu.Pdu_size=TBS; cc->MCH_pdu.Pdu_size = TBS;
cc->MCH_pdu.sync_area=i; cc->MCH_pdu.sync_area = i;
cc->MCH_pdu.msi_active= cc->msi_active; cc->MCH_pdu.msi_active = cc->msi_active;
cc->MCH_pdu.mcch_active= cc->mcch_active; cc->MCH_pdu.mcch_active = cc->mcch_active;
cc->MCH_pdu.mtch_active= cc->mtch_active; cc->MCH_pdu.mtch_active = cc->mtch_active;
LOG_D(MAC," MCS for this sf is %d (mcch active %d, mtch active %d)\n", cc->MCH_pdu.mcs, LOG_D(MAC,
cc->MCH_pdu.mcch_active,cc->MCH_pdu.mtch_active ); " MCS for this sf is %d (mcch active %d, mtch active %d)\n",
cc->MCH_pdu.mcs, cc->MCH_pdu.mcch_active,
cc->MCH_pdu.mtch_active);
LOG_I(MAC, LOG_I(MAC,
"[eNB %d][MBMS USER-PLANE ] CC_id %d Generate header : sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,padding %d,post_padding %d (mcs %d, TBS %d), header MTCH %d, header MCCH %d, header MSI %d\n", "[eNB %d][MBMS USER-PLANE ] CC_id %d Generate header : sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,padding %d,post_padding %d (mcs %d, TBS %d), header MTCH %d, header MCCH %d, header MSI %d\n",
module_idP,CC_id,sdu_length_total,num_sdus,sdu_lengths[0],sdu_lcids[0],offset,padding,post_padding,cc->MCH_pdu.mcs,TBS, module_idP, CC_id, sdu_length_total, num_sdus,
header_len_mtch, header_len_mcch, header_len_msi); sdu_lengths[0], sdu_lcids[0], offset, padding, post_padding,
cc->MCH_pdu.mcs, TBS, header_len_mtch, header_len_mcch,
header_len_msi);
// copy SDU to mch_pdu after the MAC Header // copy SDU to mch_pdu after the MAC Header
memcpy(&cc->MCH_pdu.payload[offset],mch_buffer,sdu_length_total); memcpy(&cc->MCH_pdu.payload[offset], mch_buffer, sdu_length_total);
// filling remainder of MCH with random data if necessery // filling remainder of MCH with random data if necessery
for (j=0; j<(TBS-sdu_length_total-offset); j++) { for (j = 0; j < (TBS - sdu_length_total - offset); j++) {
cc->MCH_pdu.payload[offset+sdu_length_total+j] = (char)(taus()&0xff); cc->MCH_pdu.payload[offset + sdu_length_total + j] =
(char) (taus() & 0xff);
} }
/* Tracing of PDU is done on UE side */ /* Tracing of PDU is done on UE side */
if (opt_enabled ==1 ) { if (opt_enabled == 1) {
trace_pdu(1, (uint8_t *)cc->MCH_pdu.payload, trace_pdu(1, (uint8_t *) cc->MCH_pdu.payload, TBS, module_idP, 6, 0xffff, // M_RNTI = 6 in wirehsark
TBS, module_idP, 6, 0xffff, // M_RNTI = 6 in wirehsark RC.mac[module_idP]->frame,
RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe,0,0); RC.mac[module_idP]->subframe, 0, 0);
LOG_D(OPT,"[eNB %d][MCH] CC_id %d Frame %d : MAC PDU with size %d\n", LOG_D(OPT,
"[eNB %d][MCH] CC_id %d Frame %d : MAC PDU with size %d\n",
module_idP, CC_id, frameP, TBS); module_idP, CC_id, frameP, TBS);
} }
/* /*
for (j=0;j<sdu_length_total;j++) for (j=0;j<sdu_length_total;j++)
printf("%2x.",RC.mac[module_idP]->MCH_pdu.payload[j+offset]); printf("%2x.",RC.mac[module_idP]->MCH_pdu.payload[j+offset]);
printf(" \n");*/ printf(" \n"); */
return 1; return 1;
} else { } else {
cc->MCH_pdu.Pdu_size=0; cc->MCH_pdu.Pdu_size = 0;
cc->MCH_pdu.sync_area=0; cc->MCH_pdu.sync_area = 0;
cc->MCH_pdu.msi_active=0; cc->MCH_pdu.msi_active = 0;
cc->MCH_pdu.mcch_active=0; cc->MCH_pdu.mcch_active = 0;
cc->MCH_pdu.mtch_active=0; cc->MCH_pdu.mtch_active = 0;
// for testing purpose, fill with random data // for testing purpose, fill with random data
//for (j=0;j<(TBS-sdu_length_total-offset);j++) //for (j=0;j<(TBS-sdu_length_total-offset);j++)
// RC.mac[module_idP]->MCH_pdu.payload[offset+sdu_length_total+j] = (char)(taus()&0xff); // RC.mac[module_idP]->MCH_pdu.payload[offset+sdu_length_total+j] = (char)(taus()&0xff);
@@ -658,12 +796,13 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
*/ */
} }
MCH_PDU *get_mch_sdu(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t subframeP) MCH_PDU *get_mch_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
sub_frame_t subframeP)
{ {
// RC.mac[module_idP]->MCH_pdu.mcs=0; // RC.mac[module_idP]->MCH_pdu.mcs=0;
//LOG_D(MAC," MCH_pdu.mcs is %d\n", RC.mac[module_idP]->MCH_pdu.mcs); //LOG_D(MAC," MCH_pdu.mcs is %d\n", RC.mac[module_idP]->MCH_pdu.mcs);
//#warning "MCH pdu should take the CC_id index" //#warning "MCH pdu should take the CC_id index"
return(&RC.mac[module_idP]->common_channels[CC_id].MCH_pdu); return (&RC.mac[module_idP]->common_channels[CC_id].MCH_pdu);
} }
#endif #endif
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+2233 -1445
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+838 -552
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/extern.h
-2
View File
@@ -102,5 +102,3 @@ extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
extern DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E; extern DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#endif //DEF_H #endif //DEF_H
openair2/LAYER2/MAC/flexran_agent_mac_proto.h
+67 -39
View File
@@ -39,12 +39,12 @@
/* /*
* slice specific scheduler * slice specific scheduler
*/ */
typedef void (*slice_scheduler)(module_id_t mod_id, typedef void (*slice_scheduler) (module_id_t mod_id,
int slice_id, int slice_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage **dl_info); Protocol__FlexranMessage ** dl_info);
@@ -55,7 +55,7 @@ void flexran_schedule_ue_spec_default(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage **dl_info); Protocol__FlexranMessage ** dl_info);
/* /*
* slice specific scheduler for embb * slice specific scheduler for embb
*/ */
@@ -65,7 +65,7 @@ flexran_schedule_ue_spec_embb(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage **dl_info); Protocol__FlexranMessage ** dl_info);
/* /*
* slice specific scheduler for urllc * slice specific scheduler for urllc
*/ */
@@ -75,7 +75,7 @@ flexran_schedule_ue_spec_urllc(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage **dl_info); Protocol__FlexranMessage ** dl_info);
/* /*
* slice specific scheduler for mmtc * slice specific scheduler for mmtc
@@ -86,7 +86,7 @@ flexran_schedule_ue_spec_mmtc(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage **dl_info); Protocol__FlexranMessage ** dl_info);
/* /*
* slice specific scheduler for best effort traffic * slice specific scheduler for best effort traffic
*/ */
@@ -96,7 +96,7 @@ flexran_schedule_ue_spec_be(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage **dl_info); Protocol__FlexranMessage ** dl_info);
/* /*
* common flexran scheduler function * common flexran scheduler function
@@ -107,82 +107,110 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage **dl_info); Protocol__FlexranMessage ** dl_info);
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
int total_rbs);
int flexran_slice_member(int UE_id, int flexran_slice_member(int UE_id, int slice_id);
int slice_id);
int flexran_slice_maxmcs(int slice_id) ; int flexran_slice_maxmcs(int slice_id);
void _store_dlsch_buffer (module_id_t Mod_id, void _store_dlsch_buffer(module_id_t Mod_id,
int slice_id, int slice_id,
frame_t frameP, frame_t frameP, sub_frame_t subframeP);
sub_frame_t subframeP);
void _assign_rbs_required (module_id_t Mod_id, void _assign_rbs_required(module_id_t Mod_id,
int slice_id, int slice_id,
frame_t frameP, frame_t frameP,
sub_frame_t subframe, sub_frame_t subframe,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX], uint16_t
uint16_t nb_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES], nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
int min_rb_unit[MAX_NUM_CCs]); uint16_t
nb_rbs_allowed_slice[MAX_NUM_CCs]
[MAX_NUM_SLICES], int min_rb_unit[MAX_NUM_CCs]);
void _dlsch_scheduler_pre_processor (module_id_t Mod_id, void _dlsch_scheduler_pre_processor(module_id_t Mod_id,
int slice_id, int slice_id,
frame_t frameP, frame_t frameP,
sub_frame_t subframeP, sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs], int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag); int *mbsfn_flag);
void _dlsch_scheduler_pre_processor_reset (int module_idP, void _dlsch_scheduler_pre_processor_reset(int module_idP,
int UE_id, int UE_id,
uint8_t CC_id, uint8_t CC_id,
int frameP, int frameP,
int subframeP, int subframeP,
int N_RBG, int N_RBG,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX], uint16_t
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX], nb_rbs_required[MAX_NUM_CCs]
uint16_t nb_rbs_allowed_slice[MAX_NUM_CCs][MAX_NUM_SLICES], [NUMBER_OF_UE_MAX],
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX], uint16_t
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]); nb_rbs_required_remaining
[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
uint16_t
nb_rbs_allowed_slice[MAX_NUM_CCs]
[MAX_NUM_SLICES],
unsigned char
rballoc_sub[MAX_NUM_CCs]
[N_RBG_MAX],
unsigned char
MIMO_mode_indicator[MAX_NUM_CCs]
[N_RBG_MAX]);
void _dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id, void _dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
int UE_id, int UE_id,
uint8_t CC_id, uint8_t CC_id,
int N_RBG, int N_RBG,
int transmission_mode, int transmission_mode,
int min_rb_unit, int min_rb_unit,
uint8_t N_RB_DL, uint8_t N_RB_DL,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX], uint16_t
uint16_t nb_rbs_required_remaining[MAX_NUM_CCs][NUMBER_OF_UE_MAX], nb_rbs_required[MAX_NUM_CCs]
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX], [NUMBER_OF_UE_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]); uint16_t
nb_rbs_required_remaining
[MAX_NUM_CCs]
[NUMBER_OF_UE_MAX],
unsigned char
rballoc_sub[MAX_NUM_CCs]
[N_RBG_MAX],
unsigned char
MIMO_mode_indicator
[MAX_NUM_CCs][N_RBG_MAX]);
/* /*
* Default scheduler used by the eNB agent * Default scheduler used by the eNB agent
*/ */
void flexran_schedule_ue_spec_default(mid_t mod_id, uint32_t frame, uint32_t subframe, void flexran_schedule_ue_spec_default(mid_t mod_id, uint32_t frame,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info); uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
/* /*
* Data plane function for applying the DL decisions of the scheduler * Data plane function for applying the DL decisions of the scheduler
*/ */
void flexran_apply_dl_scheduling_decisions(mid_t mod_id, uint32_t frame, uint32_t subframe, int *mbsfn_flag, void flexran_apply_dl_scheduling_decisions(mid_t mod_id, uint32_t frame,
Protocol__FlexranMessage *dl_scheduling_info); uint32_t subframe,
int *mbsfn_flag,
Protocol__FlexranMessage *
dl_scheduling_info);
/* /*
* Data plane function for applying the UE specific DL decisions of the scheduler * Data plane function for applying the UE specific DL decisions of the scheduler
*/ */
void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id, uint32_t frame, uint32_t subframe, int *mbsfn_flag, void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
uint32_t n_dl_ue_data, Protocol__FlexDlData **dl_ue_data); uint32_t frame,
uint32_t subframe,
int *mbsfn_flag,
uint32_t n_dl_ue_data,
Protocol__FlexDlData **
dl_ue_data);
/* /*
* Data plane function for filling the DCI structure * Data plane function for filling the DCI structure
*/ */
void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti, Protocol__FlexDlDci *dl_dci); void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
Protocol__FlexDlDci * dl_dci);
#endif #endif
openair2/LAYER2/MAC/flexran_agent_scheduler_dataplane.c
+145 -108
View File
@@ -59,48 +59,56 @@
#include "SIMULATION/TOOLS/defs.h" // for taus #include "SIMULATION/TOOLS/defs.h" // for taus
void flexran_apply_dl_scheduling_decisions(mid_t mod_id, void
flexran_apply_dl_scheduling_decisions(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
Protocol__FlexranMessage *dl_scheduling_info) { Protocol__FlexranMessage *
dl_scheduling_info)
{
Protocol__FlexDlMacConfig *mac_config = dl_scheduling_info->dl_mac_config_msg; Protocol__FlexDlMacConfig *mac_config =
dl_scheduling_info->dl_mac_config_msg;
// Check if there is anything to schedule for random access // Check if there is anything to schedule for random access
if (mac_config->n_dl_rar > 0) { if (mac_config->n_dl_rar > 0) {
/*TODO: call the random access data plane function*/ /*TODO: call the random access data plane function */
} }
// Check if there is anything to schedule for paging/broadcast // Check if there is anything to schedule for paging/broadcast
if (mac_config->n_dl_broadcast > 0) { if (mac_config->n_dl_broadcast > 0) {
/*TODO: call the broadcast/paging data plane function*/ /*TODO: call the broadcast/paging data plane function */
} }
// Check if there is anything to schedule for the UEs // Check if there is anything to schedule for the UEs
if (mac_config->n_dl_ue_data > 0) { if (mac_config->n_dl_ue_data > 0) {
flexran_apply_ue_spec_scheduling_decisions(mod_id, frame, subframe, mbsfn_flag, flexran_apply_ue_spec_scheduling_decisions(mod_id, frame, subframe,
mac_config->n_dl_ue_data, mac_config->dl_ue_data); mbsfn_flag,
mac_config->
n_dl_ue_data,
mac_config->dl_ue_data);
} }
} }
void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id, void
flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
uint32_t frame, uint32_t frame,
uint32_t subframe, uint32_t subframe,
int *mbsfn_flag, int *mbsfn_flag,
uint32_t n_dl_ue_data, uint32_t n_dl_ue_data,
Protocol__FlexDlData **dl_ue_data) { Protocol__FlexDlData **
dl_ue_data)
{
uint8_t CC_id; uint8_t CC_id;
int UE_id; int UE_id;
mac_rlc_status_resp_t rlc_status; mac_rlc_status_resp_t rlc_status;
unsigned char ta_len=0; unsigned char ta_len = 0;
unsigned char header_len = 0, header_len_tmp = 0; unsigned char header_len = 0, header_len_tmp = 0;
unsigned char sdu_lcids[11],offset,num_sdus=0; unsigned char sdu_lcids[11], offset, num_sdus = 0;
uint16_t nb_rb; uint16_t nb_rb;
uint16_t TBS, sdu_lengths[11],rnti,padding=0,post_padding=0; uint16_t TBS, sdu_lengths[11], rnti, padding = 0, post_padding = 0;
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES]; unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
uint8_t round = 0; uint8_t round = 0;
uint8_t harq_pid = 0; uint8_t harq_pid = 0;
@@ -135,7 +143,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
UE_id = find_ue(rnti, PHY_vars_eNB_g[mod_id][CC_id]); UE_id = find_ue(rnti, PHY_vars_eNB_g[mod_id][CC_id]);
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id]; ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
eNB_UE_stats = mac_xface->get_eNB_UE_stats(mod_id,CC_id,rnti); eNB_UE_stats = mac_xface->get_eNB_UE_stats(mod_id, CC_id, rnti);
round = dl_dci->rv[0]; round = dl_dci->rv[0];
harq_pid = dl_dci->harq_process; harq_pid = dl_dci->harq_process;
@@ -152,7 +160,10 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
if (dl_data->n_ce_bitmap > 0) { if (dl_data->n_ce_bitmap > 0) {
//Check if there is TA command and set the length appropriately //Check if there is TA command and set the length appropriately
ta_len = (dl_data->ce_bitmap[0] & PROTOCOL__FLEX_CE_TYPE__FLPCET_TA) ? 2 : 0; ta_len =
(dl_data->
ce_bitmap[0] & PROTOCOL__FLEX_CE_TYPE__FLPCET_TA) ? 2
: 0;
} }
num_sdus = 0; num_sdus = 0;
@@ -164,9 +175,11 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
last_sdu_header_len = 0; last_sdu_header_len = 0;
for (j = 0; j < n_lc; j++) { for (j = 0; j < n_lc; j++) {
sdu_lengths[j] = 0; sdu_lengths[j] = 0;
lcid = dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->logical_channel_id; lcid =
dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->logical_channel_id;
rlc_size = dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->size; rlc_size = dl_data->rlc_pdu[j]->rlc_pdu_tb[0]->size;
LOG_D(MAC,"[TEST] [eNB %d] [Frame %d] [Subframe %d], LCID %d, CC_id %d, Requesting %d bytes from RLC (RRC message)\n", LOG_D(MAC,
"[TEST] [eNB %d] [Frame %d] [Subframe %d], LCID %d, CC_id %d, Requesting %d bytes from RLC (RRC message)\n",
mod_id, frame, subframe, lcid, CC_id, rlc_size); mod_id, frame, subframe, lcid, CC_id, rlc_size);
if (rlc_size > 0) { if (rlc_size > 0) {
@@ -176,9 +189,7 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
frame, frame,
subframe, subframe,
ENB_FLAG_YES, ENB_FLAG_YES,
MBMS_FLAG_NO, MBMS_FLAG_NO, lcid, 0);
lcid,
0);
if (rlc_status.bytes_in_buffer > 0) { if (rlc_status.bytes_in_buffer > 0) {
@@ -190,36 +201,31 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
rlc_size = 3; rlc_size = 3;
} }
rlc_status = mac_rlc_status_ind(mod_id, rlc_status = mac_rlc_status_ind(mod_id, rnti, mod_id, frame, subframe, ENB_FLAG_YES, MBMS_FLAG_NO, lcid, rlc_size); // transport block set size
rnti,
mod_id,
frame,
subframe,
ENB_FLAG_YES,
MBMS_FLAG_NO,
lcid,
rlc_size); // transport block set size
LOG_D(MAC, "[TEST] RLC can give %d bytes for LCID %d during second call\n", rlc_status.bytes_in_buffer, lcid); LOG_D(MAC,
"[TEST] RLC can give %d bytes for LCID %d during second call\n",
rlc_status.bytes_in_buffer, lcid);
if (rlc_status.bytes_in_buffer > 0) { if (rlc_status.bytes_in_buffer > 0) {
sdu_lengths[j] = mac_rlc_data_req(mod_id, sdu_lengths[j] = mac_rlc_data_req(mod_id, rnti, mod_id, frame, ENB_FLAG_YES, MBMS_FLAG_NO, lcid, rlc_size, //not used
rnti, (char *)
mod_id, &dlsch_buffer
frame, [sdu_length_total]);
ENB_FLAG_YES,
MBMS_FLAG_NO,
lcid,
rlc_size, //not used
(char *)&dlsch_buffer[sdu_length_total]);
LOG_D(MAC,"[eNB %d][LCID %d] CC_id %d Got %d bytes from RLC\n",mod_id, lcid, CC_id, sdu_lengths[j]); LOG_D(MAC,
"[eNB %d][LCID %d] CC_id %d Got %d bytes from RLC\n",
mod_id, lcid, CC_id, sdu_lengths[j]);
sdu_length_total += sdu_lengths[j]; sdu_length_total += sdu_lengths[j];
sdu_lcids[j] = lcid; sdu_lcids[j] = lcid;
UE_list->eNB_UE_stats[CC_id][UE_id].num_pdu_tx[lcid] += 1; UE_list->
UE_list->eNB_UE_stats[CC_id][UE_id].num_bytes_tx[lcid] += sdu_lengths[j]; eNB_UE_stats[CC_id][UE_id].num_pdu_tx[lcid]
+= 1;
UE_list->
eNB_UE_stats[CC_id][UE_id].num_bytes_tx
[lcid] += sdu_lengths[j];
if (sdu_lengths[j] < 128) { if (sdu_lengths[j] < 128) {
header_len += 2; header_len += 2;
@@ -248,9 +254,9 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
} }
// If we need a 1 or 2 bit padding or no padding at all // If we need a 1 or 2 bit padding or no padding at all
if ((TBS - header_len - sdu_length_total - ta_len) <= 2 if ((TBS - header_len - sdu_length_total - ta_len) <= 2 || (TBS - header_len - sdu_length_total - ta_len) > TBS) { //protect from overflow
|| (TBS - header_len - sdu_length_total - ta_len) > TBS) { //protect from overflow padding =
padding = (TBS - header_len - sdu_length_total - ta_len); (TBS - header_len - sdu_length_total - ta_len);
post_padding = 0; post_padding = 0;
} else { // The last sdu needs to have a length field, since we add padding } else { // The last sdu needs to have a length field, since we add padding
padding = 0; padding = 0;
@@ -273,87 +279,101 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
harq_pid_round[UE_id][harq_pid] = 0; harq_pid_round[UE_id][harq_pid] = 0;
continue; continue;
} }
// LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d] TBS is %d and bytes are %d\n", frame, subframe, TBS, sdu_length_total); // LOG_I(FLEXRAN_AGENT, "[Frame %d][Subframe %d] TBS is %d and bytes are %d\n", frame, subframe, TBS, sdu_length_total);
offset = generate_dlsch_header((unsigned char*)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], offset = generate_dlsch_header((unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], num_sdus, //num_sdus
num_sdus, //num_sdus
sdu_lengths, // sdu_lengths, //
sdu_lcids, sdu_lcids, 255, // no drx
255, // no drx
ta_update, // timing advance ta_update, // timing advance
NULL, // contention res id NULL, // contention res id
padding, padding, post_padding);
post_padding);
#ifdef DEBUG_eNB_SCHEDULER #ifdef DEBUG_eNB_SCHEDULER
LOG_T(MAC,"[eNB %d] First 16 bytes of DLSCH : \n"); LOG_T(MAC, "[eNB %d] First 16 bytes of DLSCH : \n");
for (i=0; i<16; i++) { for (i = 0; i < 16; i++) {
LOG_T(MAC,"%x.",dlsch_buffer[i]); LOG_T(MAC, "%x.", dlsch_buffer[i]);
} }
LOG_T(MAC,"\n"); LOG_T(MAC, "\n");
#endif #endif
// cycle through SDUs and place in dlsch_buffer // cycle through SDUs and place in dlsch_buffer
memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset],dlsch_buffer,sdu_length_total); memcpy(&UE_list->DLSCH_pdu[CC_id][0][UE_id].
payload[0][offset], dlsch_buffer, sdu_length_total);
// memcpy(&eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset],dcch_buffer,sdu_lengths[0]); // memcpy(&eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset],dcch_buffer,sdu_lengths[0]);
// fill remainder of DLSCH with random data // fill remainder of DLSCH with random data
for (j=0; j<(TBS-sdu_length_total-offset); j++) { for (j = 0; j < (TBS - sdu_length_total - offset); j++) {
UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset+sdu_length_total+j] = (char)(taus()&0xff); UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0][offset +
sdu_length_total
+ j] =
(char) (taus() & 0xff);
} }
//eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset+sdu_lengths[0]+j] = (char)(taus()&0xff); //eNB_mac_inst[0].DLSCH_pdu[0][0].payload[0][offset+sdu_lengths[0]+j] = (char)(taus()&0xff);
if (opt_enabled == 1) { if (opt_enabled == 1) {
trace_pdu(1, (uint8_t *)UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], trace_pdu(1,
TBS, mod_id, 3, UE_RNTI(mod_id, UE_id), (uint8_t *)
eNB->frame, eNB->subframe,0,0); UE_list->DLSCH_pdu[CC_id][0][UE_id].
LOG_D(OPT,"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n", payload[0], TBS, mod_id, 3, UE_RNTI(mod_id,
mod_id, CC_id, frame, UE_RNTI(mod_id,UE_id), TBS); UE_id),
eNB->frame, eNB->subframe, 0, 0);
LOG_D(OPT,
"[eNB %d][DLSCH] CC_id %d Frame %d rnti %x with size %d\n",
mod_id, CC_id, frame, UE_RNTI(mod_id, UE_id),
TBS);
} }
// store stats // store stats
eNB->eNB_stats[CC_id].dlsch_bytes_tx+=sdu_length_total; eNB->eNB_stats[CC_id].dlsch_bytes_tx += sdu_length_total;
eNB->eNB_stats[CC_id].dlsch_pdus_tx+=1; eNB->eNB_stats[CC_id].dlsch_pdus_tx += 1;
UE_list->eNB_UE_stats[CC_id][UE_id].dl_cqi= eNB_UE_stats->DL_cqi[0]; UE_list->eNB_UE_stats[CC_id][UE_id].dl_cqi =
eNB_UE_stats->DL_cqi[0];
UE_list->eNB_UE_stats[CC_id][UE_id].crnti= rnti; UE_list->eNB_UE_stats[CC_id][UE_id].crnti = rnti;
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status=mac_eNB_get_rrc_status(mod_id, rnti); UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status =
mac_eNB_get_rrc_status(mod_id, rnti);
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid; UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round; UE_list->eNB_UE_stats[CC_id][UE_id].harq_round = round;
//nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid]; //nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
//Find the number of resource blocks and set them to the template for retransmissions //Find the number of resource blocks and set them to the template for retransmissions
nb_rb = get_min_rb_unit(mod_id, CC_id); nb_rb = get_min_rb_unit(mod_id, CC_id);
uint16_t stats_tbs = mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb); uint16_t stats_tbs =
mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb);
while (stats_tbs < TBS) { while (stats_tbs < TBS) {
nb_rb += get_min_rb_unit(mod_id, CC_id); nb_rb += get_min_rb_unit(mod_id, CC_id);
stats_tbs = mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb); stats_tbs =
mac_xface->get_TBS_DL(dl_dci->mcs[0], nb_rb);
} }
// LOG_I(FLEXRAN_AGENT, "The MCS was %d\n", dl_dci->mcs[0]); // LOG_I(FLEXRAN_AGENT, "The MCS was %d\n", dl_dci->mcs[0]);
UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb; UE_list->eNB_UE_stats[CC_id][UE_id].rbs_used = nb_rb;
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used += nb_rb; UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used +=
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1=dl_dci->mcs[0]; nb_rb;
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2=dl_dci->mcs[0]; UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs1 =
dl_dci->mcs[0];
UE_list->eNB_UE_stats[CC_id][UE_id].dlsch_mcs2 =
dl_dci->mcs[0];
UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS; UE_list->eNB_UE_stats[CC_id][UE_id].TBS = TBS;
UE_list->eNB_UE_stats[CC_id][UE_id].overhead_bytes= TBS - sdu_length_total; UE_list->eNB_UE_stats[CC_id][UE_id].overhead_bytes =
UE_list->eNB_UE_stats[CC_id][UE_id].total_sdu_bytes+= sdu_length_total; TBS - sdu_length_total;
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes+= TBS; UE_list->eNB_UE_stats[CC_id][UE_id].total_sdu_bytes +=
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus+=1; sdu_length_total;
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes += TBS;
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus += 1;
//eNB_UE_stats->dlsch_mcs1 = cqi_to_mcs[eNB_UE_stats->DL_cqi[0]]; //eNB_UE_stats->dlsch_mcs1 = cqi_to_mcs[eNB_UE_stats->DL_cqi[0]];
//eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs); //eNB_UE_stats->dlsch_mcs1 = cmin(eNB_UE_stats->dlsch_mcs1, openair_daq_vars.target_ue_dl_mcs);
} else { } else {
LOG_D(FLEXRAN_AGENT, "No need to schedule a dci after all. Just drop it\n"); LOG_D(FLEXRAN_AGENT,
"No need to schedule a dci after all. Just drop it\n");
harq_pid_updated[UE_id][harq_pid] = 1; harq_pid_updated[UE_id][harq_pid] = 1;
harq_pid_round[UE_id][harq_pid] = 0; harq_pid_round[UE_id][harq_pid] = 0;
continue; continue;
@@ -375,8 +395,11 @@ void flexran_apply_ue_spec_scheduling_decisions(mid_t mod_id,
flexran_fill_oai_dci(mod_id, CC_id, rnti, dl_dci); flexran_fill_oai_dci(mod_id, CC_id, rnti, dl_dci);
} }
} }
void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
Protocol__FlexDlDci *dl_dci) { void
flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
Protocol__FlexDlDci * dl_dci)
{
void *DLSCH_dci = NULL; void *DLSCH_dci = NULL;
DCI_PDU *DCI_pdu; DCI_PDU *DCI_pdu;
@@ -397,7 +420,8 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
// round = dl_dci->rv[0]; // round = dl_dci->rv[0];
// Note this code is for a specific DCI format // Note this code is for a specific DCI format
DLSCH_dci = (void *)UE_list->UE_template[CC_id][UE_id].DLSCH_DCI[harq_pid]; DLSCH_dci =
(void *) UE_list->UE_template[CC_id][UE_id].DLSCH_DCI[harq_pid];
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu; DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(mod_id, CC_id); frame_parms[CC_id] = mac_xface->get_lte_frame_parms(mod_id, CC_id);
@@ -405,7 +429,8 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
if (dl_dci->has_tpc == 1) { if (dl_dci->has_tpc == 1) {
// Check if tpc has been set and reset measurement */ // Check if tpc has been set and reset measurement */
if ((dl_dci->tpc == 0) || (dl_dci->tpc == 2)) { if ((dl_dci->tpc == 0) || (dl_dci->tpc == 2)) {
eNB_UE_stats = mac_xface->get_eNB_UE_stats(mod_id, CC_id, rnti); eNB_UE_stats =
mac_xface->get_eNB_UE_stats(mod_id, CC_id, rnti);
eNB_UE_stats->Po_PUCCH_update = 0; eNB_UE_stats->Po_PUCCH_update = 0;
} }
} }
@@ -418,9 +443,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_TDD_1(DCI1_1_5MHz_TDD_t, DLSCH_dci, dl_dci); FILL_DCI_TDD_1(DCI1_1_5MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_1_5MHz_TDD_t); size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
size_bits = sizeof_DCI1_1_5MHz_TDD_t; size_bits = sizeof_DCI1_1_5MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} else { } else {
@@ -428,9 +455,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_FDD_1(DCI1_1_5MHz_FDD_t, DLSCH_dci, dl_dci); FILL_DCI_FDD_1(DCI1_1_5MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_1_5MHz_FDD_t); size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
size_bits = sizeof_DCI1_1_5MHz_FDD_t; size_bits = sizeof_DCI1_1_5MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} }
@@ -441,9 +470,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_TDD_1(DCI1_5MHz_TDD_t, DLSCH_dci, dl_dci); FILL_DCI_TDD_1(DCI1_5MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_5MHz_TDD_t); size_bytes = sizeof(DCI1_5MHz_TDD_t);
size_bits = sizeof_DCI1_5MHz_TDD_t; size_bits = sizeof_DCI1_5MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} else { } else {
@@ -451,9 +482,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_FDD_1(DCI1_5MHz_FDD_t, DLSCH_dci, dl_dci); FILL_DCI_FDD_1(DCI1_5MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_5MHz_FDD_t); size_bytes = sizeof(DCI1_5MHz_FDD_t);
size_bits = sizeof_DCI1_5MHz_FDD_t; size_bits = sizeof_DCI1_5MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} }
@@ -464,9 +497,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_TDD_1(DCI1_10MHz_TDD_t, DLSCH_dci, dl_dci); FILL_DCI_TDD_1(DCI1_10MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_10MHz_TDD_t); size_bytes = sizeof(DCI1_10MHz_TDD_t);
size_bits = sizeof_DCI1_10MHz_TDD_t; size_bits = sizeof_DCI1_10MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} else { } else {
@@ -474,9 +509,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_FDD_1(DCI1_10MHz_FDD_t, DLSCH_dci, dl_dci); FILL_DCI_FDD_1(DCI1_10MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_10MHz_FDD_t); size_bytes = sizeof(DCI1_10MHz_FDD_t);
size_bits = sizeof_DCI1_10MHz_FDD_t; size_bits = sizeof_DCI1_10MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} }
@@ -487,9 +524,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_TDD_1(DCI1_20MHz_TDD_t, DLSCH_dci, dl_dci); FILL_DCI_TDD_1(DCI1_20MHz_TDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_20MHz_TDD_t); size_bytes = sizeof(DCI1_20MHz_TDD_t);
size_bits = sizeof_DCI1_20MHz_TDD_t; size_bits = sizeof_DCI1_20MHz_TDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} else { } else {
@@ -497,9 +536,11 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
FILL_DCI_FDD_1(DCI1_20MHz_FDD_t, DLSCH_dci, dl_dci); FILL_DCI_FDD_1(DCI1_20MHz_FDD_t, DLSCH_dci, dl_dci);
size_bytes = sizeof(DCI1_20MHz_FDD_t); size_bytes = sizeof(DCI1_20MHz_FDD_t);
size_bits = sizeof_DCI1_20MHz_FDD_t; size_bits = sizeof_DCI1_20MHz_FDD_t;
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_2A) {
//TODO //TODO
} else if (dl_dci->format == PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) { } else if (dl_dci->format ==
PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1D) {
//TODO //TODO
} }
} }
@@ -507,7 +548,7 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
} }
//Set format to the proper type //Set format to the proper type
switch(dl_dci->format) { switch (dl_dci->format) {
case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1: case PROTOCOL__FLEX_DCI_FORMAT__FLDCIF_1:
format = format1; format = format1;
break; break;
@@ -536,16 +577,12 @@ void flexran_fill_oai_dci(mid_t mod_id, uint32_t CC_id, uint32_t rnti,
format = 3; format = 3;
break; break;
default: default:
/*TODO: Need to deal with unsupported DCI type*/ /*TODO: Need to deal with unsupported DCI type */
return; return;
} }
add_ue_spec_dci(DCI_pdu, add_ue_spec_dci(DCI_pdu,
DLSCH_dci, DLSCH_dci,
rnti, rnti,
size_bytes, size_bytes, dl_dci->aggr_level, size_bits, format, 0);
dl_dci->aggr_level,
size_bits,
format,
0);
} }
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue.c
+819 -483
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue_remote.c
+42 -20
View File
@@ -44,8 +44,11 @@ int queue_initialized = 0;
//uint32_t period = 10; //uint32_t period = 10;
//uint32_t sched [] = {1, 2, 3}; //uint32_t sched [] = {1, 2, 3};
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subframe, void
int *mbsfn_flag, Protocol__FlexranMessage **dl_info) { flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame,
uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info)
{
//if ((subframe == skip_subframe) && (frame % period == 0)) { //if ((subframe == skip_subframe) && (frame % period == 0)) {
@@ -72,29 +75,36 @@ void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subf
dl_mac_config_element_t *dl_config_elem; dl_mac_config_element_t *dl_config_elem;
int diff; int diff;
LOG_D(MAC, "[TEST] Current frame and subframe %d, %d\n", frame, subframe); LOG_D(MAC, "[TEST] Current frame and subframe %d, %d\n", frame,
subframe);
// First we check to see if we have a scheduling decision for this sfn_sf already in our queue // First we check to see if we have a scheduling decision for this sfn_sf already in our queue
while(queue_head.tqh_first != NULL) { while (queue_head.tqh_first != NULL) {
dl_config_elem = queue_head.tqh_first; dl_config_elem = queue_head.tqh_first;
diff = get_sf_difference(mod_id, dl_config_elem->dl_info->dl_mac_config_msg->sfn_sf); diff =
get_sf_difference(mod_id,
dl_config_elem->dl_info->
dl_mac_config_msg->sfn_sf);
// Check if this decision is for now, for a later or a previous subframe // Check if this decision is for now, for a later or a previous subframe
if ( diff == 0) { // Now if (diff == 0) { // Now
LOG_D(MAC, "Found a decision for this subframe in the queue. Let's use it!\n"); LOG_D(MAC,
"Found a decision for this subframe in the queue. Let's use it!\n");
TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs); TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs);
*dl_info = dl_config_elem->dl_info; *dl_info = dl_config_elem->dl_info;
free(dl_config_elem); free(dl_config_elem);
eNB->eNB_stats[mod_id].sched_decisions++; eNB->eNB_stats[mod_id].sched_decisions++;
return; return;
} else if (diff < 0) { //previous subframe , delete message and free memory } else if (diff < 0) { //previous subframe , delete message and free memory
LOG_D(MAC, "Found a decision for a previous subframe in the queue. Let's get rid of it\n"); LOG_D(MAC,
"Found a decision for a previous subframe in the queue. Let's get rid of it\n");
TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs); TAILQ_REMOVE(&queue_head, queue_head.tqh_first, configs);
flexran_agent_mac_destroy_dl_config(dl_config_elem->dl_info); flexran_agent_mac_destroy_dl_config(dl_config_elem->dl_info);
free(dl_config_elem); free(dl_config_elem);
eNB->eNB_stats[mod_id].sched_decisions++; eNB->eNB_stats[mod_id].sched_decisions++;
eNB->eNB_stats[mod_id].missed_deadlines++; eNB->eNB_stats[mod_id].missed_deadlines++;
} else { // next subframe, nothing to do now } else { // next subframe, nothing to do now
LOG_D(MAC, "Found a decision for a future subframe in the queue. Nothing to do now\n"); LOG_D(MAC,
"Found a decision for a future subframe in the queue. Nothing to do now\n");
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info); flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
return; return;
} }
@@ -104,21 +114,27 @@ void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subf
flexran_agent_get_pending_dl_mac_config(mod_id, dl_info); flexran_agent_get_pending_dl_mac_config(mod_id, dl_info);
while (*dl_info != NULL) { while (*dl_info != NULL) {
diff = get_sf_difference(mod_id, (*dl_info)->dl_mac_config_msg->sfn_sf); diff =
get_sf_difference(mod_id,
(*dl_info)->dl_mac_config_msg->sfn_sf);
if (diff == 0) { // Got a command for this sfn_sf if (diff == 0) { // Got a command for this sfn_sf
LOG_D(MAC, "Found a decision for this subframe pending. Let's use it\n"); LOG_D(MAC,
"Found a decision for this subframe pending. Let's use it\n");
eNB->eNB_stats[mod_id].sched_decisions++; eNB->eNB_stats[mod_id].sched_decisions++;
return; return;
} else if (diff < 0) { } else if (diff < 0) {
LOG_D(MAC, "Found a decision for a previous subframe. Let's get rid of it\n"); LOG_D(MAC,
"Found a decision for a previous subframe. Let's get rid of it\n");
flexran_agent_mac_destroy_dl_config(*dl_info); flexran_agent_mac_destroy_dl_config(*dl_info);
*dl_info = NULL; *dl_info = NULL;
flexran_agent_get_pending_dl_mac_config(mod_id, dl_info); flexran_agent_get_pending_dl_mac_config(mod_id, dl_info);
eNB->eNB_stats[mod_id].sched_decisions++; eNB->eNB_stats[mod_id].sched_decisions++;
eNB->eNB_stats[mod_id].missed_deadlines++; eNB->eNB_stats[mod_id].missed_deadlines++;
} else { // Intended for future subframe. Store it in local cache } else { // Intended for future subframe. Store it in local cache
LOG_D(MAC, "Found a decision for a future subframe in the queue. Let's store it in the cache\n"); LOG_D(MAC,
dl_mac_config_element_t *e = malloc(sizeof(dl_mac_config_element_t)); "Found a decision for a future subframe in the queue. Let's store it in the cache\n");
dl_mac_config_element_t *e =
malloc(sizeof(dl_mac_config_element_t));
e->dl_info = *dl_info; e->dl_info = *dl_info;
TAILQ_INSERT_TAIL(&queue_head, e, configs); TAILQ_INSERT_TAIL(&queue_head, e, configs);
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info); flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
@@ -131,7 +147,8 @@ void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subf
flexran_agent_mac_create_empty_dl_config(mod_id, dl_info); flexran_agent_mac_create_empty_dl_config(mod_id, dl_info);
} }
int get_sf_difference(mid_t mod_id, uint32_t sfn_sf) { int get_sf_difference(mid_t mod_id, uint32_t sfn_sf)
{
int diff_in_subframes; int diff_in_subframes;
uint16_t current_frame = flexran_get_current_system_frame_num(mod_id); uint16_t current_frame = flexran_get_current_system_frame_num(mod_id);
@@ -142,18 +159,21 @@ int get_sf_difference(mid_t mod_id, uint32_t sfn_sf) {
return 0; return 0;
} }
uint16_t frame_mask = ((1<<12) - 1); uint16_t frame_mask = ((1 << 12) - 1);
uint16_t frame = (sfn_sf & (frame_mask << 4)) >> 4; uint16_t frame = (sfn_sf & (frame_mask << 4)) >> 4;
uint16_t sf_mask = ((1<<4) - 1); uint16_t sf_mask = ((1 << 4) - 1);
uint16_t subframe = (sfn_sf & sf_mask); uint16_t subframe = (sfn_sf & sf_mask);
LOG_D(MAC, "[TEST] Target frame and subframe %d, %d\n", frame, subframe); LOG_D(MAC, "[TEST] Target frame and subframe %d, %d\n", frame,
subframe);
if (frame == current_frame) { if (frame == current_frame) {
return subframe - current_subframe; return subframe - current_subframe;
} else if (frame > current_frame) { } else if (frame > current_frame) {
diff_in_subframes = ((frame*10)+subframe) - ((current_frame*10)+current_subframe); diff_in_subframes =
((frame * 10) + subframe) - ((current_frame * 10) +
current_subframe);
// diff_in_subframes = 9 - current_subframe; // diff_in_subframes = 9 - current_subframe;
//diff_in_subframes += (subframe + 1); //diff_in_subframes += (subframe + 1);
@@ -170,7 +190,9 @@ int get_sf_difference(mid_t mod_id, uint32_t sfn_sf) {
// diff_in_subframes += (frame - 1) * 10; // diff_in_subframes += (frame - 1) * 10;
//} //}
//diff_in_subframes += (1023 - current_frame) * 10; //diff_in_subframes += (1023 - current_frame) * 10;
diff_in_subframes = 10240 - ((current_frame*10)+current_subframe) + ((frame*10)+subframe); diff_in_subframes =
10240 - ((current_frame * 10) + current_subframe) +
((frame * 10) + subframe);
if (diff_in_subframes > SCHED_AHEAD_SUBFRAMES) { if (diff_in_subframes > SCHED_AHEAD_SUBFRAMES) {
return -1; return -1;
} else { } else {
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue_remote.h
+3 -2
View File
@@ -55,8 +55,9 @@ TAILQ_HEAD(DlMacConfigHead, dl_mac_config_element_s);
/* /*
* Default scheduler used by the eNB agent * Default scheduler used by the eNB agent
*/ */
void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame, uint32_t subframe, void flexran_schedule_ue_spec_remote(mid_t mod_id, uint32_t frame,
int *mbsfn_flag, Protocol__FlexranMessage **dl_info); uint32_t subframe, int *mbsfn_flag,
Protocol__FlexranMessage ** dl_info);
// Find the difference in subframes from the given subframe // Find the difference in subframes from the given subframe
openair2/LAYER2/MAC/l1_helpers.c
+19 -11
View File
@@ -34,28 +34,36 @@
#include "UTIL/LOG/log.h" #include "UTIL/LOG/log.h"
#include "proto.h" #include "proto.h"
int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP,uint8_t CC_id) int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP, uint8_t CC_id)
{ {
RACH_ConfigCommon_t *rach_ConfigCommon = NULL; RACH_ConfigCommon_t *rach_ConfigCommon = NULL;
AssertFatal(CC_id==0, AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n"); "Transmission on secondary CCs is not supported yet\n");
AssertFatal(UE_mac_inst[module_idP].radioResourceConfigCommon!=NULL, AssertFatal(UE_mac_inst[module_idP].radioResourceConfigCommon != NULL,
"[UE %d] CCid %d FATAL radioResourceConfigCommon is NULL !!!\n",module_idP,CC_id); "[UE %d] CCid %d FATAL radioResourceConfigCommon is NULL !!!\n",
module_idP, CC_id);
rach_ConfigCommon = &UE_mac_inst[module_idP].radioResourceConfigCommon->rach_ConfigCommon; rach_ConfigCommon =
&UE_mac_inst[module_idP].radioResourceConfigCommon->
rach_ConfigCommon;
return(-120 + (rach_ConfigCommon->powerRampingParameters.preambleInitialReceivedTargetPower<<1) + return (-120 +
get_DELTA_PREAMBLE(module_idP,CC_id)); (rach_ConfigCommon->
powerRampingParameters.preambleInitialReceivedTargetPower <<
1) + get_DELTA_PREAMBLE(module_idP, CC_id));
} }
int8_t get_deltaP_rampup(module_id_t module_idP,uint8_t CC_id) int8_t get_deltaP_rampup(module_id_t module_idP, uint8_t CC_id)
{ {
AssertFatal(CC_id==0, AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n"); "Transmission on secondary CCs is not supported yet\n");
LOG_D(MAC,"[PUSCH]%d dB\n",UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER<<1); LOG_D(MAC, "[PUSCH]%d dB\n",
return((int8_t)(UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER<<1)); UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER << 1);
return ((int8_t)
(UE_mac_inst[module_idP].
RA_PREAMBLE_TRANSMISSION_COUNTER << 1));
} }
openair2/LAYER2/MAC/main.c
+106 -175
View File
@@ -48,52 +48,57 @@
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
void dl_phy_sync_success(module_id_t module_idP, void dl_phy_sync_success(module_id_t module_idP, frame_t frameP, unsigned char eNB_index, uint8_t first_sync) //init as MR
frame_t frameP,
unsigned char eNB_index,
uint8_t first_sync) //init as MR
{ {
LOG_D(MAC,"[UE %d] Frame %d: PHY Sync to eNB_index %d successful \n", module_idP, frameP, eNB_index); LOG_D(MAC, "[UE %d] Frame %d: PHY Sync to eNB_index %d successful \n",
module_idP, frameP, eNB_index);
#if defined(ENABLE_USE_MME) #if defined(ENABLE_USE_MME)
int mme_enabled=1; int mme_enabled = 1;
#else #else
int mme_enabled=0; int mme_enabled = 0;
#endif #endif
if (first_sync==1 && !(mme_enabled==1)) { if (first_sync == 1 && !(mme_enabled == 1)) {
//layer2_init_UE(module_idP); //layer2_init_UE(module_idP);
openair_rrc_ue_init(module_idP,eNB_index); openair_rrc_ue_init(module_idP, eNB_index);
} else } else {
{ rrc_in_sync_ind(module_idP, frameP, eNB_index);
rrc_in_sync_ind(module_idP,frameP,eNB_index);
} }
} }
void mac_UE_out_of_sync_ind(module_id_t module_idP, frame_t frameP, uint16_t eNB_index) void
mac_UE_out_of_sync_ind(module_id_t module_idP, frame_t frameP,
uint16_t eNB_index)
{ {
// Mac_rlc_xface->mac_out_of_sync_ind(Mod_id, frameP, eNB_index); // Mac_rlc_xface->mac_out_of_sync_ind(Mod_id, frameP, eNB_index);
} }
int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active, uint8_t HO_active) int
mac_top_init_ue(int eMBMS_active, char *uecap_xer,
uint8_t cba_group_active, uint8_t HO_active)
{ {
int i; int i;
LOG_I(MAC,"[MAIN] Init function start:Nb_UE_INST=%d\n",NB_UE_INST); LOG_I(MAC, "[MAIN] Init function start:Nb_UE_INST=%d\n", NB_UE_INST);
if (NB_UE_INST>0) { if (NB_UE_INST > 0) {
UE_mac_inst = (UE_MAC_INST*)malloc16(NB_UE_INST*sizeof(UE_MAC_INST)); UE_mac_inst =
(UE_MAC_INST *) malloc16(NB_UE_INST * sizeof(UE_MAC_INST));
AssertFatal(UE_mac_inst!=NULL, AssertFatal(UE_mac_inst != NULL,
"[MAIN] Can't ALLOCATE %zu Bytes for %d UE_MAC_INST with size %zu \n",NB_UE_INST*sizeof(UE_MAC_INST),NB_UE_INST,sizeof(UE_MAC_INST)); "[MAIN] Can't ALLOCATE %zu Bytes for %d UE_MAC_INST with size %zu \n",
NB_UE_INST * sizeof(UE_MAC_INST), NB_UE_INST,
sizeof(UE_MAC_INST));
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d UE_MAC_INST @ %p\n",NB_UE_INST*sizeof(UE_MAC_INST),NB_UE_INST,UE_mac_inst); LOG_D(MAC, "[MAIN] ALLOCATE %zu Bytes for %d UE_MAC_INST @ %p\n",
NB_UE_INST * sizeof(UE_MAC_INST), NB_UE_INST, UE_mac_inst);
bzero(UE_mac_inst,NB_UE_INST*sizeof(UE_MAC_INST)); bzero(UE_mac_inst, NB_UE_INST * sizeof(UE_MAC_INST));
for(i=0; i<NB_UE_INST; i++) { for (i = 0; i < NB_UE_INST; i++) {
ue_init_mac(i); ue_init_mac(i);
} }
} else { } else {
@@ -101,13 +106,14 @@ int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
} }
LOG_I(MAC,"[MAIN] calling RRC\n"); LOG_I(MAC, "[MAIN] calling RRC\n");
openair_rrc_top_init_ue(eMBMS_active, uecap_xer, cba_group_active,HO_active); openair_rrc_top_init_ue(eMBMS_active, uecap_xer, cba_group_active,
HO_active);
LOG_I(MAC,"[MAIN][INIT] Init function finished\n"); LOG_I(MAC, "[MAIN][INIT] Init function finished\n");
return(0); return (0);
} }
@@ -115,41 +121,56 @@ int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
void mac_top_init_eNB() void mac_top_init_eNB()
{ {
module_id_t i,j; module_id_t i, j;
int list_el; int list_el;
UE_list_t *UE_list; UE_list_t *UE_list;
eNB_MAC_INST *mac; eNB_MAC_INST *mac;
LOG_I(MAC,"[MAIN] Init function start:nb_macrlc_inst=%d\n",RC.nb_macrlc_inst); LOG_I(MAC, "[MAIN] Init function start:nb_macrlc_inst=%d\n",
RC.nb_macrlc_inst);
if (RC.nb_macrlc_inst>0) { if (RC.nb_macrlc_inst > 0) {
RC.mac = (eNB_MAC_INST**)malloc16(RC.nb_macrlc_inst*sizeof(eNB_MAC_INST*)); RC.mac =
AssertFatal(RC.mac != NULL,"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n", (eNB_MAC_INST **) malloc16(RC.nb_macrlc_inst *
RC.nb_macrlc_inst*sizeof(eNB_MAC_INST*), sizeof(eNB_MAC_INST *));
RC.nb_macrlc_inst,
sizeof(eNB_MAC_INST));
for (i=0;i<RC.nb_macrlc_inst;i++) {
RC.mac[i] = (eNB_MAC_INST*)malloc16(sizeof(eNB_MAC_INST));
AssertFatal(RC.mac != NULL, AssertFatal(RC.mac != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n", "can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst*sizeof(eNB_MAC_INST*),RC.nb_macrlc_inst,sizeof(eNB_MAC_INST)); RC.nb_macrlc_inst * sizeof(eNB_MAC_INST *),
LOG_D(MAC,"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",sizeof(eNB_MAC_INST),RC.nb_macrlc_inst,RC.mac); RC.nb_macrlc_inst, sizeof(eNB_MAC_INST));
bzero(RC.mac[i],sizeof(eNB_MAC_INST)); for (i = 0; i < RC.nb_macrlc_inst; i++) {
RC.mac[i] = (eNB_MAC_INST *) malloc16(sizeof(eNB_MAC_INST));
AssertFatal(RC.mac != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst * sizeof(eNB_MAC_INST *),
RC.nb_macrlc_inst, sizeof(eNB_MAC_INST));
LOG_D(MAC,
"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",
sizeof(eNB_MAC_INST), RC.nb_macrlc_inst, RC.mac);
bzero(RC.mac[i], sizeof(eNB_MAC_INST));
RC.mac[i]->Mod_id = i; RC.mac[i]->Mod_id = i;
for (j=0;j<MAX_NUM_CCs;j++) { for (j = 0; j < MAX_NUM_CCs; j++) {
RC.mac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j]; RC.mac[i]->DL_req[j].dl_config_request_body.
RC.mac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j]; dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
for (int k=0;k<10;k++) RC.mac[i]->UL_req_tmp[j][k].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list_tmp[j][k]; RC.mac[i]->UL_req[j].ul_config_request_body.
RC.mac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.mac[i]->hi_dci0_pdu_list[j]; ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.mac[i]->tx_request_pdu[j]; for (int k = 0; k < 10; k++)
RC.mac[i]->UL_req_tmp[j][k].
ul_config_request_body.ul_config_pdu_list =
RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].
hi_dci0_request_body.hi_dci0_pdu_list =
RC.mac[i]->hi_dci0_pdu_list[j];
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list =
RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0; RC.mac[i]->ul_handle = 0;
} }
} }
AssertFatal(rlc_module_init()==0,"Could not initialize RLC layer\n"); AssertFatal(rlc_module_init() == 0,
"Could not initialize RLC layer\n");
// These should be out of here later // These should be out of here later
pdcp_layer_init (); pdcp_layer_init();
rrc_init_global_param(); rrc_init_global_param();
@@ -158,7 +179,7 @@ void mac_top_init_eNB()
} }
// Initialize Linked-List for Active UEs // Initialize Linked-List for Active UEs
for(i=0; i<RC.nb_macrlc_inst; i++) { for (i = 0; i < RC.nb_macrlc_inst; i++) {
mac = RC.mac[i]; mac = RC.mac[i];
@@ -166,131 +187,40 @@ void mac_top_init_eNB()
UE_list = &mac->UE_list; UE_list = &mac->UE_list;
UE_list->num_UEs=0; UE_list->num_UEs = 0;
UE_list->head=-1; UE_list->head = -1;
UE_list->head_ul=-1; UE_list->head_ul = -1;
UE_list->avail=0; UE_list->avail = 0;
for (list_el=0; list_el<NUMBER_OF_UE_MAX-1; list_el++) { for (list_el = 0; list_el < NUMBER_OF_UE_MAX - 1; list_el++) {
UE_list->next[list_el]=list_el+1; UE_list->next[list_el] = list_el + 1;
UE_list->next_ul[list_el]=list_el+1; UE_list->next_ul[list_el] = list_el + 1;
} }
UE_list->next[list_el]=-1; UE_list->next[list_el] = -1;
UE_list->next_ul[list_el]=-1; UE_list->next_ul[list_el] = -1;
} }
} }
void mac_init_cell_params(int Mod_idP,int CC_idP) { void mac_init_cell_params(int Mod_idP, int CC_idP)
{
int j; int j;
RA_TEMPLATE *RA_template;
UE_TEMPLATE *UE_template; UE_TEMPLATE *UE_template;
int size_bytes1,size_bytes2,size_bits1,size_bits2;
LOG_D(MAC,"[MAIN][eNB %d] CC_id %d initializing RA_template\n",Mod_idP, CC_idP);
LOG_D(MAC, "[MSC_NEW][FRAME 00000][MAC_eNB][MOD %02d][]\n", Mod_idP); LOG_D(MAC, "[MSC_NEW][FRAME 00000][MAC_eNB][MOD %02d][]\n", Mod_idP);
COMMON_channels_t *cc = &RC.mac[Mod_idP]->common_channels[CC_idP]; COMMON_channels_t *cc = &RC.mac[Mod_idP]->common_channels[CC_idP];
RA_template = (RA_TEMPLATE *)&cc->RA_template[0]; memset(&RC.mac[Mod_idP]->eNB_stats, 0, sizeof(eNB_STATS));
UE_template =
(UE_TEMPLATE *) & RC.mac[Mod_idP]->UE_list.UE_template[CC_idP][0];
for (j=0; j<NB_RA_PROC_MAX; j++) { for (j = 0; j < NUMBER_OF_UE_MAX; j++) {
if ( cc->tdd_Config != NULL) { UE_template[j].rnti = 0;
switch (cc->mib->message.dl_Bandwidth) {
case MasterInformationBlock__dl_Bandwidth_n6:
size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
break;
case MasterInformationBlock__dl_Bandwidth_n25:
size_bytes1 = sizeof(DCI1A_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_5MHz_TDD_1_6_t;
break;
case MasterInformationBlock__dl_Bandwidth_n50:
size_bytes1 = sizeof(DCI1A_10MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_10MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_10MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_10MHz_TDD_1_6_t;
break;
case MasterInformationBlock__dl_Bandwidth_n100:
size_bytes1 = sizeof(DCI1A_20MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_20MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_20MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_20MHz_TDD_1_6_t;
break;
default:
size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
break;
}
} else {
switch (cc->mib->message.dl_Bandwidth) {
case MasterInformationBlock__dl_Bandwidth_n6:
size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
break;
case MasterInformationBlock__dl_Bandwidth_n25:
size_bytes1 = sizeof(DCI1A_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_5MHz_FDD_t;
break;
case MasterInformationBlock__dl_Bandwidth_n50:
size_bytes1 = sizeof(DCI1A_10MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_10MHz_FDD_t);
size_bits1 = sizeof_DCI1A_10MHz_FDD_t;
size_bits2 = sizeof_DCI1A_10MHz_FDD_t;
break;
case MasterInformationBlock__dl_Bandwidth_n100:
size_bytes1 = sizeof(DCI1A_20MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_20MHz_FDD_t);
size_bits1 = sizeof_DCI1A_20MHz_FDD_t;
size_bits2 = sizeof_DCI1A_20MHz_FDD_t;
break;
default:
size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
break;
}
}
memcpy((void *)&RA_template[j].RA_alloc_pdu1[0],(void *)&RA_alloc_pdu,size_bytes1);
memcpy((void *)&RA_template[j].RA_alloc_pdu2[0],(void *)&DLSCH_alloc_pdu1A,size_bytes2);
RA_template[j].RA_dci_size_bytes1 = size_bytes1;
RA_template[j].RA_dci_size_bytes2 = size_bytes2;
RA_template[j].RA_dci_size_bits1 = size_bits1;
RA_template[j].RA_dci_size_bits2 = size_bits2;
RA_template[j].RA_dci_fmt1 = format1A;
RA_template[j].RA_dci_fmt2 = format1A;
}
memset (&RC.mac[Mod_idP]->eNB_stats,0,sizeof(eNB_STATS));
UE_template = (UE_TEMPLATE *)&RC.mac[Mod_idP]->UE_list.UE_template[CC_idP][0];
for (j=0; j<NUMBER_OF_UE_MAX; j++) {
UE_template[j].rnti=0;
// initiallize the eNB to UE statistics // initiallize the eNB to UE statistics
memset (&RC.mac[Mod_idP]->UE_list.eNB_UE_stats[CC_idP][j],0,sizeof(eNB_UE_STATS)); memset(&RC.mac[Mod_idP]->UE_list.eNB_UE_stats[CC_idP][j], 0,
sizeof(eNB_UE_STATS));
} }
} }
@@ -300,15 +230,15 @@ int rlcmac_init_global_param(void)
{ {
LOG_I(MAC,"[MAIN] CALLING RLC_MODULE_INIT...\n"); LOG_I(MAC, "[MAIN] CALLING RLC_MODULE_INIT...\n");
if (rlc_module_init()!=0) { if (rlc_module_init() != 0) {
return(-1); return (-1);
} }
pdcp_layer_init (); pdcp_layer_init();
LOG_I(MAC,"[MAIN] Init Global Param Done\n"); LOG_I(MAC, "[MAIN] Init Global Param Done\n");
return 0; return 0;
} }
@@ -318,29 +248,31 @@ void mac_top_cleanup(void)
{ {
#ifndef USER_MODE #ifndef USER_MODE
pdcp_module_cleanup (); pdcp_module_cleanup();
#endif #endif
if (NB_UE_INST>0) { if (NB_UE_INST > 0) {
free (UE_mac_inst); free(UE_mac_inst);
} }
if (RC.nb_macrlc_inst>0) { if (RC.nb_macrlc_inst > 0) {
free(RC.mac); free(RC.mac);
} }
} }
int l2_init_ue(int eMBMS_active, char *uecap_xer,uint8_t cba_group_active, uint8_t HO_active) int
l2_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
uint8_t HO_active)
{ {
LOG_I(MAC,"[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n"); LOG_I(MAC, "[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
// NB_NODE=2; // NB_NODE=2;
// NB_INST=2; // NB_INST=2;
rlcmac_init_global_param(); rlcmac_init_global_param();
LOG_I(MAC,"[MAIN] init UE MAC functions \n"); LOG_I(MAC, "[MAIN] init UE MAC functions \n");
mac_top_init_ue(eMBMS_active,uecap_xer,cba_group_active,HO_active); mac_top_init_ue(eMBMS_active, uecap_xer, cba_group_active, HO_active);
return(1); return (1);
} }
int l2_init_eNB() int l2_init_eNB()
@@ -348,13 +280,12 @@ int l2_init_eNB()
LOG_I(MAC,"[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n"); LOG_I(MAC, "[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
rlcmac_init_global_param(); rlcmac_init_global_param();
LOG_D(MAC,"[MAIN] ALL INIT OK\n"); LOG_D(MAC, "[MAIN] ALL INIT OK\n");
return(1); return (1);
} }
openair2/LAYER2/MAC/openair2_proc.c
-405
View File
@@ -1,405 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file openair2_proc.c
\brief MAC layer online statistics
\author Navid Nikaein
\date 2013 - 2014
\version 1.0
@ingroup _mac
*/
#ifndef USER_MODE
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/proc_fs.h>
#endif
#include "LAYER2/MAC/defs.h"
#include "LAYER2/MAC/extern.h"
//#include "RRC/LITE/extern.h"
//#include "LAYER2/PDCP/pdcp.h"
#include "proto.h"
extern RAN_CONTEXT_t RC;
int openair2_stats_read(char *buffer, char **my_buffer, off_t off, int length)
{
int len = 0,fg,Overhead, Sign;
unsigned int i,j,k,kk;
unsigned int ue_id, eNB_id;
unsigned int Mod_id = 0,CH_index;
unsigned int stat_tx_pdcp_sdu;
unsigned int stat_tx_pdcp_bytes;
unsigned int stat_tx_pdcp_sdu_discarded;
unsigned int stat_tx_pdcp_bytes_discarded;
unsigned int stat_tx_data_pdu;
unsigned int stat_tx_data_bytes;
unsigned int stat_tx_retransmit_pdu_by_status;
unsigned int stat_tx_retransmit_bytes_by_status;
unsigned int stat_tx_retransmit_pdu;
unsigned int stat_tx_retransmit_bytes;
unsigned int stat_tx_control_pdu;
unsigned int stat_tx_control_bytes;
unsigned int stat_rx_pdcp_sdu;
unsigned int stat_rx_pdcp_bytes;
unsigned int stat_rx_data_pdus_duplicate;
unsigned int stat_rx_data_bytes_duplicate;
unsigned int stat_rx_data_pdu;
unsigned int stat_rx_data_bytes;
unsigned int stat_rx_data_pdu_dropped;
unsigned int stat_rx_data_bytes_dropped;
unsigned int stat_rx_data_pdu_out_of_window;
unsigned int stat_rx_data_bytes_out_of_window;
unsigned int stat_rx_control_pdu;
unsigned int stat_rx_control_bytes;
unsigned int stat_timer_reordering_timed_out;
unsigned int stat_timer_poll_retransmit_timed_out;
unsigned int stat_timer_status_prohibit_timed_out;
// UE part
for (ue_id=0; ue_id<NUM_UE_INST; ue_id++) {
// mod_id used for PDCP and RLC
Mod_id = NB_eNB_INST + ue_id ;
len+=sprintf(&buffer[len],"UE RX TTI: %d\n",UE_mac_inst[ue_id].rxFrame);
for (enb_id= 0; enb_id <NB_SIG_CNX_UE; enb_id++) {
switch (mac_get_rrc_status(ue_id,0,enb_id) > RRC_CONNECTED) {
case RRC_RECONFIGURED :
case RRC_CONNECTED:
case RRC_SI_RECEIVED:
case RRC_IDLE:
break;
if (mac_get_rrc_status(ue_id,0,enb_id) > RRC_CONNECTED) {
// if (UE_mac_inst[ue_id].Dcch_lchan[CH_index].Active==1) {
len+=sprintf(&buffer[len],"eNB %d: Wideband SINR %d dB---\n",
CH_index,UE_mac_inst[Mod_id].Def_meas[CH_index].Wideband_sinr);
len+=sprintf(&buffer[len],"CH %d: Subband SINR (dB) :",
CH_index);
for (fg=0; fg<NUMBER_OF_MEASUREMENT_SUBBANDS; fg++) {
len+=sprintf(&buffer[len],"%d ",UE_mac_inst[Mod_id].Def_meas[CH_index].Sinr_meas[0][fg]);
}
len+=sprintf(&buffer[len],"\n");
len+=sprintf(&buffer[len],"BCCH %d, NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Bcch_lchan[CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Bcch_lchan[CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Bcch_lchan[CH_index].Lchan_info.NB_RX_ERRORS);
len+=sprintf(&buffer[len],"CCCH %d, NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Ccch_lchan[CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Ccch_lchan[CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Ccch_lchan[CH_index].Lchan_info.NB_RX_ERRORS);
len+=sprintf(&buffer[len],"LCHAN %d (DCCH), NB_TX_MAC = %d (%d bits/TTI, %d kbits/sec), NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.NB_TX,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.output_rate,
(10*UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.output_rate)>>5,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Dcch_lchan[CH_index].Lchan_info.NB_RX_ERRORS);
for(i=1; i<NB_RAB_MAX; i++) {
if (UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Active==1) {
Overhead=UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.output_rate - Pdcp_stats_tx_rate[k][CH_index][i];
if(Overhead<0) {
Overhead=-Overhead;
Sign=-1;
} else {
Sign=1;
}
len+=sprintf(&buffer[len],"[PDCP]LCHAN %d: NB_TX = %d ,Tx_rate =(%d bits/TTI ,%d Kbits/s), NB_RX = %d ,Rx_rate =(%d bits/TTI ,%d Kbits/s) , LAYER2 TX OVERHEAD: %d Kbits/s\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
Pdcp_stats_tx[k][CH_index][i],
Pdcp_stats_tx_rate[k][CH_index][i],
(10*Pdcp_stats_tx_rate[k][CH_index][i])>>5,
Pdcp_stats_rx[k][CH_index][i],
Pdcp_stats_rx_rate[k][CH_index][i],
(10*Pdcp_stats_rx_rate[k][CH_index][i])>>5,
Sign*(10*Overhead)>>5);
int status = rlc_stat_req (k,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
&stat_tx_pdcp_sdu,
&stat_tx_pdcp_bytes,
&stat_tx_pdcp_sdu_discarded,
&stat_tx_pdcp_bytes_discarded,
&stat_tx_data_pdu,
&stat_tx_data_bytes,
&stat_tx_retransmit_pdu_by_status,
&stat_tx_retransmit_bytes_by_status,
&stat_tx_retransmit_pdu,
&stat_tx_retransmit_bytes,
&stat_tx_control_pdu,
&stat_tx_control_bytes,
&stat_rx_pdcp_sdu,
&stat_rx_pdcp_bytes,
&stat_rx_data_pdus_duplicate,
&stat_rx_data_bytes_duplicate,
&stat_rx_data_pdu,
&stat_rx_data_bytes,
&stat_rx_data_pdu_dropped,
&stat_rx_data_bytes_dropped,
&stat_rx_data_pdu_out_of_window,
&stat_rx_data_bytes_out_of_window,
&stat_rx_control_pdu,
&stat_rx_control_bytes,
&stat_timer_reordering_timed_out,
&stat_timer_poll_retransmit_timed_out,
&stat_timer_status_prohibit_timed_out) ;
if (status == RLC_OP_STATUS_OK) {
len+=sprintf(&buffer[len],"RLC LCHAN %d, NB_SDU_TO_TX = %d\tNB_SDU_DISC %d\tNB_RX_SDU %d\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
tx_pdcp_sdu,
tx_pdcp_sdu_discarded,
rx_sdu);
len+=sprintf(&buffer[len],"RLC LCHAN %d, NB_TB_TX_DATA = %d\tNB_TB_TX_CONTROL %d\tNB_TX_TB_RETRANS %d",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
tx_data_pdu,
tx_control_pdu,
tx_retransmit_pdu);
len+=sprintf(&buffer[len],"\tRLC LCHAN %d, NB_TX_TB_RETRANS_BY_STATUS = %d\tNB_TX_TB_RETRANS_PADD %d\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
tx_retransmit_pdu_by_status,
tx_retransmit_pdu_unblock);
len+=sprintf(&buffer[len],"RLC LCHAN %d, NB_RX_DATA = %d\tNB_RX_TB_OUT_WIN %d\tNB_RX_TB_CORRUPT %d\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
rx_data_pdu,
rx_data_pdu_out_of_window,
rx_error_pdu);
}
len+=sprintf(&buffer[len],"[MAC]: LCHAN %d, NB_TX_MAC = %d (%d bits/TTI, %d kbits/s), NB_RX_MAC = %d (%d errors)\n",
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.Lchan_id.Index,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_TX,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.output_rate,
(10*UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.output_rate)>>5,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX,
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX_ERRORS);
len+=sprintf(&buffer[len]," TX per TB: ");
for(kk=0; kk<MAX_NUMBER_TB_PER_LCHAN/2; kk++) {
len+=sprintf(&buffer[len],"%d . ",UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_TX_TB[kk]);
}
len+=sprintf(&buffer[len],"\n");
len+=sprintf(&buffer[len]," RXerr per TB: ");
for(kk=0; kk<MAX_NUMBER_TB_PER_LCHAN/2; kk++)
len+=sprintf(&buffer[len],"%d/%d . ",UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX_ERRORS_TB[kk],
UE_mac_inst[Mod_id].Dtch_lchan[i][CH_index].Lchan_info.NB_RX_TB[kk]);
len+=sprintf(&buffer[len],"\n");
}
}
}
}
#endif //PHY_EMUL_ONE_MACHINE
}
else if(Mac_rlc_xface->Is_cluster_head[k] ==1) {
Mod_id=k;
len+=sprintf(&buffer[len],
"-------------------------------------------------------------------CH %d: TTI: %d------------------------------------------------------------------\n",
NODE_ID[Mod_id],Mac_rlc_xface->frame);
for(i=1; i<=NB_CNX_CH; i++) {
if (CH_mac_inst[Mod_id].Dcch_lchan[i].Active==1) {
len+=sprintf(&buffer[len],"\nMR index %d: DL SINR (feedback) %d dB, CQI: %s\n\n",
i,//CH_rrc_inst[Mod_id].Info.UE_list[i].L2_id[0],
CH_mac_inst[Mod_id].Def_meas[i].Wideband_sinr);
//print_cqi(CH_mac_inst[Mod_id].Def_meas[i].cqi));
len+=sprintf(&buffer[len],
"[MAC] LCHAN %d (DCCH), NB_TX_MAC= %d (%d bits/TTI, %d kbits/s), NB_RX_MAC= %d (errors %d, sacch errors %d, sach errors %d, sach_missing %d)\n\n",
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.Lchan_id.Index,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_TX,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.output_rate,
(10*CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.output_rate)>>5,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_ERRORS,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_SACCH_ERRORS,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_SACH_ERRORS,
CH_mac_inst[Mod_id].Dcch_lchan[i].Lchan_info.NB_RX_SACH_MISSING);
for(j=0; j<NB_RAB_MAX; j++) {
if (CH_mac_inst[Mod_id].Dtch_lchan[j][i].Active==1) {
Overhead=CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.output_rate - Pdcp_stats_tx_rate[k][i][j];
if(Overhead<0) {
Overhead=-Overhead;
Sign=-1;
} else {
Sign=1;
}
len+=sprintf(&buffer[len],
"[PDCP]LCHAN %d: NB_TX = %d ,Tx_rate =(%d bits/TTI ,%d Kbits/s), NB_RX = %d ,Rx_rate =(%d bits/TTI ,%d Kbits/s), LAYER2 TX OVERHEAD= %d Kbits/s\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
Pdcp_stats_tx[k][i][j],
Pdcp_stats_tx_rate[k][i][j],
(10*Pdcp_stats_tx_rate[k][i][j])>>5,
Pdcp_stats_rx[k][i][j],
Pdcp_stats_rx_rate[k][i][j],
(10*Pdcp_stats_rx_rate[k][i][j])>>5,
Sign*(10*Overhead)>>5);
int status = rlc_stat_req (k,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
&tx_pdcp_sdu,
&tx_pdcp_sdu_discarded,
&tx_retransmit_pdu_unblock,
&tx_retransmit_pdu_by_status,
&tx_retransmit_pdu,
&tx_data_pdu,
&tx_control_pdu,
&rx_sdu,
&rx_error_pdu,
&rx_data_pdu,
&rx_data_pdu_out_of_window,
&rx_control_pdu) ;
/*
if (status == RLC_OP_STATUS_OK) {
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_SDU_TO_TX = %d\tNB_SDU_DISC %d\tNB_RX_SDU %d\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
tx_pdcp_sdu,
tx_pdcp_sdu_discarded,
rx_sdu);
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_TB_TX_DATA = %d\tNB_TB_TX_CONTROL %d\tNB_TX_TB_RETRANS %\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
tx_data_pdu,
tx_control_pdu,
tx_retransmit_pdu);
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_TX_TB_RETRANS_BY_STATUS = %d\tNB_TX_TB_RETRANS_PADD %d\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
tx_retransmit_pdu_by_status,
tx_retransmit_pdu_unblock);
len+=sprintf(&buffer[len],"\t[RLC] LCHAN %d, NB_RX_DATA = %d\tNB_RX_TB_OUT_WIN %d\tNB_RX_TB_CORRUPT %d\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
rx_data_pdu,
rx_data_pdu_out_of_window,
rx_error_pdu);
}
*/
len+=sprintf(&buffer[len],
"[MAC]LCHAN %d (CNX %d,RAB %d), NB_TX_MAC= %d (%d bits/TTI, %d kbit/s), NB_RX_MAC= %d (errors %d, sacch_errors %d, sach_errors %d, sach_missing %d)\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Lchan_id.Index,
i,j,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_TX,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.output_rate,
(10*CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.output_rate)>>5,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_ERRORS,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_SACCH_ERRORS,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_SACH_ERRORS,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_SACH_MISSING);
len+=sprintf(&buffer[len],"[MAC][SCHEDULER] TX Arrival Rate %d, TX Service Rate %d, RX Arrival rate %d, RX Service rate %d, NB_BW_REQ_RX %d\n\n",
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Arrival_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Tx_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Req_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.Rx_rate,
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_BW_REQ_RX);
/*
len+=sprintf(&buffer[len]," TX per TB: ");
for(kk=0;kk<MAX_NUMBER_TB_PER_LCHAN/2;kk++)
len+=sprintf(&buffer[len],"%d.",CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_TX_TB[kk]);
len+=sprintf(&buffer[len],"\n");
len+=sprintf(&buffer[len]," RXerr per TB: ");
for(kk=0;kk<MAX_NUMBER_TB_PER_LCHAN/2;kk++)
len+=sprintf(&buffer[len],"%d/%d . ",CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_ERRORS_TB[kk],
CH_mac_inst[Mod_id].Dtch_lchan[j][i].Lchan_info.NB_RX_TB[kk]);
len+=sprintf(&buffer[len],"\n");
*/
}
}
}
}
}
}
return len;
}
#ifndef USER_MODE
static struct proc_dir_entry *proc_openair2_root;
/*
* Initialize the module and add the /proc file.
*/
int add_openair2_stats()
{
//#ifdef KERNEL_VERSION_GREATER_THAN_2629
struct proc_dir_entry *pde;
//#endif
proc_openair2_root = proc_mkdir("openair2",0);
//#ifdef KERNEL_VERSION_GREATER_THAN_2629
// pde = proc_create_entry("lchan_stats", S_IFREG | S_IRUGO, proc_openair2_root);
pde = create_proc_read_entry("lchan_stats", S_IFREG | S_IRUGO, proc_openair2_root, (read_proc_t*)&openair2_stats_read, NULL);
if (!pde) {
printk("[OPENAIR][ERROR] can't create proc entry !\n");
}
//#else
//create_proc_info_entry("lchan_stats", S_IFREG | S_IRUGO, proc_openair2_root, openair2_stats_read);
//#endif
return 0;
}
/*
* Unregister the file when the module is closed.
*/
void remove_openair2_stats()
{
if (proc_openair2_root) {
printk("[OPENAIR][CLEANUP] Removing openair proc entry\n");
remove_proc_entry("lchan_stats", proc_openair2_root);
//#ifdef KERNEL_VERSION_GREATER_THAN_2629
//#else
remove_proc_entry("openair2",NULL);
//#endif;
}
}
#endif
openair2/LAYER2/MAC/pre_processor.c
+803 -487
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/proto.h
+341 -248
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/ra_procedures.c
+256 -134
View File
@@ -49,12 +49,14 @@
#include "SIMULATION/TOOLS/defs.h" // for taus #include "SIMULATION/TOOLS/defs.h" // for taus
int8_t get_DELTA_PREAMBLE(module_id_t module_idP,int CC_id) int8_t get_DELTA_PREAMBLE(module_id_t module_idP, int CC_id)
{ {
AssertFatal(CC_id==0, AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n"); "Transmission on secondary CCs is not supported yet\n");
uint8_t prachConfigIndex = UE_mac_inst[module_idP].radioResourceConfigCommon->prach_Config.prach_ConfigInfo.prach_ConfigIndex; uint8_t prachConfigIndex =
UE_mac_inst[module_idP].radioResourceConfigCommon->
prach_Config.prach_ConfigInfo.prach_ConfigIndex;
uint8_t preambleformat; uint8_t preambleformat;
if (UE_mac_inst[module_idP].tdd_Config) { // TDD if (UE_mac_inst[module_idP].tdd_Config) { // TDD
@@ -70,62 +72,70 @@ int8_t get_DELTA_PREAMBLE(module_id_t module_idP,int CC_id)
preambleformat = 4; preambleformat = 4;
} }
} else { // FDD } else { // FDD
preambleformat = prachConfigIndex>>2; preambleformat = prachConfigIndex >> 2;
} }
switch (preambleformat) { switch (preambleformat) {
case 0: case 0:
case 1: case 1:
return(0); return (0);
case 2: case 2:
case 3: case 3:
return(-3); return (-3);
case 4: case 4:
return(8); return (8);
default: default:
AssertFatal(1==0,"[UE %d] ue_procedures.c: FATAL, Illegal preambleformat %d, prachConfigIndex %d\n", AssertFatal(1 == 0,
module_idP, "[UE %d] ue_procedures.c: FATAL, Illegal preambleformat %d, prachConfigIndex %d\n",
preambleformat,prachConfigIndex); module_idP, preambleformat, prachConfigIndex);
} }
} }
/// This routine implements Section 5.1.2 (UE Random Access Resource Selection) from 36.321 /// This routine implements Section 5.1.2 (UE Random Access Resource Selection) from 36.321
void get_prach_resources(module_id_t module_idP, void
get_prach_resources(module_id_t module_idP,
int CC_id, int CC_id,
uint8_t eNB_index, uint8_t eNB_index,
uint8_t t_id, uint8_t t_id,
uint8_t first_Msg3, uint8_t first_Msg3,
RACH_ConfigDedicated_t *rach_ConfigDedicated) RACH_ConfigDedicated_t * rach_ConfigDedicated)
{ {
uint8_t Msg3_size = UE_mac_inst[module_idP].RA_Msg3_size; uint8_t Msg3_size = UE_mac_inst[module_idP].RA_Msg3_size;
PRACH_RESOURCES_t *prach_resources = &UE_mac_inst[module_idP].RA_prach_resources; PRACH_RESOURCES_t *prach_resources =
&UE_mac_inst[module_idP].RA_prach_resources;
RACH_ConfigCommon_t *rach_ConfigCommon = NULL; RACH_ConfigCommon_t *rach_ConfigCommon = NULL;
uint8_t noGroupB = 0; uint8_t noGroupB = 0;
uint8_t f_id = 0,num_prach=0; uint8_t f_id = 0, num_prach = 0;
int numberOfRA_Preambles; int numberOfRA_Preambles;
int messageSizeGroupA; int messageSizeGroupA;
int sizeOfRA_PreamblesGroupA; int sizeOfRA_PreamblesGroupA;
int messagePowerOffsetGroupB; int messagePowerOffsetGroupB;
int PLThreshold; int PLThreshold;
AssertFatal(CC_id==0, AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n"); "Transmission on secondary CCs is not supported yet\n");
AssertFatal(UE_mac_inst[module_idP].radioResourceConfigCommon!=NULL, AssertFatal(UE_mac_inst[module_idP].radioResourceConfigCommon != NULL,
"[UE %d] FATAL radioResourceConfigCommon is NULL !!!\n",module_idP); "[UE %d] FATAL radioResourceConfigCommon is NULL !!!\n",
module_idP);
rach_ConfigCommon = &UE_mac_inst[module_idP].radioResourceConfigCommon->rach_ConfigCommon; rach_ConfigCommon =
numberOfRA_Preambles = (1+rach_ConfigCommon->preambleInfo.numberOfRA_Preambles)<<2; &UE_mac_inst[module_idP].radioResourceConfigCommon->
rach_ConfigCommon;
numberOfRA_Preambles =
(1 + rach_ConfigCommon->preambleInfo.numberOfRA_Preambles) << 2;
if (rach_ConfigDedicated) { // This is for network controlled Mobility, later if (rach_ConfigDedicated) { // This is for network controlled Mobility, later
if (rach_ConfigDedicated->ra_PRACH_MaskIndex != 0) { if (rach_ConfigDedicated->ra_PRACH_MaskIndex != 0) {
prach_resources->ra_PreambleIndex = rach_ConfigDedicated->ra_PreambleIndex; prach_resources->ra_PreambleIndex =
prach_resources->ra_RACH_MaskIndex = rach_ConfigDedicated->ra_PRACH_MaskIndex; rach_ConfigDedicated->ra_PreambleIndex;
prach_resources->ra_RACH_MaskIndex =
rach_ConfigDedicated->ra_PRACH_MaskIndex;
return; return;
} }
} }
@@ -136,8 +146,11 @@ void get_prach_resources(module_id_t module_idP,
if (!rach_ConfigCommon->preambleInfo.preamblesGroupAConfig) { if (!rach_ConfigCommon->preambleInfo.preamblesGroupAConfig) {
noGroupB = 1; noGroupB = 1;
} else { } else {
sizeOfRA_PreamblesGroupA = (rach_ConfigCommon->preambleInfo.preamblesGroupAConfig->sizeOfRA_PreamblesGroupA+1)<<2; sizeOfRA_PreamblesGroupA =
switch (rach_ConfigCommon->preambleInfo.preamblesGroupAConfig->messageSizeGroupA) { (rach_ConfigCommon->preambleInfo.
preamblesGroupAConfig->sizeOfRA_PreamblesGroupA + 1) << 2;
switch (rach_ConfigCommon->preambleInfo.
preamblesGroupAConfig->messageSizeGroupA) {
case 0: case 0:
messageSizeGroupA = 56; messageSizeGroupA = 56;
break; break;
@@ -154,7 +167,8 @@ void get_prach_resources(module_id_t module_idP,
/* TODO: what value to use as default? */ /* TODO: what value to use as default? */
messagePowerOffsetGroupB = -9999; messagePowerOffsetGroupB = -9999;
switch (rach_ConfigCommon->preambleInfo.preamblesGroupAConfig->messagePowerOffsetGroupB) { switch (rach_ConfigCommon->preambleInfo.
preamblesGroupAConfig->messagePowerOffsetGroupB) {
case 0: case 0:
messagePowerOffsetGroupB = -9999; messagePowerOffsetGroupB = -9999;
break; break;
@@ -181,7 +195,11 @@ void get_prach_resources(module_id_t module_idP,
break; break;
} }
PLThreshold = 0 - get_DELTA_PREAMBLE(module_idP,CC_id) - get_Po_NOMINAL_PUSCH(module_idP,CC_id) - messagePowerOffsetGroupB; PLThreshold =
0 - get_DELTA_PREAMBLE(module_idP,
CC_id) -
get_Po_NOMINAL_PUSCH(module_idP,
CC_id) - messagePowerOffsetGroupB;
// Note Pcmax is set to 0 here, we have to fix this // Note Pcmax is set to 0 here, we have to fix this
if (sizeOfRA_PreamblesGroupA == numberOfRA_Preambles) { if (sizeOfRA_PreamblesGroupA == numberOfRA_Preambles) {
@@ -192,39 +210,58 @@ void get_prach_resources(module_id_t module_idP,
if (first_Msg3 == 1) { if (first_Msg3 == 1) {
if (noGroupB == 1) { if (noGroupB == 1) {
// use Group A procedure // use Group A procedure
UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex = (taus())%numberOfRA_Preambles; UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex =
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex = 0; (taus()) % numberOfRA_Preambles;
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex =
0;
UE_mac_inst[module_idP].RA_usedGroupA = 1; UE_mac_inst[module_idP].RA_usedGroupA = 1;
} else if ((Msg3_size <messageSizeGroupA) || } else if ((Msg3_size < messageSizeGroupA) ||
(get_PL(module_idP,0,eNB_index) > PLThreshold)) { (get_PL(module_idP, 0, eNB_index) > PLThreshold)) {
// use Group A procedure // use Group A procedure
UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex = (taus())%sizeOfRA_PreamblesGroupA; UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex =
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex = 0; (taus()) % sizeOfRA_PreamblesGroupA;
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex =
0;
UE_mac_inst[module_idP].RA_usedGroupA = 1; UE_mac_inst[module_idP].RA_usedGroupA = 1;
} else { // use Group B } else { // use Group B
UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex = sizeOfRA_PreamblesGroupA + UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex =
(taus())%(numberOfRA_Preambles - sizeOfRA_PreamblesGroupA); sizeOfRA_PreamblesGroupA +
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex = 0; (taus()) % (numberOfRA_Preambles -
sizeOfRA_PreamblesGroupA);
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex =
0;
UE_mac_inst[module_idP].RA_usedGroupA = 0; UE_mac_inst[module_idP].RA_usedGroupA = 0;
} }
UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER = get_Po_NOMINAL_PUSCH(module_idP,CC_id); UE_mac_inst[module_idP].
RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER =
get_Po_NOMINAL_PUSCH(module_idP, CC_id);
} else { // Msg3 is being retransmitted } else { // Msg3 is being retransmitted
if (UE_mac_inst[module_idP].RA_usedGroupA == 1) { if (UE_mac_inst[module_idP].RA_usedGroupA == 1) {
if (rach_ConfigCommon->preambleInfo.preamblesGroupAConfig) { if (rach_ConfigCommon->preambleInfo.preamblesGroupAConfig) {
UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex = (taus())%rach_ConfigCommon->preambleInfo.preamblesGroupAConfig->sizeOfRA_PreamblesGroupA; UE_mac_inst[module_idP].RA_prach_resources.
ra_PreambleIndex =
(taus()) %
rach_ConfigCommon->preambleInfo.
preamblesGroupAConfig->sizeOfRA_PreamblesGroupA;
} else { } else {
UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex = (taus())&0x3f; UE_mac_inst[module_idP].RA_prach_resources.
ra_PreambleIndex = (taus()) & 0x3f;
} }
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex = 0; UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex =
0;
} else { } else {
// FIXME rach_ConfigCommon->preambleInfo.preamblesGroupAConfig may be zero // FIXME rach_ConfigCommon->preambleInfo.preamblesGroupAConfig may be zero
UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex = UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex =
rach_ConfigCommon->preambleInfo.preamblesGroupAConfig->sizeOfRA_PreamblesGroupA + rach_ConfigCommon->preambleInfo.
(taus())%(rach_ConfigCommon->preambleInfo.numberOfRA_Preambles - preamblesGroupAConfig->sizeOfRA_PreamblesGroupA +
rach_ConfigCommon->preambleInfo.preamblesGroupAConfig->sizeOfRA_PreamblesGroupA); (taus()) %
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex = 0; (rach_ConfigCommon->preambleInfo.numberOfRA_Preambles -
rach_ConfigCommon->preambleInfo.
preamblesGroupAConfig->sizeOfRA_PreamblesGroupA);
UE_mac_inst[module_idP].RA_prach_resources.ra_RACH_MaskIndex =
0;
} }
} }
@@ -232,111 +269,148 @@ void get_prach_resources(module_id_t module_idP,
if (UE_mac_inst[module_idP].tdd_Config) { if (UE_mac_inst[module_idP].tdd_Config) {
num_prach = get_num_prach_tdd(module_idP); num_prach = get_num_prach_tdd(module_idP);
if ((num_prach>0) && (num_prach<6)) { if ((num_prach > 0) && (num_prach < 6)) {
UE_mac_inst[module_idP].RA_prach_resources.ra_TDD_map_index = (taus()%num_prach); UE_mac_inst[module_idP].RA_prach_resources.ra_TDD_map_index =
(taus() % num_prach);
} }
f_id = get_fid_prach_tdd(module_idP, f_id = get_fid_prach_tdd(module_idP,
UE_mac_inst[module_idP].RA_prach_resources.ra_TDD_map_index); UE_mac_inst
[module_idP].RA_prach_resources.
ra_TDD_map_index);
} }
// choose RA-RNTI // choose RA-RNTI
UE_mac_inst[module_idP].RA_prach_resources.ra_RNTI = 1 + t_id + 10*f_id; UE_mac_inst[module_idP].RA_prach_resources.ra_RNTI =
1 + t_id + 10 * f_id;
} }
void Msg1_transmitted(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8_t eNB_id) void
Msg1_transmitted(module_id_t module_idP, uint8_t CC_id,
frame_t frameP, uint8_t eNB_id)
{ {
AssertFatal(CC_id==0, AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n"); "Transmission on secondary CCs is not supported yet\n");
// start contention resolution timer // start contention resolution timer
UE_mac_inst[module_idP].RA_attempt_number++; UE_mac_inst[module_idP].RA_attempt_number++;
if (opt_enabled) { if (opt_enabled) {
trace_pdu(0, NULL, 0, module_idP, 0 , UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex, trace_pdu(0, NULL, 0, module_idP, 0,
UE_mac_inst[module_idP].txFrame, UE_mac_inst[module_idP].txSubframe, 0, UE_mac_inst[module_idP].RA_attempt_number); UE_mac_inst[module_idP].RA_prach_resources.
LOG_D(OPT,"[UE %d][RAPROC] TX MSG1 Frame %d trace pdu for rnti %x with size %d\n", ra_PreambleIndex, UE_mac_inst[module_idP].txFrame,
UE_mac_inst[module_idP].txSubframe, 0,
UE_mac_inst[module_idP].RA_attempt_number);
LOG_D(OPT,
"[UE %d][RAPROC] TX MSG1 Frame %d trace pdu for rnti %x with size %d\n",
module_idP, frameP, 1, UE_mac_inst[module_idP].RA_Msg3_size); module_idP, frameP, 1, UE_mac_inst[module_idP].RA_Msg3_size);
} }
} }
void Msg3_transmitted(module_id_t module_idP,uint8_t CC_id,frame_t frameP, uint8_t eNB_id) void
Msg3_transmitted(module_id_t module_idP, uint8_t CC_id,
frame_t frameP, uint8_t eNB_id)
{ {
AssertFatal(CC_id==0, AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n"); "Transmission on secondary CCs is not supported yet\n");
// start contention resolution timer // start contention resolution timer
LOG_D(MAC,"[UE %d][RAPROC] Frame %d : Msg3_tx: Setting contention resolution timer\n",module_idP,frameP); LOG_D(MAC,
"[UE %d][RAPROC] Frame %d : Msg3_tx: Setting contention resolution timer\n",
module_idP, frameP);
UE_mac_inst[module_idP].RA_contention_resolution_cnt = 0; UE_mac_inst[module_idP].RA_contention_resolution_cnt = 0;
UE_mac_inst[module_idP].RA_contention_resolution_timer_active = 1; UE_mac_inst[module_idP].RA_contention_resolution_timer_active = 1;
if (opt_enabled) { // msg3 if (opt_enabled) { // msg3
trace_pdu(0, &UE_mac_inst[module_idP].CCCH_pdu.payload[0], UE_mac_inst[module_idP].RA_Msg3_size, trace_pdu(0, &UE_mac_inst[module_idP].CCCH_pdu.payload[0],
module_idP, 3, UE_mac_inst[module_idP].crnti, UE_mac_inst[module_idP].txFrame, UE_mac_inst[module_idP].txSubframe, 0, 0); UE_mac_inst[module_idP].RA_Msg3_size, module_idP, 3,
LOG_D(OPT,"[UE %d][RAPROC] MSG3 Frame %d trace pdu Preamble %d with size %d\n", UE_mac_inst[module_idP].crnti,
module_idP, frameP, UE_mac_inst[module_idP].crnti /*UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex*/, UE_mac_inst[module_idP].RA_Msg3_size); UE_mac_inst[module_idP].txFrame,
UE_mac_inst[module_idP].txSubframe, 0, 0);
LOG_D(OPT,
"[UE %d][RAPROC] MSG3 Frame %d trace pdu Preamble %d with size %d\n",
module_idP, frameP, UE_mac_inst[module_idP].crnti
/*UE_mac_inst[module_idP].RA_prach_resources.ra_PreambleIndex */
, UE_mac_inst[module_idP].RA_Msg3_size);
} }
} }
PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP,int CC_id,frame_t frameP, uint8_t eNB_indexP,sub_frame_t subframeP) PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP, int CC_id,
frame_t frameP, uint8_t eNB_indexP,
sub_frame_t subframeP)
{ {
uint8_t Size = 0; uint8_t Size = 0;
UE_MODE_t UE_mode = get_ue_mode(module_idP,0,eNB_indexP); UE_MODE_t UE_mode = get_ue_mode(module_idP, 0, eNB_indexP);
uint8_t lcid = CCCH; uint8_t lcid = CCCH;
uint16_t Size16; uint16_t Size16;
struct RACH_ConfigCommon *rach_ConfigCommon = (struct RACH_ConfigCommon *)NULL; struct RACH_ConfigCommon *rach_ConfigCommon =
(struct RACH_ConfigCommon *) NULL;
int32_t frame_diff = 0; int32_t frame_diff = 0;
mac_rlc_status_resp_t rlc_status; mac_rlc_status_resp_t rlc_status;
uint8_t dcch_header_len = 0; uint8_t dcch_header_len = 0;
uint16_t sdu_lengths[8]; uint16_t sdu_lengths[8];
uint8_t ulsch_buff[MAX_ULSCH_PAYLOAD_BYTES]; uint8_t ulsch_buff[MAX_ULSCH_PAYLOAD_BYTES];
AssertFatal(CC_id==0, AssertFatal(CC_id == 0,
"Transmission on secondary CCs is not supported yet\n"); "Transmission on secondary CCs is not supported yet\n");
if (UE_mode == PRACH) { if (UE_mode == PRACH) {
if (UE_mac_inst[module_idP].radioResourceConfigCommon) { if (UE_mac_inst[module_idP].radioResourceConfigCommon) {
rach_ConfigCommon = &UE_mac_inst[module_idP].radioResourceConfigCommon->rach_ConfigCommon; rach_ConfigCommon =
&UE_mac_inst[module_idP].
radioResourceConfigCommon->rach_ConfigCommon;
} else { } else {
return(NULL); return (NULL);
} }
if (UE_mac_inst[module_idP].RA_active == 0) { if (UE_mac_inst[module_idP].RA_active == 0) {
LOG_I(MAC,"RA not active\n"); LOG_I(MAC, "RA not active\n");
// check if RRC is ready to initiate the RA procedure // check if RRC is ready to initiate the RA procedure
Size = mac_rrc_data_req(module_idP, Size = mac_rrc_data_req(module_idP,
CC_id, CC_id,
frameP, frameP,
CCCH,1, CCCH, 1,
&UE_mac_inst[module_idP].CCCH_pdu.payload[sizeof(SCH_SUBHEADER_SHORT)+1],0, &UE_mac_inst[module_idP].
eNB_indexP, CCCH_pdu.payload[sizeof
(SCH_SUBHEADER_SHORT)
+ 1], 0, eNB_indexP,
0); 0);
Size16 = (uint16_t)Size; Size16 = (uint16_t) Size;
// LOG_D(MAC,"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",module_idP,frameP,Size); // LOG_D(MAC,"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",module_idP,frameP,Size);
LOG_I(RRC, "[MSC_MSG][FRAME %05d][RRC_UE][MOD %02d][][--- MAC_DATA_REQ (RRCConnectionRequest eNB %d) --->][MAC_UE][MOD %02d][]\n", LOG_I(RRC,
"[MSC_MSG][FRAME %05d][RRC_UE][MOD %02d][][--- MAC_DATA_REQ (RRCConnectionRequest eNB %d) --->][MAC_UE][MOD %02d][]\n",
frameP, module_idP, eNB_indexP, module_idP); frameP, module_idP, eNB_indexP, module_idP);
LOG_I(MAC,"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",module_idP,frameP,Size); LOG_I(MAC,
"[UE %d] Frame %d: Requested RRCConnectionRequest, got %d bytes\n",
module_idP, frameP, Size);
if (Size>0) { if (Size > 0) {
UE_mac_inst[module_idP].RA_active = 1; UE_mac_inst[module_idP].RA_active = 1;
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER = 1; UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER =
UE_mac_inst[module_idP].RA_Msg3_size = Size+sizeof(SCH_SUBHEADER_SHORT)+sizeof(SCH_SUBHEADER_SHORT); 1;
UE_mac_inst[module_idP].RA_Msg3_size =
Size + sizeof(SCH_SUBHEADER_SHORT) +
sizeof(SCH_SUBHEADER_SHORT);
UE_mac_inst[module_idP].RA_prachMaskIndex = 0; UE_mac_inst[module_idP].RA_prachMaskIndex = 0;
UE_mac_inst[module_idP].RA_prach_resources.Msg3 = UE_mac_inst[module_idP].CCCH_pdu.payload; UE_mac_inst[module_idP].RA_prach_resources.Msg3 =
UE_mac_inst[module_idP].CCCH_pdu.payload;
UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator) UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator)
AssertFatal(rach_ConfigCommon!=NULL, AssertFatal(rach_ConfigCommon != NULL,
"[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",module_idP,frameP); "[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize; module_idP, frameP);
UE_mac_inst[module_idP].RA_window_cnt =
2 +
rach_ConfigCommon->ra_SupervisionInfo.
ra_ResponseWindowSize;
if (UE_mac_inst[module_idP].RA_window_cnt == 9) { if (UE_mac_inst[module_idP].RA_window_cnt == 9) {
UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10! UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10!
@@ -347,9 +421,10 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP,int CC_id,frame_t frameP,
UE_mac_inst[module_idP].RA_backoff_frame = frameP; UE_mac_inst[module_idP].RA_backoff_frame = frameP;
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP; UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
// Fill in preamble and PRACH resource // Fill in preamble and PRACH resource
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,1,NULL); get_prach_resources(module_idP, CC_id, eNB_indexP,
subframeP, 1, NULL);
generate_ulsch_header((uint8_t*)&UE_mac_inst[module_idP].CCCH_pdu.payload[0], // mac header generate_ulsch_header((uint8_t *) & UE_mac_inst[module_idP].CCCH_pdu.payload[0], // mac header
1, // num sdus 1, // num sdus
0, // short pading 0, // short pading
&Size16, // sdu length &Size16, // sdu length
@@ -360,47 +435,69 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP,int CC_id,frame_t frameP,
NULL, // short bsr NULL, // short bsr
NULL, // long_bsr NULL, // long_bsr
1); //post_padding 1); //post_padding
return(&UE_mac_inst[module_idP].RA_prach_resources); return (&UE_mac_inst[module_idP].RA_prach_resources);
} else if (UE_mac_inst[module_idP].scheduling_info.BSR_bytes[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]] > 0) { } else if (UE_mac_inst[module_idP].
scheduling_info.BSR_bytes[UE_mac_inst[module_idP].
scheduling_info.LCGID
[DCCH]] > 0) {
// This is for triggering a transmission on DCCH using PRACH (during handover, or sending SR for example) // This is for triggering a transmission on DCCH using PRACH (during handover, or sending SR for example)
dcch_header_len = 2 + 2; /// SHORT Subheader + C-RNTI control element dcch_header_len = 2 + 2; /// SHORT Subheader + C-RNTI control element
rlc_status = mac_rlc_status_ind(module_idP,UE_mac_inst[module_idP].crnti, eNB_indexP,frameP,subframeP,ENB_FLAG_NO,MBMS_FLAG_NO, rlc_status =
DCCH, mac_rlc_status_ind(module_idP,
6); UE_mac_inst[module_idP].crnti,
eNB_indexP, frameP, subframeP,
ENB_FLAG_NO, MBMS_FLAG_NO, DCCH, 6);
if (UE_mac_inst[module_idP].crnti_before_ho) if (UE_mac_inst[module_idP].crnti_before_ho)
LOG_D(MAC, LOG_D(MAC,
"[UE %d] Frame %d : UL-DCCH -> ULSCH, HO RRCConnectionReconfigurationComplete (%x, %x), RRC message has %d bytes to send throug PRACH (mac header len %d)\n", "[UE %d] Frame %d : UL-DCCH -> ULSCH, HO RRCConnectionReconfigurationComplete (%x, %x), RRC message has %d bytes to send throug PRACH (mac header len %d)\n",
module_idP,frameP, UE_mac_inst[module_idP].crnti,UE_mac_inst[module_idP].crnti_before_ho, rlc_status.bytes_in_buffer,dcch_header_len); module_idP, frameP,
UE_mac_inst[module_idP].crnti,
UE_mac_inst[module_idP].crnti_before_ho,
rlc_status.bytes_in_buffer, dcch_header_len);
else else
LOG_D(MAC,"[UE %d] Frame %d : UL-DCCH -> ULSCH, RRC message has %d bytes to send through PRACH(mac header len %d)\n", LOG_D(MAC,
module_idP,frameP, rlc_status.bytes_in_buffer,dcch_header_len); "[UE %d] Frame %d : UL-DCCH -> ULSCH, RRC message has %d bytes to send through PRACH(mac header len %d)\n",
module_idP, frameP, rlc_status.bytes_in_buffer,
dcch_header_len);
sdu_lengths[0] = mac_rlc_data_req(module_idP, UE_mac_inst[module_idP].crnti, sdu_lengths[0] = mac_rlc_data_req(module_idP, UE_mac_inst[module_idP].crnti, eNB_indexP, frameP, ENB_FLAG_NO, MBMS_FLAG_NO, DCCH, 6, //not used
eNB_indexP, frameP,ENB_FLAG_NO, MBMS_FLAG_NO, (char *) &ulsch_buff[0]);
DCCH,
6, //not used
(char *)&ulsch_buff[0]);
LOG_D(MAC,"[UE %d] TX Got %d bytes for DCCH\n",module_idP,sdu_lengths[0]); LOG_D(MAC, "[UE %d] TX Got %d bytes for DCCH\n",
update_bsr(module_idP, frameP, subframeP,eNB_indexP); module_idP, sdu_lengths[0]);
UE_mac_inst[module_idP].scheduling_info.BSR[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]] = update_bsr(module_idP, frameP, subframeP, eNB_indexP);
locate_BsrIndexByBufferSize(BSR_TABLE, BSR_TABLE_SIZE, UE_mac_inst[module_idP].scheduling_info.BSR_bytes[UE_mac_inst[module_idP].scheduling_info.LCGID[DCCH]]); UE_mac_inst[module_idP].
scheduling_info.BSR[UE_mac_inst[module_idP].
scheduling_info.LCGID[DCCH]] =
locate_BsrIndexByBufferSize(BSR_TABLE, BSR_TABLE_SIZE,
UE_mac_inst
[module_idP].scheduling_info.BSR_bytes
[UE_mac_inst
[module_idP].scheduling_info.LCGID
[DCCH]]);
//TO DO: fill BSR infos in UL TBS //TO DO: fill BSR infos in UL TBS
//header_len +=2; //header_len +=2;
UE_mac_inst[module_idP].RA_active = 1; UE_mac_inst[module_idP].RA_active = 1;
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER = 1; UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER =
UE_mac_inst[module_idP].RA_Msg3_size = Size+dcch_header_len; 1;
UE_mac_inst[module_idP].RA_Msg3_size =
Size + dcch_header_len;
UE_mac_inst[module_idP].RA_prachMaskIndex = 0; UE_mac_inst[module_idP].RA_prachMaskIndex = 0;
UE_mac_inst[module_idP].RA_prach_resources.Msg3 = ulsch_buff; UE_mac_inst[module_idP].RA_prach_resources.Msg3 =
ulsch_buff;
UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator) UE_mac_inst[module_idP].RA_backoff_cnt = 0; // add the backoff condition here if we have it from a previous RA reponse which failed (i.e. backoff indicator)
AssertFatal(rach_ConfigCommon!=NULL, AssertFatal(rach_ConfigCommon != NULL,
"[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",module_idP,frameP); "[UE %d] FATAL Frame %d: rach_ConfigCommon is NULL !!!\n",
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize; module_idP, frameP);
UE_mac_inst[module_idP].RA_window_cnt =
2 +
rach_ConfigCommon->ra_SupervisionInfo.
ra_ResponseWindowSize;
if (UE_mac_inst[module_idP].RA_window_cnt == 9) { if (UE_mac_inst[module_idP].RA_window_cnt == 9) {
UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10! UE_mac_inst[module_idP].RA_window_cnt = 10; // Note: 9 subframe window doesn't exist, after 8 is 10!
@@ -412,8 +509,9 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP,int CC_id,frame_t frameP,
UE_mac_inst[module_idP].RA_backoff_frame = frameP; UE_mac_inst[module_idP].RA_backoff_frame = frameP;
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP; UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
// Fill in preamble and PRACH resource // Fill in preamble and PRACH resource
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,1,NULL); get_prach_resources(module_idP, CC_id, eNB_indexP,
generate_ulsch_header((uint8_t*)ulsch_buff, // mac header subframeP, 1, NULL);
generate_ulsch_header((uint8_t *) ulsch_buff, // mac header
1, // num sdus 1, // num sdus
0, // short pading 0, // short pading
&Size16, // sdu length &Size16, // sdu length
@@ -425,50 +523,62 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP,int CC_id,frame_t frameP,
NULL, // long_bsr NULL, // long_bsr
0); //post_padding 0); //post_padding
return(&UE_mac_inst[module_idP].RA_prach_resources); return (&UE_mac_inst[module_idP].RA_prach_resources);
} }
} else { // RACH is active } else { // RACH is active
LOG_D(MAC,"[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n",module_idP, LOG_D(MAC,
frameP,subframeP,UE_mac_inst[module_idP].RA_window_cnt, "[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, window cnt %d (RA_tx_frame %d, RA_tx_subframe %d)\n",
UE_mac_inst[module_idP].RA_tx_frame,UE_mac_inst[module_idP].RA_tx_subframe); module_idP, frameP, subframeP,
UE_mac_inst[module_idP].RA_window_cnt,
UE_mac_inst[module_idP].RA_tx_frame,
UE_mac_inst[module_idP].RA_tx_subframe);
// compute backoff parameters // compute backoff parameters
if (UE_mac_inst[module_idP].RA_backoff_cnt>0) { if (UE_mac_inst[module_idP].RA_backoff_cnt > 0) {
frame_diff = (sframe_t)frameP - UE_mac_inst[module_idP].RA_backoff_frame; frame_diff =
(sframe_t) frameP -
UE_mac_inst[module_idP].RA_backoff_frame;
if (frame_diff < 0) { if (frame_diff < 0) {
frame_diff = -frame_diff; frame_diff = -frame_diff;
} }
UE_mac_inst[module_idP].RA_backoff_cnt -= ((10*frame_diff) + (subframeP-UE_mac_inst[module_idP].RA_backoff_subframe)); UE_mac_inst[module_idP].RA_backoff_cnt -=
((10 * frame_diff) +
(subframeP -
UE_mac_inst[module_idP].RA_backoff_subframe));
UE_mac_inst[module_idP].RA_backoff_frame = frameP; UE_mac_inst[module_idP].RA_backoff_frame = frameP;
UE_mac_inst[module_idP].RA_backoff_subframe = subframeP; UE_mac_inst[module_idP].RA_backoff_subframe = subframeP;
} }
// compute RA window parameters // compute RA window parameters
if (UE_mac_inst[module_idP].RA_window_cnt>0) { if (UE_mac_inst[module_idP].RA_window_cnt > 0) {
frame_diff = (frame_t)frameP - UE_mac_inst[module_idP].RA_tx_frame; frame_diff =
(frame_t) frameP - UE_mac_inst[module_idP].RA_tx_frame;
if (frame_diff < 0) { if (frame_diff < 0) {
frame_diff = -frame_diff; frame_diff = -frame_diff;
} }
UE_mac_inst[module_idP].RA_window_cnt -= ((10*frame_diff) + (subframeP-UE_mac_inst[module_idP].RA_tx_subframe)); UE_mac_inst[module_idP].RA_window_cnt -=
LOG_D(MAC,"[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, adjusted window cnt %d\n",module_idP, ((10 * frame_diff) +
frameP,subframeP,UE_mac_inst[module_idP].RA_window_cnt); (subframeP - UE_mac_inst[module_idP].RA_tx_subframe));
LOG_D(MAC,
"[MAC][UE %d][RAPROC] frameP %d, subframe %d: RA Active, adjusted window cnt %d\n",
module_idP, frameP, subframeP,
UE_mac_inst[module_idP].RA_window_cnt);
} }
if ((UE_mac_inst[module_idP].RA_window_cnt<=0) && if ((UE_mac_inst[module_idP].RA_window_cnt <= 0) &&
(UE_mac_inst[module_idP].RA_backoff_cnt<=0)) { (UE_mac_inst[module_idP].RA_backoff_cnt <= 0)) {
UE_mac_inst[module_idP].RA_tx_frame = frameP; UE_mac_inst[module_idP].RA_tx_frame = frameP;
UE_mac_inst[module_idP].RA_tx_subframe = subframeP; UE_mac_inst[module_idP].RA_tx_subframe = subframeP;
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER++; UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER++;
UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER += UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER += (rach_ConfigCommon->powerRampingParameters.powerRampingStep << 1); // 2dB increments in ASN.1 definition
(rach_ConfigCommon->powerRampingParameters.powerRampingStep<<1); // 2dB increments in ASN.1 definition
int preambleTransMax = -1; int preambleTransMax = -1;
switch (rach_ConfigCommon->ra_SupervisionInfo.preambleTransMax) { switch (rach_ConfigCommon->ra_SupervisionInfo.
preambleTransMax) {
case PreambleTransMax_n3: case PreambleTransMax_n3:
preambleTransMax = 3; preambleTransMax = 3;
break; break;
@@ -504,25 +614,37 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP,int CC_id,frame_t frameP,
break; break;
} }
if (UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER == preambleTransMax) { if (UE_mac_inst[module_idP].
LOG_D(MAC,"[UE %d] Frame %d: Maximum number of RACH attempts (%d)\n",module_idP,frameP,preambleTransMax); RA_PREAMBLE_TRANSMISSION_COUNTER == preambleTransMax) {
LOG_D(MAC,
"[UE %d] Frame %d: Maximum number of RACH attempts (%d)\n",
module_idP, frameP, preambleTransMax);
// send message to RRC // send message to RRC
UE_mac_inst[module_idP].RA_PREAMBLE_TRANSMISSION_COUNTER=1; UE_mac_inst[module_idP].
UE_mac_inst[module_idP].RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER = get_Po_NOMINAL_PUSCH(module_idP,CC_id); RA_PREAMBLE_TRANSMISSION_COUNTER = 1;
UE_mac_inst[module_idP].
RA_prach_resources.ra_PREAMBLE_RECEIVED_TARGET_POWER
= get_Po_NOMINAL_PUSCH(module_idP, CC_id);
} }
UE_mac_inst[module_idP].RA_window_cnt = 2+ rach_ConfigCommon->ra_SupervisionInfo.ra_ResponseWindowSize; UE_mac_inst[module_idP].RA_window_cnt =
2 +
rach_ConfigCommon->ra_SupervisionInfo.
ra_ResponseWindowSize;
UE_mac_inst[module_idP].RA_backoff_cnt = 0; UE_mac_inst[module_idP].RA_backoff_cnt = 0;
// Fill in preamble and PRACH resource // Fill in preamble and PRACH resource
get_prach_resources(module_idP,CC_id,eNB_indexP,subframeP,0,NULL); get_prach_resources(module_idP, CC_id, eNB_indexP,
return(&UE_mac_inst[module_idP].RA_prach_resources); subframeP, 0, NULL);
return (&UE_mac_inst[module_idP].RA_prach_resources);
} }
} }
} else if (UE_mode == PUSCH) { } else if (UE_mode == PUSCH) {
LOG_D(MAC,"[UE %d] FATAL: Should not have checked for RACH in PUSCH yet ...",module_idP); LOG_D(MAC,
AssertFatal(1==0,""); "[UE %d] FATAL: Should not have checked for RACH in PUSCH yet ...",
module_idP);
AssertFatal(1 == 0, "");
} }
return(NULL); return (NULL);
} }
openair2/LAYER2/MAC/rar_tools.c
+113 -136
View File
@@ -47,185 +47,151 @@ extern unsigned short RIV2first_rb_LUT25[512];
extern RAN_CONTEXT_t RC; extern RAN_CONTEXT_t RC;
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
unsigned short fill_rar( unsigned short
const module_id_t module_idP, fill_rar(const module_id_t module_idP,
const int CC_id, const int CC_id,
RA_t * ra,
const frame_t frameP, const frame_t frameP,
uint8_t* const dlsch_buffer, uint8_t * const dlsch_buffer,
const uint16_t N_RB_UL, const uint16_t N_RB_UL, const uint8_t input_buffer_length)
const uint8_t input_buffer_length
)
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
{ {
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer; RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1); uint8_t *rar = (uint8_t *) (dlsch_buffer + 1);
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i,ra_idx = -1;
RA_TEMPLATE *RA_template;
AssertFatal(CC_id < MAX_NUM_CCs, "CC_id %u < MAX_NUM_CCs %u", CC_id, MAX_NUM_CCs);
for (i=0; i<NB_RA_PROC_MAX; i++) {
if (RC.mac[module_idP]->common_channels[CC_id].RA_template[i].generate_rar == 1) {
ra_idx=i;
RC.mac[module_idP]->common_channels[CC_id].RA_template[i].generate_rar = 0;
break;
}
}
RA_template = &RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx];
//DevAssert( ra_idx != -1 );
if (ra_idx==-1)
return(0);
// subheader fixed // subheader fixed
rarh->E = 0; // First and last RAR rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = RA_template->preamble_index; // Respond to Preamble 0 only for the moment rarh->RAPID = ra->preamble_index; // Respond to Preamble 0 only for the moment
rar[4] = (uint8_t)(RA_template->rnti>>8); rar[4] = (uint8_t) (ra->rnti >> 8);
rar[5] = (uint8_t)(RA_template->rnti&0xff); rar[5] = (uint8_t) (ra->rnti & 0xff);
//RA_template->timing_offset = 0; //ra->timing_offset = 0;
RA_template->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RA_template->timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4 rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RA_template->timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4 rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
RA_template->msg3_first_rb=6; ra->msg3_first_rb = 6;
RA_template->msg3_nb_rb=1; ra->msg3_nb_rb = 1;
uint16_t rballoc = mac_computeRIV(N_RB_UL,RA_template->msg3_first_rb,RA_template->msg3_nb_rb); // first PRB only for UL Grant uint16_t rballoc = mac_computeRIV(N_RB_UL, ra->msg3_first_rb, ra->msg3_nb_rb); // first PRB only for UL Grant
rar[1] |= (rballoc>>7)&7; // Hopping = 0 (bit 3), 3 MSBs of rballoc rar[1] |= (rballoc >> 7) & 7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
rar[2] = ((uint8_t)(rballoc&0xff))<<1; // 7 LSBs of rballoc rar[2] = ((uint8_t) (rballoc & 0xff)) << 1; // 7 LSBs of rballoc
RA_template->msg3_mcs = 10; ra->msg3_mcs = 10;
RA_template->msg3_TPC = 3; ra->msg3_TPC = 3;
RA_template->msg3_ULdelay = 0; ra->msg3_ULdelay = 0;
RA_template->msg3_cqireq = 0; ra->msg3_cqireq = 0;
rar[2] |= ((RA_template->msg3_mcs&0x8)>>3); // mcs 10 rar[2] |= ((ra->msg3_mcs & 0x8) >> 3); // mcs 10
rar[3] = (((RA_template->msg3_mcs&0x7)<<5)) | ((RA_template->msg3_TPC&7)<<2) | ((RA_template->msg3_ULdelay&1)<<1) | (RA_template->msg3_cqireq&1); rar[3] =
(((ra->msg3_mcs & 0x7) << 5)) | ((ra->msg3_TPC & 7) << 2) |
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Generating RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ra_idx %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n", ((ra->msg3_ULdelay & 1) << 1) | (ra->msg3_cqireq & 1);
module_idP, CC_id,
frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
ra_idx,
RA_template->rnti,
rarh->RAPID,RC.mac[module_idP]->common_channels[CC_id].RA_template[0].preamble_index,
RA_template->timing_offset);
if (opt_enabled) { if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, module_idP, 2, 1, trace_pdu(1, dlsch_buffer, input_buffer_length, module_idP, 2, 1,
RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe, 0, 0); RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe,
LOG_D(OPT,"[eNB %d][RAPROC] CC_id %d RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n", 0, 0);
module_idP, CC_id, frameP, RA_template->rnti, LOG_D(OPT,
rarh->RAPID, input_buffer_length); "[eNB %d][RAPROC] CC_id %d RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
module_idP, CC_id, frameP, ra->rnti, rarh->RAPID,
input_buffer_length);
} }
return(RA_template->rnti); return (ra->rnti);
} }
#ifdef Rel14 #ifdef Rel14
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
unsigned short fill_rar_br(eNB_MAC_INST *eNB, unsigned short
fill_rar_br(eNB_MAC_INST * eNB,
int CC_id, int CC_id,
RA_TEMPLATE *RA_template, RA_t * ra,
const frame_t frameP, const frame_t frameP,
const sub_frame_t subframeP, const sub_frame_t subframeP,
uint8_t* const dlsch_buffer, uint8_t * const dlsch_buffer, const uint8_t ce_level)
const uint8_t ce_level
)
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
{ {
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer; RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
COMMON_channels_t *cc = &eNB->common_channels[CC_id]; COMMON_channels_t *cc = &eNB->common_channels[CC_id];
uint8_t *rar = (uint8_t *)(dlsch_buffer+1); uint8_t *rar = (uint8_t *) (dlsch_buffer + 1);
// uint8_t nb,reps; // uint8_t nb,reps;
uint8_t rballoc; uint8_t rballoc;
uint8_t mcs,TPC,ULdelay,cqireq; uint8_t mcs, TPC, ULdelay, cqireq;
int input_buffer_length; int input_buffer_length;
AssertFatal(RA_template != NULL, "RA is null \n"); AssertFatal(ra != NULL, "RA is null \n");
// subheader fixed // subheader fixed
rarh->E = 0; // First and last RAR rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = RA_template->preamble_index; // Respond to Preamble 0 only for the moment rarh->RAPID = ra->preamble_index; // Respond to Preamble 0 only for the moment
RA_template->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RA_template->timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4 rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RA_template->timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4 rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
int N_NB_index; int N_NB_index;
AssertFatal(1==0,"RAR for BL/CE Still to be finished ...\n"); AssertFatal(1 == 0, "RAR for BL/CE Still to be finished ...\n");
// Copy the Msg2 narrowband // Copy the Msg2 narrowband
RA_template->msg34_narrowband = RA_template->msg2_narrowband; ra->msg34_narrowband = ra->msg2_narrowband;
if (ce_level<2) { //CE Level 0,1, CEmodeA if (ce_level < 2) { //CE Level 0,1, CEmodeA
input_buffer_length =6; input_buffer_length = 6;
N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth); N_NB_index = get_numnarrowbandbits(cc->mib->message.dl_Bandwidth);
rar[4] = (uint8_t)(RA_template->rnti>>8); rar[4] = (uint8_t) (ra->rnti >> 8);
rar[5] = (uint8_t)(RA_template->rnti&0xff); rar[5] = (uint8_t) (ra->rnti & 0xff);
//cc->RA_template[ra_idx].timing_offset = 0; //cc->ra[ra_idx].timing_offset = 0;
// nb = 0; // nb = 0;
rballoc = mac_computeRIV(6,1+ce_level,1); // one PRB only for UL Grant in position 1+ce_level within Narrowband rballoc = mac_computeRIV(6, 1 + ce_level, 1); // one PRB only for UL Grant in position 1+ce_level within Narrowband
rar[1] |= (rballoc&15)<<(4-N_NB_index); // Hopping = 0 (bit 3), 3 MSBs of rballoc rar[1] |= (rballoc & 15) << (4 - N_NB_index); // Hopping = 0 (bit 3), 3 MSBs of rballoc
// reps = 4; // reps = 4;
mcs = 7; mcs = 7;
TPC = 3; // no power increase TPC = 3; // no power increase
ULdelay = 0; ULdelay = 0;
cqireq = 0; cqireq = 0;
rar[2] |= ((mcs&0x8)>>3); // mcs 10 rar[2] |= ((mcs & 0x8) >> 3); // mcs 10
rar[3] = (((mcs&0x7)<<5)) | ((TPC&7)<<2) | ((ULdelay&1)<<1) | (cqireq&1); rar[3] =
} (((mcs & 0x7) << 5)) | ((TPC & 7) << 2) | ((ULdelay & 1) << 1)
else { // CE level 2,3 => CEModeB | (cqireq & 1);
} else { // CE level 2,3 => CEModeB
input_buffer_length =5; input_buffer_length = 5;
rar[3] = (uint8_t)(RA_template->rnti>>8); rar[3] = (uint8_t) (ra->rnti >> 8);
rar[4] = (uint8_t)(RA_template->rnti&0xff); rar[4] = (uint8_t) (ra->rnti & 0xff);
} }
LOG_D(MAC,"[RAPROC] Frame %d Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n", LOG_D(MAC,
frameP, "[RAPROC] Frame %d Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5], frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2], rar[3],
ce_level, rar[4], rar[5], ce_level, ra->rnti, rarh->RAPID,
RA_template->rnti, ra->preamble_index, ra->timing_offset);
rarh->RAPID,RA_template->preamble_index,
RA_template->timing_offset);
if (opt_enabled) { if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, eNB->Mod_id, 2, 1, trace_pdu(1, dlsch_buffer, input_buffer_length, eNB->Mod_id, 2, 1,
eNB->frame, eNB->subframe, 0, 0); eNB->frame, eNB->subframe, 0, 0);
LOG_D(OPT,"[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n", LOG_D(OPT,
frameP, RA_template->rnti, "[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
rarh->RAPID, input_buffer_length); frameP, ra->rnti, rarh->RAPID, input_buffer_length);
} }
return(RA_template->rnti); return (ra->rnti);
} }
#endif #endif
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
uint16_t uint16_t ue_process_rar(const module_id_t module_idP, const int CC_id, const frame_t frameP, const rnti_t ra_rnti, uint8_t * const dlsch_buffer, rnti_t * const t_crnti, const uint8_t preamble_index, uint8_t * selected_rar_buffer // output argument for storing the selected RAR header and RAR payload
ue_process_rar( )
const module_id_t module_idP,
const int CC_id,
const frame_t frameP,
const rnti_t ra_rnti,
uint8_t* const dlsch_buffer,
rnti_t* const t_crnti,
const uint8_t preamble_index,
uint8_t* selected_rar_buffer // output argument for storing the selected RAR header and RAR payload
)
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
{ {
uint16_t ret = 0; // return value uint16_t ret = 0; // return value
RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *)dlsch_buffer; RA_HEADER_RAPID *rarh = (RA_HEADER_RAPID *) dlsch_buffer;
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1); // RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *)(dlsch_buffer+1); uint8_t *rar = (uint8_t *) (dlsch_buffer + 1);
// get the last RAR payload for working with CMW500 // get the last RAR payload for working with CMW500
uint8_t n_rarpy = 0; // number of RAR payloads uint8_t n_rarpy = 0; // number of RAR payloads
@@ -239,69 +205,80 @@ ue_process_rar(
} }
if (rarh->RAPID == preamble_index) { if (rarh->RAPID == preamble_index) {
LOG_D(PHY, "Found RAR with the intended RAPID %d\n", rarh->RAPID); LOG_D(PHY, "Found RAR with the intended RAPID %d\n",
rar = (uint8_t *)(dlsch_buffer+n_rarh + (n_rarpy-1)*6); rarh->RAPID);
rar = (uint8_t *) (dlsch_buffer + n_rarh + (n_rarpy - 1) * 6);
break; break;
} }
if (abs((int)rarh->RAPID - (int)preamble_index) < abs((int)best_rx_rapid - (int)preamble_index)) { if (abs((int) rarh->RAPID - (int) preamble_index) <
abs((int) best_rx_rapid - (int) preamble_index)) {
best_rx_rapid = rarh->RAPID; best_rx_rapid = rarh->RAPID;
rar = (uint8_t *)(dlsch_buffer+n_rarh + (n_rarpy-1)*6); rar = (uint8_t *) (dlsch_buffer + n_rarh + (n_rarpy - 1) * 6);
} }
if (rarh->E == 0) { if (rarh->E == 0) {
LOG_I(PHY, "No RAR found with the intended RAPID. The closest RAPID in all RARs is %d\n", best_rx_rapid); LOG_I(PHY,
"No RAR found with the intended RAPID. The closest RAPID in all RARs is %d\n",
best_rx_rapid);
break; break;
} else { } else {
rarh++; rarh++;
} }
}; };
LOG_D(MAC, "number of RAR subheader %d; number of RAR pyloads %d\n", n_rarh, n_rarpy); LOG_D(MAC, "number of RAR subheader %d; number of RAR pyloads %d\n",
n_rarh, n_rarpy);
if (CC_id>0) { if (CC_id > 0) {
LOG_W(MAC,"Should not have received RAR on secondary CCs! \n"); LOG_W(MAC, "Should not have received RAR on secondary CCs! \n");
return(0xffff); return (0xffff);
} }
LOG_I(MAC,"[eNB %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",module_idP,frameP, LOG_I(MAC,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5], "[eNB %d][RAPROC] Frame %d Received RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for preamble %d/%d\n",
rarh->RAPID,preamble_index); module_idP, frameP, *(uint8_t *) rarh, rar[0], rar[1], rar[2],
rar[3], rar[4], rar[5], rarh->RAPID, preamble_index);
#ifdef DEBUG_RAR #ifdef DEBUG_RAR
LOG_D(MAC,"[UE %d][RAPROC] rarh->E %d\n",module_idP,rarh->E); LOG_D(MAC, "[UE %d][RAPROC] rarh->E %d\n", module_idP, rarh->E);
LOG_D(MAC,"[UE %d][RAPROC] rarh->T %d\n",module_idP,rarh->T); LOG_D(MAC, "[UE %d][RAPROC] rarh->T %d\n", module_idP, rarh->T);
LOG_D(MAC,"[UE %d][RAPROC] rarh->RAPID %d\n",module_idP,rarh->RAPID); LOG_D(MAC, "[UE %d][RAPROC] rarh->RAPID %d\n", module_idP,
rarh->RAPID);
// LOG_I(MAC,"[UE %d][RAPROC] rar->R %d\n",module_idP,rar->R); // LOG_I(MAC,"[UE %d][RAPROC] rar->R %d\n",module_idP,rar->R);
LOG_D(MAC,"[UE %d][RAPROC] rar->Timing_Advance_Command %d\n",module_idP,(((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4)); LOG_D(MAC, "[UE %d][RAPROC] rar->Timing_Advance_Command %d\n",
module_idP, (((uint16_t) (rar[0] & 0x7f)) << 4) + (rar[1] >> 4));
// LOG_I(MAC,"[UE %d][RAPROC] rar->hopping_flag %d\n",module_idP,rar->hopping_flag); // LOG_I(MAC,"[UE %d][RAPROC] rar->hopping_flag %d\n",module_idP,rar->hopping_flag);
// LOG_I(MAC,"[UE %d][RAPROC] rar->rb_alloc %d\n",module_idP,rar->rb_alloc); // LOG_I(MAC,"[UE %d][RAPROC] rar->rb_alloc %d\n",module_idP,rar->rb_alloc);
// LOG_I(MAC,"[UE %d][RAPROC] rar->mcs %d\n",module_idP,rar->mcs); // LOG_I(MAC,"[UE %d][RAPROC] rar->mcs %d\n",module_idP,rar->mcs);
// LOG_I(MAC,"[UE %d][RAPROC] rar->TPC %d\n",module_idP,rar->TPC); // LOG_I(MAC,"[UE %d][RAPROC] rar->TPC %d\n",module_idP,rar->TPC);
// LOG_I(MAC,"[UE %d][RAPROC] rar->UL_delay %d\n",module_idP,rar->UL_delay); // LOG_I(MAC,"[UE %d][RAPROC] rar->UL_delay %d\n",module_idP,rar->UL_delay);
// LOG_I(MAC,"[UE %d][RAPROC] rar->cqi_req %d\n",module_idP,rar->cqi_req); // LOG_I(MAC,"[UE %d][RAPROC] rar->cqi_req %d\n",module_idP,rar->cqi_req);
LOG_D(MAC,"[UE %d][RAPROC] rar->t_crnti %x\n",module_idP,(uint16_t)rar[5]+(rar[4]<<8)); LOG_D(MAC, "[UE %d][RAPROC] rar->t_crnti %x\n", module_idP,
(uint16_t) rar[5] + (rar[4] << 8));
#endif #endif
if (opt_enabled) { if (opt_enabled) {
LOG_D(OPT,"[UE %d][RAPROC] CC_id %d RAR Frame %d trace pdu for ra-RNTI %x\n", LOG_D(OPT,
"[UE %d][RAPROC] CC_id %d RAR Frame %d trace pdu for ra-RNTI %x\n",
module_idP, CC_id, frameP, ra_rnti); module_idP, CC_id, frameP, ra_rnti);
trace_pdu(1, (uint8_t*)dlsch_buffer, n_rarh + n_rarpy*6, module_idP, 2, ra_rnti, trace_pdu(1, (uint8_t *) dlsch_buffer, n_rarh + n_rarpy * 6,
UE_mac_inst[module_idP].rxFrame, UE_mac_inst[module_idP].rxSubframe, 0, 0); module_idP, 2, ra_rnti, UE_mac_inst[module_idP].rxFrame,
UE_mac_inst[module_idP].rxSubframe, 0, 0);
} }
if (preamble_index == rarh->RAPID) { if (preamble_index == rarh->RAPID) {
*t_crnti = (uint16_t)rar[5]+(rar[4]<<8);//rar->t_crnti; *t_crnti = (uint16_t) rar[5] + (rar[4] << 8); //rar->t_crnti;
UE_mac_inst[module_idP].crnti = *t_crnti;//rar->t_crnti; UE_mac_inst[module_idP].crnti = *t_crnti; //rar->t_crnti;
//return(rar->Timing_Advance_Command); //return(rar->Timing_Advance_Command);
ret = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4)); ret = ((((uint16_t) (rar[0] & 0x7f)) << 4) + (rar[1] >> 4));
} else { } else {
UE_mac_inst[module_idP].crnti=0; UE_mac_inst[module_idP].crnti = 0;
ret = (0xffff); ret = (0xffff);
} }
// move the selected RAR to the front of the RA_PDSCH buffer // move the selected RAR to the front of the RA_PDSCH buffer
memcpy(selected_rar_buffer+0, (uint8_t*)rarh, 1); memcpy(selected_rar_buffer + 0, (uint8_t *) rarh, 1);
memcpy(selected_rar_buffer+1, (uint8_t*)rar , 6); memcpy(selected_rar_buffer + 1, (uint8_t *) rar, 6);
return ret; return ret;
openair2/LAYER2/MAC/ue_procedures.c
+1268 -847
View File
File diff suppressed because it is too large Load Diff
openair2/LAYER2/MAC/vars.h
+29 -22
View File
@@ -39,20 +39,27 @@
#include "defs.h" #include "defs.h"
#include "COMMON/mac_rrc_primitives.h" #include "COMMON/mac_rrc_primitives.h"
const uint32_t BSR_TABLE[BSR_TABLE_SIZE]= {0,10,12,14,17,19,22,26,31,36,42,49,57,67,78,91, const uint32_t BSR_TABLE[BSR_TABLE_SIZE] =
105,125,146,171,200,234,274,321,376,440,515,603,706,826,967,1132, { 0, 10, 12, 14, 17, 19, 22, 26, 31, 36, 42, 49, 57, 67, 78, 91,
1326,1552,1817,2127,2490,2915,3413,3995,4677,5467,6411,7505,8787,10287,12043,14099, 105, 125, 146, 171, 200, 234, 274, 321, 376, 440, 515, 603, 706, 826,
16507,19325,22624,26487,31009,36304,42502,49759,58255,68201,79846,93479,109439, 128125,150000, 300000 967, 1132,
}; 1326, 1552, 1817, 2127, 2490, 2915, 3413, 3995, 4677, 5467, 6411, 7505,
8787, 10287, 12043, 14099,
16507, 19325, 22624, 26487, 31009, 36304, 42502, 49759, 58255, 68201,
79846, 93479, 109439, 128125, 150000, 300000
};
// extended bsr table--currently not used // extended bsr table--currently not used
const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE] = {0,10,13,16,19,23,29,35,43,53,65,80,98,120,147, const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE] =
181,223,274,337,414,509,625,769,945,1162,1429, { 0, 10, 13, 16, 19, 23, 29, 35, 43, 53, 65, 80, 98, 120, 147,
1757,2161,2657,3267,4017,4940,6074,7469,9185, 181, 223, 274, 337, 414, 509, 625, 769, 945, 1162, 1429,
11294,13888,17077,20999,25822,31752,39045,48012, 1757, 2161, 2657, 3267, 4017, 4940, 6074, 7469, 9185,
59039,72598,89272,109774,134986,165989,204111, 11294, 13888, 17077, 20999, 25822, 31752, 39045, 48012,
250990,308634,379519,466683,573866,705666,867737, 59039, 72598, 89272, 109774, 134986, 165989, 204111,
1067031,1312097,1613447,1984009,2439678,3000000, 250990, 308634, 379519, 466683, 573866, 705666, 867737,
6000000}; 1067031, 1312097, 1613447, 1984009, 2439678, 3000000,
6000000
};
//#define MAX_SIZE_OF_AGG3 576 //#define MAX_SIZE_OF_AGG3 576
//#define MAX_SIZE_OF_AGG2 288 //#define MAX_SIZE_OF_AGG2 288
@@ -64,20 +71,22 @@ const uint32_t Extended_BSR_TABLE[BSR_TABLE_SIZE] = {0,10,13,16,19,23,29,35,43,5
* this is also dependent to transmission mode, where an offset could be defined * this is also dependent to transmission mode, where an offset could be defined
*/ */
// the follwoing three tables are calibrated for TXMODE 1 and 2 // the follwoing three tables are calibrated for TXMODE 1 and 2
const uint8_t cqi2fmt0_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]= { const uint8_t cqi2fmt0_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE] = {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 37 bits {3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 37 bits
//{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41 //{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41 {3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 41
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 43 {3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 43
{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE = 44 {3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE = 44
}; };
const uint8_t cqi2fmt1x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]= {
const uint8_t cqi2fmt1x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE] = {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size < 38 bits {3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size < 38 bits
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE < 43 {3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE < 43
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE < 47 {3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE < 47
{3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE < 55 {3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0} // 20_DCI0_CRC_SIZE < 55
}; };
const uint8_t cqi2fmt2x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE]= {
const uint8_t cqi2fmt2x_agg[MAX_SUPPORTED_BW][CQI_VALUE_RANGE] = {
{3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 47 bits {3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0}, // 1.4_DCI0_CRC_Size= 47 bits
{3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 55 {3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0}, // 5_DCI0_CRC_SIZE = 55
{3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 59 {3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0}, // 10_DCI0_CRC_SIZE = 59
@@ -102,10 +111,10 @@ eNB_DLSCH_INFO eNB_dlsch_info[NUMBER_OF_eNB_MAX][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#ifdef OPENAIR2 #ifdef OPENAIR2
unsigned char NB_eNB_INST=0; unsigned char NB_eNB_INST = 0;
unsigned char NB_UE_INST=0; unsigned char NB_UE_INST = 0;
unsigned char NB_RN_INST=0; unsigned char NB_RN_INST = 0;
unsigned char NB_INST=0; unsigned char NB_INST = 0;
#endif #endif
@@ -137,5 +146,3 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E; DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#endif #endif