added N_TA_offset for TDD
added closed loop UE power control (TPC) updated ulsch_scheduler not to schedule <3 PRBs (this does not work well with cqi_req) ulsch_concecutive_error_conter now counts over all harq processes added button to reset stats git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5854 818b1a75-f10b-46b9-bf7c-635c3b92a50f
This commit is contained in:
@@ -65,6 +65,8 @@ $(OUTDIR)/libgtpv1u.a: $(addprefix $(OUTDIR)/,$(libgtpv1u_OBJECTS))
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@$(AR) rcs $@ $(addprefix $(OUTDIR)/,$(libgtpv1u_OBJECTS))
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clean:
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@$(RM_F_V) $(OUTDIR)/nw-gtpv1u/src/*.o
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@$(RM_F_V) $(OUTDIR)/nw-gtpv1u/src/*.d
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@$(RM_F_V) $(OUTDIR)/*.o
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@$(RM_F_V) $(OUTDIR)/*.d
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@$(RM_F_V) $(OUTDIR)/libgtpv1u.a
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@@ -4179,21 +4179,17 @@ int generate_ue_ulsch_params_from_dci(void *dci_pdu,
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ulsch->harq_processes[harq_pid]->TPC = TPC;
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if (phy_vars_ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) {
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/*
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msg("[PHY][UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
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phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame,subframe,ulsch->f_pusch,
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LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ACC) %d, adjusting by %d (TPC %d)\n",
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phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame_rx,subframe,ulsch->f_pusch,
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delta_PUSCH_acc[phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TPC],
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phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TPC);
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*/
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ulsch->f_pusch += delta_PUSCH_acc[phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TPC];
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}
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else {
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/*
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msg("[PHY][UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n",
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phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame,subframe,ulsch->f_pusch,
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LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d: f_pusch (ABS) %d, adjusting to %d (TPC %d)\n",
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phy_vars_ue->Mod_id,harq_pid,phy_vars_ue->frame_rx,subframe,ulsch->f_pusch,
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delta_PUSCH_abs[phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TPC],
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phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TPC);
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*/
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ulsch->f_pusch = delta_PUSCH_abs[phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TPC];
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}
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if (ulsch->harq_processes[harq_pid]->first_tx==1) {
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@@ -569,7 +569,7 @@ typedef struct {
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/// ulsch l2 errors per harq_pid
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uint32_t ulsch_errors[8];
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/// ulsch l2 consecutive errors per harq_pid
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uint32_t ulsch_consecutive_errors[8];
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uint32_t ulsch_consecutive_errors; //[8];
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/// ulsch trials/errors/fer per harq and round
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uint32_t ulsch_decoding_attempts[8][8];
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uint32_t ulsch_round_errors[8][8];
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@@ -392,16 +392,16 @@ int32_t generate_prach(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,
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//LOG_I(PHY,"[PRACH] prach_start=%d\n",prach_start);
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#ifdef BIT8_TX
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prach_start = (subframe*phy_vars_ue->lte_frame_parms.samples_per_tti)<<1;
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prach_start = ((subframe*phy_vars_ue->lte_frame_parms.samples_per_tti)<<1)-phy_vars_ue->N_TA_offset;
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#else
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#ifdef EXMIMO
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prach_start = (phy_vars_ue->rx_offset+subframe*phy_vars_ue->lte_frame_parms.samples_per_tti-openair_daq_vars.timing_advance);
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prach_start = (phy_vars_ue->rx_offset+subframe*phy_vars_ue->lte_frame_parms.samples_per_tti-openair_daq_vars.timing_advance-phy_vars_ue->N_TA_offset);
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if (prach_start<0)
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prach_start+=(phy_vars_ue->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
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if (prach_start>=(phy_vars_ue->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME))
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prach_start-=(phy_vars_ue->lte_frame_parms.samples_per_tti*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
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#else //normal case (simulation)
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prach_start = subframe*phy_vars_ue->lte_frame_parms.samples_per_tti;
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prach_start = subframe*phy_vars_ue->lte_frame_parms.samples_per_tti-phy_vars_ue->N_TA_offset;
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#endif
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#endif
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@@ -804,9 +804,9 @@ void rx_prach(PHY_VARS_eNB *phy_vars_eNB,uint8_t subframe,uint16_t *preamble_ene
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int16_t levdB;
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int fft_size,log2_ifft_size;
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uint8_t nb_ant_rx = 1; //phy_vars_eNB->lte_frame_parms.nb_antennas_rx;
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for (aa=0;aa<nb_ant_rx;aa++) {
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prach[aa] = (int16_t*)&phy_vars_eNB->lte_eNB_common_vars.rxdata[0][aa][subframe*phy_vars_eNB->lte_frame_parms.samples_per_tti];
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prach[aa] = (int16_t*)&phy_vars_eNB->lte_eNB_common_vars.rxdata[0][aa][subframe*phy_vars_eNB->lte_frame_parms.samples_per_tti-phy_vars_eNB->N_TA_offset];
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// remove_625_Hz(phy_vars_eNB,prach[aa]);
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}
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// First compute physical root sequence
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@@ -386,10 +386,11 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length) {
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}
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len += sprintf(&buffer[len],"[eNB PROC] ULSCH errors/attempts per harq (per round): \n");
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for (i=0;i<8;i++) {
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len += sprintf(&buffer[len]," harq %d: %d/%d (%d/%d, %d/%d, %d/%d, %d/%d)\n",
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len += sprintf(&buffer[len]," harq %d: %d/%d (fer %d) (%d/%d, %d/%d, %d/%d, %d/%d)\n",
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i,
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phy_vars_eNB->eNB_UE_stats[UE_id].ulsch_errors[i],
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phy_vars_eNB->eNB_UE_stats[UE_id].ulsch_decoding_attempts[i][0],
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phy_vars_eNB->eNB_UE_stats[UE_id].ulsch_round_fer[i][0],
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phy_vars_eNB->eNB_UE_stats[UE_id].ulsch_round_errors[i][0],
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phy_vars_eNB->eNB_UE_stats[UE_id].ulsch_decoding_attempts[i][0],
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phy_vars_eNB->eNB_UE_stats[UE_id].ulsch_round_errors[i][1],
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@@ -406,6 +407,7 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length) {
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}
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len += sprintf(&buffer[len],"[eNB PROC] ULSCH errors/attempts total %d/%d (%d/%d, %d/%d, %d/%d, %d/%d): \n",
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ulsch_errors,ulsch_round_attempts[0],
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ulsch_round_errors[0],ulsch_round_attempts[0],
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ulsch_round_errors[1],ulsch_round_attempts[1],
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ulsch_round_errors[2],ulsch_round_attempts[2],
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@@ -1225,8 +1225,6 @@ uint32_t get_rballoc(uint8_t vrb_type,uint16_t rb_alloc_dci);
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uint8_t get_transmission_mode(uint16_t Mod_id, uint8_t CC_id, uint16_t rnti);
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int16_t get_hundred_times_delta_IF(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t harq_pid);
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/* \brief
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@param ra_header Header of resource allocation (0,1) (See sections 7.1.6.1/7.1.6.2 of 36.213 Rel8.6)
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@param rb_alloc Bitmap allocation from DCI (format 1,2)
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@@ -188,7 +188,7 @@ void remove_7_5_kHz(PHY_VARS_eNB *phy_vars_eNB,uint8_t slot) {
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}
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slot_offset = (uint32_t)slot * phy_vars_eNB->lte_frame_parms.samples_per_tti/2;
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slot_offset = (uint32_t)slot * phy_vars_eNB->lte_frame_parms.samples_per_tti/2-phy_vars_eNB->N_TA_offset;
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slot_offset2 = (uint32_t)(slot&1) * phy_vars_eNB->lte_frame_parms.samples_per_tti/2;
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len = phy_vars_eNB->lte_frame_parms.samples_per_tti/2;
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@@ -213,6 +213,7 @@ typedef struct PHY_VARS_eNB_s{
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uint32_t max_peak_val;
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int max_eNB_id, max_sync_pos;
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int N_TA_offset; ///timing offset used in TDD
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/// sinr for all subcarriers of the current link (used only for abstraction)
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double *sinr_dB;
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@@ -457,6 +458,7 @@ typedef struct
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// uint8_t prach_timer;
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int rx_offset; /// Timing offset
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int timing_advance; ///timing advance signalled from eNB
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int N_TA_offset; ///timing offset used in TDD
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/// Flag to tell if UE is secondary user (cognitive mode)
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unsigned char is_secondary_ue;
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/// Flag to tell if secondary eNB has channel estimates to create NULL-beams from.
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+1
-1
@@ -94,7 +94,7 @@ unsigned char NB_RN_INST=0;
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unsigned char NB_INST=0;
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#endif
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unsigned int ULSCH_max_consecutive_errors = 5;
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unsigned int ULSCH_max_consecutive_errors = 10;
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int flag_LA=0;
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int flagMag;
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@@ -517,7 +517,7 @@ int8_t pucch_power_cntl(PHY_VARS_UE *phy_vars_ue,uint8_t subframe,uint8_t eNB_id
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*/
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void pusch_power_cntl(PHY_VARS_UE *phy_vars_ue,uint8_t subframe,uint8_t eNB_id,uint8_t j, uint8_t abstraction_flag);
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int8_t get_PHR(uint8_t Mod_id, uint8_t eNB_index);
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int8_t get_PHR(uint8_t Mod_id, uint8_t CC_id, uint8_t eNB_index);
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LTE_eNB_UE_stats* get_eNB_UE_stats(uint8_t Mod_id, uint8_t CC_id,uint16_t rnti);
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@@ -525,9 +525,15 @@ LTE_DL_FRAME_PARMS *get_lte_frame_parms(module_id_t Mod_id, uint8_t CC_id);
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MU_MIMO_mode* get_mu_mimo_mode (module_id_t Mod_id, uint8_t CC_id);
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int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,int frame, uint8_t subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag);
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void ulsch_decoding_procedures(unsigned char last_slot, unsigned int i, PHY_VARS_eNB *phy_vars_eNB, unsigned char abstraction_flag);
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int16_t get_hundred_times_delta_IF(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t harq_pid);
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int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t harq_pid);
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int16_t get_hundred_times_delta_IF_mac(module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
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int get_ue_active_harq_pid(uint8_t Mod_id,uint8_t CC_id,uint16_t rnti,int frame, uint8_t subframe,uint8_t *harq_pid,uint8_t *round,uint8_t ul_flag);
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void ulsch_decoding_procedures(unsigned char last_slot, unsigned int i, PHY_VARS_eNB *phy_vars_eNB, unsigned char abstraction_flag);
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void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t harq_pid);
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void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe);
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@@ -91,8 +91,6 @@ int eNB_sync_buffer1[640*6] __attribute__ ((aligned(16)));
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int *eNB_sync_buffer[2] = {eNB_sync_buffer0, eNB_sync_buffer1};
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extern uint16_t hundred_times_log10_NPRB[100];
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extern int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t harq_pid);
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unsigned int max_peak_val;
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int max_sect_id, max_sync_pos;
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@@ -2673,7 +2671,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
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//RX processing
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uint32_t l, ret=0,i,j,k;
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uint32_t sect_id=0;
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uint32_t harq_pid, round;
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uint32_t harq_pid, harq_idx, round;
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uint8_t SR_payload,*pucch_payload=NULL,pucch_payload0[2]={0,0},pucch_payload1[2]={0,0};
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int16_t n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3;
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uint8_t do_SR = 0;
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@@ -2981,7 +2979,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
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//compute the expected ULSCH RX power (for the stats)
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phy_vars_eNB->ulsch_eNB[(uint32_t)i]->harq_processes[harq_pid]->delta_TF =
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get_hundred_times_delta_IF_eNB(phy_vars_eNB,i,harq_pid);
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//dump_ulsch(phy_vars_eNB, sched_subframe, i);
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phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_pid][phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round]++;
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@@ -3088,15 +3086,15 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
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phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round=0;
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phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_active=0;
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phy_vars_eNB->eNB_UE_stats[i].ulsch_errors[harq_pid]++;
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phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors[harq_pid]++;
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phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors++;
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||||
//dump_ulsch(phy_vars_eNB, sched_subframe, i);
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||||
}
|
||||
|
||||
// If we've dropped the UE, go back to PRACH mode for this UE
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||||
//#if !defined(EXMIMO_IOT)
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||||
if (phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors[harq_pid] == ULSCH_max_consecutive_errors) {
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LOG_D(PHY,"[eNB %d] frame %d, subframe %d, UE %d: ULSCH consecutive error count reached %u, removing UE\n",
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||||
phy_vars_eNB->Mod_id,frame,subframe, i, phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors[harq_pid]);
|
||||
if (phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors == ULSCH_max_consecutive_errors) {
|
||||
LOG_I(PHY,"[eNB %d] frame %d, subframe %d, UE %d: ULSCH consecutive error count reached %u, removing UE\n",
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||||
phy_vars_eNB->Mod_id,frame,subframe, i, phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors);
|
||||
phy_vars_eNB->eNB_UE_stats[i].mode = PRACH;
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||||
#ifdef OPENAIR2
|
||||
/* mac_xface->cancel_ra_proc(phy_vars_eNB->Mod_id,
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||||
@@ -3104,7 +3102,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
||||
phy_vars_eNB->eNB_UE_stats[i].crnti);*/
|
||||
#endif
|
||||
remove_ue(phy_vars_eNB->eNB_UE_stats[i].crnti,phy_vars_eNB,abstraction_flag);
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors[harq_pid]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors=0;
|
||||
}
|
||||
//#endif
|
||||
}
|
||||
@@ -3117,7 +3115,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_active = 1;
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_ACK = 1;
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round = 0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors[harq_pid] = 0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors = 0;
|
||||
|
||||
if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 1) {
|
||||
#ifdef OPENAIR2
|
||||
@@ -3168,7 +3166,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
||||
}
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_l2_errors[k]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_errors[k]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors[k]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors=0;
|
||||
for (j=0;j<phy_vars_eNB->ulsch_eNB[i]->Mdlharq;j++) {
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[k][j]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[k][j]=0;
|
||||
@@ -3515,40 +3513,27 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
||||
#endif //PUCCH
|
||||
|
||||
if ((frame % 100 == 0) && (subframe == 4)) {
|
||||
for (round=0;round<phy_vars_eNB->ulsch_eNB[i]->Mdlharq;round++) {
|
||||
if ((phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_pid][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_pid][round]) != 0)
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_fer[harq_pid][round] =
|
||||
(100*(phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors[harq_pid][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors_last[harq_pid][round]))/
|
||||
(phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_pid][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_pid][round]);
|
||||
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_pid][round] =
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_pid][round];
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors_last[harq_pid][round] =
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors[harq_pid][round];
|
||||
for (harq_idx=0;harq_idx<8;harq_idx++) {
|
||||
for (round=0;round<phy_vars_eNB->ulsch_eNB[i]->Mdlharq;round++) {
|
||||
if ((phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_idx][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round]) != 0) {
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_fer[harq_idx][round] =
|
||||
(100*(phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors[harq_idx][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors_last[harq_idx][round]))/
|
||||
(phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_idx][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round]);
|
||||
}
|
||||
else {
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_fer[harq_idx][round] = 0;
|
||||
}
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round] =
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_idx][round];
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors_last[harq_idx][round] =
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors[harq_idx][round];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if ((frame % 100 == 0) && (subframe==4)) {
|
||||
for (round=0;round<phy_vars_eNB->ulsch_eNB[i]->Mdlharq;round++) {
|
||||
if ((phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_pid][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_pid][round]) != 0)
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_fer[harq_pid][round] =
|
||||
(100*(phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors[harq_pid][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors_last[harq_pid][round]))/
|
||||
(phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_pid][round] -
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_pid][round]);
|
||||
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[harq_pid][round] =
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[harq_pid][round];
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors_last[harq_pid][round] =
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors[harq_pid][round];
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if ((frame % 100 == 0) && (subframe==4)) {
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_bitrate = (phy_vars_eNB->eNB_UE_stats[i].total_TBS -
|
||||
phy_vars_eNB->eNB_UE_stats[i].total_TBS_last);
|
||||
@@ -3651,7 +3636,7 @@ void phy_procedures_eNB_RX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_active = 1;
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->phich_ACK = 1;
|
||||
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round = 0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors[harq_pid] = 0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors = 0;
|
||||
#ifdef DEBUG_PHY_PROC
|
||||
#ifdef DEBUG_ULSCH
|
||||
LOG_D(PHY,"[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:",
|
||||
|
||||
@@ -1181,9 +1181,9 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
|
||||
nsymb = (frame_parms->Ncp == 0) ? 14 : 12;
|
||||
|
||||
#ifdef EXMIMO //this is the EXPRESS MIMO case
|
||||
ulsch_start = (phy_vars_ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-openair_daq_vars.timing_advance-phy_vars_ue->timing_advance+5)%(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti);
|
||||
ulsch_start = (phy_vars_ue->rx_offset+subframe_tx*frame_parms->samples_per_tti-openair_daq_vars.timing_advance-phy_vars_ue->timing_advance-phy_vars_ue->N_TA_offset+5)%(LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti);
|
||||
#else //this is the normal case
|
||||
ulsch_start = (frame_parms->samples_per_tti*subframe_tx);
|
||||
ulsch_start = (frame_parms->samples_per_tti*subframe_tx)-phy_vars_ue->N_TA_offset;
|
||||
#endif //else EXMIMO
|
||||
|
||||
start_meas(&phy_vars_ue->ofdm_mod_stats);
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
* \warning
|
||||
*/
|
||||
|
||||
#include "defs.h"
|
||||
#include "PHY/defs.h"
|
||||
#include "PHY/LTE_TRANSPORT/proto.h"
|
||||
#include "PHY/extern.h"
|
||||
@@ -81,6 +82,9 @@ int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,
|
||||
}
|
||||
}
|
||||
|
||||
int16_t get_hundred_times_delta_IF_mac(module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid) {
|
||||
return get_hundred_times_delta_IF_eNB(PHY_vars_eNB_g[module_idP][CC_id],find_ue(rnti,PHY_vars_eNB_g[module_idP][CC_id]),harq_pid);
|
||||
}
|
||||
|
||||
int16_t get_hundred_times_delta_IF(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t harq_pid) {
|
||||
|
||||
|
||||
@@ -618,11 +618,11 @@ int main(int argc, char **argv) {
|
||||
// NN: N_RB_UL has to be defined in ulsim
|
||||
PHY_vars_eNB->ulsch_eNB[0] = new_eNB_ulsch(8,max_turbo_iterations,N_RB_DL,0);
|
||||
PHY_vars_UE->ulsch_ue[0] = new_ue_ulsch(8,N_RB_DL,0);
|
||||
/*
|
||||
|
||||
// Create transport channel structures for 2 transport blocks (MIMO)
|
||||
for (i=0;i<2;i++) {
|
||||
PHY_vars_eNB->dlsch_eNB[0][i] = new_eNB_dlsch(1,8,0);
|
||||
PHY_vars_UE->dlsch_ue[0][i] = new_ue_dlsch(1,8,MAX_TURBO_ITERATIONS,0);
|
||||
PHY_vars_eNB->dlsch_eNB[0][i] = new_eNB_dlsch(1,8,N_RB_DL,0);
|
||||
PHY_vars_UE->dlsch_ue[0][i] = new_ue_dlsch(1,8,MAX_TURBO_ITERATIONS,N_RB_DL,0);
|
||||
|
||||
if (!PHY_vars_eNB->dlsch_eNB[0][i]) {
|
||||
printf("Can't get eNB dlsch structures\n");
|
||||
@@ -638,7 +638,7 @@ int main(int argc, char **argv) {
|
||||
PHY_vars_UE->dlsch_ue[0][i]->rnti = 14;
|
||||
|
||||
}
|
||||
*/
|
||||
|
||||
|
||||
switch (PHY_vars_eNB->lte_frame_parms.N_RB_UL) {
|
||||
case 6:
|
||||
@@ -746,6 +746,9 @@ int main(int argc, char **argv) {
|
||||
if (ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB->lte_frame_parms,subframe) > subframe) // allocation was in previous frame
|
||||
PHY_vars_eNB->proc[ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB->lte_frame_parms,subframe)].frame_tx = (PHY_vars_UE->frame_tx-1)&1023;
|
||||
|
||||
PHY_vars_UE->dlsch_ue[0][0]->harq_ack[ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB->lte_frame_parms,subframe)].send_harq_status = 1;
|
||||
|
||||
|
||||
// printf("UE frame %d, eNB frame %d (eNB frame_tx %d)\n",PHY_vars_UE->frame,PHY_vars_eNB->proc[subframe].frame_rx,PHY_vars_eNB->proc[ul_subframe2pdcch_alloc_subframe(&PHY_vars_eNB->lte_frame_parms,subframe)].frame_tx);
|
||||
PHY_vars_UE->frame_tx = (PHY_vars_UE->frame_tx-1)&1023;
|
||||
|
||||
|
||||
@@ -220,6 +220,10 @@ static const eutra_band_t eutra_bands[] =
|
||||
{38, 2570 * MHz, 2620 * MHz, 2570 * MHz, 2630 * MHz, TDD},
|
||||
{39, 1880 * MHz, 1920 * MHz, 1880 * MHz, 1920 * MHz, TDD},
|
||||
{40, 2300 * MHz, 2400 * MHz, 2300 * MHz, 2400 * MHz, TDD},
|
||||
{41, 2496 * MHz, 2690 * MHz, 2496 * MHz, 2690 * MHz, TDD},
|
||||
{42, 3400 * MHz, 3600 * MHz, 3400 * MHz, 3600 * MHz, TDD},
|
||||
{43, 3600 * MHz, 3800 * MHz, 3600 * MHz, 3800 * MHz, TDD},
|
||||
{44, 703 * MHz, 803 * MHz, 703 * MHz, 803 * MHz, TDD},
|
||||
};
|
||||
|
||||
static Enb_properties_array_t enb_properties;
|
||||
|
||||
@@ -69,7 +69,6 @@
|
||||
#define ENABLE_MAC_PAYLOAD_DEBUG
|
||||
#define DEBUG_eNB_SCHEDULER 1
|
||||
|
||||
|
||||
// This table holds the allowable PRB sizes for ULSCH transmissions
|
||||
uint8_t rb_table[33] = {1,2,3,4,5,6,8,9,10,12,15,16,18,20,24,25,27,30,32,36,40,45,48,50,54,60,72,75,80,81,90,96,100};
|
||||
|
||||
@@ -566,11 +565,12 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
void *ULSCH_dci = NULL;
|
||||
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
|
||||
DCI_PDU *DCI_pdu;
|
||||
uint8_t status = 0;
|
||||
uint8_t rb_table_index = -1;
|
||||
uint16_t TBS,i;
|
||||
int32_t buffer_occupancy=0;
|
||||
uint32_t cqi_req,cshift,ndi,mcs,rballoc;
|
||||
uint8_t status = 0;
|
||||
uint8_t rb_table_index = -1;
|
||||
uint16_t TBS,i;
|
||||
int32_t buffer_occupancy=0;
|
||||
uint32_t cqi_req,cshift,ndi,mcs,rballoc,tpc;
|
||||
int32_t normalized_rx_power, target_rx_power=-85;
|
||||
|
||||
int n,CC_id;
|
||||
eNB_MAC_INST *eNB=&eNB_mac_inst[module_idP];
|
||||
@@ -579,14 +579,14 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
int rvidx_tab[4] = {0,2,3,1};
|
||||
LTE_DL_FRAME_PARMS *frame_parms;
|
||||
|
||||
LOG_I(MAC,"entering ulsch preprocesor\n");
|
||||
LOG_D(MAC,"entering ulsch preprocesor\n");
|
||||
ulsch_scheduler_pre_processor(module_idP,
|
||||
frameP,
|
||||
subframeP,
|
||||
first_rb,
|
||||
aggregation,
|
||||
nCCE);
|
||||
LOG_I(MAC,"exiting ulsch preprocesor\n");
|
||||
LOG_D(MAC,"exiting ulsch preprocesor\n");
|
||||
// loop over all active UEs
|
||||
for (UE_id=UE_list->head_ul;UE_id>=0;UE_id=UE_list->next_ul[UE_id]) {
|
||||
|
||||
@@ -645,13 +645,36 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
aggregation = process_ue_cqi(module_idP,UE_id); // =2 by default!!
|
||||
status = mac_get_rrc_status(module_idP,1,UE_id);
|
||||
cqi_req = (status < RRC_CONNECTED)? 0:1;
|
||||
|
||||
//power control
|
||||
//compute the expected ULSCH RX power (for the stats)
|
||||
|
||||
// this is the normalized RX power and this should be constant (regardless of mcs
|
||||
//todo: put this function into mac_xface
|
||||
normalized_rx_power = eNB_UE_stats->UL_rssi[0] -
|
||||
mac_xface->get_hundred_times_delta_TF(module_idP,CC_id,rnti,harq_pid)/100;
|
||||
// this assumes accumulated tpc
|
||||
if (subframeP==0) {
|
||||
if (normalized_rx_power>(target_rx_power+1))
|
||||
tpc = 0; //-1
|
||||
else if (normalized_rx_power<(target_rx_power-1))
|
||||
tpc = 2; //+1
|
||||
else
|
||||
tpc = 1; //0
|
||||
}
|
||||
else
|
||||
tpc = 1; //0
|
||||
|
||||
LOG_I(MAC,"[eNB %d] ULSCH scheduler: harq_pid %d, Ndi %d, mcs %d, tpc %d, normalized/target rx power %d/%d\n",module_idP,harq_pid,ndi,mcs,tpc,normalized_rx_power,target_rx_power);
|
||||
|
||||
|
||||
// new transmission
|
||||
if (round==0) {
|
||||
|
||||
ndi = 1-UE_template->oldNDI_UL[harq_pid];
|
||||
UE_template->oldNDI_UL[harq_pid]=ndi;
|
||||
mcs = 10;//cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
|
||||
//mcs = 10;
|
||||
mcs = cmin (UE_template->pre_assigned_mcs_ul, openair_daq_vars.target_ue_ul_mcs); // adjust, based on user-defined MCS
|
||||
if (UE_template->pre_allocated_rb_table_index_ul >=0)
|
||||
rb_table_index=UE_template->pre_allocated_rb_table_index_ul;
|
||||
else {// NN-->RK: check this condition
|
||||
@@ -724,7 +747,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_1_5MHz_TDD_1_6_t *)ULSCH_dci)->dai = UE_template->DAI_ul[sched_subframe];
|
||||
@@ -748,7 +771,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_5MHz_TDD_1_6_t *)ULSCH_dci)->dai = UE_template->DAI_ul[sched_subframe];
|
||||
@@ -771,7 +794,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->dai = UE_template->DAI_ul[sched_subframe];
|
||||
@@ -794,7 +817,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_20MHz_TDD_1_6_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_20MHz_TDD_1_6_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_20MHz_TDD_1_6_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_20MHz_TDD_1_6_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_20MHz_TDD_1_6_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_20MHz_TDD_1_6_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_10MHz_TDD_1_6_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_20MHz_TDD_1_6_t *)ULSCH_dci)->dai = UE_template->DAI_ul[sched_subframe];
|
||||
@@ -823,7 +846,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_5MHz_FDD_t *)ULSCH_dci)->cqi_req = cqi_req;
|
||||
@@ -845,7 +868,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_1_5MHz_FDD_t *)ULSCH_dci)->cqi_req = cqi_req;
|
||||
@@ -867,7 +890,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_10MHz_FDD_t *)ULSCH_dci)->cqi_req = cqi_req;
|
||||
@@ -889,7 +912,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->rballoc = rballoc;
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->mcs = mcs;
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->ndi = ndi;
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->TPC = 1;
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->TPC = tpc;
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->padding = 0;
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->cshift = cshift;
|
||||
((DCI0_20MHz_FDD_t *)ULSCH_dci)->cqi_req = cqi_req;
|
||||
@@ -1033,7 +1056,7 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
|
||||
ULSCH_dci_tdd16->rballoc = rballoc;
|
||||
ULSCH_dci_tdd16->mcs = 2;
|
||||
ULSCH_dci_tdd16->ndi = 1;
|
||||
ULSCH_dci_tdd16->TPC = 1;
|
||||
ULSCH_dci_tdd16->TPC = tpc;
|
||||
ULSCH_dci_tdd16->cshift = cba_group;
|
||||
ULSCH_dci_tdd16->dai = UE_list->UE_template[CC_id][cba_group].DAI_ul[sched_subframe];
|
||||
ULSCH_dci_tdd16->cqi_req = 1;
|
||||
@@ -1056,7 +1079,7 @@ void schedule_ulsch_cba_rnti(module_id_t module_idP, unsigned char cooperation_f
|
||||
ULSCH_dci_fdd->rballoc = rballoc;
|
||||
ULSCH_dci_fdd->mcs = 2;
|
||||
ULSCH_dci_fdd->ndi = 1;
|
||||
ULSCH_dci_fdd->TPC = 1;
|
||||
ULSCH_dci_fdd->TPC = tpc;
|
||||
ULSCH_dci_fdd->cshift = 0;
|
||||
ULSCH_dci_fdd->cqi_req = 1;
|
||||
|
||||
|
||||
@@ -497,6 +497,8 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, uint8_t cba_group_
|
||||
mac_xface->get_lte_frame_parms = get_lte_frame_parms;
|
||||
mac_xface->get_mu_mimo_mode = get_mu_mimo_mode;
|
||||
|
||||
mac_xface->get_hundred_times_delta_TF = get_hundred_times_delta_IF_mac;
|
||||
|
||||
#ifdef Rel10
|
||||
mac_xface->get_mch_sdu = get_mch_sdu;
|
||||
mac_xface->phy_config_dedicated_scell_eNB= phy_config_dedicated_scell_eNB;
|
||||
|
||||
@@ -239,14 +239,18 @@ int maxround(module_id_t Mod_id,uint16_t rnti,int frame,sub_frame_t subframe,uin
|
||||
|
||||
// This function scans all CC_ids for a particular UE to find the maximum DL CQI
|
||||
|
||||
int maxcqi(module_id_t Mod_id,uint16_t rnti) {
|
||||
int maxcqi(module_id_t Mod_id,int32_t UE_id) {
|
||||
|
||||
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
|
||||
int CC_id;
|
||||
UE_list_t *UE_list = &eNB_mac_inst[Mod_id].UE_list;
|
||||
int CC_id,n;
|
||||
int CQI = 0;
|
||||
|
||||
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++){
|
||||
eNB_UE_stats = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti);
|
||||
for (n=0;n<UE_list->numactiveCCs[UE_id];n++) {
|
||||
CC_id = UE_list->ordered_CCids[n][UE_id];
|
||||
eNB_UE_stats = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,UE_RNTI(Mod_id,UE_id));
|
||||
if (eNB_UE_stats==NULL)
|
||||
mac_xface->macphy_exit("maxcqi: could not get eNB_UE_stats\n");
|
||||
if (eNB_UE_stats->DL_cqi[0] > CQI)
|
||||
CQI = eNB_UE_stats->DL_cqi[0];
|
||||
}
|
||||
@@ -278,7 +282,7 @@ void sort_UEs (module_id_t Mod_idP,
|
||||
|
||||
UE_id1 = i;
|
||||
pCC_id1 = UE_PCCID(Mod_idP,UE_id1);
|
||||
cqi1 = maxcqi(Mod_idP,rnti1); //
|
||||
cqi1 = maxcqi(Mod_idP,UE_id1); //
|
||||
round1 = maxround(Mod_idP,rnti1,frameP,subframeP,0);
|
||||
|
||||
|
||||
@@ -289,7 +293,7 @@ void sort_UEs (module_id_t Mod_idP,
|
||||
if(rnti2 == 0)
|
||||
continue;
|
||||
|
||||
cqi2 = maxcqi(Mod_idP,rnti2);
|
||||
cqi2 = maxcqi(Mod_idP,UE_id2);
|
||||
round2 = maxround(Mod_idP,rnti2,frameP,subframeP,0); //mac_xface->get_ue_active_harq_pid(Mod_id,rnti2,subframe,&harq_pid2,&round2,0);
|
||||
pCC_id2 = UE_PCCID(Mod_idP,UE_id2);
|
||||
|
||||
@@ -622,9 +626,9 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
||||
#endif
|
||||
|
||||
for(i=UE_list->head; i>=0;i=UE_list->next[i]) {
|
||||
UE_id = i;
|
||||
for (ii=0;ii<UE_num_active_CC(UE_list,UE_id);ii++) {
|
||||
CC_id = UE_list->ordered_CCids[ii][UE_id];
|
||||
UE_id = i;
|
||||
//PHY_vars_eNB_g[Mod_id]->mu_mimo_mode[UE_id].dl_pow_off = dl_pow_off[UE_id];
|
||||
LOG_D(MAC,"******************DL Scheduling Information for UE%d ************************\n",UE_id);
|
||||
LOG_D(MAC,"dl power offset UE%d = %d \n",UE_id,dl_pow_off[CC_id][UE_id]);
|
||||
@@ -806,7 +810,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
||||
LOG_D(MAC,"[eNB %d] Frame %d subframe %d: total ue %d, max num ue to be scheduled %d\n",
|
||||
module_idP, frameP, subframeP,total_ue_count, max_num_ue_to_be_scheduled);
|
||||
|
||||
LOG_I(MAC,"step3\n");
|
||||
//LOG_D(MAC,"step3\n");
|
||||
// step 3: assigne RBS
|
||||
for (i=UE_list->head_ul;i>=0;i=UE_list->next_ul[i]) {
|
||||
rnti = UE_RNTI(module_idP,i);
|
||||
@@ -913,7 +917,7 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
|
||||
uint16_t n,UE_id;
|
||||
uint8_t CC_id;
|
||||
rnti_t rnti = -1;
|
||||
int mcs=10;//cmin(16,openair_daq_vars.target_ue_ul_mcs);
|
||||
int mcs=cmin(16,openair_daq_vars.target_ue_ul_mcs);
|
||||
int rb_table_index=0,tbs,tx_power;
|
||||
UE_list_t *UE_list = &eNB_mac_inst[module_idP].UE_list;
|
||||
UE_TEMPLATE *UE_template;
|
||||
@@ -956,9 +960,12 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
|
||||
tbs = mac_xface->get_TBS_UL(mcs,rb_table[rb_table_index]);
|
||||
tx_power = mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,frame_parms->Ncp,0);
|
||||
}
|
||||
if (rb_table[rb_table_index]>(frame_parms->N_RB_UL-first_rb[CC_id])) {
|
||||
if (rb_table[rb_table_index]>(frame_parms->N_RB_UL-first_rb[CC_id]-1)) {
|
||||
rb_table_index--;
|
||||
}
|
||||
// 1 or 2 PRB with cqi enabled does not work well!
|
||||
if (rb_table[rb_table_index]<3)
|
||||
rb_table_index=2; //3PRB
|
||||
|
||||
UE_template->pre_assigned_mcs_ul=mcs;
|
||||
UE_template->pre_allocated_rb_table_index_ul=rb_table_index;
|
||||
@@ -989,7 +996,7 @@ void sort_ue_ul (module_id_t module_idP,int frameP, sub_frame_t subframeP){
|
||||
UE_list_t *UE_list = &eNB_mac_inst[module_idP].UE_list;
|
||||
|
||||
for (i=UE_list->head_ul;i>=0;i=UE_list->next_ul[i]) {
|
||||
LOG_I(MAC,"sort ue ul i %d\n",i);
|
||||
LOG_D(MAC,"sort ue ul i %d\n",i);
|
||||
rnti1 = UE_RNTI(module_idP,i);
|
||||
if(rnti1 == 0)
|
||||
continue;
|
||||
@@ -999,7 +1006,7 @@ void sort_ue_ul (module_id_t module_idP,int frameP, sub_frame_t subframeP){
|
||||
round1 = maxround(module_idP,rnti1,frameP,subframeP,1);
|
||||
|
||||
for (ii=UE_list->next_ul[i];ii>=0;ii=UE_list->next_ul[ii]) {
|
||||
LOG_I(MAC,"sort ul ue 2 ii %d\n",ii);
|
||||
LOG_D(MAC,"sort ul ue 2 ii %d\n",ii);
|
||||
rnti2 = UE_RNTI(module_idP,ii);
|
||||
if(rnti2 == 0)
|
||||
continue;
|
||||
|
||||
@@ -145,6 +145,12 @@ int dump_eNB_l2_stats(char *buffer, int length){
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_overhead_bytes,
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].avg_overhead_bytes
|
||||
);
|
||||
len += sprintf(&buffer[len],
|
||||
"[MAC] ULSCH received bytes (total %"PRIu64"),"
|
||||
"Total received PDU %d, Total errors %d\n",
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes_rx,
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus_rx,
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].num_errors_rx);
|
||||
len+= sprintf(&buffer[len],"Received PHR PH = %d (db)\n", UE_list->UE_template[CC_id][UE_id].phr_info);
|
||||
|
||||
}
|
||||
|
||||
@@ -308,6 +308,8 @@ typedef struct
|
||||
|
||||
MU_MIMO_mode* (*get_mu_mimo_mode) (module_id_t Mod_id, uint8_t CC_id);
|
||||
|
||||
int16_t (*get_hundred_times_delta_TF) (module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
|
||||
|
||||
unsigned char is_cluster_head;
|
||||
unsigned char is_primary_cluster_head;
|
||||
unsigned char is_secondary_cluster_head;
|
||||
|
||||
@@ -740,8 +740,8 @@ uint8_t do_SIB23(uint8_t Mod_id,
|
||||
// uplinkPowerControlCommon
|
||||
|
||||
#ifdef EXMIMO
|
||||
(*sib2)->radioResourceConfigCommon.uplinkPowerControlCommon.p0_NominalPUSCH = -90;//-90;
|
||||
(*sib2)->radioResourceConfigCommon.uplinkPowerControlCommon.p0_NominalPUCCH = -96;//-96;
|
||||
(*sib2)->radioResourceConfigCommon.uplinkPowerControlCommon.p0_NominalPUSCH =-98;//-90;
|
||||
(*sib2)->radioResourceConfigCommon.uplinkPowerControlCommon.p0_NominalPUCCH = -98;//-96;
|
||||
#else
|
||||
(*sib2)->radioResourceConfigCommon.uplinkPowerControlCommon.p0_NominalPUSCH = -108;
|
||||
(*sib2)->radioResourceConfigCommon.uplinkPowerControlCommon.p0_NominalPUCCH = -108;
|
||||
|
||||
@@ -6,13 +6,15 @@ msg_many:lxrt+sem+mbx+msg+fifos:!sudo ./msg_test;sleep 1;popall:control_c
|
||||
eNB:lxrt+sem+mbx+msg+fifos:!sudo ./synctest;sleep 1;popall:control_c
|
||||
eNB_test:lxrt+sem+mbx+msg+smi:!sudo ./lte-softmodem -S -F enb2tx;sleep 1;popall:control_c
|
||||
UE:lxrt+sem+mbx+msg+fifos:!sudo ./synctest -U -d -T 108;sleep 1;popall:control_c
|
||||
UE0:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 1907600480 -V -K /tmp/itti_UE0.log;sleep 1;popall:control_c
|
||||
UE0:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 2680000000 -V -K /tmp/itti_UE0.log;sleep 1;popall:control_c
|
||||
#EXMIMO2 card 5
|
||||
#UE0_smbv:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 1907598252 -V;sleep 1;popall:control_c
|
||||
#EXMIMO2 card 24
|
||||
#UE0_smbv:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 1907595776 -V;sleep 1;popall:control_c
|
||||
#EXMIMO2 card 38
|
||||
UE0_smbv:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 1907592704 -V;sleep 1;popall:control_c
|
||||
#UE0_smbv:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 1907592704 -V;sleep 1;popall:control_c
|
||||
#EXMIMO2 card 39
|
||||
UE0_smbv:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 2679998592 -V;sleep 1;popall:control_c
|
||||
UE850:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 859498000 -F ex2_850;sleep 1;popall:control_c
|
||||
eNB850:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -d -C 859500000 -F ex2_850;sleep 1;popall:control_c
|
||||
UE0noL2:lxrt+sem+mbx+msg+fifos:!sudo ./lte-softmodem -U -d -C 1907600480 --no-L2-connect;sleep 1;popall:control_c
|
||||
|
||||
@@ -114,8 +114,15 @@ OBJ += $(OPENAIR1_DIR)/SIMULATION/ETH_TRANSPORT/netlink_init.o
|
||||
CFLAGS += -DOPENAIR2 -DNO_RRM -DPUCCH -DMAC_CONTEXT=1
|
||||
endif
|
||||
|
||||
#ifdef ENABLE_ITTI
|
||||
RTAI_OBJ += $(UTILS_OBJS)
|
||||
#else
|
||||
#OBJ += $(UTILS_OBJS)
|
||||
#endif
|
||||
|
||||
ifdef SPECTRA
|
||||
CFLAGS += -DSPECTRA
|
||||
endif
|
||||
|
||||
#ifdef ENABLE_ITTI
|
||||
CFLAGS += -DEXMIMO_IOT
|
||||
@@ -334,7 +341,9 @@ run_eNB1:
|
||||
run_eNB2:
|
||||
rtai-load eNB2 --verbose
|
||||
|
||||
clean: common-clean
|
||||
clean: cleanmodem common-clean
|
||||
|
||||
cleanmodem:
|
||||
@$(RM_F_V) $(OBJ) $(RTAI_OBJ) $(OBJ_EMOS) $(OBJ_SYNC) $(USRP_OBJ)
|
||||
@$(RM_F_V) $(OBJ:.o=.d) $(RTAI_OBJ:.o=.d) $(OBJ_EMOS:.o=.d) $(OBJ_SYNC:.o=.d)
|
||||
@$(RM_F_V) $(OPENAIR2_DIR)/RRC/LITE/MESSAGES/asn1_msg.o $(OPENAIR2_DIR)/RRC/LITE/MESSAGES/asn1_msg.d
|
||||
@@ -357,7 +366,7 @@ cleancell:
|
||||
rm -f $(OPENAIR2_DIR)/NAS/SIMU_CELLULAR/*.o
|
||||
rm -f $(OPENAIR2_DIR)/NAS/SIMU_CELLULAR/*.d
|
||||
|
||||
cleanalmostall: clean
|
||||
cleanalmostall: cleanmodem
|
||||
rm -f $(ASN1_MSG_OBJS1)
|
||||
rm -rf condtest synctest lte-softmodem
|
||||
rm -rf synctest_eNB synctest_UE
|
||||
|
||||
+92
-30
@@ -1,54 +1,116 @@
|
||||
[*]
|
||||
[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
|
||||
[*] Wed Sep 17 09:53:22 2014
|
||||
[*] GTKWave Analyzer v3.3.34 (w)1999-2012 BSI
|
||||
[*] Tue Oct 7 13:02:39 2014
|
||||
[*]
|
||||
[dumpfile] "/tmp/openair_dump_eNB.vcd"
|
||||
[dumpfile_mtime] "Wed Sep 17 09:52:33 2014"
|
||||
[dumpfile_size] 53042998
|
||||
[savefile] "/homes/knopp/Devel/openair4G/trunk/targets/RT/USER/eNB.gtkw"
|
||||
[timestart] 13048857000
|
||||
[size] 1005 600
|
||||
[pos] -1 -1
|
||||
*-20.000000 13050255265 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
|
||||
[sst_width] 224
|
||||
[dumpfile_mtime] "Tue Oct 7 12:58:30 2014"
|
||||
[dumpfile_size] 88327623
|
||||
[savefile] "/homes/kaltenbe/Devel/openair/openair4G/trunk/targets/RT/USER/eNB.gtkw"
|
||||
[timestart] 3343980000
|
||||
[size] 1598 914
|
||||
[pos] -1 -5
|
||||
*-23.869305 3370560000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
|
||||
[sst_width] 284
|
||||
[signals_width] 230
|
||||
[sst_expanded] 1
|
||||
[sst_vpaned_height] 143
|
||||
@24
|
||||
[sst_vpaned_height] 132
|
||||
@c00420
|
||||
variables.daq_mbox[63:0]
|
||||
@28
|
||||
(0)variables.daq_mbox[63:0]
|
||||
(1)variables.daq_mbox[63:0]
|
||||
(2)variables.daq_mbox[63:0]
|
||||
(3)variables.daq_mbox[63:0]
|
||||
(4)variables.daq_mbox[63:0]
|
||||
(5)variables.daq_mbox[63:0]
|
||||
(6)variables.daq_mbox[63:0]
|
||||
(7)variables.daq_mbox[63:0]
|
||||
(8)variables.daq_mbox[63:0]
|
||||
(9)variables.daq_mbox[63:0]
|
||||
(10)variables.daq_mbox[63:0]
|
||||
(11)variables.daq_mbox[63:0]
|
||||
(12)variables.daq_mbox[63:0]
|
||||
(13)variables.daq_mbox[63:0]
|
||||
(14)variables.daq_mbox[63:0]
|
||||
(15)variables.daq_mbox[63:0]
|
||||
(16)variables.daq_mbox[63:0]
|
||||
(17)variables.daq_mbox[63:0]
|
||||
(18)variables.daq_mbox[63:0]
|
||||
(19)variables.daq_mbox[63:0]
|
||||
(20)variables.daq_mbox[63:0]
|
||||
(21)variables.daq_mbox[63:0]
|
||||
(22)variables.daq_mbox[63:0]
|
||||
(23)variables.daq_mbox[63:0]
|
||||
(24)variables.daq_mbox[63:0]
|
||||
(25)variables.daq_mbox[63:0]
|
||||
(26)variables.daq_mbox[63:0]
|
||||
(27)variables.daq_mbox[63:0]
|
||||
(28)variables.daq_mbox[63:0]
|
||||
(29)variables.daq_mbox[63:0]
|
||||
(30)variables.daq_mbox[63:0]
|
||||
(31)variables.daq_mbox[63:0]
|
||||
(32)variables.daq_mbox[63:0]
|
||||
(33)variables.daq_mbox[63:0]
|
||||
(34)variables.daq_mbox[63:0]
|
||||
(35)variables.daq_mbox[63:0]
|
||||
(36)variables.daq_mbox[63:0]
|
||||
(37)variables.daq_mbox[63:0]
|
||||
(38)variables.daq_mbox[63:0]
|
||||
(39)variables.daq_mbox[63:0]
|
||||
(40)variables.daq_mbox[63:0]
|
||||
(41)variables.daq_mbox[63:0]
|
||||
(42)variables.daq_mbox[63:0]
|
||||
(43)variables.daq_mbox[63:0]
|
||||
(44)variables.daq_mbox[63:0]
|
||||
(45)variables.daq_mbox[63:0]
|
||||
(46)variables.daq_mbox[63:0]
|
||||
(47)variables.daq_mbox[63:0]
|
||||
(48)variables.daq_mbox[63:0]
|
||||
(49)variables.daq_mbox[63:0]
|
||||
(50)variables.daq_mbox[63:0]
|
||||
(51)variables.daq_mbox[63:0]
|
||||
(52)variables.daq_mbox[63:0]
|
||||
(53)variables.daq_mbox[63:0]
|
||||
(54)variables.daq_mbox[63:0]
|
||||
(55)variables.daq_mbox[63:0]
|
||||
(56)variables.daq_mbox[63:0]
|
||||
(57)variables.daq_mbox[63:0]
|
||||
(58)variables.daq_mbox[63:0]
|
||||
(59)variables.daq_mbox[63:0]
|
||||
(60)variables.daq_mbox[63:0]
|
||||
(61)variables.daq_mbox[63:0]
|
||||
(62)variables.daq_mbox[63:0]
|
||||
(63)variables.daq_mbox[63:0]
|
||||
@1401600
|
||||
-group_end
|
||||
@420
|
||||
variables.hw_frame[63:0]
|
||||
variables.hw_subframe[63:0]
|
||||
@28
|
||||
functions.trx_read
|
||||
functions.trx_write
|
||||
@24
|
||||
variables.txcnt[63:0]
|
||||
variables.rxcnt[63:0]
|
||||
@25
|
||||
variables.frame_number_TX_eNB[63:0]
|
||||
variables.frame_number_RX_eNB[63:0]
|
||||
@28
|
||||
functions.phy_procedures_eNb_tx
|
||||
functions.phy_procedures_eNb_rx
|
||||
functions.phy_enb_prach_rx
|
||||
functions.phy_procedures_eNb_tx
|
||||
functions.eNB_thread_rx0
|
||||
functions.eNB_thread_tx0
|
||||
functions.eNB_thread_rx1
|
||||
functions.eNB_thread_tx1
|
||||
functions.eNB_thread_rx2
|
||||
functions.eNB_thread_tx2
|
||||
functions.eNB_thread_rx3
|
||||
functions.eNB_thread_tx3
|
||||
functions.eNB_thread_rx4
|
||||
functions.eNB_thread_tx4
|
||||
functions.eNB_thread_rx5
|
||||
functions.eNB_thread_tx5
|
||||
functions.eNB_thread_rx6
|
||||
functions.eNB_thread_tx6
|
||||
functions.eNB_thread_rx7
|
||||
functions.eNB_thread_tx7
|
||||
functions.eNB_thread_rx8
|
||||
functions.eNB_thread_tx8
|
||||
functions.eNB_thread_rx9
|
||||
functions.eNB_thread_tx0
|
||||
functions.eNB_thread_tx1
|
||||
functions.eNB_thread_tx2
|
||||
functions.eNB_thread_tx3
|
||||
functions.eNB_thread_tx4
|
||||
functions.eNB_thread_tx5
|
||||
functions.eNB_thread_tx6
|
||||
functions.eNB_thread_tx7
|
||||
functions.eNB_thread_tx8
|
||||
@29
|
||||
functions.eNB_thread_tx9
|
||||
[pattern_trace] 1
|
||||
[pattern_trace] 0
|
||||
|
||||
@@ -28,11 +28,12 @@ if [ $DEVICE == '2208' ]; then
|
||||
else
|
||||
if [ $DEVICE == '2209' ]; then
|
||||
echo "Using firmware version 9"
|
||||
#$OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/updatefw -s 0x43fffff0 -b -f $OPENAIR0_DIR/express-mimo/software/sdr/exmimo2/sdr_expressmimo2
|
||||
$OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/updatefw -s 0x43fffff0 -b -f $OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/sdr_expressmimo2_v9
|
||||
else
|
||||
if [ $DEVICE == '220a' ]; then
|
||||
echo "Using firware version 10"
|
||||
#$OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/updatefw -s 0x43fffff0 -b -f $OPENAIR0_DIR/express-mimo/software/sdr/exmimo2/sdr_expressmimo2
|
||||
#$OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/updatefw -s 0x43fffff0 -b -f $OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/sdr_expressmimo2_v10_spectra
|
||||
$OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/updatefw -s 0x43fffff0 -b -f $OPENAIR_TARGETS/ARCH/EXMIMO/USERSPACE/OAI_FW_INIT/sdr_expressmimo2_v10
|
||||
else
|
||||
echo 'No corresponding firmware found'
|
||||
|
||||
+110
-34
@@ -240,8 +240,9 @@ static char UE_flag=0;
|
||||
static uint8_t eNB_id=0,UE_id=0;
|
||||
|
||||
//uint32_t carrier_freq[MAX_NUM_CCs][4] = {{1907600000,1907600000,1907600000,1907600000}}; /* For UE! */
|
||||
static uint32_t downlink_frequency[MAX_NUM_CCs][4] = {{1907600000,1907600000,1907600000,1907600000}};
|
||||
static int32_t uplink_frequency_offset[MAX_NUM_CCs][4]= {{0,0,0,0}};
|
||||
static uint32_t downlink_frequency[MAX_NUM_CCs][4] = {{1907600000,1907600000,1907600000,1907600000},
|
||||
{1907600000,1907600000,1907600000,1907600000}};
|
||||
static int32_t uplink_frequency_offset[MAX_NUM_CCs][4]= {{0,0,0,0},{0,0,0,0}};
|
||||
|
||||
openair0_rf_map rf_map[MAX_NUM_CCs];
|
||||
|
||||
@@ -251,8 +252,8 @@ static char *itti_dump_file = NULL;
|
||||
#endif
|
||||
|
||||
#ifndef USRP
|
||||
double tx_gain[MAX_NUM_CCs][4] = {{20,20,0,0}};
|
||||
double rx_gain[MAX_NUM_CCs][4] = {{20,20,0,0}};
|
||||
double tx_gain[MAX_NUM_CCs][4] = {{20,20,0,0},{20,20,0,0}};
|
||||
double rx_gain[MAX_NUM_CCs][4] = {{20,20,0,0},{20,20,0,0}};
|
||||
// these are for EXMIMO2 target only
|
||||
/*
|
||||
static unsigned int rxg_max[4] = {133,133,133,133};
|
||||
@@ -266,7 +267,7 @@ static unsigned int rxg_byp[4] = {116,117,116,116};
|
||||
static unsigned int nf_max[4] = {7,9,16,12};
|
||||
static unsigned int nf_med[4] = {12,13,22,17};
|
||||
static unsigned int nf_byp[4] = {15,20,29,23};
|
||||
static rx_gain_t rx_gain_mode[MAX_NUM_CCs][4] = {{max_gain,max_gain,max_gain,max_gain}};
|
||||
static rx_gain_t rx_gain_mode[MAX_NUM_CCs][4] = {{max_gain,max_gain,max_gain,max_gain},{max_gain,max_gain,max_gain,max_gain}};
|
||||
#else
|
||||
double tx_gain[MAX_NUM_CCs][4] = {{120,0,0,0}};
|
||||
double rx_gain[MAX_NUM_CCs][4] = {{50,0,0,0}};
|
||||
@@ -275,7 +276,7 @@ double rx_gain[MAX_NUM_CCs][4] = {{50,0,0,0}};
|
||||
double sample_rate=30.72e6;
|
||||
double bw = 14e6;
|
||||
|
||||
static int tx_max_power[MAX_NUM_CCs] = {{0}};
|
||||
static int tx_max_power[MAX_NUM_CCs] = {0,0};
|
||||
|
||||
#ifdef USRP
|
||||
char ref[128] = "internal";
|
||||
@@ -336,7 +337,7 @@ static LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
|
||||
|
||||
int multi_thread=1;
|
||||
uint32_t target_dl_mcs = 28; //maximum allowed mcs
|
||||
uint32_t target_ul_mcs = 8;
|
||||
uint32_t target_ul_mcs = 10;
|
||||
|
||||
|
||||
int16_t glog_level=LOG_DEBUG;
|
||||
@@ -379,6 +380,7 @@ void signal_handler(int sig)
|
||||
exit(-1);
|
||||
}
|
||||
else {
|
||||
printf("trying to exit gracefully...\n");
|
||||
oai_exit = 1;
|
||||
}
|
||||
}
|
||||
@@ -432,6 +434,32 @@ static void set_latency_target(void)
|
||||
}
|
||||
|
||||
#ifdef XFORMS
|
||||
|
||||
void reset_stats(FL_OBJECT *button, long arg) {
|
||||
int i,j,k;
|
||||
PHY_VARS_eNB *phy_vars_eNB = PHY_vars_eNB_g[0][0];
|
||||
for (k=0;k<8;k++) {//harq_processes
|
||||
for (j=0;j<phy_vars_eNB->dlsch_eNB[i][0]->Mdlharq;j++) {
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_NAK[k][j]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_ACK[k][j]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_trials[k][j]=0;
|
||||
}
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_l2_errors[k]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_errors[k]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_consecutive_errors=0;
|
||||
for (j=0;j<phy_vars_eNB->ulsch_eNB[i]->Mdlharq;j++) {
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts[k][j]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_decoding_attempts_last[k][j]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_errors[k][j]=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].ulsch_round_fer[k][j]=0;
|
||||
}
|
||||
}
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_sliding_cnt=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_NAK_round0=0;
|
||||
phy_vars_eNB->eNB_UE_stats[i].dlsch_mcs_offset=0;
|
||||
|
||||
}
|
||||
|
||||
static void *scope_thread(void *arg) {
|
||||
char stats_buffer[16384];
|
||||
# ifdef ENABLE_XFORMS_WRITE_STATS
|
||||
@@ -676,16 +704,16 @@ void *sensing (void *arg)
|
||||
while (oai_exit==0) {
|
||||
|
||||
|
||||
openair0_cfg[1].rx_freq[0]+= 5e6;
|
||||
if (openair0_cfg[1].rx_freq[0] >= 750000000)
|
||||
openair0_cfg[1].rx_freq[0] = 727500000;
|
||||
openair0_cfg[0].rx_freq[2]+= 5e6;
|
||||
if (openair0_cfg[0].rx_freq[2] >= 750000000)
|
||||
openair0_cfg[0].rx_freq[2] = 727500000;
|
||||
|
||||
|
||||
LOG_I(HW,"[SPECTRA] changing frequency to %u \n",(uint32_t)openair0_cfg[1].rx_freq[0]);
|
||||
//LOG_I(HW,"[SPECTRA] changing frequency to %u \n",(uint32_t)openair0_cfg[1].rx_freq[0]);
|
||||
|
||||
openair0_reconfig(&openair0_cfg[0]);
|
||||
|
||||
usleep(250000);
|
||||
usleep(200000);
|
||||
//sleep(1);
|
||||
|
||||
}
|
||||
@@ -1233,17 +1261,15 @@ static void *eNB_thread(void *arg)
|
||||
int hw_slot,delay_cnt;
|
||||
int diff;
|
||||
int ret;
|
||||
|
||||
int first_run=1;
|
||||
#else
|
||||
unsigned int rx_cnt = 0;
|
||||
unsigned int tx_cnt = tx_delay;
|
||||
// int tx_offset;
|
||||
|
||||
hw_subframe = 0;
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(ENABLE_ITTI)
|
||||
/* Wait for eNB application initialization to be complete (eNB registration to MME) */
|
||||
wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB);
|
||||
@@ -1305,6 +1331,14 @@ static void *eNB_thread(void *arg)
|
||||
else
|
||||
diff = mbox_target - mbox_current;
|
||||
|
||||
//when we start the aquisition we want to start with slot 0, so we rather wait for the hardware than to advance the slot number (a positive diff will cause the programm to go into the second if clause rather than the first)
|
||||
if (first_run==1) {
|
||||
first_run=0;
|
||||
if (diff<0)
|
||||
diff = diff +150;
|
||||
LOG_I(HW,"eNB Frame %d, time %llu: diff %d\n",frame, rt_get_time_ns(), diff);
|
||||
}
|
||||
|
||||
if (((slot%2==0) && (diff < (-14))) || ((slot%2==1) && (diff < (-7)))) {
|
||||
// at the eNB, even slots have double as much time since most of the processing is done here and almost nothing in odd slots
|
||||
LOG_D(HW,"eNB Frame %d, time %llu: missed slot, proceeding with next one (slot %d, hw_slot %d, diff %d)\n",frame, rt_get_time_ns(), slot, hw_slot, diff);
|
||||
@@ -1466,7 +1500,7 @@ static void *eNB_thread(void *arg)
|
||||
}
|
||||
*/
|
||||
//}
|
||||
|
||||
|
||||
if ((slot&1) == 1) {
|
||||
#ifndef USRP
|
||||
sf = ((slot>>1)+1)%10;
|
||||
@@ -2052,7 +2086,7 @@ static void *UE_thread(void *arg) {
|
||||
int hw_slot_offset=0,rx_offset_mbox=0,mbox_target=0,mbox_current=0;
|
||||
int diff2;
|
||||
int i, ret;
|
||||
int CC_id;
|
||||
int CC_id,card;
|
||||
volatile unsigned int *DAQ_MBOX = openair0_daq_cnt();
|
||||
#ifndef USRP
|
||||
//exmimo_config_t *p_exmimo_config = openair0_exmimo_pci[card].exmimo_config_ptr;;
|
||||
@@ -2213,7 +2247,8 @@ static void *UE_thread(void *arg) {
|
||||
is_synchronized = 1;
|
||||
//start the DMA transfers
|
||||
//LOG_D(HW,"Before openair0_start_rt_acquisition \n");
|
||||
openair0_start_rt_acquisition(0);
|
||||
for (card=0;card<openair0_num_detected_cards;card++)
|
||||
openair0_start_rt_acquisition(card);
|
||||
|
||||
hw_slot_offset = (PHY_vars_UE_g[0][0]->rx_offset<<1) / PHY_vars_UE_g[0][0]->lte_frame_parms.samples_per_tti;
|
||||
//LOG_D(HW,"Got synch: hw_slot_offset %d\n",hw_slot_offset);
|
||||
@@ -2562,8 +2597,8 @@ int main(int argc, char **argv) {
|
||||
int *eNB_thread_status_p;
|
||||
// int *eNB_thread_status_rx[10],*eNB_thread_status_tx[10];
|
||||
#endif
|
||||
int i,j,aa;
|
||||
#if defined (XFORMS) || defined (EMOS) || (! defined (RTAI))
|
||||
int i,j,aa,card;
|
||||
#if defined (XFORMS) || defined (EMOS) || (! defined (RTAI)) || defined (SPECTRA)
|
||||
void *status;
|
||||
#endif
|
||||
|
||||
@@ -2584,7 +2619,7 @@ int main(int argc, char **argv) {
|
||||
|
||||
// int ret, ant;
|
||||
int ant_offset=0;
|
||||
#ifdef XFORMS
|
||||
#if defined (XFORMS) || defined (SPECTRA)
|
||||
int ret;
|
||||
#endif
|
||||
#if defined (EMOS) || (! defined (RTAI))
|
||||
@@ -2819,9 +2854,25 @@ int main(int argc, char **argv) {
|
||||
|
||||
NB_UE_INST=1;
|
||||
NB_INST=1;
|
||||
|
||||
|
||||
#ifndef USRP
|
||||
//N_TA_offset
|
||||
if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||
if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.N_RB_DL == 100)
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 624;
|
||||
else if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.N_RB_DL == 50)
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 624/2;
|
||||
else if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.N_RB_DL == 25)
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 624/4;
|
||||
}
|
||||
else {
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 0;
|
||||
}
|
||||
#else
|
||||
//already taken care of in lte-softmodem
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 0;
|
||||
#endif
|
||||
openair_daq_vars.manual_timing_advance = 0;
|
||||
//openair_daq_vars.timing_advance = TIMING_ADVANCE_HW;
|
||||
openair_daq_vars.rx_gain_mode = DAQ_AGC_ON;
|
||||
openair_daq_vars.auto_freq_correction = 0;
|
||||
openair_daq_vars.use_ia_receiver = 0;
|
||||
@@ -2867,6 +2918,25 @@ int main(int argc, char **argv) {
|
||||
for (i=0;i<4;i++)
|
||||
rx_gain_mode[CC_id][i] = max_gain;
|
||||
#endif
|
||||
|
||||
#ifndef USRP
|
||||
//N_TA_offset
|
||||
if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||
if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.N_RB_DL == 100)
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 624;
|
||||
else if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.N_RB_DL == 50)
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 624/2;
|
||||
else if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.N_RB_DL == 25)
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 624/4;
|
||||
}
|
||||
else {
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 0;
|
||||
}
|
||||
#else
|
||||
//already taken care of in lte-softmodem
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 0;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -2997,7 +3067,7 @@ int main(int argc, char **argv) {
|
||||
|
||||
for(CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
|
||||
rf_map[CC_id].card=0;
|
||||
rf_map[CC_id].chain=CC_id;
|
||||
rf_map[CC_id].chain=CC_id+1;
|
||||
}
|
||||
|
||||
// connect the TX/RX buffers
|
||||
@@ -3029,11 +3099,15 @@ int main(int argc, char **argv) {
|
||||
}
|
||||
#ifdef SPECTRA
|
||||
//setup the last channel for sensing
|
||||
openair0_cfg[1].rx_freq[0] = 727500000;
|
||||
openair0_cfg[1].tx_freq[0] = 727500000;
|
||||
openair0_cfg[1].tx_gain[0] = 0;
|
||||
openair0_cfg[1].rx_gain[0] = 30;
|
||||
openair0_cfg[1].rxg_mode[0] = max_gain;
|
||||
openair0_cfg[0].rx_freq[2] = 727500000;
|
||||
openair0_cfg[0].tx_freq[2] = 727500000;
|
||||
openair0_cfg[0].tx_gain[2] = 0;
|
||||
openair0_cfg[0].rx_gain[2] = 30;
|
||||
openair0_cfg[0].rxg_mode[2] = max_gain;
|
||||
|
||||
//fill LSBs of tx buffer with 1s to put switch in RX mode
|
||||
for (i=0; i<ADAC_BUFFERSZ_PERCHAN_B; i++)
|
||||
openair0_exmimo_pci[0].adc_head[2][i]=0x00010001;
|
||||
#endif
|
||||
}
|
||||
#ifndef USRP
|
||||
@@ -3098,7 +3172,8 @@ int main(int argc, char **argv) {
|
||||
// this starts the DMA transfers
|
||||
#ifndef USRP
|
||||
if (UE_flag!=1)
|
||||
openair0_start_rt_acquisition(0);
|
||||
for (card=0;card<openair0_num_detected_cards;card++)
|
||||
openair0_start_rt_acquisition(card);
|
||||
#endif
|
||||
|
||||
#ifdef XFORMS
|
||||
@@ -3244,6 +3319,7 @@ int main(int argc, char **argv) {
|
||||
#if defined(ENABLE_ITTI)
|
||||
printf("Entering ITTI signals handler\n");
|
||||
itti_wait_tasks_end();
|
||||
oai_exit=1;
|
||||
#else
|
||||
while (oai_exit==0)
|
||||
rt_sleep_ns(FRAME_PERIOD);
|
||||
@@ -3287,12 +3363,12 @@ int main(int argc, char **argv) {
|
||||
#endif
|
||||
}
|
||||
else {
|
||||
#ifdef RTAI
|
||||
rt_thread_join(main_eNB_thread);
|
||||
#else
|
||||
#ifdef DEBUG_THREADS
|
||||
printf("Joining eNB_thread ...");
|
||||
#endif
|
||||
#ifdef RTAI
|
||||
rt_thread_join(main_eNB_thread);
|
||||
#else
|
||||
pthread_join(main_eNB_thread,(void**)&eNB_thread_status_p);
|
||||
#ifdef DEBUG_THREADS
|
||||
printf("status %d\n",*eNB_thread_status_p);
|
||||
|
||||
@@ -23,6 +23,12 @@ create_form_stats_form( void )
|
||||
fdui->stats_text = obj = fl_add_text( FL_NORMAL_TEXT, 60, 50, 1000, 810, "test" );
|
||||
fl_set_object_lsize( obj, FL_TINY_SIZE );
|
||||
|
||||
fdui->stats_button = obj = fl_add_button( FL_PUSH_BUTTON, 620, 660, 130, 40, "Reset Stats" );
|
||||
fl_set_object_lalign( obj, FL_ALIGN_CENTER );
|
||||
fl_set_object_color( obj, FL_GREEN, FL_GREEN);
|
||||
fl_set_object_callback( obj, reset_stats, 0 );
|
||||
|
||||
|
||||
fl_end_form( );
|
||||
|
||||
fdui->stats_form->fdui = fdui;
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
|
||||
/* Callbacks, globals and object handlers */
|
||||
|
||||
|
||||
extern void reset_stats( FL_OBJECT *, long );
|
||||
|
||||
/* Forms and Objects */
|
||||
|
||||
@@ -17,6 +17,7 @@ typedef struct {
|
||||
char * cdata;
|
||||
long ldata;
|
||||
FL_OBJECT * stats_text;
|
||||
FL_OBJECT * stats_button;
|
||||
} FD_stats_form;
|
||||
|
||||
extern FD_stats_form * create_form_stats_form( void );
|
||||
|
||||
@@ -850,9 +850,42 @@ void init_openair1(void) {
|
||||
openair_daq_vars.dlsch_rate_adaptation = rate_adaptation_flag;
|
||||
openair_daq_vars.use_ia_receiver = 0;
|
||||
|
||||
//N_TA_offset
|
||||
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
|
||||
for (UE_id=0; UE_id<NB_UE_INST;UE_id++){
|
||||
if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||
if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.N_RB_DL == 100)
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 624;
|
||||
else if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.N_RB_DL == 50)
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 624/2;
|
||||
else if (PHY_vars_UE_g[UE_id][CC_id]->lte_frame_parms.N_RB_DL == 25)
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 624/4;
|
||||
}
|
||||
else {
|
||||
PHY_vars_UE_g[UE_id][CC_id]->N_TA_offset = 0;
|
||||
}
|
||||
}
|
||||
for (eNB_id=0; eNB_id<NB_eNB_INST;eNB_id++){
|
||||
if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.frame_type == TDD) {
|
||||
if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.N_RB_DL == 100)
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 624;
|
||||
else if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.N_RB_DL == 50)
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 624/2;
|
||||
else if (PHY_vars_eNB_g[eNB_id][CC_id]->lte_frame_parms.N_RB_DL == 25)
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 624/4;
|
||||
}
|
||||
else {
|
||||
PHY_vars_eNB_g[eNB_id][CC_id]->N_TA_offset = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// init_ue_status();
|
||||
for (UE_id=0; UE_id<NB_UE_INST;UE_id++)
|
||||
for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++){
|
||||
|
||||
PHY_vars_UE_g[UE_id][CC_id]->tx_power_max_dBm=23;
|
||||
|
||||
PHY_vars_UE_g[UE_id][CC_id]->rx_total_gain_dB=160;
|
||||
// update UE_mode for each eNB_id not just 0
|
||||
if (abstraction_flag == 0)
|
||||
|
||||
Reference in New Issue
Block a user