first version of phy only test
This commit is contained in:
@@ -271,6 +271,8 @@ typedef struct PHY_VARS_eNB_s {
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int **dl_precoder_SeNB[3];
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char log2_maxp; /// holds the maximum channel/precoder coefficient
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int mac_enabled;
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/// For emulation only (used by UE abstraction to retrieve DCI)
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uint8_t num_common_dci[2]; // num_dci in even/odd subframes
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uint8_t num_ue_spec_dci[2]; // num_dci in even/odd subframes
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@@ -0,0 +1,732 @@
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/*******************************************************************************
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OpenAirInterface
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Copyright(c) 1999 - 2014 Eurecom
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OpenAirInterface is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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OpenAirInterface is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with OpenAirInterface.The full GNU General Public License is
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included in this distribution in the file called "COPYING". If not,
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see <http://www.gnu.org/licenses/>.
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Contact Information
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OpenAirInterface Admin: openair_admin@eurecom.fr
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OpenAirInterface Tech : openair_tech@eurecom.fr
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OpenAirInterface Dev : openair4g-devel@lists.eurecom.fr
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Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
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*******************************************************************************/
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/*! \file phy_mac_stub.c
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* \brief stimulates the phy without mac
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* \author R. Knopp, F. Kaltenberger, N. Nikaein
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* \date 2011
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* \version 0.1
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* \company Eurecom
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* \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr,navid.nikaein@eurecom.fr
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* \note
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* \warning
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*/
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#include "PHY/defs.h"
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#include "PHY/extern.h"
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#include "MAC_INTERFACE/defs.h"
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#include "MAC_INTERFACE/extern.h"
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#include "SCHED/defs.h"
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#include "SCHED/extern.h"
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#include "LAYER2/MAC/extern.h"
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#ifdef EMOS
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#include "SCHED/phy_procedures_emos.h"
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#endif
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void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_eNB)
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{
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int i;
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uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
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uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
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uint32_t rballoc = 0x7FFF;
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uint32_t rballoc2 = 0x000F;
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int subframe = phy_vars_eNB->proc[sched_subframe].subframe_tx;
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LTE_eNB_DLSCH_t *DLSCH_ptr = phy_vars_eNB->dlsch_eNB[0][0];
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/*
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uint32_t rand = taus();
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if ((subframe==8) || (subframe==9) || (subframe==0))
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rand = (rand%5)+5;
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else
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rand = (rand%4)+5;
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*/
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uint32_t bcch_pdu;
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uint64_t dlsch_pdu;
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DCI_pdu->Num_common_dci = 0;
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DCI_pdu->Num_ue_spec_dci=0;
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switch (subframe) {
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case 5:
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DCI_pdu->Num_common_dci = 1;
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DCI_pdu->dci_alloc[0].L = 2;
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DCI_pdu->dci_alloc[0].rnti = SI_RNTI;
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DCI_pdu->dci_alloc[0].format = format1A;
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DCI_pdu->dci_alloc[0].ra_flag = 0;
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switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
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case 6:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
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} else {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
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((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
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}
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break;
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case 25:
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default:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_FDD_t;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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((DCI1A_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
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} else {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
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((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
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}
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break;
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case 50:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_FDD_t;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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((DCI1A_10MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
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} else {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t;
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
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((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
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}
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break;
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case 100:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_FDD_t;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->type = 1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rv = 1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
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((DCI1A_20MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
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} else {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
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((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
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}
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break;
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}
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case 6:
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/*
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DCI_pdu->Num_ue_spec_dci = 1;
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_M10PRB_TDD_t;
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DCI_pdu->dci_alloc[0].L = 2;
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DCI_pdu->dci_alloc[0].rnti = 0x1236;
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DCI_pdu->dci_alloc[0].format = format2_2A_M10PRB;
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DCI_pdu->dci_alloc[0].ra_flag = 0;
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DLSCH_alloc_pdu1.rballoc = 0x00ff;
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DLSCH_alloc_pdu1.TPC = 0;
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DLSCH_alloc_pdu1.dai = 0;
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DLSCH_alloc_pdu1.harq_pid = 0;
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DLSCH_alloc_pdu1.tb_swap = 0;
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DLSCH_alloc_pdu1.mcs1 = 0;
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DLSCH_alloc_pdu1.ndi1 = 1;
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DLSCH_alloc_pdu1.rv1 = 0;
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DLSCH_alloc_pdu1.tpmi = 0;
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1,sizeof(DCI2_5MHz_2A_M10PRB_TDD_t));
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*/
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break;
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case 7:
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DCI_pdu->Num_ue_spec_dci = 1;
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DCI_pdu->dci_alloc[0].L = 2;
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DCI_pdu->dci_alloc[0].rnti = 0x1235;
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DCI_pdu->dci_alloc[0].format = format1;
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DCI_pdu->dci_alloc[0].ra_flag = 0;
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if (transmission_mode<3) {
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//user 1
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switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
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case 25:
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if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
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//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
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/*
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//user2
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DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
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DCI_pdu->dci_alloc[1].L = 2;
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DCI_pdu->dci_alloc[1].rnti = 0x1236;
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DCI_pdu->dci_alloc[1].format = format1;
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DCI_pdu->dci_alloc[1].ra_flag = 0;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
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//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
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((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
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memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
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*/
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} else {
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DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
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((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
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((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
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((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
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((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
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((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
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//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
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((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
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((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
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memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
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/*
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//user2
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DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
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DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
|
||||
*/
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case 50:
|
||||
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_FDD_t;
|
||||
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
|
||||
|
||||
/*
|
||||
//user2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
|
||||
*/
|
||||
} else {
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_TDD_t;
|
||||
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
|
||||
|
||||
/*
|
||||
//user2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
|
||||
*/
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case 100:
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
|
||||
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
|
||||
|
||||
/*
|
||||
//user2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
|
||||
*/
|
||||
} else {
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_20MHz_TDD_t;
|
||||
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t));
|
||||
|
||||
/*
|
||||
//user2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_20MHz_TDD_t;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
|
||||
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
|
||||
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
|
||||
*/
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
} else if (transmission_mode==5) {
|
||||
DCI_pdu->Num_ue_spec_dci = 2;
|
||||
// user 1
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
|
||||
DCI_pdu->dci_alloc[0].L = 3;
|
||||
DCI_pdu->dci_alloc[0].rnti = 0x1235;
|
||||
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 0;
|
||||
|
||||
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
|
||||
DLSCH_alloc_pdu1E.rv = 0;
|
||||
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
|
||||
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
|
||||
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
|
||||
DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
|
||||
DLSCH_alloc_pdu1E.dai = 0;
|
||||
DLSCH_alloc_pdu1E.TPC = 0;
|
||||
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu1E.rah = 0;
|
||||
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
|
||||
//user 2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
|
||||
DCI_pdu->dci_alloc[1].L = 0;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
//DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
|
||||
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
|
||||
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28);
|
||||
phy_vars_eNB->eNB_UE_stats[1].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
|
||||
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
|
||||
// set the precoder of the second UE orthogonal to the first
|
||||
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
/*
|
||||
case 8:
|
||||
DCI_pdu->Num_common_dci = 1;
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
|
||||
DCI_pdu->dci_alloc[0].L = 2;
|
||||
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
|
||||
DCI_pdu->dci_alloc[0].format = format1A;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 1;
|
||||
|
||||
RA_alloc_pdu.type = 1;
|
||||
RA_alloc_pdu.vrb_type = 0;
|
||||
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
|
||||
RA_alloc_pdu.ndi = 1;
|
||||
RA_alloc_pdu.rv = 1;
|
||||
RA_alloc_pdu.mcs = 4;
|
||||
RA_alloc_pdu.harq_pid = 0;
|
||||
RA_alloc_pdu.TPC = 1;
|
||||
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
|
||||
break;
|
||||
*/
|
||||
case 9:
|
||||
DCI_pdu->Num_ue_spec_dci = 1;
|
||||
|
||||
//user 1
|
||||
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD)
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_FDD_t ;
|
||||
else
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
|
||||
|
||||
DCI_pdu->dci_alloc[0].L = 2;
|
||||
DCI_pdu->dci_alloc[0].rnti = 0x1235;
|
||||
DCI_pdu->dci_alloc[0].format = format0;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 0;
|
||||
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
UL_alloc_pdu.cshift = 0;
|
||||
UL_alloc_pdu.dai = 0;
|
||||
UL_alloc_pdu.cqi_req = 1;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
|
||||
|
||||
// user 2
|
||||
/*
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format0;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
if (cooperation_flag==0)
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
|
||||
else
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
if ((cooperation_flag==0) || (cooperation_flag==1))
|
||||
UL_alloc_pdu.cshift = 0;
|
||||
else
|
||||
UL_alloc_pdu.cshift = 1;
|
||||
UL_alloc_pdu.dai = 0;
|
||||
UL_alloc_pdu.cqi_req = 1;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
|
||||
*/
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
DCI_pdu->nCCE = 0;
|
||||
|
||||
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
|
||||
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eNB)
|
||||
{
|
||||
|
||||
int i;
|
||||
uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
|
||||
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
|
||||
|
||||
//uint32_t rballoc = 0x00F0;
|
||||
//uint32_t rballoc2 = 0x000F;
|
||||
/*
|
||||
uint32_t rand = taus();
|
||||
if ((subframe==8) || (subframe==9) || (subframe==0))
|
||||
rand = (rand%5)+5;
|
||||
else
|
||||
rand = (rand%4)+5;
|
||||
*/
|
||||
|
||||
DCI_pdu->Num_common_dci = 0;
|
||||
DCI_pdu->Num_ue_spec_dci=0;
|
||||
|
||||
switch (subframe) {
|
||||
case 5:
|
||||
DCI_pdu->Num_ue_spec_dci = 1;
|
||||
|
||||
if (transmission_mode<3) {
|
||||
//user 1
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
|
||||
DCI_pdu->dci_alloc[0].L = 2;
|
||||
DCI_pdu->dci_alloc[0].rnti = 0x1235;
|
||||
DCI_pdu->dci_alloc[0].format = format1;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 0;
|
||||
|
||||
DLSCH_alloc_pdu.rballoc = openair_daq_vars.ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu.TPC = 0;
|
||||
DLSCH_alloc_pdu.dai = 0;
|
||||
DLSCH_alloc_pdu.harq_pid = 1;
|
||||
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu.ndi = 1;
|
||||
DLSCH_alloc_pdu.rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
|
||||
|
||||
/*
|
||||
//user2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
DLSCH_alloc_pdu.rballoc = rballoc2;
|
||||
DLSCH_alloc_pdu.TPC = 0;
|
||||
DLSCH_alloc_pdu.dai = 0;
|
||||
DLSCH_alloc_pdu.harq_pid = 1;
|
||||
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu.ndi = 1;
|
||||
DLSCH_alloc_pdu.rv = 0;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
|
||||
*/
|
||||
} else if (transmission_mode==5) {
|
||||
DCI_pdu->Num_ue_spec_dci = 2;
|
||||
// user 1
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
|
||||
DCI_pdu->dci_alloc[0].L = 2;
|
||||
DCI_pdu->dci_alloc[0].rnti = 0x1235;
|
||||
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 0;
|
||||
|
||||
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
|
||||
DLSCH_alloc_pdu1E.rv = 0;
|
||||
DLSCH_alloc_pdu1E.ndi = 1;
|
||||
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
|
||||
DLSCH_alloc_pdu1E.harq_pid = 1;
|
||||
DLSCH_alloc_pdu1E.dai = 0;
|
||||
DLSCH_alloc_pdu1E.TPC = 0;
|
||||
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
|
||||
DLSCH_alloc_pdu1E.rah = 0;
|
||||
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
|
||||
//user 2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
|
||||
|
||||
// set the precoder of the second UE orthogonal to the first
|
||||
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case 7:
|
||||
DCI_pdu->Num_common_dci = 1;
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
|
||||
DCI_pdu->dci_alloc[0].L = 2;
|
||||
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
|
||||
DCI_pdu->dci_alloc[0].format = format1A;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 1;
|
||||
|
||||
RA_alloc_pdu.type = 1;
|
||||
RA_alloc_pdu.vrb_type = 0;
|
||||
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
|
||||
RA_alloc_pdu.ndi = 1;
|
||||
RA_alloc_pdu.rv = 1;
|
||||
RA_alloc_pdu.mcs = 4;
|
||||
RA_alloc_pdu.harq_pid = 0;
|
||||
RA_alloc_pdu.TPC = 1;
|
||||
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
|
||||
break;
|
||||
|
||||
case 9:
|
||||
DCI_pdu->Num_ue_spec_dci = 1;
|
||||
|
||||
//user 1
|
||||
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
|
||||
DCI_pdu->dci_alloc[0].L = 2;
|
||||
DCI_pdu->dci_alloc[0].rnti = 0x1235;
|
||||
DCI_pdu->dci_alloc[0].format = format0;
|
||||
DCI_pdu->dci_alloc[0].ra_flag = 0;
|
||||
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = 1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
UL_alloc_pdu.cshift = 0;
|
||||
UL_alloc_pdu.dai = 0;
|
||||
UL_alloc_pdu.cqi_req = 1;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
|
||||
|
||||
/*
|
||||
//user 2
|
||||
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
|
||||
DCI_pdu->dci_alloc[1].L = 2;
|
||||
DCI_pdu->dci_alloc[1].rnti = 0x1236;
|
||||
DCI_pdu->dci_alloc[1].format = format0;
|
||||
DCI_pdu->dci_alloc[1].ra_flag = 0;
|
||||
|
||||
UL_alloc_pdu.type = 0;
|
||||
UL_alloc_pdu.hopping = 0;
|
||||
if (cooperation_flag==0)
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
|
||||
else
|
||||
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
|
||||
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
|
||||
UL_alloc_pdu.ndi = 1;
|
||||
UL_alloc_pdu.TPC = 0;
|
||||
if ((cooperation_flag==0) || (cooperation_flag==1))
|
||||
UL_alloc_pdu.cshift = 0;
|
||||
else
|
||||
UL_alloc_pdu.cshift = 1;
|
||||
UL_alloc_pdu.dai = 0;
|
||||
UL_alloc_pdu.cqi_req = 1;
|
||||
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
|
||||
*/
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
DCI_pdu->nCCE = 0;
|
||||
|
||||
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
|
||||
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
|
||||
}
|
||||
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user