improvements in retxBSR_Timer implementation
This commit is contained in:
@@ -1591,6 +1591,50 @@ static uint32_t get_sr_DelayTimer(long logicalChannelSR_DelayTimer)
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return timer;
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}
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static uint32_t nr_get_sf_retxBSRTimer(long retxBSR_Timer)
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{
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uint32_t timer = 0;
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switch (retxBSR_Timer) {
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case NR_BSR_Config__retxBSR_Timer_sf10:
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timer = 10;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf20:
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timer = 20;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf40:
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timer = 40;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf80:
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timer = 80;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf160:
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timer = 160;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf320:
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timer = 320;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf640:
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timer = 640;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf1280:
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timer = 1280;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf2560:
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timer = 2560;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf5120:
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timer = 5120;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf10240:
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timer = 10240;
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break;
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default:
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AssertFatal(false, "Invalid retxBSR_Timer %ld\n", retxBSR_Timer);
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}
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return timer;
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}
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static void configure_maccellgroup(NR_UE_MAC_INST_t *mac, const NR_MAC_CellGroupConfig_t *mcg)
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{
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NR_UE_SCHEDULING_INFO *si = &mac->scheduling_info;
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@@ -1626,10 +1670,11 @@ static void configure_maccellgroup(NR_UE_MAC_INST_t *mac, const NR_MAC_CellGroup
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if (mcg->bsr_Config) {
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int subframes_per_slot = nr_slots_per_frame[mac->current_UL_BWP->scs] / 10;
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si->periodicBSR_Timer = mcg->bsr_Config->periodicBSR_Timer;
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si->retxBSR_Timer = mcg->bsr_Config->retxBSR_Timer;
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uint32_t retx_sf = nr_get_sf_retxBSRTimer(mcg->bsr_Config->retxBSR_Timer);
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nr_timer_setup(&si->retxBSR_Timer, retx_sf * subframes_per_slot, 1); // 1 slot update rate
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if (mcg->bsr_Config->logicalChannelSR_DelayTimer) {
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uint32_t target_sf = get_sr_DelayTimer(*mcg->bsr_Config->logicalChannelSR_DelayTimer);
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nr_timer_setup(&si->sr_DelayTimer, target_sf * subframes_per_slot, 1); // 1 slot update rate
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uint32_t dt_sf = get_sr_DelayTimer(*mcg->bsr_Config->logicalChannelSR_DelayTimer);
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nr_timer_setup(&si->sr_DelayTimer, dt_sf * subframes_per_slot, 1); // 1 slot update rate
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}
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}
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if (mcg->tag_Config) {
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@@ -214,10 +214,8 @@ typedef struct {
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uint16_t SR_COUNTER;
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// logicalChannelSR-DelayTimer
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NR_timer_t sr_DelayTimer;
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/// retxBSR-Timer, default value is sf2560
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uint16_t retxBSR_Timer;
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/// retxBSR_SF, number of subframe before triggering a regular BSR
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uint16_t retxBSR_SF;
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/// retxBSR-Timer
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NR_timer_t retxBSR_Timer;
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/// periodicBSR-Timer, default to infinity
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uint16_t periodicBSR_Timer;
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/// periodicBSR_SF, number of subframe before triggering a periodic BSR
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@@ -146,13 +146,6 @@ uint8_t nr_locate_BsrIndexByBufferSize(const uint32_t *table, int size,
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*/
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int nr_get_sf_periodicBSRTimer(uint8_t bucketSize);
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/*! \fn int nr_get_sf_retxBSRTimer(uint8_t retxBSR_Timer)
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\brief get the number of subframe form the bucket size duration configured by the higher layer
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\param[in] retxBSR_Timer timer for regular BSR
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\return the time in sf
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*/
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int nr_get_sf_retxBSRTimer(uint8_t retxBSR_Timer);
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int8_t nr_ue_process_dci(NR_UE_MAC_INST_t *mac,
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int cc_id,
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frame_t frame,
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@@ -84,7 +84,12 @@ void nr_ue_init_mac(NR_UE_MAC_INST_t *mac)
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void nr_ue_mac_default_configs(NR_UE_MAC_INST_t *mac)
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{
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// default values as defined in 38.331 sec 9.2.2
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mac->scheduling_info.retxBSR_Timer = NR_BSR_Config__retxBSR_Timer_sf80;
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// sf80 default for retxBSR_Timer
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int mu = mac->current_UL_BWP ? mac->current_UL_BWP->scs : get_softmodem_params()->numerology;
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int subframes_per_slot = nr_slots_per_frame[mu] / 10;
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nr_timer_setup(&mac->scheduling_info.retxBSR_Timer, 80 * subframes_per_slot, 1); // 1 slot update rate
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mac->scheduling_info.periodicBSR_Timer = NR_BSR_Config__periodicBSR_Timer_sf10;
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mac->scheduling_info.periodicPHR_Timer = NR_PHR_Config__phr_PeriodicTimer_sf10;
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mac->scheduling_info.prohibitPHR_Timer = NR_PHR_Config__phr_ProhibitTimer_sf10;
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@@ -160,6 +165,7 @@ void reset_mac_inst(NR_UE_MAC_INST_t *nr_mac)
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}
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nr_timer_stop(&nr_mac->ra.contention_resolution_timer);
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nr_timer_stop(&nr_mac->scheduling_info.sr_DelayTimer);
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nr_timer_stop(&nr_mac->scheduling_info.retxBSR_Timer);
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// consider all timeAlignmentTimers as expired and perform the corresponding actions in clause 5.2
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// TODO
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@@ -187,7 +193,6 @@ void reset_mac_inst(NR_UE_MAC_INST_t *nr_mac)
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// cancel any triggered Buffer Status Reporting procedure
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nr_mac->scheduling_info.periodicBSR_SF = NR_MAC_UE_BSR_TIMER_NOT_RUNNING;
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nr_mac->scheduling_info.retxBSR_SF = NR_MAC_UE_BSR_TIMER_NOT_RUNNING;
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nr_mac->BSR_reporting_active = NR_BSR_TRIGGER_NONE;
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// cancel any triggered Power Headroom Reporting procedure
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@@ -115,10 +115,40 @@ NR_LC_SCHEDULING_INFO *get_scheduling_info_from_lcid(NR_UE_MAC_INST_t *mac, NR_L
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return &mac->scheduling_info.lc_sched_info[idx];
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}
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static void trigger_regular_bsr(NR_UE_MAC_INST_t *mac, bool sr_DelayTimerApplied)
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{
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// call SR procedure to generate pending SR and BSR for next PUCCH/PUSCH TxOp. This should implement the procedures
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// outlined in Sections 5.4.4 an 5.4.5 of 38.321
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mac->scheduling_info.SR_pending = 1;
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// Regular BSR trigger
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mac->BSR_reporting_active |= NR_BSR_TRIGGER_REGULAR;
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// if the BSR is triggered for a logical channel for which logicalChannelSR-DelayTimerApplied with value true
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// start or restart the logicalChannelSR-DelayTimer
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// else stop the logicalChannelSR-DelayTimer
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if (sr_DelayTimerApplied)
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nr_timer_start(&mac->scheduling_info.sr_DelayTimer);
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else
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nr_timer_stop(&mac->scheduling_info.sr_DelayTimer);
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}
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void update_mac_timers(NR_UE_MAC_INST_t *mac)
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{
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nr_timer_tick(&mac->ra.contention_resolution_timer);
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nr_timer_tick(&mac->scheduling_info.sr_DelayTimer);
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bool retxBSR_expired = nr_timer_tick(&mac->scheduling_info.retxBSR_Timer);
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if (retxBSR_expired) {
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LOG_D(NR_MAC, "retxBSR timer expired\n");
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for (int i = 0; i < mac->lc_ordered_list.count; i++) {
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nr_lcordered_info_t *lc_info = mac->lc_ordered_list.array[i];
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NR_LogicalChannelIdentity_t lcid = lc_info->lcid;
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// if at least one of the logical channels which belong to an LCG contains UL data
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NR_LC_SCHEDULING_INFO *lc_sched_info = get_scheduling_info_from_lcid(mac, lcid);
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if (lc_sched_info->LCGID < NR_MAX_NUM_LCGID && lc_sched_info->LCID_buffer_remain > 0) {
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LOG_D(NR_MAC, "Triggering regular BSR after retxBSR timer expired\n");
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trigger_regular_bsr(mac, lc_info->sr_DelayTimerApplied);
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}
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}
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}
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for (int i = 0; i < NR_MAX_NUM_LCID; i++)
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AssertFatal(!nr_timer_tick(&mac->scheduling_info.lc_sched_info[i].Bj_timer),
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"Bj timer for LCID %d expired! That should never happen\n",
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@@ -574,7 +604,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
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//Optional Data only included if indicated in pduBitmap
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pusch_config_pdu->pusch_data.rv_index = 0; // 8.3 in 38.213
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pusch_config_pdu->pusch_data.harq_process_id = 0;
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pusch_config_pdu->pusch_data.new_data_indicator = 1; // new data
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pusch_config_pdu->pusch_data.new_data_indicator = true; // new data
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pusch_config_pdu->pusch_data.num_cb = 0;
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pusch_config_pdu->tbslbrm = 0;
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@@ -825,6 +855,10 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
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pusch_config_pdu->ldpcBaseGraph = get_BG(pusch_config_pdu->pusch_data.tb_size << 3, pusch_config_pdu->target_code_rate);
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//The MAC entity shall restart retxBSR-Timer upon reception of a grant for transmission of new data on any UL-SCH
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if (pusch_config_pdu->pusch_data.new_data_indicator && dci && dci->ulsch_indicator)
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nr_timer_start(&mac->scheduling_info.retxBSR_Timer);
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if (pusch_config_pdu->pusch_data.tb_size == 0) {
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LOG_E(MAC, "Invalid TBS = 0. Probably caused by missed detection of DCI\n");
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return -1;
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@@ -1180,12 +1214,6 @@ void nr_ue_ul_scheduler(NR_UE_MAC_INST_t *mac, nr_uplink_indication_t *ul_info)
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// Call BSR procedure as described in Section 5.4.5 in 38.321
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// First check ReTxBSR Timer because it is always configured
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// Decrement ReTxBSR Timer if it is running and not null
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if ((mac->scheduling_info.retxBSR_SF != NR_MAC_UE_BSR_TIMER_NOT_RUNNING) && (mac->scheduling_info.retxBSR_SF != 0)) {
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mac->scheduling_info.retxBSR_SF--;
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}
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// Decrement Periodic Timer if it is running and not null
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if ((mac->scheduling_info.periodicBSR_SF != NR_MAC_UE_BSR_TIMER_NOT_RUNNING) && (mac->scheduling_info.periodicBSR_SF != 0)) {
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mac->scheduling_info.periodicBSR_SF--;
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@@ -1250,11 +1278,7 @@ void nr_update_bsr(NR_UE_MAC_INST_t *mac, frame_t frameP, slot_t slotP, uint8_t
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if (!bsr_regular_triggered) {
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bsr_regular_triggered = true;
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// call SR procedure to generate pending SR and BSR for next PUCCH/PUSCH TxOp. This should implement the procedures
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// outlined in Sections 5.4.4 an 5.4.5 of 38.321
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mac->scheduling_info.SR_pending = 1;
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// Regular BSR trigger
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mac->BSR_reporting_active |= NR_BSR_TRIGGER_REGULAR;
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trigger_regular_bsr(mac, lc_info->sr_DelayTimerApplied);
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LOG_D(NR_MAC,
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"[UE %d] MAC BSR Triggered LCID %d LCGID %d data become available at frame %d slot %d\n",
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mac->ue_id,
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@@ -1262,13 +1286,6 @@ void nr_update_bsr(NR_UE_MAC_INST_t *mac, frame_t frameP, slot_t slotP, uint8_t
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lcgid,
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frameP,
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slotP);
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// if the BSR is triggered for a logical channel for which logicalChannelSR-DelayTimerApplied with value true
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// start or restart the logicalChannelSR-DelayTimer
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// else stop the logicalChannelSR-DelayTimer
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if (lc_info->sr_DelayTimerApplied)
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nr_timer_start(&mac->scheduling_info.sr_DelayTimer);
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else
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nr_timer_stop(&mac->scheduling_info.sr_DelayTimer);
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}
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}
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}
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@@ -1379,58 +1396,6 @@ int nr_get_sf_periodicBSRTimer(uint8_t sf_offset) {
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}
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}
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int nr_get_sf_retxBSRTimer(uint8_t sf_offset) {
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switch (sf_offset) {
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case NR_BSR_Config__retxBSR_Timer_sf10:
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return 10;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf20:
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return 20;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf40:
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return 40;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf80:
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return 80;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf160:
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return 160;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf320:
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return 320;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf640:
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return 640;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf1280:
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return 1280;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf2560:
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return 2560;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf5120:
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return 5120;
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break;
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case NR_BSR_Config__retxBSR_Timer_sf10240:
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return 10240;
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break;
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default:
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return -1;
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break;
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}
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}
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// PUSCH scheduler:
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// - Calculate the slot in which ULSCH should be scheduled. This is current slot + K2,
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// - where K2 is the offset between the slot in which UL DCI is received and the slot
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@@ -2563,11 +2528,6 @@ static int nr_ue_get_sdu_mac_ce_pre(NR_UE_MAC_INST_t *mac,
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lcg_id++;
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}
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//Restart ReTxBSR Timer at new grant indication (38.321)
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if (mac->scheduling_info.retxBSR_SF != NR_MAC_UE_BSR_TIMER_NOT_RUNNING) {
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mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac->scheduling_info.retxBSR_Timer);
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}
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// periodicBSR-Timer expires, trigger BSR
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if ((mac->scheduling_info.periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)
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&& (mac->scheduling_info.periodicBSR_SF == 0)) {
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@@ -2780,9 +2740,7 @@ static void nr_ue_get_sdu_mac_ce_post(NR_UE_MAC_INST_t *mac,
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mac_ce_p->bsr_header_len,
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buflen);
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// Reset ReTx BSR Timer
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mac->scheduling_info.retxBSR_SF = nr_get_sf_retxBSRTimer(mac->scheduling_info.retxBSR_Timer);
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LOG_D(NR_MAC, "[UE %d] MAC ReTx BSR Timer Reset =%d\n", mac->ue_id, mac->scheduling_info.retxBSR_SF);
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nr_timer_start(&mac->scheduling_info.retxBSR_Timer);
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// Reset Periodic Timer except when BSR is truncated
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if ((mac_ce_p->bsr_t == NULL) && (mac->scheduling_info.periodicBSR_Timer != NR_BSR_Config__periodicBSR_Timer_infinity)) {
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mac->scheduling_info.periodicBSR_SF = nr_get_sf_periodicBSRTimer(mac->scheduling_info.periodicBSR_Timer);
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