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Merge branch 'nr_pdcch' of https://gitlab.eurecom.fr/oai/openairinterface5g into nr_pdcch

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This commit is contained in:
Guy De Souza
2018-08-23 11:07:21 +02:00
parent d2f2dfc0a3 742700fabd
commit ed211ca2dd
69 changed files with 2788 additions and 1735 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cmake_targets/CMakeLists.txt
+24 -13
View File
@@ -361,11 +361,14 @@ message( FATAL_ERROR "The script ${asn1c_call} must be present" )
endif(NOT EXISTS ${asn1c_call})
message("calling ASN1C_PREFIX=NR_ asn1c -findirect-choice -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}")
execute_process(COMMAND ${asn1c_call}
${NR_RRC_FULL_DIR}
${NR_RRC_GRAMMAR}
NR_RRC
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET )
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${asn1c_call}: error")
@@ -374,7 +377,6 @@ endif (NOT ${ret} STREQUAL 0)
if(NOT EXISTS ${fix_asn1c_call})
message( FATAL_ERROR "The script ${fix_asn1c_call} must be present" )
endif(NOT EXISTS ${fix_asn1c_call})
execute_process(COMMAND ${fix_asn1c_call}
${NR_RRC_FULL_DIR}
NR_RRC
@@ -398,6 +400,7 @@ include_directories ("${NR_RRC_FULL_DIR}")
# add the command to generate the source code
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
add_custom_command (
OUTPUT ${NR_RRC_FULL_DIR}/asn1_constants.h
COMMAND ${asn1c_call} ${NR_RRC_FULL_DIR} ${NR_RRC_GRAMMAR} RRC
@@ -434,7 +437,11 @@ message("calling ASN1C_PREFIX=S1AP_ asn1c -fcompound-names -fno-include-deps -ge
execute_process(COMMAND mkdir -p ${S1AP_C_DIR}
COMMAND env "ASN1C_PREFIX=S1AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET
)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
@@ -499,7 +506,9 @@ message("calling asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -
execute_process(COMMAND mkdir -p ${X2AP_C_DIR}
COMMAND env "ASN1C_PREFIX=X2AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET )
#execute_process(COMMAND ${asn1c_call}
# ${X2AP_C_DIR}
@@ -1121,20 +1130,16 @@ set(PHY_POLARSRC
${OPENAIR1_DIR}/PHY/CODING/nr_polar_init.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_bitwise_operations.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_bit_insertion.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_channel_interleaver_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_crc.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_info_bit_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_interleaving_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_kernal_operation.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_kronecker_power_matrices.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_output_length.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_rate_match.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_sequence_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
)
set(PHY_TURBOIF
${OPENAIR1_DIR}/PHY/CODING/coding_load.c
@@ -1342,6 +1347,10 @@ if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_SRC_UE ${PHY_SRC_UE} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
add_library(PHY_COMMON ${PHY_SRC_COMMON})
add_library(PHY ${PHY_SRC})
add_library(PHY_UE ${PHY_SRC_UE})
@@ -1463,6 +1472,7 @@ set(NR_L2_SRC_UE
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
# ${NR_UE_RRC_DIR}/mac_vars.c
#${RRC_DIR}/rrc_UE.c
)
set(L2_NR_SRC_UE
@@ -1582,6 +1592,7 @@ set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
)
add_library( NR_LTE_UE_REUSE_LIB
@@ -2265,6 +2276,7 @@ target_link_libraries (lte-uesoftmodem-nos1 ${T_LIB})
add_executable(nr-softmodem
${rrc_h}
${nr_rrc_h}
${s1ap_h}
${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
@@ -2272,7 +2284,6 @@ add_executable(nr-softmodem
${OPENAIR_TARGETS}/RT/USER/nr-ru.c
${OPENAIR_TARGETS}/RT/USER/nr-softmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/COMMON/create_tasks.c
${OPENAIR_TARGETS}/COMMON/create_nr_tasks.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
@@ -2543,7 +2554,7 @@ target_link_libraries (dlsim_tm4
)
add_executable(polartest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c)
target_link_libraries(polartest m SIMU PHY PHY_NR -lm ${ATLAS_LIBRARIES})
target_link_libraries(polartest m SIMU PHY PHY_NR PHY_COMMON -lm ${ATLAS_LIBRARIES})
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
+57
View File
@@ -0,0 +1,57 @@
#ifndef _FAPI_NR_UE_CONSTANTS_H_
#define _FAPI_NR_UE_CONSTANTS_H_
// constants defined by specification 38.331
#define FAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_SERVING_CELLS 32
#define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
/// RX_IND
#define FAPI_NR_RX_PDU_TYPE_MIB 0x01
#define FAPI_NR_RX_PDU_TYPE_SIB 0x02
#define FAPI_NR_RX_PDU_TYPE_DLSCH 0x03
#define FAPI_NR_DCI_IND 0x04
#define FAPI_NR_SIBS_MASK_SIB1 0x1
/// DCI_IND
#define FAPI_NR_DCI_TYPE_0_0 0x01
#define FAPI_NR_DCI_TYPE_0_1 0x02
#define FAPI_NR_DCI_TYPE_1_0 0x03
#define FAPI_NR_DCI_TYPE_1_1 0x04
#define FAPI_NR_DCI_TYPE_2_0 0x05
#define FAPI_NR_DCI_TYPE_2_1 0x06
#define FAPI_NR_DCI_TYPE_2_2 0x07
#define FAPI_NR_DCI_TYPE_2_3 0x08
/// TX_REQ
/// DL_CONFIG_REQ
#define FAPI_NR_DL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
/// UL_CONFIG_REQ
#define FAPI_NR_UL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_PRACH 0x01
#define FAPI_NR_DL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_DL_CONFIG_TYPE_PUSCH 0x03
#endif
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+176 -189
View File
@@ -15,125 +15,97 @@
*/
#ifndef _FAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _FAPI_NR_INTERFACE_NR_EXTENSION_H_
#define _FAPI_NR_INTERFACE_H_
#ifndef _FAPI_NR_UE_INTERFACE_H_
#define _FAPI_NR_UE_INTERFACE_H_
#include "stddef.h"
#include "platform_types.h"
#include "fapi_nr_ue_constants.h"
#define FAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_SERVING_CELLS 32
#define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
typedef enum {
FAPI_NR_RX_PDU_BCCH_BCH_TYPE = 0,
FAPI_NR_RX_PDU_BCCH_DLSCH_TYPE
} fapi_nr_rx_pdu_type_e;
/*
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
*/
typedef struct {
uint16_t phy_id;
uint16_t message_id;
uint16_t message_length;
uint16_t spare;
} fapi_nr_p4_p5_message_header_t;
typedef struct {
uint16_t phy_id;
uint16_t message_id;
uint16_t message_length;
uint16_t m_segment_sequence; /* This consists of 3 fields - namely, M, Segement & Sequence number*/
uint32_t checksum;
uint32_t transmit_timestamp;
} fapi_nr_p7_message_header_t;
typedef struct {
uint16_t tag;
uint16_t length;
} fapi_nr_tl_t;
#define FAPI_NR_TAG_LENGTH_PACKED_LEN 4
typedef struct {
// dci pdu
uint8_t dci_format;
uint8_t frequency_domain_resouce_assignment; // 38.214 chapter 5.1.2.2
uint8_t time_domain_resource_assignment; // 38.214 chapter 5.1.2.1
uint8_t frequency_hopping_enabled_flag;
uint8_t frequency_hopping_bits;
uint8_t mcs;
uint8_t new_data_indication;
uint8_t redundancy_version;
uint8_t harq_process;
uint8_t tpc_command;
uint8_t padding_bits;
uint8_t ul_sul_ind;
uint8_t ul_sch_indicator;
uint8_t random_access_preamble_index;
uint8_t ss_pbch_index;
uint8_t prach_mask_index;
uint8_t carrier_indicator;
uint8_t bwp_indndicator;
uint8_t vrb_to_prb_mapping;
uint8_t downlink_assignment_index1;
uint8_t downlink_assignment_index2;
uint8_t srs_resource_indicator;
uint8_t precoding_information;
uint8_t antenna_ports;
uint8_t srs_request;
uint8_t cqi_csi_request;
uint8_t cbg_transmission_information;
uint8_t ptrs_dmrs_association;
uint8_t downlink_assignment_index;
uint8_t pucch_resource_indicator;
uint8_t pdsch_to_harq_feedback_timing_indicator;
uint8_t short_messages_indicator;
uint8_t short_messages;
uint8_t tb_scaling;
uint8_t prb_bundling_size_indicator; // 38.214 chapter 5.1.2.3
uint8_t rate_matching_indicator;
uint8_t zp_csi_rs_trigger;
uint8_t transmission_configuration_indication;
uint8_t cbg_flushing_out_information;
uint8_t slot_format_count;
uint8_t *slot_format_indicators; // 38.213 chapter 11.1.1
uint8_t preemption_indication_count;
uint8_t *preemption_indications; // 38.213 chapter 11.2
uint8_t block_number_count; // for F22 and F23
uint8_t *block_numbers; // for F22 and F23
uint8_t closed_loop_indicator;
uint8_t tpc_command_count;
uint8_t *tpc_command_numbers;
uint8_t dci2_3_srs_request; // 38.212 table 7.3.1.1.2-5
uint8_t dci2_3_tpc_command;
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
} fapi_nr_dci_pdu_rel15_t;
#define FAPI_NR_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG 0x2020
typedef struct {
fapi_nr_tl_t tl;
uint8_t uci_format;
uint8_t uci_channel;
uint8_t harq_ack_bits;
@@ -144,31 +116,25 @@ typedef struct {
uint32_t sr;
} fapi_nr_uci_pdu_rel15_t;
typedef enum {
CCE_REG_MAPPING_TYPE_INTERLEAVED,
CCE_REG_MAPPING_TYPE_NON_INTERLEAVED,
} coreset_cce_reg_mapping_type_t;
typedef enum{
PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE,
PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS
} coreset_precoder_granularity_t;
typedef struct {
/// frequency_domain_resource;
uint32_t rb_start;
uint32_t rb_end;
//uint32_t rb_start;
//uint32_t rb_end;
uint64_t frequency_domain_resource;
uint16_t rb_offset;
uint8_t duration;
coreset_cce_reg_mapping_type_t cce_reg_mapping_type; // interleaved or noninterleaved
uint8_t cce_reg_mapping_type; // interleaved or noninterleaved
uint8_t cce_reg_interleaved_reg_bundle_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
coreset_precoder_granularity_t precoder_granularity;
uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci;
uint8_t precoder_granularity;
uint16_t pdcch_dmrs_scrambling_id;
uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci;
} fapi_nr_coreset_t;
//
@@ -183,89 +149,110 @@ typedef struct {
typedef struct {
uint16_t rnti;
uint8_t dci_type;
uint8_t dci_size;
uint8_t dci_format;
fapi_nr_dci_pdu_rel15_t dci;
}fapi_nr_dci_indication_pdu_t;
} fapi_nr_dci_indication_pdu_t;
typedef struct {
fapi_nr_tl_t tl;
uint16_t number_of_dcis;
fapi_nr_dci_indication_pdu_t* dci_list;
} fapi_nr_dci_indication_body_t;
///
typedef struct {
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
fapi_nr_dci_indication_body_t dci_indication_body;
uint32_t sfn_slot;
uint16_t number_of_dcis;
fapi_nr_dci_indication_pdu_t dci_list[10];
} fapi_nr_dci_indication_t;
#define FAPI_NR_TX_MAX_PDU 100
typedef struct {
fapi_nr_tl_t tl;
uint32_t pdu_index;
typedef struct {
uint32_t pdu_length;
uint8_t* pdu;
} fapi_nr_rx_request_body_t;
#define FAPI_NR_TX_REQUEST_BODY_TAG 0x2022
uint8_t* pdu;
} fapi_nr_pdsch_pdu_t;
typedef struct {
uint8_t* pdu; // 3bytes
uint8_t additional_bits;
uint8_t ssb_index;
uint8_t ssb_length;
uint16_t cell_id;
} fapi_nr_mib_pdu_t;
typedef struct {
uint32_t pdu_length;
uint8_t* pdu;
uint32_t sibs_mask;
} fapi_nr_sib_pdu_t;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_pdsch_pdu_t pdsch_pdu;
fapi_nr_mib_pdu_t mib_pdu;
fapi_nr_sib_pdu_t sib_pdu;
};
} fapi_nr_rx_indication_body_t;
///
typedef struct {
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
fapi_nr_rx_request_body_t rx_request_body;
uint32_t sfn_slot;
uint16_t number_pdus;
fapi_nr_rx_indication_body_t *rx_indication_body;
} fapi_nr_rx_indication_t;
typedef struct {
fapi_nr_tl_t tl;
uint8_t ul_cqi;
uint16_t timing_advance;
uint16_t rnti;
} fapi_nr_tx_config_t;
#define FAPI_NR_TX_MAX_SEGMENTS 32
typedef struct {
uint16_t pdu_length;
uint16_t pdu_index;
uint16_t pdu_index;
uint8_t* pdu;
} fapi_nr_tx_request_pdu_t;
#define FAPI_NR_RX_IND_MAX_PDU 100
typedef struct {
fapi_nr_tl_t tl;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_pdu_t* tx_pdu_list;
} fapi_nr_tx_request_body_t;
#define FAPI_NR_RX_INDICATION_BODY_TAG 0x2023
///
typedef struct {
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
fapi_nr_tx_request_body_t tx_request_body;
uint32_t sfn_slot;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_body_t *tx_request_body;
} fapi_nr_tx_request_t;
typedef struct {
} fapi_nr_ul_config_rach_pdu;
typedef struct {
} fapi_nr_ul_config_pucch_pdu;
typedef struct {
uint16_t number_rbs;
uint16_t start_rb;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t mcs;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
} fapi_nr_ul_config_pusch_pdu;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
fapi_nr_ul_config_rach_pdu prach_config_pdu;
fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
};
} fapi_nr_ul_config_request_pdu_t;
typedef struct {
fapi_nr_tl_t tl;
fapi_nr_ul_config_request_pdu_t ul_config_pdu_list;
} fapi_nr_ul_config_request_body_t;
///
typedef struct {
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
fapi_nr_ul_config_request_body_t ul_config_request_body;
uint32_t sfn_slot;
uint8_t number_pdus;
fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
} fapi_nr_ul_config_request_t;
@@ -274,8 +261,7 @@ typedef struct {
fapi_nr_coreset_t coreset;
uint32_t duration;
uint8_t aggregation_level;
uint8_t number_of_candidates;
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint16_t monitoring_symbols_within_slot;
// DCI foramt-specific
uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
@@ -287,30 +273,34 @@ typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
} fapi_nr_dl_config_dci_pdu;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_dci_pdu_rel15_t dci_config;
uint16_t number_rbs;
uint16_t start_rb;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t mcs;
uint8_t rv;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
} fapi_nr_dl_config_dlsch_pdu;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
fapi_nr_dl_config_dci_pdu dci_pdu;
fapi_nr_dl_config_dlsch_pdu dlsch_pdu;
fapi_nr_dl_config_dci_pdu dci_config_pdu;
fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
};
} fapi_nr_dl_config_request_pdu_t;
typedef struct {
fapi_nr_p7_message_header_t header;
uint16_t sfn_sf_slot;
uint8_t number_dci;
uint8_t number_pdsch;
fapi_nr_dl_config_request_pdu_t *dl_config_request_body;
uint32_t sfn_slot;
uint8_t number_pdus;
fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
@@ -417,7 +407,6 @@ typedef struct {
} fapi_nr_pbch_config_t;
typedef struct {
fapi_nr_tl_t tl;
fapi_nr_pdcch_config_common_t pdcch_config_common;
fapi_nr_pdsch_config_common_t pdsch_config_common;
@@ -761,8 +750,6 @@ typedef struct {
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED 0x10
typedef struct {
fapi_nr_p4_p5_message_header_t header;
uint8_t num_tlv;
uint32_t config_mask;
fapi_nr_pbch_config_t pbch_config; // MIB
@@ -775,4 +762,4 @@ typedef struct {
} fapi_nr_config_request_t;
#endif /* _FAPI_INTERFACE_H_ */
#endif
openair1/PHY/CODING/TESTBENCH/polartest.c
+71 -20
View File
@@ -7,9 +7,11 @@
#include <time.h>
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "PHY/CODING/coding_defs.h"
#include "SIMULATION/TOOLS/sim.h"
//#define DEBUG_POLAR_PARAMS
#define DEBUG_DCI_POLAR_PARAMS
int main(int argc, char *argv[]) {
@@ -21,6 +23,8 @@ int main(int argc, char *argv[]) {
reset_meas(&timeDecoder);
randominit(0);
crcTableInit();
uint32_t crc;
//Default simulation values (Aim for iterations = 1000000.)
int itr, iterations = 1000, arguments, polarMessageType = 0; //0=PBCH, 1=DCI, -1=UCI
double SNRstart = -20.0, SNRstop = 0.0, SNRinc= 0.5; //dB
@@ -30,7 +34,7 @@ int main(int argc, char *argv[]) {
int8_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
uint16_t testLength = 0, coderLength = 0, blockErrorCumulative=0, bitErrorCumulative=0;
double timeEncoderCumulative = 0, timeDecoderCumulative = 0;
uint8_t aggregation_level;
uint8_t aggregation_level, decoderListSize, pathMetricAppr;
while ((arguments = getopt (argc, argv, "s:d:f:m:i:l:a:")) != -1)
switch (arguments)
@@ -105,36 +109,83 @@ int main(int argc, char *argv[]) {
}
fprintf(logFile,",SNR,nBitError,blockErrorState,t_encoder[us],t_decoder[us]\n");
uint8_t *testInput = malloc(sizeof(uint8_t) * testLength); //generate randomly
uint8_t *encoderOutput = malloc(sizeof(uint8_t) * coderLength);
//uint8_t *testInput = malloc(sizeof(uint8_t) * testLength); //generate randomly
//uint8_t *encoderOutput = malloc(sizeof(uint8_t) * coderLength);
uint32_t testInput[4], encoderOutput[4];
memset(testInput,0,sizeof(testInput));
memset(encoderOutput,0,sizeof(encoderOutput));
double *modulatedInput = malloc (sizeof(double) * coderLength); //channel input
double *channelOutput = malloc (sizeof(double) * coderLength); //add noise
uint8_t *estimatedOutput = malloc(sizeof(uint8_t) * testLength); //decoder output
uint32_t *estimatedOutput = malloc(sizeof(uint8_t) * testLength); //decoder output
t_nrPolar_paramsPtr nrPolar_params = NULL;
t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
#ifdef DEBUG_POLAR_PARAMS
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
nr_polar_init(&nrPolar_params, 1, 20, 1);
nr_polar_init(&nrPolar_params, 1, 21, 1);
#ifdef DEBUG_DCI_POLAR_PARAMS
unsigned int poly24c = 0xb2b11700;
printf("testInput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
testInput[0], testInput[1], testInput[2], testInput[3]);
printf("encOutput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
encoderOutput[0], encoderOutput[1], encoderOutput[2], encoderOutput[3]);
testInput[0]=0x01189400;
uint8_t testInput2[8];
nr_crc_bit2bit_uint32_8_t(testInput, 32, testInput2);
printf("testInput2: [0]->%x \t [1]->%x \t [2]->%x \t [3]->%x\n [4]->%x \t [5]->%x \t [6]->%x \t [7]->%x \t\n",
testInput2[0], testInput2[1], testInput2[2], testInput2[3],
testInput2[4], testInput2[5], testInput2[6], testInput2[7]);
printf("crc32: [0]->0x%08x\n",crc24c(testInput2, 32));
printf("crc56: [0]->0x%08x\n",crc24c(testInput2, 56));
return 0;
uint8_t testInput8[4];
/*testInput8[0]=0x00;
testInput8[1]=0x49;
testInput8[2]=0x81;
testInput8[3]=0x10;
testInput8[4]=0x00;*/
testInput8[0]=0xff;
testInput8[1]=0xd0;
testInput8[2]=0xff;
testInput8[3]=0x82;
crc = crc24c(testInput8, 31);
for (int i=0;i<24;i++) printf("[i]=%d\n",(crc>>i)&1);
printf("crc: [0]->0x%08x\n",crc);
printf("crcbit: %x\n",crcbit(testInput8, 3, poly24c));
return 0;
unsigned char test[] = "Thebigredfox";
for (int i=0;i<8;i++) printf("[i]=%d\n",(test[0]>>i)&1);
printf("test[0]=%x\n",test[0]);
printf("%s -- sizeof=%d\n",test,sizeof(test));
printf("%x\n", crcbit(test, sizeof(test) - 1, poly24c));
printf("%x\n", crc24c(test, (sizeof(test) - 1)*8));
polarMessageType = 1;
testLength = 41;
aggregation_level=1;
coderLength = 108;
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
nr_polar_print_polarParams(nrPolar_params);
uint32_t in[4];
in[0]=0x01189400;
in[1]=0xffffff0f;
uint8_t *out = malloc(sizeof(uint8_t) * 41);
nr_bit2byte_uint32_8_t(in, 41, out);
for (int i=0;i<41;i++)
printf("out[%d]=%d\n",i,out[i]);
uint32_t inn[4];
nr_byte2bit_uint8_32_t(out, 41, inn);
printf("inn[0]=%#x, inn[1]=%#x\n",inn[0],inn[1]);
crc = crc24c(testInput, testLength)>>8;
for (int i=0;i<24;i++) printf("[i]=%d\n",(crc>>i)&1);
printf("crc: [0]->0x%08x\n",crc);
testInput[testLength>>3] = ((uint8_t*)&crc)[2];
testInput[1+(testLength>>3)] = ((uint8_t*)&crc)[1];
testInput[2+(testLength>>3)] = ((uint8_t*)&crc)[0];
printf("testInput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
testInput[0], testInput[1], testInput[2], testInput[3]);
return (0);
currentPtr = nr_polar_params(nrPolar_params, polarMessageType, testLength, aggregation_level);
polar_encoder(testInput, encoderOutput, currentPtr);
printf("AFTER POLAR ENCODING\n");
printf("testInput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
testInput[0], testInput[1], testInput[2], testInput[3]);
printf("encOutput: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
encoderOutput[0], encoderOutput[1], encoderOutput[2], encoderOutput[3]);
return (0);
#endif
t_nrPolar_paramsPtr currentPtr = nr_polar_params(nrPolar_params, polarMessageType, testLength);
currentPtr = nr_polar_params(nrPolar_params, polarMessageType, testLength, aggregation_level);
// We assume no a priori knowledge available about the payload.
double aPrioriArray[currentPtr->payloadBits];
openair1/PHY/CODING/coding_defs.h
+8
View File
@@ -341,6 +341,14 @@ based on 3GPP UMTS/LTE specifications.
*/
uint32_t crc24b (uint8_t *inPtr, int32_t bitlen);
/*!\fn uint32_t crc24c(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 24-bit crc ('c' variant for transport-block segments)
based on 3GPP Rel 15 specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits
*/
uint32_t crc24c (uint8_t *inPtr, int32_t bitlen);
/*!\fn uint32_t crc16(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 16-bit crc based on 3GPP UMTS specifications.
@param inPtr Pointer to input byte stream
openair1/PHY/CODING/crc_byte.c
+42 -14
View File
@@ -36,8 +36,12 @@
/*ref 36-212 v8.6.0 , pp 8-9 */
/* the highest degree is set by default */
unsigned int poly24a = 0x864cfb00; //1000 0110 0100 1100 1111 1011 D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011 D^24 + D^23 + D^6 + D^5 + D + 1
unsigned int poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011
// D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011
// D^24 + D^23 + D^6 + D^5 + D + 1
unsigned int poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111
// D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
unsigned int poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1
unsigned int poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1
unsigned int poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1
@@ -49,10 +53,11 @@ For initialization && verification purposes,
The first bit is in the MSB of each byte
*********************************************************/
unsigned int
crcbit (unsigned char * inputptr, int octetlen, unsigned int poly)
unsigned int crcbit (unsigned char * inputptr,
int octetlen,
unsigned int poly)
{
unsigned int i, crc = 0, c;
unsigned int i, crc = 0, c;
while (octetlen-- > 0) {
c = (*inputptr++) << 24;
@@ -75,19 +80,21 @@ crcbit (unsigned char * inputptr, int octetlen, unsigned int poly)
crc table initialization
*********************************************************/
static unsigned int crc24aTable[256];
static unsigned int crc24bTable[256];
static unsigned int crc24aTable[256];
static unsigned int crc24bTable[256];
static unsigned int crc24cTable[256];
static unsigned short crc16Table[256];
static unsigned short crc12Table[256];
static unsigned char crc8Table[256];
void crcTableInit (void)
{
unsigned char c = 0;
unsigned char c = 0;
do {
crc24aTable[c] = crcbit (&c, 1, poly24a);
crc24bTable[c] = crcbit (&c, 1, poly24b);
crc24cTable[c] = crcbit (&c, 1, poly24c);
crc16Table[c] = (unsigned short) (crcbit (&c, 1, poly16) >> 16);
crc12Table[c] = (unsigned short) (crcbit (&c, 1, poly12) >> 16);
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
@@ -99,8 +106,8 @@ Byte by byte implementations,
assuming initial byte is 0 padded (in MSB) if necessary
*********************************************************/
unsigned int
crc24a (unsigned char * inptr, int bitlen)
unsigned int crc24a (unsigned char * inptr,
int bitlen)
{
int octetlen, resbit;
@@ -119,11 +126,11 @@ crc24a (unsigned char * inptr, int bitlen)
return crc;
}
unsigned int crc24b (unsigned char * inptr, int bitlen)
unsigned int crc24b (unsigned char * inptr,
int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
@@ -138,6 +145,27 @@ unsigned int crc24b (unsigned char * inptr, int bitlen)
return crc;
}
unsigned int crc24c (unsigned char * inptr,
int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0) {
/*#ifdef DEBUG_CRC24C
printf("crc24c: in %x => crc %x (%x)\n",crc,*inptr,crc24cTable[(*inptr) ^ (crc >> 24)]);
#endif*/
crc = (crc << 8) ^ crc24cTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24cTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
unsigned int
crc16 (unsigned char * inptr, int bitlen)
{
openair1/PHY/CODING/nrPolar_tools/nr_bitwise_operations.c
+13
View File
@@ -41,3 +41,16 @@ void nr_byte2bit_uint8_32_t(uint8_t *in, uint16_t arraySize, uint32_t *out) {
out[i]|=in[(i*32)];
}
}
void nr_crc_bit2bit_uint32_8_t(uint32_t *in, uint16_t arraySize, uint8_t *out) {
out[0]=0xff;
out[1]=0xff;
out[2]=0xff;
uint8_t arrayInd = ceil(arraySize / 32.0);
for (int i = 0; i < arrayInd; i++) {
out[3+i*4] = ((in[i] & (0x0000000f))<<4) | ((in[i] & (0x000000f0))>>4);
out[4+i*4] = (((in[i] & (0x00000f00))<<4) | ((in[i] & (0x0000f000))>>4))>>8;
out[5+i*4] = (((in[i] & (0x000f0000))<<4) | ((in[i] & (0x00f00000))>>4))>>16;
out[6+i*4] = (((in[i] & (0x0f000000))<<4) | ((in[i] & (0xf0000000))>>4))>>24;
}
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_bit_insertion.c
-52
View File
@@ -1,52 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_bit_insertion(uint8_t *input, uint8_t *output, uint16_t N, uint16_t K,
int16_t *Q_I_N, int16_t *Q_PC_N, uint8_t n_PC){
uint16_t k=0;
uint8_t flag;
if (n_PC>0) {
/*
*
*/
} else {
for (int n=0; n<=N-1; n++) {
flag=0;
for (int m=0; m<=(K+n_PC)-1; m++) {
if ( n == Q_I_N[m]) {
flag=1;
break;
}
}
if (flag) { // n ϵ Q_I_N
output[n]=input[k];
k++;
} else {
output[n] = 0;
}
}
}
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_channel_interleaver_pattern.c
-63
View File
@@ -1,63 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_channel_interleaver_pattern(uint16_t *cip, uint8_t I_BIL, uint16_t E){
if (I_BIL == 1) {
uint16_t T=0, k;
while( ((T/2)*(T+1)) < E ) T++;
int16_t **v = malloc(T * sizeof(*v));
for (int i = 0; i <= T-1; i++) v[i] = malloc((T-i) * sizeof(*(v[i])));
k=0;
for (int i = 0; i <= T-1; i++) {
for (int j = 0; j <= (T-1)-i; j++) {
if (k<E) {
v[i][j] = k;
} else {
v[i][j] = (-1);
}
k++;
}
}
k=0;
for (int j = 0; j <= T-1; j++) {
for (int i = 0; i <= (T-1)-j; i++) {
if ( v[i][j] != (-1) ) {
cip[k]=v[i][j];
k++;
}
}
}
for (int i = 0; i <= T-1; i++) free(v[i]);
free(v);
} else {
for (int i=0; i<=E-1; i++) cip[i]=i;
}
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
+10 -10
View File
@@ -247,16 +247,16 @@ int8_t polar_decoder(
for (uint8_t i = 0; i < fmin(listSize, (pow(2,polarParams->crcCorrectionBits)) ); i++) {
if ( crcState[listIndex[i]] == 1 ) {
for (int j = 0; j < polarParams->N; j++) polarParams->nr_polar_u[j]=bit[j][0][listIndex[i]];
for (int j = 0; j < polarParams->N; j++) polarParams->nr_polar_U[j]=bit[j][0][listIndex[i]];
//Extract the information bits (û to ĉ)
nr_polar_info_bit_extraction(polarParams->nr_polar_u, polarParams->nr_polar_cPrime, polarParams->information_bit_pattern, polarParams->N);
nr_polar_info_bit_extraction(polarParams->nr_polar_U, polarParams->nr_polar_CPrime, polarParams->information_bit_pattern, polarParams->N);
//Deinterleaving (ĉ to b)
nr_polar_deinterleaver(polarParams->nr_polar_cPrime, polarParams->nr_polar_b, polarParams->interleaving_pattern, polarParams->K);
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â)
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_a[j]=polarParams->nr_polar_b[j];
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
break;
}
@@ -274,7 +274,7 @@ int8_t polar_decoder(
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_a, polarParams->payloadBits, out);
nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
return(0);
}
@@ -500,16 +500,16 @@ int8_t polar_decoder_aPriori(
for (uint8_t i = 0; i < fmin(listSize, (pow(2,polarParams->crcCorrectionBits)) ); i++) {
if ( crcState[listIndex[i]] == 1 ) {
for (int j = 0; j < polarParams->N; j++) polarParams->nr_polar_u[j]=bit[j][0][listIndex[i]];
for (int j = 0; j < polarParams->N; j++) polarParams->nr_polar_U[j]=bit[j][0][listIndex[i]];
//Extract the information bits (û to ĉ)
nr_polar_info_bit_extraction(polarParams->nr_polar_u, polarParams->nr_polar_cPrime, polarParams->information_bit_pattern, polarParams->N);
nr_polar_info_bit_extraction(polarParams->nr_polar_U, polarParams->nr_polar_CPrime, polarParams->information_bit_pattern, polarParams->N);
//Deinterleaving (ĉ to b)
nr_polar_deinterleaver(polarParams->nr_polar_cPrime, polarParams->nr_polar_b, polarParams->interleaving_pattern, polarParams->K);
nr_polar_deinterleaver(polarParams->nr_polar_CPrime, polarParams->nr_polar_B, polarParams->interleaving_pattern, polarParams->K);
//Remove the CRC (â)
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_a[j]=polarParams->nr_polar_b[j];
for (int j = 0; j < polarParams->payloadBits; j++) polarParams->nr_polar_A[j]=polarParams->nr_polar_B[j];
break;
}
@@ -527,6 +527,6 @@ int8_t polar_decoder_aPriori(
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_a, polarParams->payloadBits, out);
nr_byte2bit_uint8_32_t(polarParams->nr_polar_A, polarParams->payloadBits, out);
return(0);
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
+62 -17
View File
@@ -19,10 +19,30 @@
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
* \brief
* \author Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \note
* \warning
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void updateLLR(double ***llr, uint8_t **llrU, uint8_t ***bit, uint8_t **bitU,
uint8_t listSize, uint16_t row, uint16_t col, uint16_t xlen, uint8_t ylen, uint8_t approximation) {
void updateLLR(double ***llr,
uint8_t **llrU,
uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen,
uint8_t approximation)
{
uint16_t offset = (xlen/(pow(2,(ylen-col-1))));
for (uint8_t i=0; i<listSize; i++) {
if (( (row) % (2*offset) ) >= offset ) {
@@ -40,8 +60,14 @@ void updateLLR(double ***llr, uint8_t **llrU, uint8_t ***bit, uint8_t **bitU,
llrU[row][col]=1;
}
void updateBit(uint8_t ***bit, uint8_t **bitU, uint8_t listSize, uint16_t row,
uint16_t col, uint16_t xlen, uint8_t ylen) {
void updateBit(uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen)
{
uint16_t offset = ( xlen/(pow(2,(ylen-col))) );
for (uint8_t i=0; i<listSize; i++) {
@@ -58,9 +84,13 @@ void updateBit(uint8_t ***bit, uint8_t **bitU, uint8_t listSize, uint16_t row,
bitU[row][col]=1;
}
void updatePathMetric(double *pathMetric, double ***llr, uint8_t listSize, uint8_t bitValue,
uint16_t row, uint8_t approximation) {
void updatePathMetric(double *pathMetric,
double ***llr,
uint8_t listSize,
uint8_t bitValue,
uint16_t row,
uint8_t approximation)
{
if (approximation) { //eq. (12)
for (uint8_t i=0; i<listSize; i++) {
if ((2*bitValue) != ( 1 - copysign(1.0,llr[row][0][i]) )) pathMetric[i] += fabs(llr[row][0][i]);
@@ -69,11 +99,14 @@ void updatePathMetric(double *pathMetric, double ***llr, uint8_t listSize, uint8
int8_t multiplier = (2*bitValue) - 1;
for (uint8_t i=0; i<listSize; i++) pathMetric[i] += log ( 1 + exp(multiplier*llr[row][0][i]) ) ;
}
}
void updatePathMetric2(double *pathMetric, double ***llr, uint8_t listSize, uint16_t row, uint8_t appr) {
void updatePathMetric2(double *pathMetric,
double ***llr,
uint8_t listSize,
uint16_t row,
uint8_t appr)
{
double *tempPM = malloc(sizeof(double) * listSize);
for (int i=0; i < listSize; i++) tempPM[i]=pathMetric[i];
@@ -101,9 +134,13 @@ void updatePathMetric2(double *pathMetric, double ***llr, uint8_t listSize, uint
}
void computeLLR(double ***llr, uint16_t row, uint16_t col, uint8_t i,
uint16_t offset, uint8_t approximation) {
void computeLLR(double ***llr,
uint16_t row,
uint16_t col,
uint8_t i,
uint16_t offset,
uint8_t approximation)
{
double a = llr[row][col + 1][i];
double absA = fabs(a);
double b = llr[row + offset][col + 1][i];
@@ -117,8 +154,12 @@ void computeLLR(double ***llr, uint16_t row, uint16_t col, uint8_t i,
}
void updateCrcChecksum(uint8_t **crcChecksum, uint8_t **crcGen,
uint8_t listSize, uint32_t i2, uint8_t len) {
void updateCrcChecksum(uint8_t **crcChecksum,
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len)
{
for (uint8_t i = 0; i < listSize; i++) {
for (uint8_t j = 0; j < len; j++) {
crcChecksum[j][i] = ( (crcChecksum[j][i] + crcGen[i2][j]) % 2 );
@@ -126,8 +167,12 @@ void updateCrcChecksum(uint8_t **crcChecksum, uint8_t **crcGen,
}
}
void updateCrcChecksum2(uint8_t **crcChecksum, uint8_t **crcGen,
uint8_t listSize, uint32_t i2, uint8_t len) {
void updateCrcChecksum2(uint8_t **crcChecksum,
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len)
{
for (uint8_t i = 0; i < listSize; i++) {
for (uint8_t j = 0; j < len; j++) {
crcChecksum[j][i+listSize] = ( (crcChecksum[j][i] + crcGen[i2][j]) % 2 );
openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
+180 -57
View File
@@ -46,11 +46,17 @@
#define NR_POLAR_DECODER_LISTSIZE 8 //uint8_t
#define NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION 0 //uint8_t; 0 --> eq. (8a) and (11b), 1 --> eq. (9) and (12)
#define NR_POLAR_AGGREGATION_LEVEL_1_PRIME 149 //uint16_t
#define NR_POLAR_AGGREGATION_LEVEL_2_PRIME 151 //uint16_t
#define NR_POLAR_AGGREGATION_LEVEL_4_PRIME 157 //uint16_t
#define NR_POLAR_AGGREGATION_LEVEL_8_PRIME 163 //uint16_t
#define NR_POLAR_AGGREGATION_LEVEL_16_PRIME 167 //uint16_t
static const uint8_t nr_polar_subblock_interleaver_pattern[32] = { 0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31 };
struct nrPolar_params {
//messageType: 0=PBCH, 1=DCI, -1=UCI
int8_t idx; //idx = messageType*messageLength;
int idx; //idx = (messageType * messageLength * aggregation_prime);
struct nrPolar_params *nextPtr;
uint8_t n_max;
@@ -66,6 +72,7 @@ struct nrPolar_params {
uint16_t K;
uint16_t N;
uint8_t n;
uint32_t crcBit;
uint16_t *interleaving_pattern;
uint16_t *rate_matching_pattern;
@@ -79,27 +86,37 @@ struct nrPolar_params {
uint8_t **crc_generator_matrix; //G_P
uint8_t **G_N;
//lowercase: bits, Uppercase: Bits stored in bytes
//polar_encoder vectors
uint8_t *nr_polar_crc;
uint8_t *nr_polar_d;
uint8_t *nr_polar_e;
uint8_t *nr_polar_aPrime;
uint8_t *nr_polar_D;
uint8_t *nr_polar_E;
//Polar Coding vectors
uint8_t *nr_polar_a;
uint8_t *nr_polar_cPrime;
uint8_t *nr_polar_b;
uint8_t *nr_polar_u;
uint8_t *nr_polar_A;
uint8_t *nr_polar_CPrime;
uint8_t *nr_polar_B;
uint8_t *nr_polar_U;
} __attribute__ ((__packed__));
typedef struct nrPolar_params t_nrPolar_params;
typedef t_nrPolar_params *t_nrPolar_paramsPtr;
void polar_encoder(uint32_t *input, uint32_t *output, t_nrPolar_paramsPtr polarParams);
void polar_encoder(uint32_t *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams);
void polar_encoder_dci(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint16_t n_RNTI);
int8_t polar_decoder(double *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams,
uint8_t listSize,
uint8_t pathMetricAppr);
int8_t polar_decoder_aPriori(double *input,
uint32_t *output,
t_nrPolar_paramsPtr polarParams,
@@ -111,83 +128,189 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level);
void nr_polar_print_polarParams(t_nrPolar_paramsPtr polarParams);
t_nrPolar_paramsPtr nr_polar_params (t_nrPolar_paramsPtr polarParams,
int8_t messageType,
uint16_t messageLength);
uint16_t messageLength,
uint8_t aggregation_level);
uint16_t nr_polar_aggregation_prime (uint8_t aggregation_level);
uint8_t** nr_polar_kronecker_power_matrices(uint8_t n);
const uint16_t* nr_polar_sequence_pattern(uint8_t n);
uint32_t nr_polar_output_length(uint16_t K, uint16_t E, uint8_t n_max);
/*!@fn uint32_t nr_polar_output_length(uint16_t K, uint16_t E, uint8_t n_max)
* @brief Computes...
* @param K Number of bits to encode (=payloadBits+crcParityBits)
* @param E
* @param n_max */
uint32_t nr_polar_output_length(uint16_t K,
uint16_t E,
uint8_t n_max);
void nr_polar_channel_interleaver_pattern(uint16_t *cip, uint8_t I_BIL,
uint16_t E);
void nr_polar_channel_interleaver_pattern(uint16_t *cip,
uint8_t I_BIL,
uint16_t E);
void nr_polar_rate_matching_pattern(uint16_t *rmp, uint16_t *J, const uint8_t *P_i_,
uint16_t K, uint16_t N, uint16_t E);
void nr_polar_rate_matching_pattern(uint16_t *rmp,
uint16_t *J,
const uint8_t *P_i_,
uint16_t K,
uint16_t N,
uint16_t E);
void nr_polar_rate_matching(double *input, double *output, uint16_t *rmp,
uint16_t K, uint16_t N, uint16_t E);
void nr_polar_rate_matching(double *input,
double *output,
uint16_t *rmp,
uint16_t K,
uint16_t N,
uint16_t E);
void nr_polar_interleaving_pattern(uint16_t K, uint8_t I_IL, uint16_t *PI_k_);
void nr_polar_interleaving_pattern(uint16_t K,
uint8_t I_IL,
uint16_t *PI_k_);
void nr_polar_info_bit_pattern(uint8_t *ibp, int16_t *Q_I_N, int16_t *Q_F_N,
uint16_t *J, const uint16_t *Q_0_Nminus1, uint16_t K, uint16_t N, uint16_t E,
uint8_t n_PC);
void nr_polar_info_bit_pattern(uint8_t *ibp,
int16_t *Q_I_N,
int16_t *Q_F_N,
uint16_t *J,
const uint16_t *Q_0_Nminus1,
uint16_t K,
uint16_t N,
uint16_t E,
uint8_t n_PC);
void nr_polar_info_bit_extraction(uint8_t *input, uint8_t *output,
uint8_t *pattern, uint16_t size);
void nr_polar_info_bit_extraction(uint8_t *input,
uint8_t *output,
uint8_t *pattern,
uint16_t size);
void nr_bit2byte_uint32_8_t(uint32_t *in, uint16_t arraySize, uint8_t *out);
void nr_byte2bit_uint8_32_t(uint8_t *in, uint16_t arraySize, uint32_t *out);
void nr_bit2byte_uint32_8_t(uint32_t *in,
uint16_t arraySize,
uint8_t *out);
void nr_polar_bit_insertion(uint8_t *input, uint8_t *output, uint16_t N,
uint16_t K, int16_t *Q_I_N, int16_t *Q_PC_N, uint8_t n_PC);
void nr_byte2bit_uint8_32_t(uint8_t *in,
uint16_t arraySize,
uint32_t *out);
void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1, uint8_t **matrix2,
uint8_t *output, uint16_t row, uint16_t col);
void nr_crc_bit2bit_uint32_8_t(uint32_t *in,
uint16_t arraySize,
uint8_t *out);
uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen, uint16_t ylen,
uint16_t zlen);
uint8_t **nr_alloc_uint8_t_2D_array(uint16_t xlen, uint16_t ylen);
double ***nr_alloc_double_3D_array(uint16_t xlen, uint16_t ylen, uint16_t zlen);
void nr_polar_bit_insertion(uint8_t *input,
uint8_t *output,
uint16_t N,
uint16_t K,
int16_t *Q_I_N,
int16_t *Q_PC_N,
uint8_t n_PC);
void nr_free_uint8_t_3D_array(uint8_t ***input, uint16_t xlen, uint16_t ylen);
void nr_free_uint8_t_2D_array(uint8_t **input, uint16_t xlen);
void nr_free_double_3D_array(double ***input, uint16_t xlen, uint16_t ylen);
void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1,
uint8_t **matrix2,
uint8_t *output,
uint16_t row,
uint16_t col);
void updateLLR(double ***llr, uint8_t **llrU, uint8_t ***bit, uint8_t **bitU,
uint8_t listSize, uint16_t row, uint16_t col, uint16_t xlen,
uint8_t ylen, uint8_t approximation);
void updateBit(uint8_t ***bit, uint8_t **bitU, uint8_t listSize, uint16_t row,
uint16_t col, uint16_t xlen, uint8_t ylen);
void updatePathMetric(double *pathMetric, double ***llr, uint8_t listSize,
uint8_t bitValue, uint16_t row, uint8_t approximation);
void updatePathMetric2(double *pathMetric, double ***llr, uint8_t listSize,
uint16_t row, uint8_t approximation);
void computeLLR(double ***llr, uint16_t row, uint16_t col, uint8_t i,
uint16_t offset, uint8_t approximation);
void updateCrcChecksum(uint8_t **crcChecksum, uint8_t **crcGen,
uint8_t listSize, uint32_t i2, uint8_t len);
void updateCrcChecksum2(uint8_t **crcChecksum, uint8_t **crcGen,
uint8_t listSize, uint32_t i2, uint8_t len);
void nr_sort_asc_double_1D_array_ind(double *matrix, uint8_t *ind, uint8_t len);
uint8_t ***nr_alloc_uint8_t_3D_array(uint16_t xlen,
uint16_t ylen,
uint16_t zlen);
uint8_t **nr_alloc_uint8_t_2D_array(uint16_t xlen,
uint16_t ylen);
double ***nr_alloc_double_3D_array(uint16_t xlen,
uint16_t ylen,
uint16_t zlen);
void nr_free_uint8_t_3D_array(uint8_t ***input,
uint16_t xlen,
uint16_t ylen);
void nr_free_uint8_t_2D_array(uint8_t **input,
uint16_t xlen);
void nr_free_double_3D_array(double ***input,
uint16_t xlen,
uint16_t ylen);
void updateLLR(double ***llr,
uint8_t **llrU,
uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen,
uint8_t approximation);
void updateBit(uint8_t ***bit,
uint8_t **bitU,
uint8_t listSize,
uint16_t row,
uint16_t col,
uint16_t xlen,
uint8_t ylen);
void updatePathMetric(double *pathMetric,
double ***llr,
uint8_t listSize,
uint8_t bitValue,
uint16_t row,
uint8_t approximation);
void updatePathMetric2(double *pathMetric,
double ***llr,
uint8_t listSize,
uint16_t row,
uint8_t approximation);
void computeLLR(double ***llr,
uint16_t row,
uint16_t col,
uint8_t i,
uint16_t offset,
uint8_t approximation);
void updateCrcChecksum(uint8_t **crcChecksum,
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len);
void updateCrcChecksum2(uint8_t **crcChecksum,
uint8_t **crcGen,
uint8_t listSize,
uint32_t i2,
uint8_t len);
void nr_sort_asc_double_1D_array_ind(double *matrix,
uint8_t *ind,
uint8_t len);
uint8_t **crc24c_generator_matrix(uint16_t payloadSizeBits);
uint8_t **crc11_generator_matrix(uint16_t payloadSizeBits);
uint8_t **crc6_generator_matrix(uint16_t payloadSizeBits);
static inline void nr_polar_rate_matcher(uint8_t *input, unsigned char *output, uint16_t *pattern, uint16_t size) {
//Also nr_polar_rate_matcher
static inline void nr_polar_interleaver(uint8_t *input,
uint8_t *output,
uint16_t *pattern,
uint16_t size)
{
for (int i=0; i<size; i++) output[i]=input[pattern[i]];
}
static inline void nr_polar_interleaver(uint8_t *input, uint8_t *output, uint16_t *pattern, uint16_t size) {
for (int i=0; i<size; i++) output[i]=input[pattern[i]];
}
static inline void nr_polar_deinterleaver(uint8_t *input, uint8_t *output, uint16_t *pattern, uint16_t size) {
static inline void nr_polar_deinterleaver(uint8_t *input,
uint8_t *output,
uint16_t *pattern,
uint16_t size)
{
for (int i=0; i<size; i++) output[pattern[i]]=input[i];
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
+124 -28
View File
@@ -30,40 +30,46 @@
* \warning
*/
#define DEBUG_POLAR_ENCODER_DCI
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void polar_encoder(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams)
{
nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_a);
if (polarParams->idx == 0){//PBCH
nr_bit2byte_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_A);
/*
* Bytewise operations
*/
//Calculate CRC.
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_A,
polarParams->crc_generator_matrix,
polarParams->nr_polar_crc,
polarParams->payloadBits,
polarParams->crcParityBits);
for (uint8_t i = 0; i < polarParams->crcParityBits; i++)
polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
/*
* Bytewise operations
*/
//Calculate CRC.
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_a,
polarParams->crc_generator_matrix,
polarParams->nr_polar_crc,
polarParams->payloadBits,
polarParams->crcParityBits);
for (uint8_t i = 0; i < polarParams->crcParityBits; i++)
polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
//Attach CRC to the Transport Block. (a to b)
for (uint16_t i = 0; i < polarParams->payloadBits; i++)
polarParams->nr_polar_B[i] = polarParams->nr_polar_A[i];
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
polarParams->nr_polar_B[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
} else { //UCI
//Attach CRC to the Transport Block. (a to b)
for (uint16_t i = 0; i < polarParams->payloadBits; i++) polarParams->nr_polar_b[i] = polarParams->nr_polar_a[i];
for (uint16_t i = polarParams->payloadBits; i < polarParams->K; i++)
polarParams->nr_polar_b[i]= polarParams->nr_polar_crc[i-(polarParams->payloadBits)];
}
//Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_b,
polarParams->nr_polar_cPrime,
nr_polar_interleaver(polarParams->nr_polar_B,
polarParams->nr_polar_CPrime,
polarParams->interleaving_pattern,
polarParams->K);
//Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_cPrime,
polarParams->nr_polar_u,
nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
polarParams->nr_polar_U,
polarParams->N,
polarParams->K,
polarParams->Q_I_N,
@@ -71,23 +77,113 @@ void polar_encoder(uint32_t *in,
polarParams->n_pc);
//Encoding (u to d)
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_u,
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U,
polarParams->G_N,
polarParams->nr_polar_d,
polarParams->nr_polar_D,
polarParams->N,
polarParams->N);
for (uint16_t i = 0; i < polarParams->N; i++)
polarParams->nr_polar_d[i] = (polarParams->nr_polar_d[i] % 2);
polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
//Rate matching
//Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_rate_matcher(polarParams->nr_polar_d,
polarParams->nr_polar_e,
polarParams->rate_matching_pattern,
polarParams->encoderLength);
nr_polar_interleaver(polarParams->nr_polar_D,
polarParams->nr_polar_E,
polarParams->rate_matching_pattern,
polarParams->encoderLength);
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_e, polarParams->encoderLength, out);
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
}
void polar_encoder_dci(uint32_t *in,
uint32_t *out,
t_nrPolar_paramsPtr polarParams,
uint16_t n_RNTI)
{
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] in: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", in[0], in[1], in[2], in[3]);
#endif
//(a to a')
nr_crc_bit2bit_uint32_8_t(in, polarParams->payloadBits, polarParams->nr_polar_aPrime);
//Parity bits computation (p)
polarParams->crcBit = crc24c(polarParams->nr_polar_aPrime,
(polarParams->payloadBits+polarParams->crcParityBits));
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] crc: 0x%08x\n", polarParams->crcBit);
#endif
//(a to b)
/*
* Bytewise operations
*/
uint8_t arrayInd = ceil(polarParams->payloadBits / 8.0);
for (int i=0; i<arrayInd-1; i++){
for (int j=0; j<8; j++) {
polarParams->nr_polar_B[j+(i*8)] = ((polarParams->nr_polar_aPrime[3+i]>>(7-j)) & 1);
}
}
for (int i=0; i<((polarParams->payloadBits)%8); i++) {
polarParams->nr_polar_B[i+(arrayInd-1)*8] = ((polarParams->nr_polar_aPrime[3+(arrayInd-1)]>>(7-i)) & 1);
}
for (int i=0; i<8; i++) {
polarParams->nr_polar_B[polarParams->payloadBits+i] = ((polarParams->crcBit)>>(31-i))&1;
}
//Scrambling (b to c)
for (int i=0; i<16; i++) {
polarParams->nr_polar_B[polarParams->payloadBits+8+i] =
( (((polarParams->crcBit)>>(23-i))&1) + ((n_RNTI>>(15-i))&1) ) % 2;
}
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] B: ");
for (int i = 0; i < polarParams->K; i++) printf("%d-", polarParams->nr_polar_B[i]);
printf("\n");
#endif
//Interleaving (c to c')
nr_polar_interleaver(polarParams->nr_polar_B,
polarParams->nr_polar_CPrime,
polarParams->interleaving_pattern,
polarParams->K);
//Bit insertion (c' to u)
nr_polar_bit_insertion(polarParams->nr_polar_CPrime,
polarParams->nr_polar_U,
polarParams->N,
polarParams->K,
polarParams->Q_I_N,
polarParams->Q_PC_N,
polarParams->n_pc);
//Encoding (u to d)
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_U,
polarParams->G_N,
polarParams->nr_polar_D,
polarParams->N,
polarParams->N);
for (uint16_t i = 0; i < polarParams->N; i++)
polarParams->nr_polar_D[i] = (polarParams->nr_polar_D[i] % 2);
//Rate matching
//Sub-block interleaving (d to y) and Bit selection (y to e)
nr_polar_interleaver(polarParams->nr_polar_D,
polarParams->nr_polar_E,
polarParams->rate_matching_pattern,
polarParams->encoderLength);
/*
* Return bits.
*/
nr_byte2bit_uint8_32_t(polarParams->nr_polar_E, polarParams->encoderLength, out);
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] E: ");
for (int i = 0; i < polarParams->encoderLength; i++) printf("%d-", polarParams->nr_polar_E[i]);
uint8_t outputInd = ceil(polarParams->encoderLength / 32.0);
printf("\n[polar_encoder_dci] out: ");
for (int i = 0; i < outputInd; i++) {
printf("[%d]->0x%08x\t", i, out[i]);
}
#endif
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_info_bit_pattern.c
-131
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@@ -1,131 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_info_bit_pattern(uint8_t *ibp, int16_t *Q_I_N, int16_t *Q_F_N,
uint16_t *J, const uint16_t *Q_0_Nminus1, uint16_t K, uint16_t N, uint16_t E,
uint8_t n_PC) {
int16_t *Q_Ftmp_N = malloc(sizeof(int16_t) * (N + 1)); // Last element shows the final
int16_t *Q_Itmp_N = malloc(sizeof(int16_t) * (N + 1)); // array index assigned a value.
for (int i = 0; i <= N; i++) {
Q_Ftmp_N[i] = -1; // Empty array.
Q_Itmp_N[i] = -1;
}
uint8_t flag;
uint16_t limit, ind;
if (E < N) {
if ((K / (double) E) <= (7.0 / 16)) { //puncturing
for (int n = 0; n <= N - E - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = J[n];
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
if ((E / (double) N) >= (3.0 / 4)) {
limit = ceil((double) (3 * N - 2 * E) / 4);
for (int n = 0; n <= limit - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = n;
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
} else {
limit = ceil((double) (9 * N - 4 * E) / 16);
for (int n = 0; n <= limit - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = n;
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
}
} else { //shortening
for (int n = E; n <= N - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = J[n];
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
}
}
//Q_I,tmp_N = Q_0_N-1 \ Q_F,tmp_N
for (int n = 0; n <= N - 1; n++) {
flag = 1;
for (int m = 0; m <= Q_Ftmp_N[N]; m++) {
if (Q_0_Nminus1[n] == Q_Ftmp_N[m]) {
flag = 0;
break;
}
}
if (flag) {
Q_Itmp_N[Q_Itmp_N[N] + 1] = Q_0_Nminus1[n];
Q_Itmp_N[N]++;
}
}
//Q_I_N comprises (K+n_PC) most reliable bit indices in Q_I,tmp_N
for (int n = 0; n <= (K + n_PC) - 1; n++) {
ind = Q_Itmp_N[N] + n - ((K + n_PC) - 1);
Q_I_N[n] = Q_Itmp_N[ind];
}
//Q_F_N = Q_0_N-1 \ Q_I_N
for (int n = 0; n <= N - 1; n++) {
flag = 1;
for (int m = 0; m <= (K + n_PC) - 1; m++) {
if (Q_0_Nminus1[n] == Q_I_N[m]) {
flag = 0;
break;
}
}
if (flag) {
Q_F_N[Q_F_N[N] + 1] = Q_0_Nminus1[n];
Q_F_N[N]++;
}
}
//Information Bit Pattern
for (int n = 0; n <= N - 1; n++) {
ibp[n] = 0;
for (int m = 0; m <= (K + n_PC) - 1; m++) {
if (n == Q_I_N[m]) {
ibp[n] = 1;
break;
}
}
}
free(Q_Ftmp_N);
free(Q_Itmp_N);
}
void nr_polar_info_bit_extraction(uint8_t *input, uint8_t *output, uint8_t *pattern, uint16_t size) {
uint16_t j = 0;
for (int i = 0; i < size; i++) {
if (pattern[i] > 0) {
output[j] = input[i];
j++;
}
}
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_interleaving_pattern.c
+11
View File
@@ -19,6 +19,17 @@
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_interleaving_pattern.c
* \brief
* \author Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \note
* \warning
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_interleaving_pattern(uint16_t K, uint8_t I_IL, uint16_t *PI_k_){
openair1/PHY/CODING/nrPolar_tools/nr_polar_kronecker_power_matrices.c
+11
View File
@@ -19,6 +19,17 @@
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_kronecker_power_matrices.c
* \brief
* \author Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \note
* \warning
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
uint8_t (*const(G_N_1[])) = {
openair1/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
+11
View File
@@ -19,6 +19,17 @@
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
* \brief
* \author Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \note
* \warning
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(uint8_t *matrix1, uint8_t **matrix2,
openair1/PHY/CODING/nrPolar_tools/nr_polar_output_length.c
-46
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@@ -1,46 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include <math.h>
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
uint32_t nr_polar_output_length(uint16_t K, uint16_t E, uint8_t n_max){
uint8_t n_1, n_2, n_min=5, n;
uint32_t polar_code_output_length;
double R_min=1.0/8;
if ( (E <= (9.0/8)*pow(2,ceil(log2(E))-1)) && (K/E < 9.0/16) ) {
n_1 = ceil(log2(E))-1;
} else {
n_1 = ceil(log2(E));
}
n_2 = ceil(log2(K/R_min));
n=n_max;
if (n>n_1) n=n_1;
if (n>n_2) n=n_2;
if (n<n_min) n=n_min;
polar_code_output_length = (uint32_t) pow(2.0,n);
return polar_code_output_length;
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h
+1 -1
View File
@@ -19,7 +19,7 @@
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_defs.h
/*!\file PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h
* \brief Defines the constant variables for polar coding of the PBCH from 38-212, V15.1.1 2018-04.
* \author Turker Yilmaz
* \date 2018
openair1/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
+315
View File
@@ -0,0 +1,315 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_procedures.h
* \brief
* \author Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \note
* \warning
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_bit_insertion(uint8_t *input,
uint8_t *output,
uint16_t N,
uint16_t K,
int16_t *Q_I_N,
int16_t *Q_PC_N,
uint8_t n_PC)
{
uint16_t k=0;
uint8_t flag;
if (n_PC>0) {
/*
*
*/
} else {
for (int n=0; n<=N-1; n++) {
flag=0;
for (int m=0; m<=(K+n_PC)-1; m++) {
if ( n == Q_I_N[m]) {
flag=1;
break;
}
}
if (flag) { // n ϵ Q_I_N
output[n]=input[k];
k++;
} else {
output[n] = 0;
}
}
}
}
uint32_t nr_polar_output_length(uint16_t K,
uint16_t E,
uint8_t n_max)
{
uint8_t n_1, n_2, n_min=5, n;
double R_min=1.0/8;
if ( (E <= (9.0/8)*pow(2,ceil(log2(E))-1)) && (K/E < 9.0/16) ) {
n_1 = ceil(log2(E))-1;
} else {
n_1 = ceil(log2(E));
}
n_2 = ceil(log2(K/R_min));
n=n_max;
if (n>n_1) n=n_1;
if (n>n_2) n=n_2;
if (n<n_min) n=n_min;
return ((uint32_t) pow(2.0,n)); //=polar_code_output_length
}
void nr_polar_channel_interleaver_pattern(uint16_t *cip,
uint8_t I_BIL,
uint16_t E)
{
if (I_BIL == 1) {
uint16_t T=0, k;
while( ((T/2)*(T+1)) < E ) T++;
int16_t **v = malloc(T * sizeof(*v));
for (int i = 0; i <= T-1; i++) v[i] = malloc((T-i) * sizeof(*(v[i])));
k=0;
for (int i = 0; i <= T-1; i++) {
for (int j = 0; j <= (T-1)-i; j++) {
if (k<E) {
v[i][j] = k;
} else {
v[i][j] = (-1);
}
k++;
}
}
k=0;
for (int j = 0; j <= T-1; j++) {
for (int i = 0; i <= (T-1)-j; i++) {
if ( v[i][j] != (-1) ) {
cip[k]=v[i][j];
k++;
}
}
}
for (int i = 0; i <= T-1; i++) free(v[i]);
free(v);
} else {
for (int i=0; i<=E-1; i++) cip[i]=i;
}
}
void nr_polar_info_bit_pattern(uint8_t *ibp,
int16_t *Q_I_N,
int16_t *Q_F_N,
uint16_t *J,
const uint16_t *Q_0_Nminus1,
uint16_t K,
uint16_t N,
uint16_t E,
uint8_t n_PC)
{
int16_t *Q_Ftmp_N = malloc(sizeof(int16_t) * (N + 1)); // Last element shows the final
int16_t *Q_Itmp_N = malloc(sizeof(int16_t) * (N + 1)); // array index assigned a value.
for (int i = 0; i <= N; i++) {
Q_Ftmp_N[i] = -1; // Empty array.
Q_Itmp_N[i] = -1;
}
uint8_t flag;
uint16_t limit, ind;
if (E < N) {
if ((K / (double) E) <= (7.0 / 16)) { //puncturing
for (int n = 0; n <= N - E - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = J[n];
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
if ((E / (double) N) >= (3.0 / 4)) {
limit = ceil((double) (3 * N - 2 * E) / 4);
for (int n = 0; n <= limit - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = n;
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
} else {
limit = ceil((double) (9 * N - 4 * E) / 16);
for (int n = 0; n <= limit - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = n;
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
}
} else { //shortening
for (int n = E; n <= N - 1; n++) {
ind = Q_Ftmp_N[N] + 1;
Q_Ftmp_N[ind] = J[n];
Q_Ftmp_N[N] = Q_Ftmp_N[N] + 1;
}
}
}
//Q_I,tmp_N = Q_0_N-1 \ Q_F,tmp_N
for (int n = 0; n <= N - 1; n++) {
flag = 1;
for (int m = 0; m <= Q_Ftmp_N[N]; m++) {
if (Q_0_Nminus1[n] == Q_Ftmp_N[m]) {
flag = 0;
break;
}
}
if (flag) {
Q_Itmp_N[Q_Itmp_N[N] + 1] = Q_0_Nminus1[n];
Q_Itmp_N[N]++;
}
}
//Q_I_N comprises (K+n_PC) most reliable bit indices in Q_I,tmp_N
for (int n = 0; n <= (K + n_PC) - 1; n++) {
ind = Q_Itmp_N[N] + n - ((K + n_PC) - 1);
Q_I_N[n] = Q_Itmp_N[ind];
}
//Q_F_N = Q_0_N-1 \ Q_I_N
for (int n = 0; n <= N - 1; n++) {
flag = 1;
for (int m = 0; m <= (K + n_PC) - 1; m++) {
if (Q_0_Nminus1[n] == Q_I_N[m]) {
flag = 0;
break;
}
}
if (flag) {
Q_F_N[Q_F_N[N] + 1] = Q_0_Nminus1[n];
Q_F_N[N]++;
}
}
//Information Bit Pattern
for (int n = 0; n <= N - 1; n++) {
ibp[n] = 0;
for (int m = 0; m <= (K + n_PC) - 1; m++) {
if (n == Q_I_N[m]) {
ibp[n] = 1;
break;
}
}
}
free(Q_Ftmp_N);
free(Q_Itmp_N);
}
void nr_polar_info_bit_extraction(uint8_t *input,
uint8_t *output,
uint8_t *pattern,
uint16_t size)
{
uint16_t j = 0;
for (int i = 0; i < size; i++) {
if (pattern[i] > 0) {
output[j] = input[i];
j++;
}
}
}
void nr_polar_rate_matching_pattern(uint16_t *rmp, uint16_t *J, const uint8_t *P_i_, uint16_t K, uint16_t N, uint16_t E){
uint8_t i;
uint16_t *d, *y, ind;
d = (uint16_t *)malloc(sizeof(uint16_t) * N);
y = (uint16_t *)malloc(sizeof(uint16_t) * N);
for (int m=0; m<=N-1; m++) d[m]=m;
for (int m=0; m<=N-1; m++){
i=floor((32*m)/N);
J[m] = (P_i_[i]*(N/32)) + (m%(N/32));
y[m] = d[J[m]];
}
if (E>=N) { //repetition
for (int k=0; k<=E-1; k++) {
ind = (k%N);
rmp[k]=y[ind];
}
} else {
if ( (K/(double)E) <= (7.0/16) ) { //puncturing
for (int k=0; k<=E-1; k++) {
rmp[k]=y[k+N-E];
}
} else { //shortening
for (int k=0; k<=E-1; k++) {
rmp[k]=y[k];
}
}
}
free(d);
free(y);
}
void nr_polar_rate_matching(double *input, double *output, uint16_t *rmp, uint16_t K, uint16_t N, uint16_t E){
if (E>=N) { //repetition
for (int i=0; i<=N-1; i++) output[i]=0;
for (int i=0; i<=E-1; i++){
output[rmp[i]]+=input[i];
}
} else {
if ( (K/(double)E) <= (7.0/16) ) { //puncturing
for (int i=0; i<=N-1; i++) output[i]=0;
} else { //shortening
for (int i=0; i<=N-1; i++) output[i]=INFINITY;
}
for (int i=0; i<=E-1; i++){
output[rmp[i]]=input[i];
}
}
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_rate_match.c
-81
View File
@@ -1,81 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include <math.h>
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_rate_matching_pattern(uint16_t *rmp, uint16_t *J, const uint8_t *P_i_, uint16_t K, uint16_t N, uint16_t E){
uint8_t i;
uint16_t *d, *y, ind;
d = (uint16_t *)malloc(sizeof(uint16_t) * N);
y = (uint16_t *)malloc(sizeof(uint16_t) * N);
for (int m=0; m<=N-1; m++) d[m]=m;
for (int m=0; m<=N-1; m++){
i=floor((32*m)/N);
J[m] = (P_i_[i]*(N/32)) + (m%(N/32));
y[m] = d[J[m]];
}
if (E>=N) { //repetition
for (int k=0; k<=E-1; k++) {
ind = (k%N);
rmp[k]=y[ind];
}
} else {
if ( (K/(double)E) <= (7.0/16) ) { //puncturing
for (int k=0; k<=E-1; k++) {
rmp[k]=y[k+N-E];
}
} else { //shortening
for (int k=0; k<=E-1; k++) {
rmp[k]=y[k];
}
}
}
free(d);
free(y);
}
void nr_polar_rate_matching(double *input, double *output, uint16_t *rmp, uint16_t K, uint16_t N, uint16_t E){
if (E>=N) { //repetition
for (int i=0; i<=N-1; i++) output[i]=0;
for (int i=0; i<=E-1; i++){
output[rmp[i]]+=input[i];
}
} else {
if ( (K/(double)E) <= (7.0/16) ) { //puncturing
for (int i=0; i<=N-1; i++) output[i]=0;
} else { //shortening
for (int i=0; i<=N-1; i++) output[i]=INFINITY;
}
for (int i=0; i<=E-1; i++){
output[rmp[i]]=input[i];
}
}
}
openair1/PHY/CODING/nr_polar_init.c
+24 -10
View File
@@ -42,10 +42,11 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
uint8_t aggregation_level)
{
t_nrPolar_paramsPtr currentPtr = *polarParams;
uint16_t aggregation_prime = nr_polar_aggregation_prime(aggregation_level);
//Parse the list. If the node is already created, return without initialization.
while (currentPtr != NULL) {
if (currentPtr->idx == (messageType * messageLength)) return;
if (currentPtr->idx == (messageType * messageLength * aggregation_prime)) return;
else currentPtr = currentPtr->nextPtr;
}
@@ -54,7 +55,7 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
if (newPolarInitNode != NULL) {
newPolarInitNode->idx = (messageType * messageLength);
newPolarInitNode->idx = (messageType * messageLength * aggregation_prime);
newPolarInitNode->nextPtr = NULL;
if (messageType == 0) { //PBCH
@@ -94,14 +95,15 @@ void nr_polar_init(t_nrPolar_paramsPtr *polarParams,
//polar_encoder vectors:
newPolarInitNode->nr_polar_crc = malloc(sizeof(uint8_t) * newPolarInitNode->crcParityBits);
newPolarInitNode->nr_polar_d = malloc(sizeof(uint8_t) * newPolarInitNode->N);
newPolarInitNode->nr_polar_e = malloc(sizeof(uint8_t) * newPolarInitNode->encoderLength);
newPolarInitNode->nr_polar_aPrime = malloc(sizeof(uint8_t) * ((ceil((newPolarInitNode->payloadBits)/32.0)*4)+3));
newPolarInitNode->nr_polar_D = malloc(sizeof(uint8_t) * newPolarInitNode->N);
newPolarInitNode->nr_polar_E = malloc(sizeof(uint8_t) * newPolarInitNode->encoderLength);
//Polar Coding vectors
newPolarInitNode->nr_polar_u = malloc(sizeof(uint8_t) * newPolarInitNode->N); //Decoder: nr_polar_uHat
newPolarInitNode->nr_polar_cPrime = malloc(sizeof(uint8_t) * newPolarInitNode->K); //Decoder: nr_polar_cHat
newPolarInitNode->nr_polar_b = malloc(sizeof(uint8_t) * newPolarInitNode->K); //Decoder: nr_polar_bHat
newPolarInitNode->nr_polar_a = malloc(sizeof(uint8_t) * newPolarInitNode->payloadBits); //Decoder: nr_polar_aHat
newPolarInitNode->nr_polar_U = malloc(sizeof(uint8_t) * newPolarInitNode->N); //Decoder: nr_polar_uHat
newPolarInitNode->nr_polar_CPrime = malloc(sizeof(uint8_t) * newPolarInitNode->K); //Decoder: nr_polar_cHat
newPolarInitNode->nr_polar_B = malloc(sizeof(uint8_t) * newPolarInitNode->K); //Decoder: nr_polar_bHat
newPolarInitNode->nr_polar_A = malloc(sizeof(uint8_t) * newPolarInitNode->payloadBits); //Decoder: nr_polar_aHat
@@ -180,12 +182,14 @@ void nr_polar_print_polarParams(t_nrPolar_paramsPtr polarParams)
t_nrPolar_paramsPtr nr_polar_params (t_nrPolar_paramsPtr polarParams,
int8_t messageType,
uint16_t messageLength)
uint16_t messageLength,
uint8_t aggregation_level)
{
t_nrPolar_paramsPtr currentPtr = NULL;
while (polarParams != NULL) {
if (polarParams->idx == (messageType * messageLength)) {
if (polarParams->idx ==
(messageType * messageLength * (nr_polar_aggregation_prime(aggregation_level)) )) {
currentPtr = polarParams;
break;
} else {
@@ -194,3 +198,13 @@ t_nrPolar_paramsPtr nr_polar_params (t_nrPolar_paramsPtr polarParams,
}
return currentPtr;
}
uint16_t nr_polar_aggregation_prime (uint8_t aggregation_level)
{
if (aggregation_level == 0) return 0;
else if (aggregation_level == 1) return NR_POLAR_AGGREGATION_LEVEL_1_PRIME;
else if (aggregation_level == 2) return NR_POLAR_AGGREGATION_LEVEL_2_PRIME;
else if (aggregation_level == 4) return NR_POLAR_AGGREGATION_LEVEL_4_PRIME;
else if (aggregation_level == 8) return NR_POLAR_AGGREGATION_LEVEL_8_PRIME;
else return NR_POLAR_AGGREGATION_LEVEL_16_PRIME; //aggregation_level == 16
}
openair1/PHY/INIT/nr_init_ue.c
+3
View File
@@ -657,6 +657,9 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
//phy_init_nr_top(&ue->frame_parms);
//nr_init_frame_parms_ue(&ue->frame_parms);
// many memory allocation sizes are hard coded
AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]" );
openair1/PHY/INIT/nr_parms.c
+2 -3
View File
@@ -159,8 +159,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
return 0;
}
int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms)
{
int N_RB = 106;
@@ -283,7 +282,7 @@ int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config,
frame_parms->ofdm_symbol_size = 2048;
frame_parms->samples_per_tti = 30720;
frame_parms->samples_per_subframe = 30720 * frame_parms->ttis_per_subframe;
frame_parms->first_carrier_offset = 2048-600;
//frame_parms->first_carrier_offset = 2048-600;
frame_parms->slots_per_frame = 10* frame_parms->slots_per_subframe;
frame_parms->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
openair1/PHY/INIT/phy_init.h
+2 -1
View File
@@ -375,7 +375,8 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
openair1/PHY/MODULATION/slot_fep.c
+2 -2
View File
@@ -50,7 +50,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
//NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516;
uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t nb_rb_pdsch = 100;
@@ -239,7 +239,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
printf("PDCCH Channel estimation eNB %d, aatx %d, slot %d, symbol %d start_sc %d\n",eNB_id,aa,Ns,l,coreset_start_subcarrier);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+31 -5
View File
@@ -53,7 +53,7 @@ int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1
short nr_rx_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
/*int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10],
@@ -65,8 +65,6 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
int32_t qpsk[4],n;
int w,ind,l,ind_dword,ind_qpsk_symb,kp,k;
short pamp;
// Compute the correct pilot amplitude, sqrt_rho_b = Q3.13
pamp = ONE_OVER_SQRT2_Q15;
// This includes complex conjugate for channel estimation
@@ -80,7 +78,6 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
((short *)&qpsk[3])[1] = pamp;
if (p==2000) {
// r_n from 38.211 7.4.1.3
for (n=0; n<nb_rb_coreset*3; n++) {
for (l =0; l<length_dmrs; l++){
for (kp=0; kp<3; kp++){
@@ -106,7 +103,7 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
}
return(0);
}
}*/
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
@@ -189,6 +186,35 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
return(0);
}
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
unsigned short nb_rb_coreset)
{
uint8_t idx=0;
uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
if (p==2000) {
for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PDCCH
if (i<8)
printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]);
#endif
}
}
return(0);
}
int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch,
int32_t *output )
{
openair1/PHY/NR_REFSIG/nr_gold_ue.c
+5 -5
View File
@@ -64,7 +64,7 @@ void nr_gold_pbch(PHY_VARS_NR_UE* ue)
}
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_idDMRS, unsigned short length_dmrs)
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned short n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
@@ -74,7 +74,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
if (n_idDMRS)
nid = n_idDMRS;
else
nid = Nid_cell;
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
@@ -95,7 +95,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
for (n=0; n<10; n++) {
for (n=0; n<52; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
@@ -107,7 +107,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
}
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int Nid_cell, unsigned short *n_idDMRS, unsigned short length_dmrs)
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
@@ -122,7 +122,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int Nid_cell,
if (n_idDMRS)
nid = n_idDMRS[nscid];
else
nid = Nid_cell;
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
openair1/PHY/NR_REFSIG/refsig_defs_ue.h
+1 -4
View File
@@ -37,10 +37,9 @@ int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch, int32_t *output );
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10],
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
int length_dmrs,
unsigned short nb_rb_corset);
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
@@ -55,13 +54,11 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
void nr_gold_pbch(PHY_VARS_NR_UE* ue);
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned int Nid_cell,
unsigned short n_idDMRS,
unsigned short length_dmrs);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short lbar,
unsigned int Nid_cell,
unsigned short *n_idDMRS,
unsigned short length_dmrs);
openair1/PHY/NR_REFSIG/ss_pbch_nr.h
+10 -4
View File
@@ -51,10 +51,16 @@
#define PSS_SC_START_NR (52) /* see from TS 38.211 table 7.4.3.1-1: Resources within an SS/PBCH block for PSS... */
/* define ofdm symbol offset in the SS/PBCH block of NR synchronisation */
#define PSS_SYMBOL_NB (4) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB (5)
#define SSS_SYMBOL_NB (6)
#define PBCH_LAST_SYMBOL_NB (7)
#ifdef NR_UNIT_TEST
#define OFFSET_SS_PBCH (0)
#else
#define OFFSET_SS_PBCH (4)
#endif
#define PSS_SYMBOL_NB ((0) + OFFSET_SS_PBCH) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB ((1) + OFFSET_SS_PBCH)
#define SSS_SYMBOL_NB ((2) + OFFSET_SS_PBCH)
#define PBCH_LAST_SYMBOL_NB ((3) + OFFSET_SS_PBCH)
/* SS/PBCH parameters */
#define N_RB_SS_PBCH_BLOCK (20)
openair1/PHY/NR_TRANSPORT/nr_dci.c
+11 -22
View File
@@ -34,7 +34,7 @@
//#define DEBUG_PDCCH_DMRS
//#define DEBUG_DCI
#define DEBUG_POLAR_PARAMS
//#define DEBUG_POLAR_PARAMS
extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
@@ -202,40 +202,29 @@ uint8_t nr_generate_dci_top(NR_gNB_PDCCH pdcch_vars,
}
/// DCI payload processing
//channel coding
// CRC attachment + Scrambling + Channel coding + Rate matching
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti : 0;
nr_polar_init(nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size);
uint8_t *encoderInput = malloc(sizeof(uint8_t) * dci_alloc.size);
uint8_t *encoderOutput = malloc(sizeof(uint8_t) * currentPtr->encoderLength);
uint32_t encoded_payload[4];
nr_bit2byte_uint32_8_t(dci_alloc.dci_pdu,dci_alloc.size,encoderInput);
polar_encoder(encoderInput, encoderOutput, currentPtr);
nr_byte2bit_uint8_32_t(encoderOutput, currentPtr->encoderLength, encoded_payload);
t_nrPolar_paramsPtr currentPtr = nr_polar_params(*nrPolar_params, NR_POLAR_DCI_MESSAGE_TYPE, dci_alloc.size, dci_alloc.L);
polar_encoder_dci(dci_alloc.dci_pdu, encoder_output, currentPtr, n_RNTI);
#ifdef DEBUG_POLAR_PARAMS
printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
/*printf("DCI PDU: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_alloc.dci_pdu[0], dci_alloc.dci_pdu[1], dci_alloc.dci_pdu[2], dci_alloc.dci_pdu[3]);
printf("Encoded Payload: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
encoded_payload[0], encoded_payload[1], encoded_payload[2], encoded_payload[3]);
encoder_output[0], encoder_output[1], encoder_output[2], encoder_output[3]);*/
#endif
// scrambling
uint32_t scrambled_payload[NR_MAX_DCI_SIZE_DWORD];
uint32_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
uint32_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params.rnti : 0;
nr_pdcch_scrambling(encoded_payload, dci_alloc.size, Nid, n_RNTI, scrambled_payload);
// QPSK modulation
int16_t mod_dci[NR_MAX_DCI_SIZE>>1];
for (int i=0; i<encoded_length>>1; i++) {
idx = (((scrambled_payload[i<<1]>>(i<<1))&1)<<1) ^ ((scrambled_payload[(i<<1)+1]>>((i<<1)+1))&1);
idx = (((encoder_output[i<<1]>>(i<<1))&1)<<1) ^ ((encoder_output[(i<<1)+1]>>((i<<1)+1))&1);
mod_dci[i<<1] = nr_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
mod_dci[(i<<1)+1] = nr_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_DCI
printf("i %d idx %d b0-b1 %d-%d mod_dci %d %d\n", i, idx, (((scrambled_payload[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((scrambled_payload[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dci[(i<<1)], mod_dci[(i<<1)+1]);
printf("i %d idx %d b0-b1 %d-%d mod_dci %d %d\n", i, idx, (((encoder_output[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((encoder_output[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), mod_dci[(i<<1)], mod_dci[(i<<1)+1]);
#endif
}
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+31 -30
View File
@@ -31,7 +31,7 @@
*/
#include "nr_dci.h"
#define DEBUG_NFAPI_NR_RNTI_RA
//#define DEBUG_NFAPI_NR_RNTI_RA
void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m) {
@@ -129,35 +129,36 @@ void nr_fill_dci_and_dlsch(PHY_VARS_gNB *gNB,
case NFAPI_NR_DL_DCI_FORMAT_1_0:
switch(params_rel15->rnti_type) {
case NFAPI_NR_RNTI_RA:
#ifdef DEBUG_NFAPI_NR_RNTI_RA
printf("frequency_domain_assignment = %05d = %#010x\n"
" time_domain_assignment = %05d = %#010x\n"
" vrb_to_prb_mapping = %05d = %#010x\n"
" MCS = %05d = %#010x\n"
" tb_scaling = %05d = %#010x\n",
pdu_rel15->frequency_domain_assignment,pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment,pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping,pdu_rel15->vrb_to_prb_mapping,
pdu_rel15->mcs,pdu_rel15->mcs,pdu_rel15->tb_scaling,pdu_rel15->tb_scaling);
#endif
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// VRB to PRB mapping
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
// MCS
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// TB scaling
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos++;
break;
// Freq domain assignment
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
#ifdef DEBUG_NFAPI_NR_RNTI_RA
printf("frequency_domain_assignment = %05d = %#010x\n"
" time_domain_assignment = %05d = %#010x\n"
" vrb_to_prb_mapping = %05d = %#010x\n"
" MCS = %05d = %#010x\n"
" tb_scaling = %05d = %#010x\n"
" N_RB = %05d = %#010x\n"
" fsize = %05d = %#010x\n",
pdu_rel15->frequency_domain_assignment,pdu_rel15->frequency_domain_assignment,
pdu_rel15->time_domain_assignment,pdu_rel15->time_domain_assignment,
pdu_rel15->vrb_to_prb_mapping,pdu_rel15->vrb_to_prb_mapping,
pdu_rel15->mcs,pdu_rel15->mcs,pdu_rel15->tb_scaling,pdu_rel15->tb_scaling,
N_RB,N_RB,fsize,fsize);
#endif
for (int i=0; i<fsize; i++)
*dci_pdu |= ((pdu_rel15->frequency_domain_assignment>>(fsize-i-1))&1)<<pos++;
// Time domain assignment
for (int i=0; i<4; i++)
*dci_pdu |= ((pdu_rel15->time_domain_assignment>>(3-i))&1)<<pos++;
// VRB to PRB mapping
*dci_pdu |= (pdu_rel15->vrb_to_prb_mapping&1)<<pos++;
// MCS
for (int i=0; i<5; i++)
*dci_pdu |= ((pdu_rel15->mcs>>(4-i))&1)<<pos++;
// TB scaling
for (int i=0; i<2; i++)
*dci_pdu |= ((pdu_rel15->tb_scaling>>(1-i))&1)<<pos++;
break;
}
break;
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+5
View File
@@ -219,6 +219,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t nushift;
uint8_t *xbyte = pbch->pbch_a;
memset((void*) xbyte, 0, 1);
uint8_t pbch_a_b[32];
LOG_I(PHY, "PBCH generation started\n");
@@ -281,6 +282,10 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
printf("pbch_a_prime[%d]: 0x%02x\n", i, pbch->pbch_a_prime[i]);
#endif
for (int m=0;m<32;m++){
pbch_a_b[m] = ((pbch->pbch_a_prime[m/8]>>(m&7))&01);
//printf("pbch_a_b[%d] %d\n", m, pbch_a_b[m] );
}
/// CRC, coding and rate matching
polar_encoder (pbch->pbch_a_prime, pbch->pbch_e, &frame_parms->pbch_polar_params);
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+8 -8
View File
@@ -113,12 +113,12 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("pbch ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
//if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -214,7 +214,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
}
//}
}
@@ -257,7 +257,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d cell_id %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,Nid_cell,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,l,Ns,k, symbol);
#endif
@@ -266,7 +266,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fr = filt16a_r1;
// generate pilot
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[p][0],2000,symbol, nb_rb_coreset);
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[p][0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
@@ -279,12 +279,12 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
multadd_complex_vector_real_scalar(dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
//#ifdef DEBUG_CH
printf("pdcch ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
#endif
//#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+41 -43
View File
@@ -50,7 +50,7 @@
//#define NR_LTE_PDCCH_DCI_SWITCH
#define NR_PDCCH_DCI_RUN // activates new nr functions
#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
@@ -535,17 +535,19 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
* reg_bundle_size (2,3,6)
*/
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> coreset_nbr_rb=(%lld), reg_bundle_size_L=(%d)\n",
coreset_nbr_rb,reg_bundle_size_L);
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> coreset_nbr_rb=(%lld), reg_bundle_size_L=(%d), coreset_interleaver_size_R=(%d), n_shift=(%d)\n",
coreset_nbr_rb,reg_bundle_size_L,coreset_interleaver_size_R,n_shift);
#endif
/*
* First verify that CORESET is interleaved or not interleaved depending on parameter cce-REG-MappingType
* To be done
* if non-interleaved then do nothing: wbar table stays as it is
* if non-interleaved then do nothing: wbar table stays as it is (if REG bundle size is set to 0 by higher layer, then we consider that there is no interleaving)
*/
int coreset_interleaved = 1;
if (reg_bundle_size_L==0) coreset_interleaved=0;
/*
* if interleaved then do this: wbar table has bundles interleaved. We have to de-interleave then
* following procedure described in 38.211 Section 7.3.2.2:
*/
int coreset_interleaved = 1;
*/
uint32_t bundle_id, bundle_interleaved, c=0 ,r=-1, k, l, i=0;
uint32_t coreset_C = (uint32_t)(coreset_nbr_rb / (coreset_interleaver_size_R*reg_bundle_size_L));
uint16_t *wptr;
@@ -553,34 +555,34 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
z = &wtemp_rx[0];
bundle_id=0;
for (k=0 ; k<9*coreset_nbr_rb*coreset_time_dur; k++){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> k=%d \t coreset_interleaved=%d reg_bundle_size_L=%d coreset_C=%d coreset_interleaver_R=%d",
k,coreset_interleaved,reg_bundle_size_L, coreset_C,coreset_interleaver_size_R);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> k=%d \t coreset_interleaved=%d reg_bundle_size_L=%d coreset_C=%d coreset_interleaver_R=%d",
k,coreset_interleaved,reg_bundle_size_L, coreset_C,coreset_interleaver_size_R);
#endif
if (k%(9*reg_bundle_size_L)==0) {
// calculate offset properly
if (r==coreset_interleaver_size_R-1) {
//if (bundle_id>=(c+1)*coreset_interleaver_size_R) {
c++;
r=0;
} else{
} else {
r++;
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t --> time to modify bundle_interleaved and bundle_id --> r=%d c=%d",r,c);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t --> time to modify bundle_interleaved and bundle_id --> r=%d c=%d",r,c);
#endif
bundle_id=c*coreset_interleaver_size_R+r;
bundle_interleaved=(r*coreset_C+c+n_shift)%(coreset_nbr_rb * coreset_time_dur/reg_bundle_size_L);
}
if (coreset_interleaved == 1){
//wptr[i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L]=wbar[i];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\n\t\t\t\t\t\t\t\t\t wptr[%d] <-> wbar[%d]",i,i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\n\t\t\t\t\t\t\t\t\t wptr[%d] <-> wbar[%d]",i,i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L);
#endif
wptr[i]=wbar[i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t bundle_id = %d \t bundle_interleaved = %d\n",bundle_id,bundle_interleaved);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t bundle_id = %d \t bundle_interleaved = %d (r=%d, c=%d)\n",bundle_id,bundle_interleaved,r,c);
#endif
i++;
} else {
wptr[i]=wbar[i];
@@ -2758,11 +2760,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
* pdcch-Config
* pdcch-ConfigCommon
*/
#if 0
/*
* initialize this values for testing
*/
#if 0
pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources = 0x1FFF2FF00000;
//pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources = 0x1E0000000000;
pdcch_vars2->coreset[nb_coreset_active].duration = 2;
@@ -2782,10 +2784,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
pdcch_vars[eNB_id]->searchSpace[i].searchSpaceType.sfi_nrofCandidates_aggrlevel8 = 3;
pdcch_vars[eNB_id]->searchSpace[i].searchSpaceType.sfi_nrofCandidates_aggrlevel16 = 1;
}
#endif //(0)
/*
* to be removed after testing
*/
#endif //(0)
// number of RB (1 symbol) or REG (12 RE) in one CORESET: higher-layer parameter CORESET-freq-dom
// (bit map 45 bits: each bit indicates 6 RB in CORESET -> 1 bit MSB indicates PRB 0..6 are part of CORESET)
@@ -2805,19 +2808,24 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// The UE can be assigned 4 different BWP but only one active at a time.
// For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1)
uint32_t n_BWP_start = 0;
//uint32_t n_BWP_start = 0;
//uint32_t n_rb_offset = 0;
uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset;
// start time position for CORESET
// parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot
uint8_t start_symbol = 0;
// at the moment we are considering that the PDCCH is always starting at symbol 0 of current slot
// the following code to initialize start_symbol must be activated once we implement PDCCH demapping on symbol not equal to 0 (considering symbol_mon)
/*for (int i=0; i < 14; i++) {
for (int i=0; i < 14; i++) {
if (symbol_mon >> (13-i) != 0) {
start_symbol = i;
i=14;
}
}*/
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=%d\n",symbol_mon,start_symbol);
#endif
//
// according to 38.213 v15.1.0: a PDCCH monitoring pattern within a slot,
@@ -2860,7 +2868,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
for (int s = start_symbol; s < (start_symbol + coreset_time_dur); s++) {
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter process pdcch ofdm symbol s=%d where coreset_time_dur=%d\n",s,coreset_time_dur);
if (is_secondary_ue == 1) {
/* if (is_secondary_ue == 1) {
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id+1], //add 1 to eNB_id to compensate for the shifted B/F'd pilots from the SeNB
pdcch_vars[eNB_id]->rxdataF_ext,
@@ -2885,7 +2893,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
0,
high_speed_flag,
frame_parms);
} else {
} else {*/
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",
is_secondary_ue);
@@ -2899,7 +2907,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
frame_parms,
coreset_freq_dom,
coreset_nbr_rb,
n_BWP_start);
n_rb_offset);
/*
printf("\t### in nr_rx_pdcch() function we enter pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",is_secondary_ue);
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
@@ -2911,7 +2919,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
frame_parms);
*/
}
//}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",avgP);
@@ -3016,9 +3024,9 @@ printf("\t### in nr_rx_pdcch() function we enter pdcch_channel_compensation(log2
}
if (mimo_mode == SISO) {
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_siso(for symbol 0) ---> pdcch_vars[eNB_id]->rxdataF_comp\n");
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_siso ---> pdcch_vars[eNB_id]->rxdataF_comp Nothing to do here. TO BE REMOVED!!!\n");
#endif
pdcch_siso(frame_parms, pdcch_vars[eNB_id]->rxdataF_comp,s);
//pdcch_siso(frame_parms, pdcch_vars[eNB_id]->rxdataF_comp,s);
} else pdcch_alamouti(frame_parms, pdcch_vars[eNB_id]->rxdataF_comp,s);
#ifdef MU_RECEIVER
@@ -3060,21 +3068,11 @@ printf("\t### in nr_rx_pdcch() function we enter pdcch_channel_compensation(log2
#ifdef MU_RECEIVER
}
#endif //MU_RECEIVER
#if T_TRACER
T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
T_INT(n_pdcch_symbols),
T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
#endif
/* We do not enter this function: in NR the number of PDCCH symbols is determined by higher layers parameter CORESET-time-dur
/*/
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we do not enter function rx_pcfich()\n as the number of PDCCH symbols is determined by higher layers parameter CORESET-time-dur and n_pdcch_symbols=%d\n",n_pdcch_symbols);
/*
// decode pcfich here and find out pdcch ofdm symbol number
n_pdcch_symbols = rx_pcfich(frame_parms, nr_tti_rx, pdcch_vars[eNB_id],mimo_mode);
if (n_pdcch_symbols > 3) n_pdcch_symbols = 1;
*/
#ifdef DEBUG_DCI_DECODING
printf("demapping: nr_tti_rx %d, mi %d, tdd_config %d\n",nr_tti_rx,get_mi(frame_parms,nr_tti_rx),frame_parms->tdd_config);
#endif
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
+7 -5
View File
@@ -4815,6 +4815,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
}
}
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Ending function nr_extract_dci_info()\n");
#endif
@@ -6934,7 +6935,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES])
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted)
{
/*
* Note only format0_0 and format1_0 are implemented
@@ -6946,7 +6948,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL,*ulsch1=NULL;
NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
//NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
uint8_t status=0,left_shift=0;
uint64_t pdu_bitmap = 0xFFFFFFFFFFFFFFFF;
pdu_bitmap = (pdu_bitmap << (64 - dci_length)) >> (64 - dci_length); // this variable will help to remove the bits of other fields when left-switching
@@ -6955,15 +6957,15 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
dlsch0->active = 0;
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15] != 0) { // 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format-15];
nr_dci_info_extracted.harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
nr_dci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
left_shift = 0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted.harq_process_number);
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted->harq_process_number);
#endif
}
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted.harq_process_number];
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted->harq_process_number];
ulsch0 = ulsch;
/* printf("nr_dci_info_extracted.harq_process_number = %d\n",nr_dci_info_extracted.harq_process_number);
printf("dlsch0 = %d\n",dlsch0);
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+18 -5
View File
@@ -47,6 +47,7 @@
extern openair0_config_t openair0_cfg[];
static nfapi_nr_config_request_t config_t;
static nfapi_nr_config_request_t* config =&config_t;
int cnt=0;
/* forward declarations */
void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
@@ -54,7 +55,7 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
int nr_pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
{
printf("nr pbch detec RB_DL %d\n", ue->frame_parms.N_RB_DL);
uint8_t l,pbch_decoded,frame_mod4,pbch_tx_ant,dummy;
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
char phich_resource[6];
@@ -174,9 +175,10 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
// LOG_I(PHY,"**************************************************************\n");
// First try FDD normal prefix
frame_parms->Ncp=NORMAL;
frame_parms->frame_type=FDD;
frame_parms->frame_type=TDD;
set_default_frame_parms_single(config,frame_parms);
nr_init_frame_parms_ue(config,frame_parms);
nr_init_frame_parms_ue(frame_parms);
printf("nr_initial sync ue RB_DL %d\n", ue->frame_parms.N_RB_DL);
/*
write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
exit(-1);
@@ -194,7 +196,9 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
* --------------------------
* sync_pos SS/PBCH block
*/
cnt++;
if (cnt >100){
cnt =0;
/* process pss search on received buffer */
sync_pos = pss_synchro_nr(ue, NO_RATE_CHANGE);
@@ -211,7 +215,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
else
ue->rx_offset = FRAME_LENGTH_COMPLEX_SAMPLES + sync_pos2 - sync_pos_slot;
printf("sync_pos %d sync_pos_slot %d rx_offset\n",sync_pos,sync_pos_slot, ue->rx_offset);
printf("sync_pos %d sync_pos_slot %d rx_offset %d\n",sync_pos,sync_pos_slot, ue->rx_offset);
// write_output("rxdata1.m","rxd1",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
@@ -234,6 +238,11 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
nr_gold_pbch(ue);
ret = nr_pbch_detection(ue,mode);
nr_gold_pdcch(ue,0, 2);
nr_slot_fep(ue,0, 0, ue->rx_offset, 1, 1, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->rx_offset, 1, 1, NR_PDCCH_EST);
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
ue->Mod_id,
@@ -254,6 +263,10 @@ LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %
LOG_I(PHY,"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
#endif
}
}
else {
ret = -1;
}
/* Consider this is a false detection if the offset is > 1000 Hz */
if( (abs(ue->common_vars.freq_offset) > 150) && (ret == 0) )
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+25 -12
View File
@@ -486,11 +486,11 @@ void nr_pbch_quantize(int8_t *pbch_llr8,
uint16_t i;
for (i=0; i<len; i++) {
/*if (pbch_llr[i]>7)
pbch_llr8[i]=7;
else if (pbch_llr[i]<-8)
pbch_llr8[i]=-8;
else*/
if (pbch_llr[i]>127)
pbch_llr8[i]=127;
else if (pbch_llr[i]<-128)
pbch_llr8[i]=-128;
else
pbch_llr8[i] = (char)(pbch_llr[i]);
}
@@ -696,14 +696,27 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//#ifdef DEBUG_PBCH
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder_output[%d] = %x\n",i,decoded_output[i]);
//printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder payload[%d] = %x\n",i,decoded_output[i]);
}
//#endif
ue->dl_indication.rx_ind.rx_request_body.pdu_index = FAPI_NR_RX_PDU_BCCH_BCH_TYPE;
ue->dl_indication.rx_ind.rx_request_body.pdu_length = 3;
ue->dl_indication.rx_ind.rx_request_body.pdu = &decoded_output[0];
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.number_pdus = ue->rx_ind.number_pdus + 1;
ue->rx_ind.rx_indication_body = (fapi_nr_rx_indication_body_t *)malloc(sizeof(fapi_nr_rx_indication_body_t));
ue->rx_ind.rx_indication_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body->mib_pdu.pdu = &decoded_output[1];
ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = decoded_output[0];
ue->rx_ind.rx_indication_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->if_inst->dl_indication(&ue->dl_indication);
return 0;
}
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+1 -19
View File
@@ -1352,24 +1352,6 @@ int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
void generate_pcfich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void pcfich_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
int16_t *d);
uint8_t rx_pcfich(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
NR_UE_PDCCH *lte_ue_pdcch_vars,
MIMO_mode_t mimo_mode);
void generate_phich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void init_transport_channels(uint8_t);
void generate_RIV_tables(void);
@@ -1381,7 +1363,7 @@ void generate_RIV_tables(void);
parameters are know, the routine calls some basic initialization routines (cell-specific reference signals, etc.)
@param phy_vars_ue Pointer to UE variables
*/
int initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
/*!
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+6
View File
@@ -282,6 +282,12 @@ typedef struct {
uint32_t G;
/// Current Number of RBs
uint16_t nb_rb;
/// Starting RB number
uint16_t start_rb;
/// Number of Symbols
uint16_t nb_symbols;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
uint16_t pmi_alloc;
/// Current RB allocation (even slots)
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+4 -4
View File
@@ -369,7 +369,7 @@ void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue)
assert(0);
}
size = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
size = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
q = malloc16(size);
if (q != NULL) {
pss_corr_ue[i] = q;
@@ -578,7 +578,7 @@ void restore_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_ch
void decimation_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change, int **rxdata)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
int samples_for_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
#if TEST_SYNCHRO_TIMING_PSS
@@ -631,7 +631,7 @@ int pss_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change)
#ifdef DBG_PSS_NR
int samples_for_frame = frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME;
int samples_for_frame = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
write_output("rxdata0_rand.m","rxd0_rand", &PHY_vars_UE->common_vars.rxdata[0][0], samples_for_frame, 1, 1);
@@ -772,7 +772,7 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
int result;
int synchro_out;
unsigned int tmp[NUMBER_PSS_SEQUENCE];
unsigned int length = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe*frame_parms->samples_per_tti); /* 1 frame for now, it should be 2 TODO_NR */
unsigned int length = (NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe*frame_parms->samples_per_tti); /* 1 frame for now, it should be 2 TODO_NR */
for (int i = 0; i < NUMBER_PSS_SEQUENCE; i++) {
tmp[i] = 0;
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+40 -26
View File
@@ -307,7 +307,7 @@
void nr_group_sequence_hopping (uint8_t PUCCH_GroupHopping,
uint32_t n_id,
uint8_t n_hop,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t *u,
uint8_t *v) {
/*
@@ -336,14 +336,14 @@ void nr_group_sequence_hopping (uint8_t PUCCH_GroupHopping,
}
if (PUCCH_GroupHopping == 1){ // PUCCH_GroupHopping 'enabled'
for (int m=0; m<8; m++){
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_rx+n_hop)+m))&1))); // Not sure we have to use nr_tti_rx FIXME!!!
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!!
}
f_gh = f_gh%30;
f_ss = n_id%30;
}
if (PUCCH_GroupHopping == 2){ // PUCCH_GroupHopping 'disabled'
f_ss = n_id%30;
*v = (uint8_t)((s>>(2*nr_tti_rx+n_hop))&1); // Not sure we have to use nr_tti_rx FIXME!!!
*v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!!
}
*u = (f_gh+f_ss)%30;
#ifdef DEBUG_NR_PUCCH_TX
@@ -355,7 +355,7 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
uint8_t nr_tti_rx) {
int nr_tti_tx) {
/*
* Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping
* - n_id: higher-layer parameter hoppingId
@@ -373,8 +373,8 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) -> ");
#endif
for (int m=0; m<8; m++){
// calculating n_cs (Not sure we have to use nr_tti_rx FIXME!!!)
n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_rx) + 8*(lnormal+lprime) + m))&1)));
// calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!)
n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1)));
}
alpha = (alpha * (double)((m0+mcs+n_cs)%12));
#ifdef DEBUG_NR_PUCCH_TX
@@ -386,11 +386,11 @@ void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t startingPRB) {
uint16_t startingPRB) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] start function\n");
#endif
@@ -462,8 +462,8 @@ void nr_generate_pucch0(int32_t **txdataF,
for (int l=0; l<nrofSymbols; l++){
// if frequency hopping is enabled n_hop = 1 for second hop. Not sure frequency hopping concerns format 0. FIXME!!!
//if ((PUCCH_Frequency_Hopping == 1)&&(l == (nrofSymbols-1))) n_hop = 1;
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_rx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,l,startingSymbolIndex,nr_tti_rx);
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l);
#endif
@@ -524,11 +524,11 @@ void nr_generate_pucch1(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t startingPRB,
uint8_t startingPRB_intraSlotHopping,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
@@ -643,11 +643,11 @@ void nr_generate_pucch1(int32_t **txdataF,
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u=0,v=0,delta=0;
// depending on the value of the PUCCH_GroupHopping, we will obtain different values for u,v
uint8_t PUCCH_GroupHopping; // from higher layers FIXME!!
uint8_t PUCCH_GroupHopping=0; // from higher layers FIXME!!
// n_id is hoppingId from PUCCH-ConfigCommon:
// Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled
// Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2) BIT STRING (SIZE (10))
uint32_t n_id; // from higher layers FIXME!!
uint32_t n_id=0; // from higher layers FIXME!!
// if frequency hopping is disabled, intraSlotFrequencyHopping is not provided
// n_hop = 0
// if frequency hopping is enabled, intraSlotFrequencyHopping is provided
@@ -657,12 +657,26 @@ void nr_generate_pucch1(int32_t **txdataF,
// Intra-slot frequency hopping shall be assumed when the higher-layer parameter intraSlotFrequencyHopping is provided,
// regardless of whether the frequency-hop distance is zero or not,
// otherwise no intra-slot frequency hopping shall be assumed
//uint8_t PUCCH_Frequency_Hopping = 0 ; // from higher layers. Let's suppose we do not support intra-slot hopping FIXME!!
//uint8_t PUCCH_Frequency_Hopping = 0 ; // from higher layers
uint8_t intraSlotFrequencyHopping = 0;
if (startingPRB != startingPRB_intraSlotHopping){
intraSlotFrequencyHopping=1;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] intraSlotFrequencyHopping%d \n",intraSlotFrequencyHopping);
#endif
// n_hop = 1 for second hop;
// FIXME
// When hopping will be activated we have to implement this function differently as PUCH signal generation depends on n_hop value for u,v calculation
}
// y_n contains the complex value d multiplied by the sequence r_u_v
int16_t y_n_re[12],y_n_im[12];
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_rx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,lnormal,lprime,nr_tti_rx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with PUCCH_GroupHopping=%d,n_id=%d, n_hop=%d, nr_tti_tx=%d\n",
PUCCH_GroupHopping,n_id,n_hop,nr_tti_tx);
#endif
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,lnormal,lprime,nr_tti_tx);
for (int n=0; n<12; n++){
r_u_v_alpha_delta_re[n] = (int16_t)((((int32_t)(round(32767*cos(alpha*n)))*table_5_2_2_2_2_Re[u][n])>>15)
- (((int32_t)(round(32767*sin(alpha*n)))*table_5_2_2_2_2_Im[u][n])>>15)); // Re part of base sequence shifted by alpha
@@ -839,7 +853,7 @@ inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,
int i;
uint8_t c;
// c_init=nRNTI*2^15+n_id according to TS 38.211 Subclause 6.3.2.6.1
//x2 = (rnti) + ((uint32_t)(1+nr_tti_rx)<<16)*(1+(fp->Nid_cell<<1));
//x2 = (rnti) + ((uint32_t)(1+nr_tti_tx)<<16)*(1+(fp->Nid_cell<<1));
x2 = ((rnti)<<15)+n_id;
s = lte_gold_generic(&x1, &x2, 1);
#ifdef DEBUG_NR_PUCCH_TX
@@ -943,11 +957,11 @@ void nr_generate_pucch2(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint8_t startingPRB,
uint16_t startingPRB,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch2] start function with payload=%d and nr_bit=%d\n", payload, nr_bit);
@@ -1023,7 +1037,7 @@ void nr_generate_pucch2(int32_t **txdataF,
int i=0;
int m=0;
for (int l=0; l<nrofSymbols; l++) {
x2 = (((1<<17)*((14*nr_tti_rx) + (l+startingSymbolIndex) + 1)*((2*n_id) + 1)) + (2*n_id))%(1<<31); // c_init calculation according to TS38.211 subclause
x2 = (((1<<17)*((14*nr_tti_tx) + (l+startingSymbolIndex) + 1)*((2*n_id) + 1)) + (2*n_id))%(1<<31); // c_init calculation according to TS38.211 subclause
s = lte_gold_generic(&x1, &x2, 1);
for (int rb=0; rb<nrofPRB; rb++){
//startingPRB = startingPRB + rb;
@@ -1084,11 +1098,11 @@ void nr_generate_pucch3_4(int32_t **txdataF,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint8_t startingPRB,
uint16_t startingPRB,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4) {
@@ -1336,7 +1350,7 @@ void nr_generate_pucch3_4(int32_t **txdataF,
int16_t *r_u_v_base_im = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_alpha_delta_re = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_alpha_delta_im = malloc(sizeof(int16_t)*12*nrofPRB);
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_rx,&u,&v); // calculating u and v value
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
// Next we proceed to calculate base sequence for DM-RS signal, according to TS 38.211 subclause 6.4.1.33
if (nrofPRB >= 3) { // TS 38.211 subclause 5.2.2.1 (Base sequences of length 36 or larger) applies
uint8_t list_of_prime_numbers[46] = {2, 3, 5, 7, 11, 13, 17, 19, 23, 29,
@@ -1401,7 +1415,7 @@ void nr_generate_pucch3_4(int32_t **txdataF,
uint16_t k=0;
for (int l=0; l<nrofSymbols; l++) {
uint16_t j=0;
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,l,startingSymbolIndex,nr_tti_rx);
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
for (int rb=0; rb<nrofPRB; rb++){
//startingPRB = startingPRB + rb;
if (((rb+startingPRB) < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band
openair1/PHY/defs_nr_UE.h
+18 -11
View File
@@ -611,13 +611,13 @@ typedef struct {
} NR_UE_PDSCH_FLP;
#define NR_PDCCH_DEFS_NR_UE
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#ifdef NR_PDCCH_DEFS_NR_UE
#define MAX_NR_DCI_DECODED_SLOT 10
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 56
#define MAX_NR_DCI_DECODED_SLOT 10 // This value is not specified
#define NBR_NR_FORMATS 8 // The number of formats is 8 (0_0, 0_1, 1_0, 1_1, 2_0, 2_1, 2_2, 2_3)
#define NBR_NR_DCI_FIELDS 56 // The number of different dci fields defined in TS 38.212 subclause 7.3.1
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
@@ -655,7 +655,6 @@ typedef struct {
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
//#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
@@ -774,11 +773,11 @@ typedef struct {
int tciStatesPDCCH;
int tciPresentInDCI;
uint16_t pdcchDMRSScramblingID;
uint16_t rb_offset;
} NR_UE_PDCCH_CORESET;
// Slots for PDCCH Monitoring configured as periodicity and offset
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20,nr_sl40=40,nr_sl80=80,nr_sl160=160,nr_sl320=320,nr_sl640=640,nr_sl1280=1280,nr_sl2560=2560} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nc0=0,nc1=1,nc2=2,nc3=3,nc4=4,nc5=5,nc6=6,nc8=8} NR_UE_SEARCHSPACE_nbrCAND_t;
typedef enum {nsfi1=1,nsfi2=2} NR_UE_SEARCHSPACE_nbrCAND_SFI_t;
typedef enum {n2_3_1=1,n2_3_2=2} NR_UE_SEARCHSPACE_nbrCAND_2_3_t;
@@ -848,9 +847,12 @@ typedef struct {
// INTEGER (0..maxNrofSearchSpaces-1) (0..40-1)
int searchSpaceId;
int controlResourceSetId;
// FIXME! Verify type to be used for this parameter (sl1, sl2, sl4, sl5, sl8, sl10, sl16, sl20). Maybe enum.
NR_UE_SLOT_PERIOD_OFFSET_t monitoringSlotPeriodicityAndOffset;
int monitoringSlotPeriodicityAndOffset_offset;
uint16_t monitoringSlotPeriodicityAndOffset_offset;
// duration is number of consecutive slots that a SearchSpace lasts in every occasion, i.e., upon every period as given in the periodicityAndOffset
// if the field is absent, the UE applies the value 1 slot
// the maximum valid duration is peridicity-1 (periodicity as given in the monitoringSlotPeriodicityAndOffset)
uint16_t duration;
// bit string size 14. Bitmap to indicate symbols within slot where PDCCH has to be monitored
// the MSB (left) bit represents first OFDM in slot
uint16_t monitoringSymbolWithinSlot;
@@ -916,11 +918,14 @@ typedef struct {
uint8_t dciFormat;
uint8_t agregationLevel;
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
NR_UE_PDCCH_CORESET coreset[NR_NBR_CORESET_ACT_BWP];
// SEARCHSPACE structure, where maximum number of SEARCHSPACEs to be handled is 10 (according to 38.331 V15.1.0)
// Each SearchSpace is associated with one ControlResourceSet
NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif
} NR_UE_PDCCH;
@@ -1036,6 +1041,8 @@ typedef struct {
nr_ue_if_module_t *if_inst;
nr_downlink_indication_t dl_indication;
nr_uplink_indication_t ul_indication;
fapi_nr_rx_indication_t rx_ind;
fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[10];
@@ -1086,7 +1093,7 @@ typedef struct {
uint32_t nr_gold_pdsch[2][20][2][21];
/// PDCCH DMRS
uint32_t nr_gold_pdcch[7][20][3][10];
uint32_t nr_gold_pdcch[7][20][3][52];
uint32_t X_u[64][839];
openair1/PHY/impl_defs_nr.h
+3
View File
@@ -120,6 +120,9 @@ SystemInformationBlockType1_nr_t;
#define NR_TDD_UPLINK_SLOT (0x3FFF) /* uplink bitmap for each symbol, there are 14 symbols per slots */
#define NR_TDD_SET_ALL_SYMBOLS (0x3FFF)
#define NR_DOWNLINK_SLOT (0x01)
#define NR_UPLINK_SLOT (0x02)
#define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */
typedef enum {
openair1/SCHED_NR_UE/defs.h
+1 -1
View File
@@ -123,7 +123,7 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
#ifdef UE_SLOT_PARALLELISATION
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+92 -40
View File
@@ -41,61 +41,113 @@ extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if(scheduled_response != NULL){
if(scheduled_response->dl_config != NULL){
/// module id
module_id_t module_id = scheduled_response->module_id;
/// component carrier id
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i;
}
if(scheduled_response != NULL){
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[0][0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
if(scheduled_response->ul_config != NULL){
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
}
pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
if(scheduled_response->tx_request != NULL){
if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
}
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
}
}
}else{
pdcch_vars2->nb_search_space = 0;
}
}
}
if(scheduled_response->ul_config != NULL){
return 0;
}else{
}
if(scheduled_response->tx_request != NULL){
}else{
}
}
return 0;
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
}
return 0;
return 0;
}
openair1/SCHED_NR_UE/phy_frame_config_nr.c
+6 -6
View File
@@ -250,26 +250,26 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
*
*********************************************************************/
nr_slot_t slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
{
/* for FFD all slot can be considered as an uplink */
if (frame_parms->frame_type == FDD) {
return (NR_TDD_UPLINK_SLOT);
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT );
}
if (nr_frame%2 == 0) {
if (frame_parms->tdd_uplink_nr[nr_tti] == NR_TDD_UPLINK_SLOT) {
return (NR_TDD_UPLINK_SLOT);
return (NR_UPLINK_SLOT);
}
else {
return (NR_TDD_DOWNLINK_SLOT);
return (NR_DOWNLINK_SLOT);
}
}
else if ((frame_parms->tdd_uplink_nr[(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti] == NR_TDD_UPLINK_SLOT)) {
return (NR_TDD_UPLINK_SLOT);
return (NR_UPLINK_SLOT);
}
else {
return (NR_TDD_DOWNLINK_SLOT);
return (NR_DOWNLINK_SLOT);
}
}
openair1/SCHED_NR_UE/phy_frame_config_nr.h
+1 -1
View File
@@ -76,7 +76,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
* @param nr_tti : slot number
@returns nr_slot_t : downlink or uplink */
nr_slot_t slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+137 -517
View File
@@ -38,6 +38,8 @@
#include "PHY/defs_nr_UE.h"
//#include "PHY/phy_vars_nr_ue.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/MODULATION/modulation_UE.h"
//#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
//#include "PHY/extern.h"
#include "SCHED_NR_UE/defs.h"
@@ -52,9 +54,9 @@
#define DEBUG_PHY_PROC
#define NR_PDCCH_SCHED
#define NR_PDCCH_SCHED_DEBUG
#define NR_PUCCH_SCHED
#define NR_PUCCH_SCHED_DEBUG
//#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED
//#define NR_PUCCH_SCHED_DEBUG
#ifndef PUCCH
#define PUCCH
@@ -3088,6 +3090,23 @@ void ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *pro
#endif //(0)
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb)
{
int gain_dB = power_dBm - power_max_dBm;
double gain_lin;
gain_lin = pow(10,.1*gain_dB);
if ((nb_rb >0) && (nb_rb <= N_RB_UL)) {
return((int)(AMP*sqrt(gain_lin*N_RB_UL/(double)nb_rb)));
}
else {
LOG_E(PHY,"Illegal nb_rb/N_RB_UL combination (%d/%d)\n",nb_rb,N_RB_UL);
//mac_xface->macphy_exit("");
}
return(0);
}
#ifdef NR_PDCCH_SCHED
int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t abstraction_flag)
@@ -3104,7 +3123,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
// this table contains dci_fields_sizes for each time a dci is decoded in the slot. Each element represents the size in bits for each dci field
// table dci_fields_sizes_cnt contains dci_fields_sizes for each time a dci is decoded in the slot
// each element represents the size in bits for each dci field, for each decoded dci -> [dci_cnt-1]
// each time a dci is decode at dci_cnt, the values of the table dci_fields_sizes[i][j] will be copied at table dci_fields_sizes_cnt[dci_cnt-1][i][j]
// table dci_fields_sizes_cnt[dci_cnt-1][i][j] will then be used in function nr_extract_dci_info
uint8_t dci_fields_sizes_cnt[MAX_NR_DCI_DECODED_SLOT][NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
@@ -3115,42 +3135,50 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
uint16_t tpc_pusch_rnti =1; // FIXME
uint16_t tpc_pucch_rnti = 1; // FIXME
uint16_t tpc_srs_rnti = 1; // FIXME
// s in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 10 different search spaces
// FIXME ! this value has to be obtained by higher-layer parameters
int nb_searchspace_total = NR_NBR_SEARCHSPACE_ACT_BWP - 1;
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
// FIXME ! this value will be obtained from IE PDCCH-Config or PDCCH-ConfigCommon (SIB)
int nb_coreset_total = NR_NBR_CORESET_ACT_BWP - 1;
int nb_searchspace_active=0;
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
// s in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 10 different search spaces
// Higher layers have updated the number of searchSpaces with are active in the current slot and this value is stored in variable nb_searchspace_total
int nb_searchspace_total = pdcch_vars2->nb_search_space;
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> the number of searchSpaces active in the current slot(%d) is %d) \n",
nr_tti_rx,nb_searchspace_total);
#endif
// p in TS 38.212 Subclause 10.1, for each active BWP the UE can deal with 3 different CORESETs (including coresetId 0 for common search space)
int nb_coreset_total = NR_NBR_CORESET_ACT_BWP;
// First we have to identify each searchSpace active at a time and do PDCCH monitoring corresponding to current searchSpace
// Up to 10 searchSpaces can be configured to UE (s<=10)
for (nb_searchspace_active=0; nb_searchspace_active<nb_searchspace_total; nb_searchspace_active++){
int nb_coreset_active=0;
int nb_coreset_active=nb_searchspace_active;
int do_pdcch_monitoring_current_slot=1; // this variable can be removed and fapi is handling
/*
* The following code has been removed as it is handled by higher layers (fapi)
*
// Verify that monitoring is required at the slot nr_tti_rx. We will run pdcch procedure only if do_pdcch_monitoring_current_slot=1
int do_pdcch_monitoring_current_slot=0;
// For Type0-PDCCH searchspace, we need to calculate the monitoring slot from Tables 13-1 .. 13-15 in TS 38.213 Subsection 13
NR_UE_SLOT_PERIOD_OFFSET_t sl_period_offset_mon = pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset;
if (sl_period_offset_mon == srs_sl1) {
if (sl_period_offset_mon == nr_sl1) {
do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every slot
} else if (nr_tti_rx%(int)sl_period_offset_mon == pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset_offset) {
} else if (nr_tti_rx%(uint16_t)sl_period_offset_mon == pdcch_vars2->searchSpace[nb_searchspace_active].monitoringSlotPeriodicityAndOffset_offset) {
do_pdcch_monitoring_current_slot=1; // PDCCH monitoring in every monitoringSlotPeriodicityAndOffset slot with offset
}
}*/
/*
* FIXME
* For PDCCH monitoring when overlap with SS/PBCH according to 38.213 v15.1.0 Section 10
* To be implemented LATER !!!
*/
int _offset,_index,_M;
//int _offset,_index,_M;
int searchSpace_id = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceId;
if (searchSpace_id == 0){ // Implementing TS 38.213 subclause 13, UE procedure for monitoring Type0-PDCCH common search space
/*
* The following code has been removed as it is handled by higher layers (fapi)
if (searchSpace_id == 0){ // Implementing TS 38.213 subclause 13, UE procedure for monitoring Type0-PDCCH common search space
*
* according to TS 38.213 subclause 13
* For the SS/PBCH block and control resource set (CORESET) multiplexing pattern 1,
* a UE monitors PDCCH in the Type0-PDCCH common search space over two consecutive slots starting from slot n0
*/
*
if (frame_rx%2 == 0) {
if ((((_offset*2+((_index*_M)/20))%2) != 0) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx) || ((((_offset*2)+(_index*_M))%20) != nr_tti_rx-1)){
do_pdcch_monitoring_current_slot = 0;
@@ -3161,14 +3189,14 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
do_pdcch_monitoring_current_slot = 0;
}
}
}
}*/
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> nb_searchspace_active=%d do_pdcch_monitoring_current_slot=%d\n",
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> nb_searchspace_active=%d do_pdcch_monitoring_current_slot=%d (to be removed)\n",
nb_searchspace_active,
do_pdcch_monitoring_current_slot);
#endif
if (do_pdcch_monitoring_current_slot) {
// if (do_pdcch_monitoring_current_slot) {
// the searchSpace indicates that we need to monitor PDCCH in current nr_tti_rx
// get the parameters describing the current SEARCHSPACE
// the CORESET id applicable to the current SearchSpace
@@ -3184,16 +3212,23 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
NR_UE_SEARCHSPACE_nbrCAND_t num_cand_L16 = pdcch_vars2->searchSpace[nb_searchspace_active].nrofCandidates_aggrlevel16;
// FIXME! A table of five enum elements
// searchSpaceType indicates whether this is a common search space or a UE-specific search space
int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type;
//int searchSpaceType = pdcch_vars2->searchSpace[nb_searchspace_active].searchSpaceType.type;
int searchSpaceType = common;
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> searchSpaceType=%d is hardcoded THIS HAS TO BE FIXED!!!\n",
searchSpaceType);
#endif
while ((searchSpace_coreset_id != pdcch_vars2->coreset[nb_coreset_active].controlResourceSetId) && (nb_coreset_active<nb_coreset_total)) {
/*while ((searchSpace_coreset_id != pdcch_vars2->coreset[nb_coreset_active].controlResourceSetId) && (nb_coreset_active<nb_coreset_total)) {
// we need to identify the CORESET associated to the active searchSpace
nb_coreset_active++;
if (nb_coreset_active >= nb_coreset_total) return 0; // the coreset_id could not be found. There is a problem
}
}*/
unsigned int dci_cnt=0, i;
/*
* we do not need these parameters yet
*
// get the parameters describing the current CORESET
int coreset_duration = pdcch_vars2->coreset[nb_coreset_active].duration;
uint64_t coreset_freq_dom = pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources;
@@ -3204,13 +3239,13 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
int tci_statesPDCCH = pdcch_vars2->coreset[nb_coreset_active].tciStatesPDCCH;
int tci_present = pdcch_vars2->coreset[nb_coreset_active].tciPresentInDCI;
uint16_t pdcch_DMRS_scrambling_id = pdcch_vars2->coreset[nb_coreset_active].pdcchDMRSScramblingID;
*/
// this table contains 56 (NBR_NR_DCI_FIELDS) elements for each dci field and format described in TS 38.212. Each element represents the size in bits for each dci field
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS] = {0};
// this is the UL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_ULBWP = 100;
uint16_t n_RB_ULBWP = 106;
// this is the DL bandwidth part. FIXME! To be defined where this value comes from
uint16_t n_RB_DLBWP = 100;
uint16_t n_RB_DLBWP = 106;
// A set of PDCCH candidates for a UE to monitor is defined in terms of PDCCH search spaces.
// Searchspace types:
@@ -3251,8 +3286,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
ue->high_speed_flag,
ue->is_secondary_ue);*/ //removed for nr_ue_pdcch_procedures
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_rx_pdcch(nb_coreset_active=%d, searchSpaceType=%d)\n",
nb_coreset_active,
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Entering function nr_rx_pdcch(nb_coreset_active=%d, (symbol_within_slot_mon&0x3FFF)=%d, searchSpaceType=%d)\n",
nb_coreset_active,(symbol_within_slot_mon&0x3FFF),
searchSpaceType);
#endif
nr_rx_pdcch(ue,
@@ -3267,8 +3302,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
(symbol_within_slot_mon&0x3FFF),
searchSpaceType);
#ifdef NR_PDCCH_SCHED_DEBUG
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_rx_pdcch(nb_coreset_active=%d, searchSpaceType=%d)\n",
nb_coreset_active,
printf("<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_rx_pdcch(nb_coreset_active=%d, (symbol_within_slot_mon&0x3FFF)=%d, searchSpaceType=%d)\n",
nb_coreset_active,(symbol_within_slot_mon&0x3FFF),
searchSpaceType);
#endif
@@ -3432,6 +3467,9 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
//emos_dump_UE.dci_cnt[nr_tti_rx] = dci_cnt;
#endif
ue->dci_ind.number_of_dcis = dci_cnt;
ue->dl_indication.dci_ind = &ue->dci_ind; // hang on rx_ind instance
for (i=0; i<dci_cnt; i++) {
/*
* This is the NR part
@@ -3465,6 +3503,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
}
if ((dci_alloc_rx[i].format == format1_1)){ // This format not implemented at a first time. FIXME
}
NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
nr_generate_ue_ul_dlsch_params_from_dci(ue,
eNB_id,
frame_rx,
@@ -3483,9 +3522,17 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
dci_fields_sizes_cnt[i],
n_RB_ULBWP,
n_RB_DLBWP,
crc_scrambled_values);
crc_scrambled_values,
&nr_dci_info_extracted);
ue->dci_ind.dci_list[i].rnti = dci_alloc_rx[i].rnti;
ue->dci_ind.dci_list[i].dci_format = dci_alloc_rx[i].format;
memcpy(&ue->dci_ind.dci_list[i].dci, &nr_dci_info_extracted, sizeof(fapi_nr_dci_pdu_rel15_t) );
// TODO: check where should we send up this message.
//ue->if_inst->dl_indication(&ue->dl_indication);
/*
* This is the LTE part to be removed
@@ -3760,7 +3807,7 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
} // end if do_pdcch_monitoring_current_slot
// } // end if do_pdcch_monitoring_current_slot
} // end for loop nb_searchspace_active
return(0);
}
@@ -3770,429 +3817,6 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
#endif
#if 0
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
int ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t abstraction_flag)
{
unsigned int dci_cnt=0, i;
int frame_rx = proc->frame_rx;
int nr_tti_rx = proc->nr_tti_rx;
DCI_ALLOC_t dci_alloc_rx[8];
uint8_t next1_thread_id = ue->current_thread_id[nr_tti_rx]== (RX_NB_TH-1) ? 0:(ue->current_thread_id[nr_tti_rx]+1);
uint8_t next2_thread_id = next1_thread_id== (RX_NB_TH-1) ? 0:(next1_thread_id+1);
#ifdef PHY_ABSTRACTION
int CC_id;
int UE_id;
uint8_t harq_pid;
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_rx_pdcch_stats);
#endif
// if (nr_tti_rx != 5)
// return 0;
if (abstraction_flag == 0) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_IN);
rx_pdcch(ue,
proc->frame_rx,
nr_tti_rx,
eNB_id,
(ue->frame_parms.mode1_flag == 1) ? SISO : ALAMOUTI,
ue->high_speed_flag,
ue->is_secondary_ue);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_IN);
//printf("Decode SIB frame param agregation + DCI %d %d \n",agregationLevel,dciFormat);
//agregation level == FF means no configuration on
if(ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->agregationLevel == 0xFF || ue->decode_SIB)
{
// search all possible dcis
dci_cnt = dci_decoding_procedure(ue,
dci_alloc_rx,
(ue->UE_mode[eNB_id] < PUSCH)? 1 : 0, // if we're in PUSCH don't listen to common search space,
// later when we need paging or RA during connection, update this ...
eNB_id,nr_tti_rx);
}
else
{
// search only preconfigured dcis
// search C RNTI dci
dci_cnt = dci_CRNTI_decoding_procedure(ue,
dci_alloc_rx,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dciFormat,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->agregationLevel,
eNB_id,
nr_tti_rx);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT);
//LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d PHICH RX\n",ue->Mod_id,frame_rx,nr_tti_rx);
if (is_phich_subframe(&ue->frame_parms,nr_tti_rx)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PHICH, VCD_FUNCTION_IN);
rx_phich(ue,proc,
nr_tti_rx,eNB_id);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PHICH, VCD_FUNCTION_OUT);
}
}
#ifdef PHY_ABSTRACTION
else {
for (i=0; i<NB_eNB_INST; i++) {
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++)
if (PHY_vars_eNB_g[i][CC_id]->frame_parms.Nid_cell == ue->frame_parms.Nid_cell)
break;
if (CC_id < MAX_NUM_CCs)
break;
}
if (i==NB_eNB_INST) {
LOG_E(PHY,"[UE %d] phy_procedures_lte_ue.c: FATAL : Could not find attached eNB for DCI emulation (Nid_cell %d)!!!!\n",ue->Mod_id,ue->frame_parms.Nid_cell);
//mac_xface->macphy_exit("Could not find attached eNB for DCI emulation");
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(-1);
}
LOG_D(PHY,"Calling dci_decoding_proc_emul ...\n");
dci_cnt = dci_decoding_procedure_emul(ue->pdcch_vars[nr_tti_rx&1],
PHY_vars_eNB_g[i][CC_id]->num_ue_spec_dci[nr_tti_rx&1],
PHY_vars_eNB_g[i][CC_id]->num_common_dci[nr_tti_rx&1],
PHY_vars_eNB_g[i][CC_id]->dci_alloc[nr_tti_rx&1],
dci_alloc_rx,
eNB_id);
// printf("DCI: dci_cnt %d\n",dci_cnt);
UE_id = (uint32_t)nr_find_ue((int16_t)ue->pdcch_vars[nr_tti_rx&1][eNB_id]->crnti,PHY_vars_eNB_g[i][CC_id]);
if (UE_id>=0) {
// printf("Checking PHICH for UE %d (eNB %d)\n",UE_id,i);
if (is_phich_subframe(&ue->frame_parms,nr_tti_rx)) {
harq_pid = phich_subframe_to_harq_pid(&ue->frame_parms,frame_rx,nr_tti_rx);
if (ue->ulsch[eNB_id]->harq_processes[harq_pid]->status == ACTIVE) {
// ue->ulsch[eNB_id]->harq_processes[harq_pid]->phich_ACK=1;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag =0;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->status = IDLE;
ue->ulsch_Msg3_active[eNB_id] = 0;
ue->ulsch[eNB_id]->harq_processes[harq_pid]->round = 0;
LOG_D(PHY,"Msg3 inactive\n");
} // harq_pid is ACTIVE
} // This is a PHICH nr_tti_rx
} // UE_id exists
}
#endif
uint8_t *nCCE_current = &ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->nCCE[nr_tti_rx];
uint8_t *nCCE_dest = &ue->pdcch_vars[next1_thread_id][eNB_id]->nCCE[nr_tti_rx];
uint8_t *nCCE_dest1 = &ue->pdcch_vars[next2_thread_id][eNB_id]->nCCE[nr_tti_rx];
memcpy(nCCE_dest, nCCE_current, sizeof(uint8_t));
memcpy(nCCE_dest1, nCCE_current, sizeof(uint8_t));
LOG_D(PHY,"current_thread %d next1_thread %d next2_thread %d \n", ue->current_thread_id[nr_tti_rx], next1_thread_id, next2_thread_id);
LOG_D(PHY,"[UE %d] AbsSubFrame %d.%d, Mode %s: DCI found %i --> rnti %x / crnti %x : format %d\n",
ue->Mod_id,frame_rx%1024,nr_tti_rx,mode_string[ue->UE_mode[eNB_id]],
dci_cnt,
dci_alloc_rx[0].rnti,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
dci_alloc_rx[0].format );
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->dci_received += dci_cnt;
#ifdef EMOS
//emos_dump_UE.dci_cnt[nr_tti_rx] = dci_cnt;
#endif
for (i=0; i<dci_cnt; i++) {
if ((ue->UE_mode[eNB_id]>PRACH) &&
(dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) &&
(dci_alloc_rx[i].format != format0)) {
LOG_D(PHY,"[UE %d][DCI][PDSCH %x] AbsSubframe %d.%d: format %d, num_pdcch_symbols %d, nCCE %d, total CCEs %d\n",
ue->Mod_id,dci_alloc_rx[i].rnti,
frame_rx%1024,nr_tti_rx,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->nCCE[nr_tti_rx],
get_nCCE(3,&ue->frame_parms,get_mi(&ue->frame_parms,0)));
//dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
if ((ue->UE_mode[eNB_id] > PRACH) &&
(generate_ue_dlsch_params_from_dci(frame_rx,
nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
ue->pdcch_vars[0%RX_NB_TH][eNB_id]->crnti_is_temporary? ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti: 0)==0)) {
// update TPC for PUCCH
if((dci_alloc_rx[i].format == format1) ||
(dci_alloc_rx[i].format == format1A) ||
(dci_alloc_rx[i].format == format1B) ||
(dci_alloc_rx[i].format == format2) ||
(dci_alloc_rx[i].format == format2A) ||
(dci_alloc_rx[i].format == format2B))
{
//ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->g_pucch += ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid]->delta_PUCCH;
int32_t delta_pucch = ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_processes[ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid]->delta_PUCCH;
for(int th_id=0; th_id<RX_NB_TH; th_id++)
{
ue->dlsch[th_id][eNB_id][0]->g_pucch += delta_pucch;
}
LOG_D(PHY,"update TPC for PUCCH %d.%d / pid %d delta_PUCCH %d g_pucch %d %d \n",frame_rx, nr_tti_rx,ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->current_harq_pid,
delta_pucch,
ue->dlsch[0][eNB_id][0]->g_pucch,
ue->dlsch[1][eNB_id][0]->g_pucch
//ue->dlsch[2][eNB_id][0]->g_pucch
);
}
ue->dlsch_received[eNB_id]++;
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Generated UE DLSCH C_RNTI format %d\n",ue->Mod_id,dci_alloc_rx[i].format);
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
LOG_D(PHY,"[UE %d] *********** dlsch->active in nr_tti_rx %d=> %d\n",ue->Mod_id,nr_tti_rx,ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active);
#endif
// we received a CRNTI, so we're in PUSCH
if (ue->UE_mode[eNB_id] != PUSCH) {
#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Received DCI with CRNTI %x => Mode PUSCH\n",ue->Mod_id,frame_rx,nr_tti_rx,ue->pdcch_vars[nr_tti_rx&1][eNB_id]->crnti);
#endif
//dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
ue->UE_mode[eNB_id] = PUSCH;
//mac_xface->macphy_exit("Connected. Exiting\n");
}
} else {
LOG_E(PHY,"[UE %d] Frame %d, nr_tti_rx %d: Problem in DCI!\n",ue->Mod_id,frame_rx,nr_tti_rx);
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
}
}
else if ((dci_alloc_rx[i].rnti == SI_RNTI) &&
((dci_alloc_rx[i].format == format1A) || (dci_alloc_rx[i].format == format1C))) {
#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] nr_tti_rx %d: Found rnti %x, format 1%s, dci_cnt %d\n",ue->Mod_id,nr_tti_rx,dci_alloc_rx[i].rnti,dci_alloc_rx[i].format==format1A?"A":"C",i);
#endif
if (generate_ue_dlsch_params_from_dci(frame_rx,
nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
SI_RNTI,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars_SI[eNB_id],
&ue->dlsch_SI[eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
0)==0) {
ue->dlsch_SI_received[eNB_id]++;
LOG_I(PHY,"[UE %d] Frame %d, nr_tti_rx %d : Generate UE DLSCH SI_RNTI format 1%s\n",ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].format==format1A?"A":"C");
//dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
}
}
else if ((dci_alloc_rx[i].rnti == P_RNTI) &&
((dci_alloc_rx[i].format == format1A) || (dci_alloc_rx[i].format == format1C))) {
#ifdef DEBUG_PHY_PROC
LOG_I(PHY,"[UE %d] nr_tti_rx %d: Found rnti %x, format 1%s, dci_cnt %d\n",ue->Mod_id,nr_tti_rx,dci_alloc_rx[i].rnti,dci_alloc_rx[i].format==format1A?"A":"C",i);
#endif
if (generate_ue_dlsch_params_from_dci(frame_rx,
nr_tti_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
P_RNTI,
dci_alloc_rx[i].format,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars_p[eNB_id],
&ue->dlsch_SI[eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
0)==0) {
ue->dlsch_p_received[eNB_id]++;
LOG_D(PHY,"[UE %d] Frame %d, nr_tti_rx %d : Generate UE DLSCH P_RNTI format 1%s\n",ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].format==format1A?"A":"C");
//dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
}
}
else if ((ue->prach_resources[eNB_id]) &&
(dci_alloc_rx[i].rnti == ue->prach_resources[eNB_id]->ra_RNTI) &&
(dci_alloc_rx[i].format == format1A)) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][RAPROC] nr_tti_rx %d: Found RA rnti %x, format 1A, dci_cnt %d\n",ue->Mod_id,nr_tti_rx,dci_alloc_rx[i].rnti,i);
//if (((frame_rx%100) == 0) || (frame_rx < 20))
//dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
//mac_xface->macphy_exit("so far so good...\n");
#endif
if (generate_ue_dlsch_params_from_dci(frame_rx,
nr_tti_rx,
(DCI1A_5MHz_TDD_1_6_t *)&dci_alloc_rx[i].dci_pdu,
ue->prach_resources[eNB_id]->ra_RNTI,
format1A,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id],
ue->pdsch_vars_ra[eNB_id],
&ue->dlsch_ra[eNB_id],
&ue->frame_parms,
ue->pdsch_config_dedicated,
SI_RNTI,
ue->prach_resources[eNB_id]->ra_RNTI,
P_RNTI,
ue->transmission_mode[eNB_id]<7?0:ue->transmission_mode[eNB_id],
0)==0) {
ue->dlsch_ra_received[eNB_id]++;
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Generate UE DLSCH RA_RNTI format 1A, rb_alloc %x, dlsch_ra[eNB_id] %p\n",
ue->Mod_id,ue->dlsch_ra[eNB_id]->harq_processes[0]->rb_alloc_even[0],ue->dlsch_ra[eNB_id]);
#endif
}
} else if( (dci_alloc_rx[i].rnti == ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti) &&
(dci_alloc_rx[i].format == format0)) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d: Found rnti %x, format 0, dci_cnt %d\n",
ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].rnti,i);
#endif
ue->ulsch_no_allocation_counter[eNB_id] = 0;
//dump_dci(&ue->frame_parms,&dci_alloc_rx[i]);
if ((ue->UE_mode[eNB_id] > PRACH) &&
(generate_ue_ulsch_params_from_dci((void *)&dci_alloc_rx[i].dci_pdu,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
nr_tti_rx,
format0,
ue,
proc,
SI_RNTI,
0,
P_RNTI,
CBA_RNTI,
eNB_id,
0)==0)) {
#if T_TRACER
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
uint8_t harq_pid = nr_subframe2harq_pid(frame_parms,
nr_pdcch_alloc2ul_frame(frame_parms,proc->frame_rx,proc->nr_tti_rx),
nr_pdcch_alloc2ul_subframe(frame_parms,proc->nr_tti_rx));
T(T_UE_PHY_ULSCH_UE_DCI, T_INT(eNB_id), T_INT(proc->frame_rx%1024), T_INT(proc->nr_tti_rx), T_INT(ue->Mod_id),
T_INT(dci_alloc_rx[i].rnti), T_INT(harq_pid),
T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->mcs),
T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->round),
T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->first_rb),
T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->nb_rb),
T_INT(ue->ulsch[eNB_id]->harq_processes[harq_pid]->TBS));
#endif
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Generate UE ULSCH C_RNTI format 0 (nr_tti_rx %d)\n",ue->Mod_id,nr_tti_rx);
#endif
}
} else if( (dci_alloc_rx[i].rnti == ue->ulsch[eNB_id]->cba_rnti[0]) &&
(dci_alloc_rx[i].format == format0)) {
// UE could belong to more than one CBA group
// ue->Mod_id%ue->ulsch[eNB_id]->num_active_cba_groups]
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d: Found cba rnti %x, format 0, dci_cnt %d\n",
ue->Mod_id,frame_rx,nr_tti_rx,dci_alloc_rx[i].rnti,i);
/*
if (((frame_rx%100) == 0) || (frame_rx < 20))
dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
*/
#endif
ue->ulsch_no_allocation_counter[eNB_id] = 0;
//dump_dci(&ue->frame_parms,&dci_alloc_rx[i]);
if ((ue->UE_mode[eNB_id] > PRACH) &&
(generate_ue_ulsch_params_from_dci((void *)&dci_alloc_rx[i].dci_pdu,
ue->ulsch[eNB_id]->cba_rnti[0],
nr_tti_rx,
format0,
ue,
proc,
SI_RNTI,
0,
P_RNTI,
CBA_RNTI,
eNB_id,
0)==0)) {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] Generate UE ULSCH CBA_RNTI format 0 (nr_tti_rx %d)\n",ue->Mod_id,nr_tti_rx);
#endif
ue->ulsch[eNB_id]->num_cba_dci[(nr_tti_rx+4)%10]++;
}
}
else {
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"[UE %d] frame %d, nr_tti_rx %d: received DCI %d with RNTI=%x (C-RNTI:%x, CBA_RNTI %x) and format %d!\n",ue->Mod_id,frame_rx,nr_tti_rx,i,dci_alloc_rx[i].rnti,
ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->crnti,
ue->ulsch[eNB_id]->cba_rnti[0],
dci_alloc_rx[i].format);
// dump_dci(&ue->frame_parms, &dci_alloc_rx[i]);
#endif
}
}
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_rx_pdcch_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_PDCCH_PROCEDURES, VCD_FUNCTION_OUT);
return(0);
}
void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,int abstraction_flag) {
@@ -4350,6 +3974,7 @@ void ue_pmch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc,int eNB_id,i
} // pmch_mcs>=0
} // is_pmch_subframe=true
}
#endif
void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t *current_harq_processes)
{
@@ -4388,10 +4013,10 @@ void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t
harq_processes_dest->vrb_type = current_harq_processes->vrb_type ;
}
void copy_ack_struct(nr_harq_status_t *harq_ack_dest, nr_harq_status_t *current_harq_ack)
/*void copy_ack_struct(nr_harq_status_t *harq_ack_dest, nr_harq_status_t *current_harq_ack)
{
memcpy(harq_ack_dest, current_harq_ack, sizeof(nr_harq_status_t));
}
}*/
void ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1, int s0, int s1, int abstraction_flag) {
@@ -4434,9 +4059,9 @@ void ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id
//TM7 UE specific channel estimation here!!!
if (ue->transmission_mode[eNB_id]==7) {
if (ue->frame_parms.Ncp==0) {
if ((m==3) || (m==6) || (m==9) || (m==12))
//if ((m==3) || (m==6) || (m==9) || (m==12))
//LOG_D(PHY,"[UE %d] dlsch->active in nr_tti_rx %d => %d, l=%d\n",phy_vars_ue->Mod_id,nr_tti_rx,phy_vars_ue->dlsch_ue[eNB_id][0]->active, l);
lte_dl_bf_channel_estimation(ue,eNB_id,0,nr_tti_rx*2+(m>6?1:0),5,m);
//lte_dl_bf_channel_estimation(ue,eNB_id,0,nr_tti_rx*2+(m>6?1:0),5,m);
} else {
LOG_E(PHY,"[UE %d]Beamforming channel estimation not supported yet for TM7 extented CP.\n",ue->Mod_id);
}
@@ -4481,7 +4106,7 @@ void ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id
} // CRNTI active
}
}
#if 0
void process_rar(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, runmode_t mode, int abstraction_flag) {
int frame_rx = proc->frame_rx;
@@ -4873,31 +4498,31 @@ void ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
switch (pdsch) {
case PDSCH:
if (ue->mac_enabled == 1)
//mac_xface->ue_send_sdu(ue->Mod_id,
/* if (ue->mac_enabled == 1)
mac_xface->ue_send_sdu(ue->Mod_id,
CC_id,
frame_rx,
nr_tti_rx,
dlsch0->harq_processes[dlsch0->current_harq_pid]->b,
dlsch0->harq_processes[dlsch0->current_harq_pid]->TBS>>3,
eNB_id);
eNB_id);*/
break;
case SI_PDSCH:
//mac_xface->ue_decode_si(ue->Mod_id,
/*mac_xface->ue_decode_si(ue->Mod_id,
CC_id,
frame_rx,
eNB_id,
ue->dlsch_SI[eNB_id]->harq_processes[0]->b,
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);*/
break;
case P_PDSCH:
if (ue->mac_enabled == 1)
//mac_xface->ue_decode_p(ue->Mod_id,
/* if (ue->mac_enabled == 1)
mac_xface->ue_decode_p(ue->Mod_id,
CC_id,
frame_rx,
eNB_id,
ue->dlsch_SI[eNB_id]->harq_processes[0]->b,
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);
ue->dlsch_SI[eNB_id]->harq_processes[0]->TBS>>3);*/
break;
case RA_PDSCH:
if (ue->mac_enabled == 1)
@@ -4987,6 +4612,7 @@ void ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
#endif
/*!
* \brief This is the UE synchronize thread.
@@ -5806,12 +5432,8 @@ int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc
}
#endif
#endif
int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,
uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,
relaying_type_t r_type) {
@@ -5900,28 +5522,28 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
LOG_D(PHY," ------ slot 0 Processing: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
LOG_D(PHY," ------ --> FFT/ChannelEst/PDCCH slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
nr_gold_pdcch(ue,ue->frame_parms.Nid_cell, 0, 3);
for (; l<=3; l++) {
//nr_gold_pdcch(ue,0, 2);
/*
for (l=0; l<2; l++) {
if (abstraction_flag == 0) {
#if UE_TIMING_TRACE
start_meas(&ue->ofdm_demod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
nr_slot_fep(ue,
l,
(nr_tti_rx<<1),
0,
0,
nr_tti_rx,
0,
1,
1,
NR_PDCCH_EST);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
}
}*/
//ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
if (do_pdcch_flag) {
@@ -5941,7 +5563,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
// }
}
} // for l=1..l2
// } // for l=1..l2
#if 0
ue_measurement_procedures(l-1,ue,proc,eNB_id,(nr_tti_rx<<1),abstraction_flag,mode);
@@ -5953,12 +5575,14 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
return 0;
}
slot_fep_pbch(ue,
nr_slot_fep(ue,
0,
1+(nr_tti_rx<<1),
0,
0,
0);
0,
NR_PDSCH_EST);
#endif
// first slot has been processed (FFTs + Channel Estimation, PCFICH/PHICH/PDCCH)
#if UE_TIMING_TRACE
@@ -5970,10 +5594,10 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
#endif
#endif
#if 0
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
//to update from pdsch config
nr_gold_pdsch(ue,0,ue->frame_parms.Nid_cell, 0, 1);
nr_gold_pdsch(ue,0,0, 1);
nr_slot_fep(ue,
2, //to be updated from higher layer
@@ -6058,19 +5682,20 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
start_meas(&ue->ofdm_demod_stats);
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
slot_fep(ue,
nr_slot_fep(ue,
l,
1+(nr_tti_rx<<1),
0,
0,
0);
0,
NR_PDSCH_EST);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
}
ue_measurement_procedures(l-1,ue,proc,eNB_id,1+(nr_tti_rx<<1),abstraction_flag,mode);
//ue_measurement_procedures(l-1,ue,proc,eNB_id,1+(nr_tti_rx<<1),abstraction_flag,mode);
} // for l=1..l2
@@ -6078,12 +5703,13 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
int next_nr_tti_rx = (1+nr_tti_rx)%10;
if (nr_subframe_select(&ue->frame_parms,next_nr_tti_rx) != SF_UL)
{
slot_fep(ue,
nr_slot_fep(ue,
0,
(next_nr_tti_rx<<1),
0,
0,
0);
0,
NR_PDSCH_EST);
}
} // not an S-subframe
#if UE_TIMING_TRACE
@@ -6098,23 +5724,15 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
LOG_D(PHY," ------ end FFT/ChannelEst/PDCCH slot 1: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
/*if ( (nr_tti_rx == 0) && (ue->decode_MIB == 1))
{
ue_pbch_procedures(eNB_id,ue,proc,abstraction_flag);
}
}*/
// do procedures for C-RNTI
LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR slot 0: AbsSubframe %d.%d ------ \n", frame_rx%1024, nr_tti_rx);
if (ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->active == 1) {
/*proc->counter_decoder++;
printf("counter decoder %d\n", proc->counter_decoder);
if (proc->counter_decoder > 6)
{
proc->decoder_switch = 1;
printf("switch to LDPC\n");
}*/
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC, VCD_FUNCTION_IN);
#if UE_TIMING_TRACE
start_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
@@ -6134,7 +5752,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
stop_meas(&ue->pdsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
start_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#endif
ue_dlsch_procedures(ue,
/*ue_dlsch_procedures(ue,
proc,
eNB_id,
PDSCH,
@@ -6142,7 +5760,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][1],
&ue->dlsch_errors[eNB_id],
mode,
abstraction_flag);
abstraction_flag);*/
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_procedures_stat[ue->current_thread_id[nr_tti_rx]]);
#if DISABLE_LOG_X
@@ -6194,7 +5812,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
ue_dlsch_procedures(ue,
/*ue_dlsch_procedures(ue,
proc,
eNB_id,
SI_PDSCH,
@@ -6203,7 +5821,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
&ue->dlsch_SI_errors[eNB_id],
mode,
abstraction_flag);
ue->dlsch_SI[eNB_id]->active = 0;
ue->dlsch_SI[eNB_id]->active = 0;*/
}
// do procedures for P-RNTI
@@ -6218,7 +5836,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
ue_dlsch_procedures(ue,
/*ue_dlsch_procedures(ue,
proc,
eNB_id,
P_PDSCH,
@@ -6226,7 +5844,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
NULL,
&ue->dlsch_p_errors[eNB_id],
mode,
abstraction_flag);
abstraction_flag);*/
ue->dlsch_p[eNB_id]->active = 0;
}
// do procedures for RA-RNTI
@@ -6240,7 +5858,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
1+(ue->frame_parms.symbols_per_tti>>1),
ue->frame_parms.symbols_per_tti-1,
abstraction_flag);
ue_dlsch_procedures(ue,
/*ue_dlsch_procedures(ue,
proc,
eNB_id,
RA_PDSCH,
@@ -6248,7 +5866,7 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
NULL,
&ue->dlsch_ra_errors[eNB_id],
mode,
abstraction_flag);
abstraction_flag);*/
ue->dlsch_ra[eNB_id]->active = 0;
}
@@ -6259,15 +5877,16 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
NR_DL_UE_HARQ_t *harq_processes_dest = ue->dlsch[next1_thread_id][eNB_id][0]->harq_processes[current_harq_pid];
NR_DL_UE_HARQ_t *harq_processes_dest1 = ue->dlsch[next2_thread_id][eNB_id][0]->harq_processes[current_harq_pid];
nr_harq_status_t *current_harq_ack = &ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_ack[nr_tti_rx];
/*nr_harq_status_t *current_harq_ack = &ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest = &ue->dlsch[next1_thread_id][eNB_id][0]->harq_ack[nr_tti_rx];
nr_harq_status_t *harq_ack_dest1 = &ue->dlsch[next2_thread_id][eNB_id][0]->harq_ack[nr_tti_rx];
*/
copy_harq_proc_struct(harq_processes_dest, current_harq_processes);
copy_ack_struct(harq_ack_dest, current_harq_ack);
//copy_ack_struct(harq_ack_dest, current_harq_ack);
copy_harq_proc_struct(harq_processes_dest1, current_harq_processes);
copy_ack_struct(harq_ack_dest1, current_harq_ack);
//copy_ack_struct(harq_ack_dest1, current_harq_ack);
if (nr_tti_rx==9) {
if (frame_rx % 10 == 0) {
@@ -6313,7 +5932,8 @@ int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_
LOG_D(PHY, "------FULL RX PROC [SFN %d]: %5.2f ------\n",nr_tti_rx,ue->phy_proc_rx[ue->current_thread_id[nr_tti_rx]].p_time/(cpuf*1000.0));
#endif
#endif
#endif
#endif //pdsch
LOG_D(PHY," ****** end RX-Chain for AbsSubframe %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
return (0);
@@ -6541,4 +6161,4 @@ uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id)
return(1);
else
return(0);
}
}
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
+86 -5
View File
@@ -154,7 +154,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if (ue->mac_enabled == 1) {
/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
sr_payload = ue_get_SR(Mod_id,
sr_payload = nr_ue_get_SR(Mod_id,
CC_id,
frame_tx,
gNB_id,
@@ -385,7 +385,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
/* TS 38.212 6.3.1.2 Code block segmentation and CRC attachment */
/* crc attachment can be done depending of paylaod size */
/* crc attachment can be done depending of payload size */
if (N_UCI < 11) {
O_CRC = 0; /* no additional crc bits */
}
@@ -468,8 +468,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
NR_TST_PHY_PRINTF("PUCCH ( AbsSubframe : %d.%d ) ( total payload size %d data 0x%02x ) ( ack length %d data 0x%02x ) ( sr length %d value %d ) ( csi length %d data : 0x%02x ) \n",
frame_tx%1024, nr_tti_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
NR_TST_PHY_PRINTF("PUCCH ( format : %d ) ( modulation : %s ) ( nb prb : %d ) ( nb symbols : %d ) ( max code rate*100 : %d ) ( starting_symbol_index : %d ) \n",
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols, max_code_rate, starting_symbol_index);
NR_TST_PHY_PRINTF("PUCCH ( format : %d ) ( modulation : %s ) ( nb prb : %d ) ( nb symbols total: %d ) ( nb symbols : %d ) ( max code rate*100 : %d ) ( starting_symbol_index : %d ) \n",
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols_total, nb_symbols, max_code_rate, starting_symbol_index);
NR_TST_PHY_PRINTF("PUCCH ( starting_prb : %d ) ( second_hop : %d ) ( m_0 : %d ) ( m_CS : %d ) ( time_domain_occ %d ) (occ_length : %d ) ( occ_Index : %d ) \n",
starting_prb, second_hop, m_0, m_CS, time_domain_occ, occ_length, occ_Index);
@@ -482,6 +482,87 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
nb_of_prbs, N_sc_ctrl_RB, nb_symbols, N_UCI, O_SR, O_CSI, O_ACK,
O_CRC, n_HARQ_ACK);
/* set tx power */
ue->tx_power_dBm[nr_tti_tx] = pucch_tx_power;
ue->tx_total_RE[nr_tti_tx] = nb_of_prbs*N_SC_RB;
int tx_amp;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
tx_amp = get_tx_amp(pucch_tx_power,
ue->tx_power_max_dBm,
ue->frame_parms.N_RB_UL,
nb_of_prbs);
#else
tx_amp = AMP;
#endif
switch(format) {
case pucch_format0_nr:
{
nr_generate_pucch0(ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
tx_amp,
nr_tti_tx,
(uint8_t)m_CS,
nb_symbols_total,
starting_symbol_index,
starting_prb);
break;
}
case pucch_format1_nr:
{
nr_generate_pucch1(ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nb_symbols_total,
starting_symbol_index,
starting_prb,
second_hop,
(uint8_t)time_domain_occ,
(uint8_t)N_UCI);
break;
}
case pucch_format2_nr:
{
nr_generate_pucch2(ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
starting_prb,
(uint8_t)N_UCI);
break;
}
case pucch_format3_nr:
case pucch_format4_nr:
{
nr_generate_pucch3_4(ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
starting_prb,
(uint8_t)N_UCI,
(uint8_t)occ_length,
(uint8_t)occ_Index);
break;
}
}
return (TRUE);
}
@@ -945,7 +1026,7 @@ boolean_t check_pucch_format(PHY_VARS_NR_UE *ue, uint8_t gNB_id, pucch_format_nr
}
}
NR_TST_PHY_PRINTF("PUCCH format %d nb symbols %d uci size %d selected format %d \n", format_pucch, nb_symbols_for_tx, uci_size, selected_pucch_format);
NR_TST_PHY_PRINTF("PUCCH format %d nb symbols total %d uci size %d selected format %d \n", format_pucch, nb_symbols_for_tx, uci_size, selected_pucch_format);
if (format_pucch != selected_pucch_format) {
if (format_pucch != selected_pucch_format_second) {
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/CMakeLists.txt
+7 -7
View File
@@ -55,42 +55,42 @@ set(INC_UNIT_TESTS
add_executable(pss_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pss_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pss_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(sss_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/sss_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(sss_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(frame_config_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(frame_config_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(harq_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(harq_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(srs_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/srs_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(srs_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(pbch_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pbch_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pbch_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(pucch_uci_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pucch_uci_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
+11 -1
View File
@@ -46,6 +46,11 @@ uint32_t (*p_nr_ue_get_SR)(module_id_t module_idP,int CC_id,frame_t frameP,uint8
/*****************functions****************************************/
lte_subframe_t subframe_select(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe)
{
return(0);
}
PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP, int CC_id,
frame_t frameP, uint8_t new_Msg3,
sub_frame_t subframe){ return(NULL);}
@@ -61,7 +66,7 @@ void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id,
void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id,
frame_t frameP, uint8_t eNB_id){}
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint32_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe){
uint32_t value = 0;
@@ -193,3 +198,8 @@ void exit_fun(const char* s)
undefined_function(__FUNCTION__);
}
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe){
uint32_t value = 0;
return(value);
}
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c
+8 -10
View File
@@ -54,26 +54,24 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->ttis_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
frame_parms->p_tdd_UL_DL_Configuration->nrofUplinkSlots, frame_parms->p_tdd_UL_DL_Configuration->dl_UL_TransmissionPeriodicity);
int k = (TDD_CONFIG_NB_FRAMES * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int k = (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int tti = 0;
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME; j++) {
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME; j++) {
int frame = 0;
if (j != 0) {
frame = (frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/j;
tti = (j)%(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
frame = (frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/j;
tti = (j)%(frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME);
}
else {
frame = 0;
tti = 0;
}
if (slot_select_nr(frame_parms, frame, tti) == NR_TDD_DOWNLINK_SLOT) {
//if (frame_parms->tdd_uplink_nr[j] == NR_TDD_DOWNLINK_SLOT) {
if (slot_select_nr(frame_parms, frame, tti) & NR_DOWNLINK_SLOT) {
printf(" [%3d] D", j);
}
else {
if (slot_select_nr(frame_parms, frame, tti) == NR_TDD_UPLINK_SLOT) {
//if (frame_parms->tdd_uplink_nr[j] == NR_TDD_UPLINK_SLOT) {
if (slot_select_nr(frame_parms, frame, tti) & NR_UPLINK_SLOT) {
printf(" [%3d] U", j);
}
else {
@@ -83,7 +81,7 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
}
if (j == k) {
printf("\n");
k += (TDD_CONFIG_NB_FRAMES * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME); // 20
k += (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME); // 20
}
}
printf("\n");
@@ -120,7 +118,7 @@ void set_tti_test(NR_DL_FRAME_PARMS *frame_parms, int ttis_per_subframe)
int test_frame_configuration(PHY_VARS_NR_UE *PHY_vars_UE)
{
LTE_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int v_return = 0;
#define NO_DOWNLINK_SYMBOL (0)
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pss_util_test.c
+1 -1
View File
@@ -256,7 +256,7 @@ int init_test(unsigned char N_tx, unsigned char N_rx, unsigned char transmission
frame_parms->threequarter_fs = 0;
frame_parms->numerology_index = NUMEROLOGY_INDEX_MAX_NR;
nr_init_frame_parms_ue(config,frame_parms);
nr_init_frame_parms_ue(frame_parms);
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to unvalid value */
openair2/LAYER2/NR_MAC_UE/mac.h
+62 -2
View File
@@ -37,9 +37,9 @@
#include <stdlib.h>
#include <string.h>
#define NR_BCCH_DL_SCH 3 // SI
#define NR_BCCH_DL_SCH 3 // SI
#define NR_BCCH_BCH 5 // MIB
#define NR_BCCH_BCH 5 // MIB
/*!\brief UE layer 2 status */
typedef enum {
@@ -49,5 +49,65 @@ typedef enum {
PHY_HO_PRACH
} NR_UE_L2_STATE_t;
typedef struct {
uint8_t LCID:6; // octet 1 [5:0]
uint8_t F:1; // octet 1 [6]
uint8_t R:1; // octet 1 [7]
uint8_t L:8; // octet 2 [7:0]
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_SHORT;
typedef struct {
uint8_t LCID:6; // octet 1 [5:0]
uint8_t F:1; // octet 1 [6]
uint8_t R:1; // octet 1 [7]
uint8_t L1:8; // octet 2 [7:0]
uint8_t L2:8; // octet 3 [7:0]
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_LONG;
typedef struct {
uint8_t LCID:5; // octet 1 [5:0]
uint8_t R:2; // octet 1 [7:6]
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_FIXED;
// 38.321 ch6.2.1, 38.331
#define DL_SCH_LCID_CCCH 0x00
#define DL_SCH_LCID_SRB1 0x01
#define DL_SCH_LCID_SRB2 0x02
#define DL_SCH_LCID_SRB3 0x03
#define DL_SCH_LCID_RECOMMENDED_BITRATE 0x2F
#define DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT 0x30
#define DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT 0x31
#define DL_SCH_LCID_SP_SRS_ACTIVATION 0x32
#define DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT 0x33
#define DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH 0x34
#define DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH 0x35
#define DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL 0x36
#define DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT 0X37
#define DL_SCH_LCID_DUPLICATION_ACT 0X38
#define DL_SCH_LCID_SCell_ACT_4_OCT 0X39
#define DL_SCH_LCID_SCell_ACT_1_OCT 0X3A
#define DL_SCH_LCID_L_DRX 0x3B
#define DL_SCH_LCID_DRX 0x3C
#define DL_SCH_LCID_TA_COMMAND 0x3D
#define DL_SCH_LCID_CON_RES_ID 0x3E
#define DL_SCH_LCID_PADDING 0x3F
#define UL_SCH_LCID_CCCH 0x00
#define UL_SCH_LCID_SRB1 0x01
#define UL_SCH_LCID_SRB2 0x02
#define UL_SCH_LCID_SRB3 0x03
#define UL_SCH_LCID_CCCH_MSG3 0x21
#define UL_SCH_LCID_RECOMMENDED_BITRATE_QUERY 0x35
#define UL_SCH_LCID_MULTI_ENTRY_PHR_4_OCT 0x36
#define UL_SCH_LCID_CONFIGURED_GRANT_CONFIRMATION 0x37
#define UL_SCH_LCID_MULTI_ENTRY_PHR_1_OCT 0x38
#define UL_SCH_LCID_SINGLE_ENTRY_PHR 0x39
#define UL_SCH_LCID_C_RNTI 0x3A
#define UL_SCH_LCID_S_TRUNCATED_BSR 0x3B
#define UL_SCH_LCID_L_TRUNCATED_BSR 0x3C
#define UL_SCH_LCID_S_BSR 0x3D
#define UL_SCH_LCID_L_BSR 0x3E
#define UL_SCH_LCID_PADDING 0x3F
#endif /*__LAYER2_MAC_DEFS_H__ */
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+50 -8
View File
@@ -59,6 +59,11 @@
#define NB_NR_UE_MAC_INST 1
typedef enum {
SFN_C_MOD_2_EQ_0,
SFN_C_MOD_2_EQ_1
} SFN_C_TYPE;
/*!\brief Top level UE MAC structure */
typedef struct {
@@ -71,30 +76,67 @@ typedef struct {
NR_RNTI_Value_t *cs_RNTI;
NR_MIB_t *mib;
/// Type0-PDCCH seach space coreset
fapi_nr_search_space_t type0_pdcch_ss;
uint32_t type0_pdcch_ss_mux_pattern;
float type0_pdcch_ss_big_o;
uint32_t type0_pdcch_ss_number_of_search_space_per_slot;
float type0_pdcch_ss_big_m;
uint32_t type0_pdcch_ss_first_symbol_index;
/// Type0-PDCCH seach space
fapi_nr_dl_config_dci_dl_pdu_rel15_t type0_pdcch_dci_config;
uint32_t type0_pdcch_ss_mux_pattern;
SFN_C_TYPE type0_pdcch_ss_sfn_c;
uint32_t type0_pdcch_ss_n_c;
uint32_t type0_pdcch_consecutive_slots;
/// Random access parameter
uint16_t ra_rnti;
//// FAPI-like interface
//// FAPI-like interface message
fapi_nr_tx_request_t tx_request;
fapi_nr_ul_config_request_t ul_config_request;
fapi_nr_dl_config_request_t dl_config_request;
fapi_nr_dci_indication_t dci_indication;
fapi_nr_rx_indication_t rx_indication;
/// Interface module instances
nr_ue_if_module_t *if_module;
nr_scheduled_response_t scheduled_response;
nr_phy_config_t phy_config;
} NR_UE_MAC_INST_t;
typedef enum seach_space_mask_e {
type0_pdcch = 0x1,
type0a_pdcch = 0x2,
type1_pdcch = 0x4,
type2_pdcch = 0x8,
type3_pdcch = 0x10
} search_space_mask_t;
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
#define NUM_SLOT_FRAME 10
/*@}*/
#endif /*__LAYER2_MAC_DEFS_H__ */
openair2/LAYER2/NR_MAC_UE/mac_extern.h
+10 -2
View File
@@ -30,7 +30,7 @@
* \warning
*/
// Type0-PDCCH search space
extern const int32_t table_38213_13_1_c2[16];
extern const int32_t table_38213_13_1_c3[16];
extern const int32_t table_38213_13_1_c4[16];
@@ -78,4 +78,12 @@ extern const int32_t table_38213_13_11_c4[16];
extern const float table_38213_13_12_c1[16];
extern const int32_t table_38213_13_12_c2[16];
extern const float table_38213_13_12_c3[16];
extern const float table_38213_13_12_c3[16];
extern const int32_t table_38213_10_1_1_c2[5];
// DCI extraction
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
extern uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3];
// for PDSCH from TS 38.214 subclause 5.1.2.1.1
extern uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3];
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+23 -7
View File
@@ -43,15 +43,17 @@
\param extra_bits extra bits for frame calculation
\param l_ssb_equal_64 check if ssb number of candicate is equal 64, 1=equal; 0=non equal. Reference 38.212 7.1.1
\param pduP pointer to pdu
\param pdu_length length of pdu*/
\param pdu_length length of pdu
\param cell_id cell id */
int8_t nr_ue_decode_mib(
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
uint8_t extra_bits,
uint32_t l_ssb_equal_64,
uint32_t ssb_length,
uint32_t ssb_index,
void *pduP,
uint16_t pdu_len);
uint16_t cell_id );
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
@@ -94,12 +96,10 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
const int cc_id,
const frame_t rx_frame,
const slot_t rx_slot,
const int32_t ssb_index,
const frame_t tx_frame,
const slot_t tx_slot);
#endif
/* \brief Get SR payload (0,1) from UE MAC
@param Mod_id Instance id of UE in machine
@@ -112,4 +112,20 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe);
/** @}*/
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format);
uint32_t get_ssb_frame(uint32_t test);
uint32_t get_ssb_slot(uint32_t ssb_index);
uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
void nr_ue_process_mac_pdu(
module_id_t module_idP,
uint8_t CC_id,
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index);
#endif
/** @}*/
openair2/LAYER2/NR_MAC_UE/mac_vars.c
+48 -4
View File
@@ -79,12 +79,56 @@ const int32_t table_38213_13_10_c2[16] = {48, 48, 48, 48, 24, 24, 48, 48, reserv
const int32_t table_38213_13_10_c3[16] = { 1, 1, 2, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
const int32_t table_38213_13_10_c4[16] = { 0, 8, 0, 8,-41, 25,-41, 49, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved, condition A as default
const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5};
const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5}; // O
const int32_t table_38213_13_11_c2[16] = { 1, 2, 1, 2, 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1};
const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1};
const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1}; // M
const int32_t table_38213_13_11_c4[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 2, 1, 2}; // i is even as default
const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // index 14-15 reserved
const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // O, index 14-15 reserved
const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved
const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // index 14-15 reserved
const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
#define mu_pusch 1
// definition table j Table 6.1.2.1.1-4
#define j ((mu_pusch==3)?3:(mu_pusch==2)?2:1)
uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,14}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,10}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,14}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,14}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,6}, // row index 14
{j+3,0,14}, // row index 15
{j+3,0,10} // row index 16
};
#define dmrs_typeA_pos 2
uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 2)?9:10,(dmrs_typeA_pos == 2)?4:4}, // row index 6
{0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4}, // row index 7
{0,5,7}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,12,2}, // row index 11
{0,1,13}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,7}, // row index 15
{0,8,4} // row index 16
};
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
Executable → Regular
+513 -69
View File
@@ -34,51 +34,36 @@
#include "mac_extern.h"
#include "RRC/NR_UE/rrc_proto.h"
#include "assertions.h"
#include "PHY/defs_nr_UE.h"
#include <stdio.h>
#include <math.h>
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
uint32_t get_ssb_slot(uint32_t ssb_index){
// this function now only support f <= 3GHz
return ssb_index & 0x3 ;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
// return first_symbol(case, freq, ssb_index) / 14
}
int8_t nr_ue_decode_mib(
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
uint8_t extra_bits, // 8bits 38.212 c7.1.1
uint32_t l_ssb_equal_64,
//uint32_t *ssb_index, // from decoded MIB
//uint32_t *frameP, // 10 bits = 6(in decoded MIB)+4(in extra bits from L1)
void *pduP, // encoded MIB
uint16_t pdu_len){
uint32_t ssb_length,
uint32_t ssb_index,
void *pduP,
uint16_t cell_id ){
printf("[L2][MAC] decode mib\n");
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index,
NR_BCCH_BCH, (uint8_t *) pduP, pdu_len );
nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU
if(mac->mib != NULL){
AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n");
//if(mac->mib != NULL){
uint32_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused);
uint32_t frame_number_4lsb = (uint32_t)(extra_bits & 0xf); // extra bits[0:3]
uint32_t half_frame_bit = (uint32_t)(( extra_bits >> 4 ) & 0x1 ); // extra bits[4]
@@ -86,20 +71,20 @@ int8_t nr_ue_decode_mib(
uint32_t ssb_subcarrier_offset = mac->mib->ssb_SubcarrierOffset;
uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
//uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
frame = frame << 4;
frame = frame | frame_number_4lsb;
if(l_ssb_equal_64){
ssb_index = (( extra_bits >> 5 ) & 0x7 ); // extra bits[5:7]
if(ssb_length == 64){
ssb_index = ssb_index & (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] }
}else{
if(ssb_subcarrier_offset_msb){
ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10;
}
}
#if 0
#ifdef DEBUG_MIB
printf("system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]);
printf("system frame number(with LSB): %d\n", (int)frame);
printf("subcarrier spacing: %d\n", (int)mac->mib->subCarrierSpacingCommon);
@@ -112,15 +97,25 @@ int8_t nr_ue_decode_mib(
printf("ssb index(extra bits): %d\n", (int)ssb_index);
#endif
subcarrier_spacing_t scs_ssb = scs_15kHz; // default for testing
subcarrier_spacing_t scs_pdcch = scs_15kHz; // default for testing
channel_bandwidth_t min_channel_bw = bw_5MHz; // deafult for testing
subcarrier_spacing_t scs_ssb = scs_30kHz; // default for
//const uint32_t scs_index = 0;
const uint32_t num_slot_per_frame = 20;
subcarrier_spacing_t scs_pdcch;
// assume carrier frequency < 6GHz
if(mac->mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){
scs_pdcch = scs_15kHz;
}else{ //NR_MIB__subCarrierSpacingCommon_scs30or120
scs_pdcch = scs_30kHz;
}
channel_bandwidth_t min_channel_bw = bw_40MHz; // deafult for testing
uint32_t is_condition_A = 1;
uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13
frequency_range_t frequency_range = FR1;
uint32_t index_4msb = (mac->mib->pdcch_ConfigSIB1 >> 4) & 0xf;
uint32_t index_4lsb = (mac->mib->pdcch_ConfigSIB1 & 0xf);
int32_t num_rbs = -1;
int32_t num_symbols = -1;
int32_t rb_offset = -1;
@@ -242,24 +237,41 @@ int8_t nr_ue_decode_mib(
AssertFatal(num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined");
AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
uint32_t cell_id = 0; // obtain from L1 later
mac->type0_pdcch_ss.coreset.rb_start = rb_offset;
mac->type0_pdcch_ss.coreset.rb_end = rb_offset + num_rbs - 1;
mac->type0_pdcch_ss.coreset.duration = num_symbols;
mac->type0_pdcch_ss.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
mac->type0_pdcch_ss.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L
mac->type0_pdcch_ss.coreset.cce_reg_interleaved_interleaver_size = 2; // R
mac->type0_pdcch_ss.coreset.cce_reg_interleaved_shift_index = cell_id;
mac->type0_pdcch_ss.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
mac->type0_pdcch_ss.coreset.pdcch_dmrs_scrambling_id = cell_id;
//uint32_t cell_id = 0; // obtain from L1 later
//mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
//mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
uint64_t mask = 0x0;
uint8_t i;
for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
mask = mask >> 1;
mask = mask | 0x100000000000;
}
mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset
//mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
// type0-pdcch search space
float big_o;
uint32_t number_of_search_space_per_slot;
float big_m;
uint32_t temp;
SFN_C_TYPE sfn_c; // only valid for mux=1
uint32_t n_c;
uint32_t number_of_search_space_per_slot;
uint32_t first_symbol_index;
uint32_t search_space_duration; // element of search space
uint32_t coreset_duration; // element of coreset
// 38.213 table 10.1-1
/// MUX PATTERN 1
if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){
@@ -267,11 +279,21 @@ int8_t nr_ue_decode_mib(
number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
big_m = table_38213_13_11_c3[index_4lsb];
temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(ssb_index*big_m);
n_c = temp / num_slot_per_frame;
if((temp/num_slot_per_frame) & 0x1){
sfn_c = SFN_C_MOD_2_EQ_1;
}else{
sfn_c = SFN_C_MOD_2_EQ_0;
}
if((index_4lsb == 1 || index_4lsb == 3 || index_4lsb == 5 || index_4lsb == 7) && (ssb_index&1)){
first_symbol_index = num_symbols;
}else{
first_symbol_index = table_38213_13_11_c4[index_4lsb];
}
// 38.213 chapter 13: over two consecutive slots
search_space_duration = 2;
}
if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR2){
@@ -286,17 +308,19 @@ int8_t nr_ue_decode_mib(
}else{
first_symbol_index = 0;
}
// 38.213 chapter 13: over two consecutive slots
search_space_duration = 2;
}
/// MUX PATTERN 2
if(mac->type0_pdcch_ss_mux_pattern == 2){
if((scs_ssb == scs_120kHz) && (scs_pdcch == scs_60kHz)){
// 38.213 Table 13-13
AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n");
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// TODO Type0SS_frame = SSB_frame
// TODO Type0SS_slot = SSB_slot
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c = get_ssb_slot(ssb_index);
switch(ssb_index & 0x3){ // ssb_index(i) mod 4
case 0:
first_symbol_index = 0;
@@ -317,7 +341,8 @@ int8_t nr_ue_decode_mib(
// 38.213 Table 13-14
AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n");
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// TODO Type0SS_frame = SSB_frame
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c = get_ssb_slot(ssb_index);
switch(ssb_index & 0x7){ // ssb_index(i) mod 8
case 0:
first_symbol_index = 0;
@@ -333,11 +358,11 @@ int8_t nr_ue_decode_mib(
break;
case 4:
first_symbol_index = 12;
// TODO Type0SS_slot = SSB_slot - 1
n_c = get_ssb_slot(ssb_index) - 1;
break;
case 5:
first_symbol_index = 13;
// TODO Type0SS_slot = SSB_slot - 1
n_c = get_ssb_slot(ssb_index) - 1;
break;
case 6:
first_symbol_index = 0;
@@ -348,6 +373,8 @@ int8_t nr_ue_decode_mib(
default: break;
}
}else{ ; }
// 38.213 chapter 13: over one slot
search_space_duration = 1;
}
/// MUX PATTERN 3
@@ -356,8 +383,8 @@ int8_t nr_ue_decode_mib(
// 38.213 Table 13-15
AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n");
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
// TODO Type0SS_frame = SSB_frame
// TODO Type0SS_slot = SSB_slot
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c = get_ssb_slot(ssb_index);
switch(ssb_index & 0x3){ // ssb_index(i) mod 4
case 0:
first_symbol_index = 4;
@@ -374,13 +401,24 @@ int8_t nr_ue_decode_mib(
default: break;
}
}else{ ; }
// 38.213 chapter 13: over one slot
search_space_duration = 1;
}
mac->type0_pdcch_ss_big_o = big_o;
mac->type0_pdcch_ss_number_of_search_space_per_slot = number_of_search_space_per_slot;
mac->type0_pdcch_ss_big_m = big_m;
mac->type0_pdcch_ss_first_symbol_index = first_symbol_index;
coreset_duration = num_symbols * number_of_search_space_per_slot;
mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4
mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8
mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
mac->type0_pdcch_dci_config.duration = search_space_duration;
mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset
mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
mac->type0_pdcch_ss_sfn_c = sfn_c;
mac->type0_pdcch_ss_n_c = n_c;
// fill in the elements in config request inside P5 message
mac->phy_config.config_req.pbch_config.system_frame_number = frame; // after calculation
mac->phy_config.config_req.pbch_config.subcarrier_spacing_common = mac->mib->subCarrierSpacingCommon;
@@ -396,33 +434,439 @@ int8_t nr_ue_decode_mib(
if(mac->if_module != NULL && mac->if_module->phy_config_request != NULL){
mac->if_module->phy_config_request(&mac->phy_config);
}
}
//}
return 0;
}
// TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms
uint32_t get_ssb_frame(uint32_t test){
return test;
}
// Performs :
// 1. TODO: Call RRC for link status return to PHY
// 2. TODO: Perform SR/BSR procedures for scheduling feedback
// 3. TODO: Perform PHR procedures
NR_UE_L2_STATE_t nr_ue_scheduler(
const module_id_t module_id,
const uint8_t gNB_index,
const int cc_id,
const frame_t rx_frame,
const slot_t rx_slot,
const int32_t ssb_index,
const frame_t tx_frame,
const slot_t tx_slot){
const slot_t tx_slot ){
uint32_t search_space_mask = 0;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
// check type0 from 38.213 13
if(ssb_index != -1){
if(mac->type0_pdcch_ss_mux_pattern == 1){
// 38.213 chapter 13
if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
//if((mac->type0_pdcch_ss_sfn_c == SFN_C_EQ_SFN_SSB) && ( get_ssb_frame() )){
// search_space_mask = search_space_mask | type0_pdcch;
//}
}
if(mac->type0_pdcch_ss_mux_pattern == 2){
// 38.213 Table 13-13, 13-14
if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
}
if(mac->type0_pdcch_ss_mux_pattern == 3){
// 38.213 Table 13-15
if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
}
}
#if 0
uint16_t rnti;
fapi_nr_coreset_t coreset;
uint32_t duration;
uint8_t aggregation_level;
uint8_t number_of_candidates;
uint16_t monitoring_symbols_within_slot;
// DCI foramt-specific
uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t format_2_3_monitorying_periodicity;
uint8_t format_2_3_number_of_candidates;
#endif
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1;
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->number_pdus = dl_config->number_pdus + 1;
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
}
if(search_space_mask & type0a_pdcch){
}
if(search_space_mask & type1_pdcch){
}
if(search_space_mask & type2_pdcch){
}
if(search_space_mask & type3_pdcch){
}
mac->scheduled_response.dl_config = dl_config;
return CONNECTION_OK;
}
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format){
uint32_t
ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
const uint16_t n_RB_ULBWP = 106;
const uint16_t n_RB_DLBWP = 106;
uint32_t k_offset;
uint32_t sliv_S;
uint32_t sliv_L;
uint32_t l_RB;
uint32_t start_RB;
uint32_t tmp_RIV;
switch(dci_format){
case format0_0:
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// 0, 1, 2, 3, or 4 bits as defined in:
// Subclause 6.1.2.1 of [6, TS 38.214] for formats format0_0,format0_1
// Subclause 5.1.2.1 of [6, TS 38.214] for formats format1_0,format1_1
// The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][2];
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
// At the moment we are supporting only format 1_0 (and not format 1_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_ULBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_ULBWP/2)
// RIV = n_RB_ULBWP * (n_RB_ULBWP - l_RB + 1) + (n_RB_ULBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_ULBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_ULBWP/2)
l_RB = floor(dci->freq_dom_resource_assignment_DL/n_RB_ULBWP) + 1;
start_RB = dci->freq_dom_resource_assignment_DL%n_RB_ULBWP;
// if (l_RB - 1) > floor (n_RB_ULBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_ULBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != dci->freq_dom_resource_assignment_DL) { // then (l_RB - 1) > floor (n_RB_ULBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_ULBWP - l_RB + 2;
start_RB = n_RB_ULBWP - start_RB - 1;
}
// UL_CONFIG_REQ
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
ulsch_config_pdu->number_rbs = l_RB;
ulsch_config_pdu->start_rb = start_RB;
ulsch_config_pdu->number_symbols = sliv_L;
ulsch_config_pdu->start_symbol = sliv_S;
ulsch_config_pdu->mcs = dci->mcs;
//ulsch0->harq_processes[dci->harq_process_number]->first_rb = start_RB;
//ulsch0->harq_processes[dci->harq_process_number]->nb_rb = l_RB;
//ulsch0->harq_processes[dci->harq_process_number]->mcs = dci->mcs;
//ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi= nr_pdci_info_extracted->ndi;
break;
case format0_1:
break;
case format1_0:
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// Subclause 5.1.2.1 of [6, TS 38.214]
// the Time domain resource assignment field of the DCI provides a row index of a higher layer configured table pdsch-symbolAllocation
// FIXME! To clarify which parameters to update after reception of row index
k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][0];
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][2];
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
// only uplink resource allocation type 1
// At the moment we are supporting only format 0_0 (and not format 0_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_DLBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_DLBWP/2)
// RIV = n_RB_DLBWP * (n_RB_DLBWP - l_RB + 1) + (n_RB_DLBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_DLBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_DLBWP/2)
l_RB = floor(dci->freq_dom_resource_assignment_DL/n_RB_DLBWP) + 1;
start_RB = dci->freq_dom_resource_assignment_DL%n_RB_DLBWP;
// if (l_RB - 1) > floor (n_RB_DLBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_DLBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != dci->freq_dom_resource_assignment_DL) { // then (l_RB - 1) > floor (n_RB_DLBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_DLBWP - l_RB + 2;
start_RB = n_RB_DLBWP - start_RB - 1;
}
// DL_CONFIG_REQ
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dlsch_config_pdu->number_rbs = l_RB;
dlsch_config_pdu->start_rb = start_RB;
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
dlsch_config_pdu->mcs = dci->mcs;
//pdlsch0_harq->nb_rb = l_RB;
//pdlsch0->current_harq_pid = dci->harq_process_number;
//pdlsch0->active = 1;
//pdlsch0->rnti = rnti;
//pdlsch0_harq->mcs = nr_pdci_info_extracted->mcs;
//pdlsch0_harq->DCINdi = nr_pdci_info_extracted->ndi;
dl_config->number_pdus = dl_config->number_pdus + 1;
break;
case format1_1:
break;
case format2_0:
break;
case format2_1:
break;
case format2_2:
break;
case format2_3:
break;
default:
break;
}
if(rnti == SI_RNTI){
}else if(rnti == mac->ra_rnti){
}else if(rnti == P_RNTI){
}else{ // c-rnti
/// check if this is pdcch order
//dci->random_access_preamble_index;
//dci->ss_pbch_index;
//dci->prach_mask_index;
/// else normal DL-SCH grant
}
}
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe){
return 0;
}
}
void nr_ue_process_mac_pdu(
module_id_t module_idP,
uint8_t CC_id,
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index){
uint8_t *pdu_ptr = pduP;
uint16_t pdu_len = mac_pdu_len;
uint16_t mac_ce_len;
uint16_t mac_subheader_len;
uint16_t mac_sdu_len;
// For both DL/UL-SCH
// Except:
// - UL/DL-SCH: fixed-size MAC CE(known by LCID)
// - UL/DL-SCH: padding
// - UL-SCH: MSG3 48-bits
// |0|1|2|3|4|5|6|7| bit-wise
// |R|F| LCID |
// | L |
// |0|1|2|3|4|5|6|7| bit-wise
// |R|F| LCID |
// | L |
// | L |
// For both DL/UL-SCH
// For:
// - UL/DL-SCH: fixed-size MAC CE(known by LCID)
// - UL/DL-SCH: padding, for single/multiple 1-oct padding CE(s)
// - UL-SCH: MSG3 48-bits
// |0|1|2|3|4|5|6|7| bit-wise
// |R|R| LCID |
// LCID: The Logical Channel ID field identifies the logical channel instance of the corresponding MAC SDU or the type of the corresponding MAC CE or padding as described in Tables 6.2.1-1 and 6.2.1-2 for the DL-SCH and UL-SCH respectively. There is one LCID field per MAC subheader. The LCID field size is 6 bits;
// L: The Length field indicates the length of the corresponding MAC SDU or variable-sized MAC CE in bytes. There is one L field per MAC subheader except for subheaders corresponding to fixed-sized MAC CEs and padding. The size of the L field is indicated by the F field;
// F: lenght of L is 0:8 or 1:16 bits wide
// R: Reserved bit, set to zero.
uint8_t done = 0;
while (!done || pdu_len <= 0){
mac_ce_len = 0x0000;
mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct
mac_sdu_len = 0x0000;
switch(((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID){
// MAC CE
case DL_SCH_LCID_CCCH:
// MSG4 RRC Connection Setup 38.331
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH:
// 38.321 Ch6.1.3.14
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL:
// 38.321 Ch6.1.3.13
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT:
// 38.321 Ch6.1.3.12
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_SRS_ACTIVATION:
// 38.321 Ch6.1.3.17
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_RECOMMENDED_BITRATE:
// 38.321 Ch6.1.3.20
mac_ce_len = 2;
break;
case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT:
// 38.321 Ch6.1.3.19
mac_ce_len = 2;
break;
case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT:
// 38.321 Ch6.1.3.18
mac_ce_len = 3;
break;
case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT:
// 38.321 Ch6.1.3.16
mac_ce_len = 2;
break;
case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH:
// 38.321 Ch6.1.3.15
mac_ce_len = 2;
break;
case DL_SCH_LCID_DUPLICATION_ACT:
// 38.321 Ch6.1.3.11
mac_ce_len = 1;
break;
case DL_SCH_LCID_SCell_ACT_4_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 4;
break;
case DL_SCH_LCID_SCell_ACT_1_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 1;
break;
case DL_SCH_LCID_L_DRX:
// 38.321 Ch6.1.3.6
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_DRX:
// 38.321 Ch6.1.3.5
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_TA_COMMAND:
// 38.321 Ch6.1.3.4
mac_ce_len = 1;
break;
case DL_SCH_LCID_CON_RES_ID:
// 38.321 Ch6.1.3.3
mac_ce_len = 6;
break;
case DL_SCH_LCID_PADDING:
done = 1;
// end of MAC PDU, can ignore the rest.
break;
// MAC SDU
case DL_SCH_LCID_SRB1:
// check if LCID is valid at current time.
case UL_SCH_LCID_SRB2:
// check if LCID is valid at current time.
case UL_SCH_LCID_SRB3:
// check if LCID is valid at current time.
default:
// check if LCID is valid at current time.
mac_sdu_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
// DRB LCID by RRC
break;
}
pdu_ptr += ( mac_subheader_len + mac_ce_len + mac_sdu_len );
pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len );
AssertFatal(pdu_len >= 0, "[MAC] nr_ue_process_mac_pdu, residual mac pdu length < 0!\n");
}
}
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
Executable → Regular
+115 -31
View File
@@ -32,6 +32,7 @@
#include "NR_IF_Module.h"
#include "mac_proto.h"
#include "assertions.h"
#include <stdio.h>
@@ -39,32 +40,37 @@
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
// L2 Abstraction Layer
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
int8_t handle_bcch_bch(uint32_t pdu_len, uint8_t *pduP){
// pdu_len = 4, 32bits
uint8_t extra_bits = pduP[0];
nr_ue_decode_mib( (module_id_t)0,
0,
0,
extra_bits,
0, // Lssb = 64 is not support
&pduP[1],
pdu_len );
return nr_ue_decode_mib( module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
}
// L2 Abstraction Layer
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
return 0;
}
// L2 Abstraction Layer
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP){
return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
return 0;
}
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
NR_UE_L2_STATE_t ret;
module_id_t module_id = ul_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
ret = nr_ue_scheduler(
ul_info->module_id,
@@ -72,6 +78,7 @@ int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
ul_info->cc_id,
ul_info->frame,
ul_info->slot,
ul_info->ssb_index,
0, 0); // TODO check tx/rx frame/slot is need for NR version
switch(ret){
@@ -87,39 +94,116 @@ int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
break;
}
mac->if_module->scheduled_response(&mac->scheduled_response);
return 0;
}
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
int32_t i;
uint32_t ret_mask = 0x0;
module_id_t module_id = dl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
// clean up scheduled_response structure
//if(dl_info->rx_ind != NULL){
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
switch(dl_info->rx_ind.rx_request_body.pdu_index){
case FAPI_NR_RX_PDU_BCCH_BCH_TYPE:
handle_bcch_bch(dl_info->rx_ind.rx_request_body.pdu_length, dl_info->rx_ind.rx_request_body.pdu);
break;
case FAPI_NR_RX_PDU_BCCH_DLSCH_TYPE:
handle_bcch_dlsch(dl_info->rx_ind.rx_request_body.pdu_length, dl_info->rx_ind.rx_request_body.pdu);
break;
default:
break;
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
default:
break;
}
}
//}
//if(dl_info->dci_ind != NULL){
//}
if(nr_ue_if_module_inst[module_id] != NULL){
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
}
if(dl_info->dci_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
for(i=0; dl_info->dci_ind->number_of_dcis; ++i){
fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0:
case FAPI_NR_DCI_TYPE_0_1:
case FAPI_NR_DCI_TYPE_1_1:
case FAPI_NR_DCI_TYPE_2_0:
case FAPI_NR_DCI_TYPE_2_1:
case FAPI_NR_DCI_TYPE_2_2:
case FAPI_NR_DCI_TYPE_2_3:
AssertFatal(1==0, "Not yet support at this moment!\n");
break;
case FAPI_NR_DCI_TYPE_1_0:
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
// mapping into DL_CONFIG_REQ for DL-SCH
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = 0x0000; // TX RNTI: UE-spec
memcpy(dlsch_config_pdu, dci, sizeof(fapi_nr_dci_pdu_rel15_t));
dl_config->number_pdus = dl_config->number_pdus + 1;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_type)) << FAPI_NR_DCI_IND;
break;
default:
break;
}*/
//(dl_info->dci_list+i)->rnti
}
}
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
return 0;
}
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
+18 -8
View File
@@ -36,9 +36,13 @@
#include "platform_types.h"
#include "fapi_nr_ue_interface.h"
typedef struct {
/// module id
module_id_t module_id;
/// gNB index
uint32_t gNB_index;
/// component carrier id
int cc_id;
/// frame
@@ -48,10 +52,10 @@ typedef struct {
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
fapi_nr_rx_indication_t rx_ind;
fapi_nr_rx_indication_t *rx_ind;
/// dci reception indication structure
fapi_nr_dci_indication_t dci_ind;
fapi_nr_dci_indication_t *dci_ind;
} nr_downlink_indication_t;
@@ -67,6 +71,8 @@ typedef struct {
frame_t frame;
/// slot
uint32_t slot;
/// ssb_index, if ssb is not present in current TTI, thie value set to -1
int8_t ssb_index;
} nr_uplink_indication_t;
// Downlink subframe P7
@@ -175,18 +181,22 @@ int8_t nr_ue_if_module_kill(uint32_t module_id);
\param dl_info including dci_ind and rx_request messages*/
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
// TODO check
/**\brief handle BCCH-BCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_bch(uint32_t pdu_len, uint8_t *pduP);
\param pduP pointer to bch pdu
\param additional_bits corresponding to 38.212 ch.7
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP);
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
#endif
openair2/RRC/LTE/rrc_UE.c
+8 -6
View File
@@ -1807,9 +1807,10 @@ rrc_ue_process_rrcConnectionReconfiguration(
LOG_I(RRC,"Radio Resource Configuration is present\n");
rrc_ue_process_radioResourceConfigDedicated(ctxt_pP,eNB_index, rrcConnectionReconfiguration_r8->radioResourceConfigDedicated);
}
/* void *non_criticical_ext_iterator = rrcConnectionReconfiguration_r8;
// LTE Rel 15 not yet here
#if Rel15
void *non_criticical_ext_iterator = rrcConnectionReconfiguration_r8;
RCCConnectionReconfiguration_v1510_IEs_t *rrc_connection_reconfiguration_v1510_IEs = (RRCConnectionReconfiguration_v1510_IEs_t *)0;
// fetch EN-DC for NR_RRC here
// r8
@@ -1851,8 +1852,8 @@ rrc_ue_process_rrcConnectionReconfiguration(
case nr_Config_r15_PR_setup:
// process NR sCell config
if(rrc_connection_reconfiguration_v1510_IEs->nr_Config_r15.choice.setup->nr_SecondaryCellGroupConfig_r15 != (OCTET_STRING_t *)0){
nr_rrc_ue_decode_rrcReconfiguration( rrc_connection_reconfiguration_v1510_IEs->nr_Config_r15.choice.setup->nr_SecondaryCellGroupConfig_r15->buffer,
rrc_connection_reconfiguration_v1510_IEs->nr_Config_r15.choice.setup->nr_SecondaryCellGroupConfig_r15.size);
nr_rrc_ue_decode_secondary_cellgroup_config( rrc_connection_reconfiguration_v1510_IEs->nr_Config_r15.choice.setup->nr_SecondaryCellGroupConfig_r15->buffer,
rrc_connection_reconfiguration_v1510_IEs->nr_Config_r15.choice.setup->nr_SecondaryCellGroupConfig_r15.size);
}
break;
@@ -1862,7 +1863,8 @@ rrc_ue_process_rrcConnectionReconfiguration(
break;
}
}
}*/
}
#endif
#if defined(ENABLE_ITTI)
openair2/RRC/NR_UE/L2_interface_ue.c
+2 -1
View File
@@ -32,6 +32,7 @@
#include "rrc_defs.h"
#include "rrc_proto.h"
#include "assertions.h"
typedef uint32_t channel_t;
@@ -46,7 +47,7 @@ nr_mac_rrc_data_ind_ue(
switch(channel){
case NR_BCCH_BCH:
nr_rrc_ue_decode_NR_BCCH_BCH_Message( module_id, gNB_index, (uint8_t*)pduP, pdu_len);
AssertFatal( nr_rrc_ue_decode_NR_BCCH_BCH_Message( module_id, gNB_index, (uint8_t*)pduP, pdu_len) == 0, "UE decode BCCH-BCH error!\n");
break;
default:
break;
openair2/RRC/NR_UE/rrc_UE.c
+49 -36
View File
@@ -50,22 +50,34 @@
// from LTE-RRC DL-DCCH RRCConnectionReconfiguration nr-secondary-cell-group-config (encoded)
int8_t nr_rrc_ue_decode_secondary_cellgroup_config(
const uint8_t *buffer,
const uint32_t size
){
NR_CellGroupConfig_t *cellGroupConfig = NULL;
const uint32_t size ){
NR_CellGroupConfig_t *cell_group_config = NULL;
uint32_t i;
uper_decode(NULL,
&asn_DEF_NR_CellGroupConfig, //might be added prefix later
(void **)&cellGroupConfig,
(uint8_t *)buffer,
size, 0, 0);
asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
&asn_DEF_NR_CellGroupConfig,
(void **)&cell_group_config,
(uint8_t *)buffer,
size );
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
printf("NR_CellGroupConfig decode error\n");
for (i=0; i<size; i++){
printf("%02x ",buffer[i]);
}
printf("\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_CellGroupConfig, (void *)cell_group_config, 1 );
return -1;
}
if(NR_UE_rrc_inst->cell_group_config == NULL){
NR_UE_rrc_inst->cell_group_config = cellGroupConfig;
nr_rrc_ue_process_scg_config(cellGroupConfig);
NR_UE_rrc_inst->cell_group_config = cell_group_config;
nr_rrc_ue_process_scg_config(cell_group_config);
}else{
nr_rrc_ue_process_scg_config(cellGroupConfig);
SEQUENCE_free(&asn_DEF_NR_CellGroupConfig, (void *)cellGroupConfig, 0);
nr_rrc_ue_process_scg_config(cell_group_config);
SEQUENCE_free(&asn_DEF_NR_CellGroupConfig, (void *)cell_group_config, 0);
}
//nr_rrc_mac_config_req_ue( module_id_t module_id, int CC_id, uint8_t gNB_index, NR_MIB_t *mibP, NR_MAC_CellGroupConfig_t *mac_cell_group_configP, NR_PhysicalCellGroupConfig_t *phy_cell_group_configP, NR_SpCellConfig_t *spcell_configP );
@@ -263,34 +275,34 @@ int8_t openair_rrc_top_init_ue_nr(void){
int8_t nr_ue_process_rlc_bearer_list(NR_CellGroupConfig_t *cell_group_config){
return 0;
};
}
int8_t nr_ue_process_secondary_cell_list(NR_CellGroupConfig_t *cell_group_config){
return 0;
};
}
int8_t nr_ue_process_mac_cell_group_config(NR_MAC_CellGroupConfig_t *mac_cell_group_config){
return 0;
};
}
int8_t nr_ue_process_physical_cell_group_config(NR_PhysicalCellGroupConfig_t *phy_cell_group_config){
return 0;
};
}
int8_t nr_ue_process_spcell_config(NR_SpCellConfig_t *spcell_config){
return 0;
};
}
/*brief decode BCCH-BCH (MIB) message*/
int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
const module_id_t module_id,
const uint8_t gNB_index,
uint8_t *const bufferP,
const uint8_t buffer_len){
const uint8_t buffer_len ){
int i;
NR_BCCH_BCH_Message_t *bcch_message = NULL;
NR_MIB_t *mib = NR_UE_rrc_inst->mib;
@@ -305,22 +317,21 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
}
asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
&asn_DEF_NR_BCCH_BCH_Message,
(void **)&bcch_message,
(const void *)bufferP,
buffer_len
);
&asn_DEF_NR_BCCH_BCH_Message,
(void **)&bcch_message,
(const void *)bufferP,
buffer_len );
if(bcch_message->message.choice.mib->systemFrameNumber.buf != 0){
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
for (i=0; i<buffer_len; i++)
printf("%02x ",bufferP[i]);
printf("\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
return -1;
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
printf("NR_CellGroupConfig decode error\n");
for (i=0; i<buffer_len; i++){
printf("%02x ",bufferP[i]);
}
printf("\n");
// free the memory
SEQUENCE_free( &asn_DEF_NR_BCCH_BCH_Message, (void *)bcch_message, 1 );
return -1;
}
// link to rrc instance
@@ -331,6 +342,7 @@ int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(
nr_rrc_mac_config_req_ue( 0, 0, 0, mib, NULL, NULL, NULL);
}
return 0;
}
@@ -340,8 +352,9 @@ int8_t nr_rrc_ue_decode_NR_DL_DCCH_Message(
const module_id_t module_id,
const uint8_t gNB_index,
const uint8_t *bufferP,
const uint32_t buffer_len){
const uint32_t buffer_len ){
// uper_decode by nr R15 rrc_connection_reconfiguration
int32_t i;
NR_DL_DCCH_Message_t *nr_dl_dcch_msg = NULL;
@@ -349,9 +362,9 @@ int8_t nr_rrc_ue_decode_NR_DL_DCCH_Message(
&asn_DEF_NR_DL_DCCH_Message,
(void**)&nr_dl_dcch_msg,
(uint8_t *)bufferP,
buffer_len, 0, 0);
buffer_len, 0, 0);
if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
for (i=0; i<buffer_len; i++)
printf("%02x ",bufferP[i]);
@@ -407,4 +420,4 @@ int8_t nr_rrc_ue_decode_NR_DL_DCCH_Message(
return 0;
}
}
openair2/RRC/NR_UE/rrc_proto.h
+1 -1
View File
@@ -58,7 +58,7 @@ int8_t openair_rrc_top_init_ue_nr(void);
\param buffer encoded NR-RRC-Connection-Reconfiguration/Secondary-Cell-Group-Config message.
\param size length of buffer*/
//TODO check to use which one
int8_t nr_rrc_ue_decode_rrcReconfiguration(const uint8_t *buffer, const uint32_t size);
//int8_t nr_rrc_ue_decode_rrcReconfiguration(const uint8_t *buffer, const uint32_t size);
int8_t nr_rrc_ue_decode_secondary_cellgroup_config(const uint8_t *buffer, const uint32_t size);
targets/RT/USER/nr-softmodem.c
+1
View File
@@ -888,6 +888,7 @@ static void wait_nfapi_init(char *thread_name) {
int main( int argc, char **argv )
{
crcTableInit();
int i;
#if defined (XFORMS)
//void *status;
targets/RT/USER/nr-ue.c
+116 -22
View File
@@ -42,6 +42,8 @@
#include "fapi_nr_ue_l1.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "LAYER2/NR_MAC_UE/mac_proto.h"
#include "RRC/NR_UE/rrc_proto.h"
@@ -65,6 +67,69 @@ extern double cpuf;
static nfapi_nr_config_request_t config_t;
static nfapi_nr_config_request_t* config =&config_t;
/*
* NR SLOT PROCESSING SEQUENCE
*
* Processing occurs with following steps for connected mode:
*
* - Rx samples for a slot are received,
* - PDCCH processing (including DCI extraction for downlink and uplink),
* - PDSCH processing (including transport blocks decoding),
* - PUCCH/PUSCH (transmission of acknowledgements, CSI, ... or data).
*
* Time between reception of the slot and related transmission depends on UE processing performance.
* It is defined by the value NR_UE_CAPABILITY_SLOT_RX_TO_TX.
*
* In NR, network gives the duration between Rx slot and Tx slot in the DCI:
* - for reception of a PDSCH and its associated acknowledgment slot (with a PUCCH or a PUSCH),
* - for reception of an uplink grant and its associated PUSCH slot.
*
* So duration between reception and it associated transmission depends on its transmission slot given in the DCI.
* NR_UE_CAPABILITY_SLOT_RX_TO_TX means the minimum duration but higher duration can be given by the network because UE can support it.
*
* Slot k
* -------+------------+--------
* Frame | Tx samples |
* Subframe | buffer |
* Slot n -------+------------+--------
* ------ +------------+-------- |
* | Rx samples | |
* | buffer | |
* -------+------------+-------- |
* | |
* V |
* +------------+ |
* | PDCCH | |
* | processing | |
* +------------+ |
* | | |
* | v |
* | +------------+ |
* | | PDSCH | |
* | | processing | decoding result |
* | +------------+ -> ACK/NACK of PDSCH |
* | | |
* | v |
* | +-------------+------------+ |
* | | PUCCH/PUSCH | Tx samples | |
* | | processing | transfer | |
* | +-------------+------------+ |
* | |
* |/___________________________________________________________\|
* \ duration between reception and associated transmission /
*
* Remark: processing is done slot by slot, it can be distribute on different threads which are executed in parallel.
* This is an architecture optimization in order to cope with real time constraints.
* By example, for LTE, subframe processing is spread over 4 different threads.
*
*/
#ifndef NO_RAT_NR
#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
#else
#define DURATION_RX_TO_TX (4) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
#define FRAME_PERIOD 100000000ULL
#define DAQ_PERIOD 66667ULL
#define FIFO_PRIORITY 40
@@ -331,7 +396,7 @@ static void *UE_thread_synch(void *arg) {
switch (sync_mode) {
case pss:
LOG_I(PHY,"[SCHED][UE] Scanning band %d (%d), freq %u\n",bands_to_scan.band_info[current_band].band, current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
lte_sync_timefreq(UE,current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
//lte_sync_timefreq(UE,current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
current_offset += 20000000; // increase by 20 MHz
if (current_offset > bands_to_scan.band_info[current_band].dl_max-bands_to_scan.band_info[current_band].dl_min) {
@@ -425,7 +490,7 @@ static void *UE_thread_synch(void *arg) {
//UE->rfdevice.trx_set_gains_func(&openair0,&openair0_cfg[0]);
//UE->rfdevice.trx_stop_func(&UE->rfdevice);
// sleep(1);
nr_init_frame_parms_ue(config,&UE->frame_parms);
nr_init_frame_parms_ue(&UE->frame_parms);
/*if (UE->rfdevice.trx_start_func(&UE->rfdevice) != 0 ) {
LOG_E(HW,"Could not start the device\n");
oai_exit=1;
@@ -584,9 +649,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
#ifndef NO_RAT_NR
// Process Rx data for one sub-frame
nr_slot_t nr_slot ; //= slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx);
if (nr_slot == NR_TDD_DOWNLINK_SLOT) {
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
#else
// Process Rx data for one sub-frame
lte_subframe_t sf_type = subframe_select( &UE->frame_parms, proc->subframe_rx);
@@ -614,7 +677,7 @@ static void *UE_thread_rxn_txnp4(void *arg) {
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_UE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
phy_procedures_UE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
phy_procedures_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#endif
}
@@ -630,7 +693,8 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
//UE->ul_indication.frame = ;
//UE->ul_indication.slot = ;
@@ -692,17 +756,22 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// Prepare the future Tx data
#if 0
#ifndef NO_RAT_NR
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_UPLINK_SLOT)
#else
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) ||
(UE->frame_parms.frame_type == FDD) )
if (UE->mode != loop_through_memory)
phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
#endif
#endif
#if 0
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_S) &&
(UE->frame_parms.frame_type == TDD))
if (UE->mode != loop_through_memory)
//phy_procedures_UE_S_TX(UE,0,0,no_relay);
updateTimes(current, &t3, 10000, timing_proc_name);
#endif
if (pthread_mutex_lock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RXTX\n" );
@@ -806,7 +875,7 @@ void *UE_thread(void *arg) {
if (UE->mode != loop_through_memory) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][0];
for (int sf=0; sf<10; sf++)
for (int sf=0; sf<LTE_NUMBER_OF_SUBFRAMES_PER_FRAME; sf++)
// printf("Reading dummy sf %d\n",sf);
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
@@ -823,13 +892,28 @@ void *UE_thread(void *arg) {
start_rx_stream=1;
if (UE->mode != loop_through_memory) {
if (UE->no_timing_correction==0) {
LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
printf("before resync\n");
//nr_slot_fep(UE,0, 0, UE->rx_offset, 1, 1, NR_PDCCH_EST);
//nr_slot_fep(UE,1, 0, UE->rx_offset, 1, 1, NR_PDCCH_EST);
//write_output("txdata_pre.m", "txdata_pre", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_subframe*10, 1, 1);
/*LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
AssertFatal(UE->rx_offset ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void**)UE->common_vars.rxdata,
UE->rx_offset,
UE->frame_parms.nb_antennas_rx),"");
AssertFatal(UE->frame_parms.samples_per_subframe*10 ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void**)UE->common_vars.rxdata,
UE->frame_parms.samples_per_subframe*10,
UE->frame_parms.nb_antennas_rx),"");*/
//write_output("txdataF_ue.m", "txdataF_ue", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_subframe*10, 1, 1);
}
UE->rx_offset=0;
UE->time_sync_cell=0;
@@ -838,6 +922,8 @@ void *UE_thread(void *arg) {
for (th_id=0; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].frame_rx++;
}
//printf("first stream frame rx %d\n",UE->proc.proc_rxtx[0].frame_rx);
// read in first symbol
AssertFatal (UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0 ==
@@ -846,14 +932,16 @@ void *UE_thread(void *arg) {
(void**)UE->common_vars.rxdata,
UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0,
UE->frame_parms.nb_antennas_rx),"");
nr_slot_fep(UE,0, 0, 0, 0, 0, NR_PBCH_EST);
//write_output("txdata_sym.m", "txdata_sym", UE->common_vars.rxdata[0], (UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0), 1, 1);
//nr_slot_fep(UE,0, 0, 0, 1, 1, NR_PDCCH_EST);
} //UE->mode != loop_through_memory
else
rt_sleep_ns(1000*1000);
} else {
tti_nr++;
tti_nr%=10*UE->frame_parms.ttis_per_subframe;
int ttis_per_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*UE->frame_parms.ttis_per_subframe;
tti_nr %= ttis_per_frame;
UE_nr_rxtx_proc_t *proc = &UE->proc.proc_rxtx[thread_idx];
// update thread index for received subframe
UE->current_thread_id[tti_nr] = thread_idx;
@@ -874,7 +962,7 @@ void *UE_thread(void *arg) {
txp[i] = (void*)&UE->common_vars.txdata[i][((tti_nr+2)%10*UE->frame_parms.ttis_per_subframe)*UE->frame_parms.samples_per_tti];
int readBlockSize, writeBlockSize;
if (tti_nr<(10*UE->frame_parms.ttis_per_subframe-1)) {
if (tti_nr<(ttis_per_frame - 1)) {
readBlockSize=UE->frame_parms.samples_per_tti;
writeBlockSize=UE->frame_parms.samples_per_tti;
} else {
@@ -897,7 +985,7 @@ void *UE_thread(void *arg) {
UE->rx_offset_diff;
}
AssertFatal(readBlockSize ==
/*AssertFatal(readBlockSize ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
rxp,
@@ -912,17 +1000,17 @@ void *UE_thread(void *arg) {
txp,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
1),"");
if( tti_nr==(10*UE->frame_parms.ttis_per_subframe-1)) {
1),"");*/
if( tti_nr==(ttis_per_frame-1)) {
// read in first symbol of next frame and adjust for timing drift
int first_symbols=writeBlockSize-readBlockSize;
if ( first_symbols > 0 )
AssertFatal(first_symbols ==
/*AssertFatal(first_symbols ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp1,
(void**)UE->common_vars.rxdata,
first_symbols,
UE->frame_parms.nb_antennas_rx),"");
UE->frame_parms.nb_antennas_rx),"");*/
if ( first_symbols <0 )
LOG_E(PHY,"can't compensate: diff =%d\n", first_symbols);
}
@@ -950,13 +1038,19 @@ void *UE_thread(void *arg) {
for (th_id=0; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].gotIQs=readTime(gotIQs);
}
proc->nr_tti_rx=tti_nr;
proc->nr_tti_tx=(tti_nr+4)%(10*UE->frame_parms.ttis_per_subframe);
proc->subframe_rx=tti_nr>>((uint8_t)(log2 (UE->frame_parms.ttis_per_subframe)));
proc->frame_tx = proc->frame_rx + (proc->subframe_rx>5?1:0);
proc->frame_tx = proc->frame_rx;
proc->nr_tti_tx= tti_nr + DURATION_RX_TO_TX;
if (proc->nr_tti_tx > ttis_per_frame) {
proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
proc->nr_tti_tx %= ttis_per_frame;
}
proc->subframe_tx=(proc->nr_tti_tx)>>((uint8_t)(log2 (UE->frame_parms.ttis_per_subframe)));
proc->timestamp_tx = timestamp+
(4*UE->frame_parms.samples_per_tti)-
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_tti)-
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
proc->instance_cnt_rxtx++;
@@ -1097,7 +1191,7 @@ void fill_ue_band_info(void) {
int setup_ue_buffers(PHY_VARS_NR_UE **phy_vars_ue, openair0_config_t *openair0_cfg) {
int i, CC_id;
LTE_DL_FRAME_PARMS *frame_parms;
NR_DL_FRAME_PARMS *frame_parms;
openair0_rf_map *rf_map;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
targets/RT/USER/nr-uesoftmodem.c
+8 -8
View File
@@ -245,7 +245,7 @@ int emulate_rf = 0;
threads_t threads= {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1};
/* forward declarations */
void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
@@ -628,7 +628,7 @@ int T_port = 2021; /* default port to listen to to wait for the tracer */
int T_dont_fork = 0; /* default is to fork, see 'T_init' to understand */
#endif
void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
int CC_id;
@@ -700,7 +700,6 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
//int CC_id;
//for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
config = (nfapi_nr_config_request_t*) malloc(sizeof(nfapi_nr_config_request_t));
@@ -899,7 +898,7 @@ int main( int argc, char **argv ) {
set_latency_target();
// set default parameters
set_default_frame_parms(config,frame_parms);
set_default_frame_parms(frame_parms);
// initialize logging
logInit();
@@ -985,6 +984,7 @@ int main( int argc, char **argv ) {
LOG_I(HW, "Version: %s\n", PACKAGE_VERSION);
// set_default_frame_parms(frame_parms);//
// init the parameters
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
@@ -995,10 +995,10 @@ int main( int argc, char **argv ) {
LOG_I(PHY,"Set nb_rx_antenna %d , nb_tx_antenna %d \n",frame_parms[CC_id]->nb_antennas_rx, frame_parms[CC_id]->nb_antennas_tx);
set_default_frame_parms(config[CC_id],frame_parms[CC_id]);
//set_default_frame_parms(config[CC_id],frame_parms[CC_id]);
//init_ul_hopping(frame_parms[CC_id]);
nr_init_frame_parms_ue(config[CC_id],frame_parms[CC_id]);
nr_init_frame_parms_ue(frame_parms[CC_id]);
printf("after init frame_parms %d\n",frame_parms[CC_id]->ofdm_symbol_size);
// phy_init_top(frame_parms[CC_id]);
phy_init_nr_top(frame_parms[CC_id]);
@@ -1238,7 +1238,7 @@ int main( int argc, char **argv ) {
//}
// connect the TX/RX buffers
if (UE_flag==1) {
//if (UE_flag==1) {
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
@@ -1265,7 +1265,7 @@ int main( int argc, char **argv ) {
printf("error reading from file\n");
}
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
}
//}
sleep(3);