correct scheduling of msg3 reception
This commit is contained in:
@@ -174,6 +174,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
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case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
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AssertFatal(pdcch_received == 0, "pdcch_received is not 0, we can only handle one PDCCH PDU per slot\n");
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LOG_I(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
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handle_nfapi_nr_pdcch_pdu(gNB,
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frame, slot,
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&dl_tti_pdu->pdcch_pdu);
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@@ -184,6 +185,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
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case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
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{
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LOG_I(PHY,"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",frame,slot,DL_req->SFN,DL_req->Slot);
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
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uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
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AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1, "TX_req->pdu_list[%d].num_TLV %d != 1\n",
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@@ -205,21 +207,19 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
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for (int i = 0; i < number_ul_tti_pdu; i++) {
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switch (UL_tti_req->pdus_list[i].pdu_type) {
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case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
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LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE for %d.%d\n",frame,slot,UL_tti_req->SFN,UL_tti_req->Slot);
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LOG_I(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUSCH_PDU_TYPE for %d.%d\n",frame,slot,UL_tti_req->SFN,UL_tti_req->Slot);
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nr_fill_ulsch(gNB,UL_tti_req->SFN,UL_tti_req->Slot,&UL_tti_req->pdus_list[i].pusch_pdu);
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break;
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case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:
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LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE for %d.%d\n",frame,slot,UL_tti_req->SFN,UL_tti_req->Slot);
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LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUCCH_PDU_TYPE for %d.%d\n",frame,slot,UL_tti_req->SFN,UL_tti_req->Slot);
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// handle_nfapi_nr_pucch_pdu(gNB,frame,slot,UL_tti_req->pdus_list[i].pucch_pdu);
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break;
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case NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE:
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LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE for %d.%d\n",frame,slot,UL_tti_req->SFN,UL_tti_req->Slot);
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LOG_I(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PRACH_PDU_TYPE for %d.%d\n",frame,slot,UL_tti_req->SFN,UL_tti_req->Slot);
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nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[i].prach_pdu;
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nr_fill_prach(gNB,UL_tti_req->SFN,UL_tti_req->Slot,prach_pdu);
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nr_fill_prach_ru(gNB->RU_list[0],UL_tti_req->SFN,UL_tti_req->Slot,prach_pdu);
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break;
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}
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}
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}
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@@ -407,7 +407,6 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
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(ulsch_harq->slot == slot_rx) &&
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(ulsch_harq->handled == 0)){
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uint8_t symbol_start = ulsch_harq->ulsch_pdu.ulsch_pdu_rel15.start_symbol;
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uint8_t symbol_end = symbol_start + ulsch_harq->ulsch_pdu.ulsch_pdu_rel15.number_symbols;
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@@ -387,8 +387,12 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) {
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schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
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nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
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if (phy_test && slot_rxP==8){
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//nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
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}
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@@ -389,8 +389,25 @@ void nr_get_Msg3alloc(NR_ServingCellConfigCommon_t *scc,
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ra->msg3_first_rb = 0;
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}
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// WIP
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// todo: fix
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void nr_schedule_reception_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP){
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gNB_MAC_INST *mac = RC.nrmac[module_idP];
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nfapi_nr_ul_tti_request_t *ul_req = &mac->UL_tti_req[0];
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NR_COMMON_channels_t *cc = &mac->common_channels[CC_id];
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NR_RA_t *ra = &cc->ra[0];
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if (ra->state == WAIT_Msg3) {
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if ((frameP == ra->Msg3_frame) && (slotP == ra->Msg3_slot) ){
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ul_req->SFN = ra->Msg3_frame;
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ul_req->Slot = ra->Msg3_slot;
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ul_req->pdus_list[ul_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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ul_req->pdus_list[ul_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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ul_req->pdus_list[ul_req->n_pdus].pusch_pdu = ra->pusch_pdu;
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ul_req->n_pdus+=1;
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}
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}
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}
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void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP){
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gNB_MAC_INST *mac = RC.nrmac[module_idP];
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@@ -398,20 +415,15 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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NR_RA_t *ra = &cc->ra[0];
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NR_UE_list_t *UE_list = &mac->UE_list;
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nfapi_nr_ul_tti_request_t *ul_req = &mac->UL_tti_req[0];
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int UE_id = 0;
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AssertFatal(ra->state != RA_IDLE, "RA is not active for RA %X\n", ra->rnti);
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LOG_D(MAC, "[gNB %d][RAPROC] Frame %d, Subframe %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot);
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ul_req->SFN = ra->Msg3_frame;
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ul_req->Slot = ra->Msg3_slot;
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ul_req->pdus_list[ul_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
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ul_req->pdus_list[ul_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
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nfapi_nr_pusch_pdu_t *pusch_pdu = &ul_req->pdus_list[ul_req->n_pdus].pusch_pdu;
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nfapi_nr_pusch_pdu_t *pusch_pdu = &ra->pusch_pdu;
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memset(pusch_pdu, 0, sizeof(nfapi_nr_pusch_pdu_t));
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ul_req->n_pdus+=1;
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AssertFatal(UE_list->active[UE_id] >=0,"Cannot find UE_id %d is not active\n", UE_id);
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@@ -773,7 +785,6 @@ void nr_fill_rar(uint8_t Mod_idP,
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// UL grant
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ra->msg3_mcs = pusch_pdu->mcs_index;
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ra->msg3_TPC = tpc_command;
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bwp_size = pusch_pdu->bwp_size;
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@@ -793,7 +804,7 @@ void nr_fill_rar(uint8_t Mod_idP,
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f_alloc = (prb_alloc&truncation);
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}
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ul_grant = csi_req | (tpc_command << 1) | (ra->msg3_mcs << 4) | (ra->Msg3_tda_id << 8) | (f_alloc << 12) | (pusch_pdu->frequency_hopping << 26);
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ul_grant = csi_req | (tpc_command << 1) | (pusch_pdu->mcs_index << 4) | (ra->Msg3_tda_id << 8) | (f_alloc << 12) | (pusch_pdu->frequency_hopping << 26);
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rar->UL_GRANT_1 = (uint8_t) (ul_grant >> 24) & 0x07;
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rar->UL_GRANT_2 = (uint8_t) (ul_grant >> 16) & 0xff;
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@@ -240,6 +240,8 @@ void nr_generate_Msg2(module_id_t module_idP,
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frame_t frameP,
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sub_frame_t slotP);
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void nr_schedule_reception_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP);
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int find_aggregation_level (NR_SearchSpace_t *ss);
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void find_monitoring_periodicity_offset_common(NR_SearchSpace_t *ss,
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@@ -125,8 +125,6 @@ typedef struct {
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uint8_t msg3_first_rb;
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/// Msg3 number of RB
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uint8_t msg3_nb_rb;
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/// Msg3 MCS
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uint8_t msg3_mcs;
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/// Msg3 TPC command
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uint8_t msg3_TPC;
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/// Msg3 ULdelay command
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@@ -135,6 +133,8 @@ typedef struct {
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uint8_t msg3_cqireq;
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/// Round of Msg3 HARQ
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uint8_t msg3_round;
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/// Msg3 pusch pdu
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nfapi_nr_pusch_pdu_t pusch_pdu;
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/// TBS used for Msg4
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int msg4_TBsize;
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/// MCS used for Msg4
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