When FHI 7.2 is enabled, the EAL initialization is done by the FHI and
the attempt to init EAL by ldpc_aal will fail.
In that case, it is not necessary neither to provide a DPDK core list
for BBDEV.
This commit offers to skip EAL initialization if it is already initialized
in order to allow dropping the useless DPDK cores argument in that case.
The change relies on `rte_dev_probe` to detect if EAL was already
initialized.
RF emulator and improvements of the timers
RF emulator:
Add an RF library emulating a real device without the need of a real
device. This is thought to enable using phy-test without requiring a
radio device or channel simulation. The library synchronizes on the
real time clock, drops TX and generate noise on RX. Noise generation
can be disabled and the noise level configured.
Timers improvements:
- Fix standard deviation for merged timers
- Add display of ULSCH decoding timers
- Add decoding timer in AAL
Variables 'harq_pid', 'ulsch_id' and 'C' of the segment decoder
interface were not used any more by the implementations and set to zero
by all the callers.
Then it is more relevant and compliant to remove them.
Rename the library to reflect that it's more a generic AAL driver than
specifically for AAL. To this end, rename some documentation.
As of this commit, the options are still called nrLDPC_coding_t2. The
next commit will correct this.
Co-authored-by: Xin Zhe Khooi <khooixz@comp.nus.edu.sg>
The DPDK driver may directly provide the internal HW mbuf in the dequeued structure.
So don't try to free the mbufs from that dequeued structure, but the ones we allocated.
- modify retrieve_ldpc_enc_op() to store encoded results in a packed format
- add timing measurements for T2 encoder
- add simde implementation for bit reversal
- Introduce new bit reversal implementation using simde_mm_gf2p8affine_epi64_epi8
instruction, based on https://wunkolo.github.io/post/2020/11/gf2p8affineqb-bit-reversal/.
This implementation requires GFNI and AVX512VL support on the target machine.
1. The encoder writes the output in sequence after the encoding tasks completed instead of writing within the tasks.
2. Simplify the output writing to make it more readable.
Co-authored-by: Laurent Thomas <laurent.thomas@open-cells.com>
There was a risk of a race condition between encoding tasks on the output array.
It could be that two task compete in writing a word at the border of their respective segment groups.
This commit offers to solve this issue by retaining the tail word in a struct that is returned after task completion so that segment group border can be fixed after completion of all the tasks.
Comes with additional cleanups of nrLDPC_coding_segment_encoder:
1. Move the section of code dedicated to writing to the encoding library output to a separate function.
2. Remove bit interleave debug in AVX512VBMI case of output writing for improving code readability.
1. nrLDPC_coding_segment_encoding: Clarifying encoder parameters
The way the encoder implementation params was used could be made clearer:
* `macro_num` was always used in order to calculate segment indexes.
It is clearer to pass directly the first segment index.
* The initialisation of a common implementation parameters structure can be made clearer.
2. nrLDPC_coding_segment_encoder: Remove multi segment dimension in encoder output
The output of `LDPCencoder` was a 2D unsigned char array.
But all the segments were actually packed in the first segment, 8 bits of different segments per byte of the first segment.
So the first dimension was useless. This commit removes this dimension.
3. nrLDPC_coding_segment_encoder: Rename `nrLDPC_prepare_TB_encoding` into `nrLDPC_launch_TB_encoding`
4. nrLDPC_coding_segment_encoder: Remove the useless second rate matching for E2, one rate matching with max(E, E2) does the job.
5. nr_interleaving_ldpc: cleanup
Rewrite code to use different SIMD sizes in a linear fashion.
This means cascading preprocessor directives are used to start from a high SIMD size an decrease it progressively.
6. ldpc_encoder_optim8segmulti: linear usage of SIMD
Use cascading preprocessor directives to include different SIMD sizes and types depending on which are available on the system.
The different loops use a common index that is progressively incremented.
Also add AVX512 version of bits distribution from 8 segments into one byte.
Co-authored-by: Laurent Thomas <laurent.thomas@open-cells.com>
Since this branch aims to bring all the encoded segments packed and contiguous,
it doesn't make anymore sense to have one output array per segment.
Therefore this commit moves the output array to the TB instead of the segment and adapts its size.
TODO: Adapt the size of f where it is relevant.
1. nrLDPC_coding_segment_encoder: pointer not aligned on 64 bits
An undefined behavior was happening because of a shift on a __m64 which
was actually a uint32_t which was not aligned on 64 bits.
This commit suggests a fix by properly loading into a __m64 with _mm_set_pi32
before performing the shift.
2. nr_rate_matching: Filler bits detection
Previously, if the bit selection was reaching Ncb and restarting selection from the beginning of encoded data, the filler bits were detected by testing the bytes again NR_NULL which was equal to 2.
But on this branch the bits of up to 8 segments are stored in one byte while doing rate matching so that one byte could be tested to be a filler while it is not.
So this commit changes the way to test filler bits.
Instead of relying on NR_NULL, bit selection now relies on the offset and size of filler bits.
3. nr_ulsch_coding: missing filling f with zeros
The array `f` of the UE UL HARQ process was not filled with zeros between transmissions.
This is a problem if the encoder does not properly overwrite its output.
In order to avoid such situation, this commit adds a memset to fill `f` with zeros before passing it to the encoder.
4. nrLDPC_coding_segment_encoder: missing init of f to zeros
In the encoder, `f` is not filled with zeros before being used.
`f` is instead somehow filled with arbitrary values.
When writing to `output` by 64 bit vectors, some arbitrary bits may be added after the segment.
Then the arbitrary added ones are not overwritten when writing the next segment because of writing with a logical or.
This commit properly fills `f` and `f2` with zeros.
5. nr_ulschsim & nr_dlschsim: Adapt modulation to new encoder output
The QPSK symbols that are feed to the channel model of nr_dlschsim were determined based on the bytes of the encoder output.
With the new output of the encoder, it had to be reworked to determine the QPSK symbols based on the bits of the encoder output.
1. 3GPP Rate-matching/interleaving on 8-segment blocks, deinterleaving at output of multi-segment processing.
2. Bit-packing done in nrLDPC_coding_segment_encoder.c now instead of nr_scrambling.
Interestingly, it improves performance significantly too.
Tested for AVX512 only for now.
The idea is to make LDPC iteration accounting more standard from a C coding perspective by making two changes:
1. Now the iteration counter starts at 0 for the first iteration and goes up to max_ldpc_iterations - 1 for the last iteration.
If it is equal to max_ldpc_iterations, it means that decoding failed.
2. A chain of useless returns in the UE DLSCH decoding call chain was removed.
fix(nrLDPC_coding): timers in DL encoding, fix(ldpctest): Confusion in sizes
Main improvements:
1. fix(ldpctest): Confusion in sizes
IMPORTANT: This fix makes that ldpctest now works with BG2 and K' != K!
(Worth double checking with more cases than I did check with though)
The variable block_length had an ambiguous role and was used as both K and
Kprime. This was leading to arrays with wrong sizes and functions with wrong
arguments. Now there is not anymore block_length but K and Kprime.
Kprime can be set with the command line argument -l.
There was also some problems with array allocation for segments with length
not divisible by 8. A proper sizing with ((size_in_bits + 7) & ~7) / 8 was
used.
A proper masking of the last byte containing payload bits was also added to
keep filler bits to 0 after random initialization.
2. fix(nrLDPC_coding): timers in DL encoding
While timers were available for rate matching and interleaving in the new
interface, these timers were not merged to rate matching and interleaving
timers in nr_dlsch_coding.
The name ldpc8blocks_coding_segment was previously used to avoid any confusion with ldpc8blocks while both were coexisting.
They are not anymore coexisting so it can now be shortened.
Robert Schmidt