Remove old CUDA LDPC implementation
A new implementation is under way in !3955. To simplify the MR, remove the old
LDPC CUDA implementation in a first step.
mac: fixes to prevent prb overlapping
- this patch fixes a bug in the MAC where the scheduled PRB resources can
overlap
- at the same time, we try to enforce the same semantics for "rbStart" (which
should be relative to the BWP) across the code as much as possible
Introduce new data structures to track the average SNR and RSSI, and
that allow to dynamically modify the target SNR (per UE) as well as
continuously get TPC updates based on the average SNR. The target SNR is
per power control loop (which a future commit will extend to use for
PUCCH).
Concretely, it maintains an average of measured SNR and RSSI. It also
updates "tpc_in_flight", which tracks TPC changes that don't show up in
the average yet. For instance, imagine that the target SNR of 15 changes
to 20. Three successive TPC commands need to be sent (+3, +1, +1), but
it will take time to show up in the average SNR. To account for this,
tpc_in_flight is updated by the TPCs sent, and an average will make it
go down back to zero at the same pace as the average SNR approaches the
target SNR. The sum of average SNR and tpc_in_flight sums up to the
actual, current SNR, which approximates the target SNR.
The SNR is kept within -1<=targetSNR<=+2dB to avoid too many TPC
changes.
The current average SNR (sum of average SNR and tpc_in_flight) is used
to continuously get TPC updates, taking into account recent TPCs sent,
the difference to target SNR, and RSSI.
If there is DTX, tpc_in_flight is modified to artificially introduce TPC
commands which increase the currently used SNR of the UE. This is
temporary, as tpc_in_flight eventually will go back to zero. If the DTX
was due to sudden SNR drop (e.g., higher path loss), this will allow to
quickly adapt the UE's SNR to new conditions.
The periodical logs are extended to not only show the current SNR, but
also the difference from the target for better analysis.
Co-authored-by: Maxime Elkael <m.elkael@northeastern.edu>
The phr_txpower_calc field actually needs to be saved in the HARQ
process for later retrieval, so set sched_pusch after phr_txpower_calc
has been calculated.
UE: update pdcch config only after mib read
- In MR !3929, this change was done to call update_pdcch_config if mac
configuration is changed.
- Observed that the issue related to RAR after handover if SSB position changes
occurs also in develop 2026_w10 where MR !3929 is merged.
- update_pdcch_config should be done only after sync obtained.
- this fix is similar to the fix in initial commits of MR !3929
* Option to build ldpc_cuda was remaining in the build script
* Build script option to build ldpc_cuda was still used in CI
* Mentions of ldpc_cuda were remaining in the documentation
Note: In the documentation, the example of ldpctest usage that was
loading ldpc_cuda was replaced by an example in which it is loading
ldpc_orig even though this is pointless as it makes ldpctest compare
ldpc_orig with ldpc_orig. On the other hand, it is the only library
other than the default ldpc that uses the former interface.
Remove OSD, some scripts, oaisim references
The README says:
It is just generating the XML file and it is placing it in
$(OPENAIR_TARGETS)/SIMU/EXAMPLE/OSD/WEBXML/ or http://localhost/xmlfile/
so that the oaisim could pars and run the simulation/emulation
oaisim does not exist anymore, and corresponding simulation cannot be done.
Also, it requires XAMPP and similar technologies, that I think nobody uses
in the context of OAI.
Remove also most references to oaisim.
Remove some scripts that are likely not used by anybody, or straight useless.
Integration `2026.w12`
* !3985 Fix XNAP to avoid recompilation and unnecessary includes
* !3724 Better c style pss sss
* !3972 Resolve "Demote AssertFatal `PUCCH list is full` message to a warning"
* !3956 [FHI72] [xran F] Revert and simplify the code for Liteon FR2 interoperability
* !3970 Fix for NTN phy-test mode
* !3987 T: minor: remove target record_db from automatic building
* !3993 UE: Derive Serving Network Name from SIB1 PLMN
* !3997 vrtsim doc: clarify container requirements
* !3935 [FHI72] Fix long PRACH format
* !3998 Set rxgain to 0 in vrtsim
* !3964 CI: Add FHI7.2 phytest pipeline
* !4001 Remove unused ci-scripts/mysql4testresults/ dir and content
* !3999 bugfix: use proper pointer
* !3986 handle start symbol on non-zeroth downlink symbol for SIB1 for multiplexing pattern 3 configuration.
* !3957 replace static allocation of max antennas in a dynamic structure for gnb rach
* !3859 Delay compensation in SRS
* !3909 Adjust ssPBCH_BlockPower in FHI7.2 configs
Closes#1058
See merge request oai/openairinterface5g!3989
Adjust ssPBCH_BlockPower in FHI7.2 configs
ssPBCH_BlockPower is the average EPRE of the resources elements that carry
secondary synchronization signals in dBm. In OAI, the SSB is the same level
as all the rest, so we can compute ssPBCH_BlockPower from RU TX power and
bandwidth using:
ssPBCH_BlockPower = P_TX(dBm) − 10 x log10(N_RB x 12)
where:
- P_TX is the RU transmit power
- 24 dBm for indoor RUs (configurable on the RU)
- 35 dBm for outdoor RUs (configurable on the RU)
- N_RB is the number of resource blocks for the configured bandwidth
- 12 corresponds to the number of subcarriers per RB
replace static allocation of max antennas in a dynamic structure for gnb rach
NB_ANTENNAS_RX was used in 5G by mistake
there was also a error in O-RU implementation, with no consequences
(index not in right order)
Meson configuration was configuring a wrong maximum number of lcores on
the Arm platforms we are using (Neoverse V2 & NVIDIA Grace) as no
configuration is provided for these platforms with DPDK 20.11.9.
This commit solves this issue by requesting meson to use a generic
config that sets a high maximum number of lcores.
handle start symbol on non-zeroth downlink symbol for SIB1 for multiplexing
pattern 3 configuration.
This MR adds support for handling a non-zero start symbol for SIB1 when using
multiplexing pattern 3 with the per-slot CP format.
Previously, the implementation assumed that the first downlink symbol used by
a PDU always starts at symbol 0. However, this assumption does not hold for
SIB1 under multiplexing pattern 3, where the start symbol can be non-zero.
This issue does not apply to the per-symbol CP format.
Testing:
a. Microamp using the branch microamp_1048: UE registration ok. end-to-end ok.
b. Benetel: UE registration ok. end-to-end ok.
xran needs to be informed about the cores to use for packet processing.
Prior to this change, we only filled the first 64bits, but it can go up
to 128 in xran. Change the helper accordingly to support all.
The README says:
> It is just generating the XML file and it is placing it in
> $(OPENAIR_TARGETS)/SIMU/EXAMPLE/OSD/WEBXML/ or http://localhost/xmlfile/
> so that the oaisim could pars and run the simulation/emulation
oaisim does not exist anymore, and corresponding simulation cannot be
done. Also, it requires XAMPP and similar technologies, that I think
nobody uses in the context of OAI.
PTRS phase error is estimated in each symbol and should be compesation in the
last symbol. So far nr_dlsch_llr() used rxdataF_comp before PTRS phase
correction for all symbol except the last one. This commit fixes it by calling
nr_dlsch_llr() for all symbols after rxdataF_comp is compensated for PTRS phase
error. To do so, dl_ch_mag arrays are moved out of nr_rx_pdsch() to hold values
of all symbols.
put symbol index as first dimension. It is necessary because the offset for
the buffer to start of a symbol can be arbitrary and hence not aligned to 32
byte boundary. Having each symbol in a separate dimension ensures alignment.
CI: Add FHI7.2 phytest pipeline
This MR consists of multiple changes related to FHI7.2 setups in CI.
- remove unused fhi72 configurations in CI
- introduce dpdk-init service in fhi72 deployments to setup sriov on the machine
- update phytest fhi72 configurations for running on bulbul
- add phytest fhi72 to RAN-SA-FHI72-CN5G pipeline
fatich