The existing code prevents double initialization if e.g., both gNB&UE
call these functions (like in a simulator). However, in the case of a
double-initialization such as stopping and re-starting the L1, the
memory will be freed, but not freed again. Basically, this works:
generate()
generate() # not initialized again
but this leads to problems:
generate()
free()
generate() # not initialized again, but should be!
Reimplement the check based on the data to be initialized, such that an
intermediate free() will be handled properly.
Add gold sequence cache with dynamic size, private to each thread. It
periodically reorders by call rate. To free the gold sequences after end
of life time of a thread, use the pthread API.
Changed Info to Debug because the logs are too much if large number of
GSCN scans run concurrently. Print PSS correlation peak and average
power of detected cells.
Till this commit, the UE gets the position of SSB in frequency from
command line and does the syncronization by locating the SSB in time. It
does this by generating a PSS time signal during initialization with the
SSB offset given via command line. Then PSS detection is done by
correlation.
In this commit, the UE computes a list of GSCN in the current NR band
that falls within the current bandwidth for the set center frequency.
For each GSCN in the list, the UE starts a thread and performs the
following:
1. Generate PSS time signal with SSB offset for current GSCN.
2. Detect PSS, SSS and decode PBCH (this step remains the same).
After all threads finishes, the results are collected.
For now, only the first detected PBCH is used to proceed further. So
this PBCH is indicated to MAC and UE exits initial sync.
Future work: The cell search can be standalone feature where the UE
could scan for SSB in the entire NR band. This would require changing
radio's frequency on the fly as the UE's bandwidth would not cover an
entire NR band. The cell detection can futher be imporved by looking
for SIB1 for each decoded PBCH.
Testing on Neoverse N1 (Ampere 3GHz). Tested only on a subset of phy-simulators.
- Changes:
- use SIMDE consistently
- adaptations of LDPC decoder generator for ARMv8 performance
- SIMDe modifications of Intel CRC to allow for aarch64 build.
optimizations for 128-bit to improve performance of LDPC encode/decode
on aarch64 (Neoverse 1)
- added BG2 files for 128-bit ldpc encoder (aarch64)
- testing on Xeon
- testing on x86
- minor changes to build/run on x86
- change in crc.h after returning to aarch64
- removed some warning in ldpc decoder generator for x86_64
- char
- Delete irrelevant constants
- Correctly declare variables
- Define stdbool for all architectures
- Remove definition of _MM_SHUFFLE and use SIMDE_MM_SHUFFLE
- Remove commented code
- Fix CMakeLists.txt
- Include SIMDE avx2 functions in tools_defs.h
Implement the #define variables required for synchronization: These
variables include offset and payload size values that vary from the Uu
interface, in relation to the PSS, SSS and PBCH elements. We also
introduce the new sl_mode command line flag, which is used to switch
between the Uu interface and SL interface. This will allow us to modify
exisitng PSS and SSS functions, without copying complete 5G functions
and only changing a few lines to support sidelink mode.
Fixing formatting for softmodem-common.h