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Author SHA1 Message Date
Robert Schmidt 318c4e0fd7 Skip DL HARQ feedbacks if the timing does not match 
As the precedent commit, this commit deals with the realtime problems
that we currently have on the CI bench.

For DL HARQ feedback, nFAPI does not give us the HARQ process ID.
Instead, we have to figure this out "from timing", i.e., if we trigger
PUCCH reception, we will get a message with HARQ if we instructed the
PHY to do so. If we have real-time problems, it seems (I cannot verify:
don't have real time problems) that we do not get the nFAPI message with
HARQ feedback. Thus, we need to skip the HARQ processes that should have
been processed in the past, which happens in this commit.
 2021-02-07 10:45:57 +01:00
Robert Schmidt f23890e0b9 Search correct UL HARQ, don't assert on late slot 
At the time of this commit, the CI has realtime issues. This can mean
that the HARQ result is delivered in a delayed fashion. Before this
commit, we were asserting on whether the slot corresponds to the HARQ
process's expected feedback slot, but a particular feedback might be
delayed under realtime issues, and we actually don't care about the
timing since we get the HARQ process ID.

Instead, we loop through the HARQ processes for which we wait for a
feedback in the beginning until we have the right process (which did not
seem to cause a problem till now, but who knows.
 2021-02-07 10:45:57 +01:00
Robert Schmidt 423a0e4afe Handle UL HARQ slot wrap around for slot = 0 2021-02-07 10:45:57 +01:00
Robert Schmidt 8bd3ec7602 Fix whitespace issues (review request) 2021-02-07 10:45:57 +01:00
Robert Schmidt 71fd526e12 Remove unused variables 2021-02-07 10:45:57 +01:00
Robert Schmidt 30d13ebf6d Lower various log levels 2021-02-07 10:45:57 +01:00
Robert Schmidt 77203ee989 Fix nr_dlschsim unitary simulator 2021-02-07 10:45:57 +01:00
ChiehChun a8cc08ace5 Cannot allocate CCE error -> debug message 2021-02-07 10:45:57 +01:00
ChiehChun 8a823d22cf Better format dump_mac_stats() 2021-02-07 10:45:57 +01:00
ChiehChun c51cb3f40b Enable 2 UL slots 2021-02-07 10:45:57 +01:00
Robert Schmidt dcd591bd2b Schedule BSR0 UE only one at a time, in round-robin 2021-02-07 10:45:57 +01:00
Robert Schmidt 3b972f6766 ULSCH fix: Only allocate CCEs when necessary 2021-02-07 10:45:57 +01:00
Robert Schmidt 77de70c82f Calculate TBS for coefficient only when needed 2021-02-07 10:45:57 +01:00
ChiehChun 8bf2d1a12f Remove assert of allocate CSI PUCCH 2021-02-07 10:45:57 +01:00
ChiehChun fde6c46ef1 Remove assertion for single UE 2021-02-07 10:45:57 +01:00
Robert Schmidt 6294ce715e Reorder pf_ul to process retransmission 2021-02-07 10:45:57 +01:00
ChiehChun 14614d74cf Find max coeff & Decrease n_rb_sched 2021-02-07 10:45:57 +01:00
ChiehChun 56831038d0 Check BSR & Create UE_sched for UL new transmission 2021-02-07 10:39:40 +01:00
Robert Schmidt c8168085dd Calculate UL coefficient 2021-02-07 10:39:40 +01:00
ChiehChun 1b1411727c Calculate UL throughput & Initial ulsch_current_bytes 2021-02-07 10:39:40 +01:00
ChiehChun cf725a1801 Create find_CCE in primitive 2021-02-07 10:39:40 +01:00
ChiehChun bec348405b Find the largest contiguos region 2021-02-07 10:39:40 +01:00
ChiehChun 8f988e384d Add pf_ul & pseudo code 2021-02-07 10:39:40 +01:00
ChiehChun 5573b8e18c Change vrb_map_UL to rballoc_mask 2021-02-07 10:39:40 +01:00
ChiehChun 2becbb9210 Verify the same K2 2021-02-07 10:39:40 +01:00
ChiehChun 7da43c95d2 Change pre_precessor_ul type to bool 
- To check the current slot is the scheduled slot(UL slot - K2) and
  only execute the post processor in scheduled slot.
 2021-02-07 10:39:40 +01:00
ChiehChun 0234015f8e Check slot is DL slot to pre-schedule UL data 2021-02-07 10:39:40 +01:00
ChiehChun 2283e12560 Calculate rbSize from estimated buffer 2021-02-07 10:39:40 +01:00
ChiehChun c7ffd5740f Add sched_ul_bytes/ulsch_current_bytes & Update in rx_sdu/schedule_ulsch 2021-02-07 10:39:40 +01:00
ChiehChun 4d0a2e4877 Save selected UL HARQ PID in post-processor 2021-02-07 10:39:40 +01:00
Robert Schmidt 4b1be522a5 Add estimated_ul_buffer & Update in DTCH 2021-02-07 10:39:40 +01:00
ChiehChun 989aade7b8 Log lcid default case & pirntout MAC PDU 2021-02-07 10:39:40 +01:00
ChiehChun 21e9339427 Add short/long BSR Table & Log the BSR value 2021-02-07 10:39:40 +01:00
ChiehChun c316f2fc57 Correct bit ordering in struct NR_BSR_LONG 2021-02-07 10:39:40 +01:00
ChiehChun a95346d169 Modify the case of truncated BSR 2021-02-07 10:39:40 +01:00
ChiehChun 1ff770ff20 Add CE & BSR pointer 2021-02-07 10:39:40 +01:00
ChiehChun 2b6a651aae Fix LCID of CRNTI for nr UE 2021-02-07 10:39:40 +01:00
ChiehChun 5e226b9e22 Remove assertion for single UE 2021-02-07 10:39:40 +01:00
ChiehChun 3bb4bddc0d Allocate DL new transmission 2021-02-07 10:39:40 +01:00
ChiehChun a7cb83889a Find max coeff from UE_sched 2021-02-07 10:39:40 +01:00
ChiehChun 6d5634b8ce Check DL buf and Calculate the coeff to create UE_sched 2021-02-07 10:39:40 +01:00
ChiehChun a3cc9f730b Add dlsch_current_bytes and Calculate throughput 2021-02-07 10:39:40 +01:00
ChiehChun 0dd0f5ce4a Create function for find CCE and retransmission 2021-02-07 10:39:40 +01:00
ChiehChun 13da3d6e8a Create nr_store_dlsch_buffer() 2021-02-07 10:39:40 +01:00
ChiehChun 68b03e9cb6 Create pf_dl function 2021-02-07 10:39:40 +01:00
ChiehChun 3b4ec2c82b Change vrb_map to rballoc_mask 2021-02-07 10:39:40 +01:00
ChiehChun 6c3897d4a7 Save selected DL HARQ PID in post-processor 2021-02-07 10:39:40 +01:00
ChiehChun 9fb45867a1 Initial num_pdcch_cand for multi-UE 2021-02-07 10:39:40 +01:00
Robert Schmidt 75dbf5fa4d Don't log retransmissions explicitly 2021-02-07 10:39:40 +01:00
Raymond Knopp 0496c15d27 Remove PHY HARQ round_trials logs 2021-02-07 10:39:40 +01:00