665 lines
30 KiB
C
665 lines
30 KiB
C
/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
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* the OAI Public License, Version 1.1 (the "License"); you may not use this file
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* except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.openairinterface.org/?page_id=698
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
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* contact@openairinterface.org
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*/
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/*! \file dci_nr.c
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* \brief Implements PDCCH physical channel TX/RX procedures (36.211) and DCI encoding/decoding (36.212/36.213). Current LTE
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* compliance V8.6 2009-03. \author R. Knopp, A. Mico Pereperez \date 2018 \version 0.1 \company Eurecom \email: knopp@eurecom.fr
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* \note
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* \warning
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "executables/softmodem-common.h"
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#include "nr_transport_proto_ue.h"
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#include "PHY/CODING/nrPolar_tools/nr_polar_dci_defs.h"
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#include "PHY/phy_extern.h"
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#include "PHY/CODING/coding_extern.h"
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#include "PHY/nr_phy_common/inc/nr_phy_common.h"
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#include "PHY/sse_intrin.h"
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#include "common/utils/nr/nr_common.h"
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#include <openair1/PHY/TOOLS/phy_scope_interface.h>
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#include "openair1/PHY/NR_REFSIG/refsig_defs_ue.h"
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#include "PHY/NR_UE_ESTIMATION/nr_estimation.h"
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#include "assertions.h"
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#include "T.h"
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// #define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
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#ifdef NR_PDCCH_DCI_DEBUG
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#define LOG_DDD(a, ...) printf("<-NR_PDCCH_DCI_DEBUG (%s)-> " a, __func__, ##__VA_ARGS__ )
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#define LOG_DSYMB(b) \
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LOG_DDD("RB[c_rb %d] \t RE[re %d] => rxF_ext[%d]=(%d,%d)\t rxF[%d]=(%d,%d)\n" b, \
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c_rb, \
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i, \
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j, \
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rxF_ext[j].r, \
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rxF_ext[j].i, \
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i, \
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rxF[i].r, \
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rxF[i].i)
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#else
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#define LOG_DDD(a...)
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#define LOG_DSYMB(a...)
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#endif
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#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
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#define NR_NBR_SEARCHSPACE_ACT_BWP \
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10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
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#define RE_PER_RB 12
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// after removing the 3 DMRS RE, the RB contains 9 RE with PDCCH
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#define RE_PER_RB_OUT_DMRS 9
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static void nr_pdcch_demapping_deinterleaving(uint32_t coreset_nbr_rb,
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c16_t *llr,
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c16_t *e_rx,
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uint8_t coreset_time_dur,
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uint8_t reg_bundle_size_L_in,
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uint8_t coreset_interleaver_size_R,
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uint8_t n_shift,
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uint8_t number_of_candidates,
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uint16_t *CCE,
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uint8_t *L,
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int llr_stride_per_symbol)
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{
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/*
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* This function will do demapping and deinterleaving from llr containing demodulated symbols
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* Demapping will regroup in REG and bundles
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* Deinterleaving will order the bundles
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*
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* In the following example we can see the process. The llr contains the demodulated IQs, but they are not ordered from
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REG 0,1,2,..
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* In e_rx (z) we will order the REG ids and group them into bundles.
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* Then we will put the bundles in the correct order as indicated in subclause 7.3.2.2
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*
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llr --------------------------> e_rx (z) ----> e_rx (z)
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| ...
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| ...
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| REG 26
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symbol 2 | ...
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| ...
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| REG 5
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| REG 2
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| ...
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| ...
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| REG 25
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symbol 1 | ...
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| ...
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| REG 4
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| REG 1
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| ...
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| ... ... ...
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| REG 24 (bundle 7) ... ...
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symbol 0 | ... bundle 3 bundle 6
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| ... bundle 2 bundle 1
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| REG 3 bundle 1 bundle 7
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| REG 0 (bundle 0) bundle 0 bundle 0
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*/
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const int N_regs = coreset_nbr_rb * coreset_time_dur;
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/* interleaving will be done only if reg_bundle_size_L != 0 */
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const int coreset_C = (reg_bundle_size_L_in != 0) ? (uint32_t)(N_regs / (coreset_interleaver_size_R * reg_bundle_size_L_in)) : 0;
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const int coreset_interleaved = (reg_bundle_size_L_in != 0) ? 1 : 0;
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const int reg_bundle_size_L = (reg_bundle_size_L_in != 0) ? reg_bundle_size_L_in : 6;
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int B_rb = reg_bundle_size_L / coreset_time_dur; // nb of RBs occupied by each REG bundle
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int num_bundles_per_cce = 6 / reg_bundle_size_L;
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int n_cce = N_regs / 6;
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int max_bundles = n_cce * num_bundles_per_cce;
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int f_bundle_j_list[max_bundles];
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// for each bundle
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int c = 0, r = 0, f_bundle_j = 0;
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for (int nb = 0; nb < max_bundles; nb++) {
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if (coreset_interleaved == 0)
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f_bundle_j = nb;
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else {
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if (r == coreset_interleaver_size_R) {
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r = 0;
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c++;
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}
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f_bundle_j = ((r * coreset_C) + c + n_shift) % (N_regs / reg_bundle_size_L);
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r++;
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}
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f_bundle_j_list[nb] = f_bundle_j;
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}
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// Get cce_list indices by bundle index in ascending order
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int f_bundle_j_list_ord[number_of_candidates][max_bundles];
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for (int c_id = 0; c_id < number_of_candidates; c_id++) {
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int start_bund_cand = CCE[c_id] * num_bundles_per_cce;
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int max_bund_per_cand = L[c_id] * num_bundles_per_cce;
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int f_bundle_j_list_id = 0;
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for (int nb = 0; nb < max_bundles; nb++) {
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for (int bund_cand = start_bund_cand; bund_cand < start_bund_cand + max_bund_per_cand; bund_cand++) {
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if (f_bundle_j_list[bund_cand] == nb) {
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f_bundle_j_list_ord[c_id][f_bundle_j_list_id] = nb;
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f_bundle_j_list_id++;
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}
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}
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}
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}
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int rb_count = 0;
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for (int c_id = 0; c_id < number_of_candidates; c_id++) {
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for (int symbol_idx = 0; symbol_idx < coreset_time_dur; symbol_idx++) {
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for (int cce_count = 0; cce_count < L[c_id]; cce_count++) {
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for (int k = 0; k < NR_NB_REG_PER_CCE / reg_bundle_size_L; k++) { // loop over REG bundles
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int f = f_bundle_j_list_ord[c_id][k + NR_NB_REG_PER_CCE * cce_count / reg_bundle_size_L];
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c16_t *in = llr + f * B_rb * RE_PER_RB_OUT_DMRS + symbol_idx * llr_stride_per_symbol;
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// loop over the RBs of the bundle
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memcpy(e_rx + RE_PER_RB_OUT_DMRS * rb_count, in, B_rb * RE_PER_RB_OUT_DMRS * sizeof(*e_rx));
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rb_count += B_rb;
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}
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}
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}
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}
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}
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static void nr_pdcch_llr(uint32_t sz, c16_t *rxF, c16_t *llr)
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{
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for (int i = 0; i < sz; i++) {
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// We clip the signal
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c16_t res;
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res.r = min(rxF->r, 31);
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res.r = max(-32, res.r);
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res.i = min(rxF->i, 31);
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res.i = max(-32, res.i);
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*llr++ = res;
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LOG_DDD("llr logs: rb=%d i=%d rxF:%d,%d => pdcch_llr:%d,%d\n", i / 18, i, rxF->r, rxF->i, llr->r, llr->i);
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rxF++;
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}
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}
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// This function will extract the mapped DM-RS PDCCH REs as per 38.211 Section 7.4.1.3.2 (Mapping to physical resources)
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static void nr_pdcch_extract_rbs_single(uint32_t rxdataF_sz,
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c16_t rxdataF[][rxdataF_sz],
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int32_t est_size,
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c16_t dl_ch_estimates[][est_size],
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int arraySz,
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c16_t rxdataF_ext[][arraySz],
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c16_t dl_ch_estimates_ext[][arraySz],
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NR_DL_FRAME_PARMS *frame_parms,
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uint8_t *coreset_freq_dom,
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uint32_t rb_offset,
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uint32_t coreset_nbr_rb,
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uint32_t n_BWP_start)
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{
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/*
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* This function is demapping DM-RS PDCCH RE
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* Implementing 38.211 Section 7.4.1.3.2 Mapping to physical resources
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* PDCCH DM-RS signals are mapped on RE a_k_l where:
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* k = 12*n + 4*kprime + 1
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* n=0,1,..
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* kprime=0,1,2
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* According to this equations, DM-RS PDCCH are mapped on k where k%12==1 || k%12==5 || k%12==9
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*
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*/
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for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
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c16_t *dl_ch0 = dl_ch_estimates[aarx];
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c16_t *rxFbase = rxdataF[aarx];
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LOG_DDD("dl_ch0 = &dl_ch_estimates[aarx = (%d)][0]\n", aarx);
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c16_t *dl_ch0_ext = dl_ch_estimates_ext[aarx];
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c16_t *rxF_ext = rxdataF_ext[aarx];
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/*
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* The following for loop handles treatment of PDCCH contained in table rxdataF (in frequency domain)
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* In NR the PDCCH IQ symbols are contained within RBs in the CORESET defined by higher layers which is located within the BWP
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* Lets consider that the first RB to be considered as part of the CORESET and part of the PDCCH is n_BWP_start
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* Several cases have to be handled differently as IQ symbols are situated in different parts of rxdataF:
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* 1. Number of RBs in the system bandwidth is even
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* 1.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
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* 1.2 The RB is >= than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0)
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* 2. Number of RBs in the system bandwidth is odd
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* (particular case when the RB with DC as it is treated differently: it is situated in symbol borders of rxdataF)
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* 2.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
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* 2.2 The RB is > than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0 + 2nd half RB
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* containing DC) 2.3 The RB is == N_RB_DL/2 -> IQ symbols are in the upper border of the rxdataF for first 6 IQ
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* element and the lower border of the rxdataF for the last 6 IQ elements If the first RB containing PDCCH within the UE BWP
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* and within the CORESET is higher than half of the system bandwidth (N_RB_DL), then the IQ symbol is going to be found at
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* the position 0+c_rb-N_RB_DL/2 in rxdataF and we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF
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*/
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c16_t middle_prb_buffer[RE_PER_RB];
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for (int rb_group = 0; rb_group < coreset_nbr_rb / 6; rb_group++) {
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if ((coreset_freq_dom[rb_group / 8] & (1 << (7 - (rb_group & 7)))) == 0) {
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continue;
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}
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for (int rb = 0; rb < 6; rb++) {
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int c_rb = rb_group * 6 + rb + rb_offset;
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c16_t *rxF = NULL;
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if ((frame_parms->N_RB_DL & 1) == 0) {
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if ((c_rb + n_BWP_start) < frame_parms->N_RB_DL / 2)
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// if RB to be treated is lower than middle system bandwidth then rxdataF pointed
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// at (offset + c_br + symbol * ofdm_symbol_size): even case
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rxF = rxFbase + frame_parms->first_carrier_offset + RE_PER_RB * (c_rb + n_BWP_start);
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else
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// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
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// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
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// we point at the 1st part of the rxdataF in symbol
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rxF = rxFbase + RE_PER_RB * (c_rb + n_BWP_start - frame_parms->N_RB_DL / 2);
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} else {
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if ((c_rb + n_BWP_start) <= frame_parms->N_RB_DL / 2)
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// if RB to be treated is lower than middle system bandwidth then rxdataF pointed
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// at (offset + c_br + symbol * ofdm_symbol_size): odd case
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// Reassemble the middle PRB
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if (c_rb + n_BWP_start == frame_parms->N_RB_DL / 2) {
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memcpy(middle_prb_buffer, rxFbase + frame_parms->ofdm_symbol_size - RE_PER_RB / 2, sizeof(c16_t) * RE_PER_RB / 2);
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memcpy(middle_prb_buffer + RE_PER_RB / 2, rxFbase, sizeof(c16_t) * RE_PER_RB / 2);
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rxF = middle_prb_buffer;
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} else {
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rxF = rxFbase + frame_parms->first_carrier_offset + RE_PER_RB * (c_rb + n_BWP_start);
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}
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else
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// number of RBs is odd and c_rb is higher than half system bandwidth + 1
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// if these conditions are true the pointer has to be situated at the 1st part of
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// the rxdataF just after the first IQ symbols of the RB containing DC
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// we point at the 1st part of the rxdataF in symbol
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rxF = rxFbase + RE_PER_RB * (c_rb + n_BWP_start - frame_parms->N_RB_DL / 2) - 6;
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}
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const int valid_re[RE_PER_RB_OUT_DMRS] = {0, 2, 3, 4, 6, 7, 8, 10, 11};
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for (int i = 0; i < sizeofArray(valid_re); i++) {
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*rxF_ext++ = rxF[valid_re[i]];
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*dl_ch0_ext++ = dl_ch0[valid_re[i]];
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}
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dl_ch0 += RE_PER_RB;
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}
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}
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}
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}
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static void nr_pdcch_channel_compensation(int arraySz,
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int sz2,
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c16_t rxdataF_ext[][sz2],
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c16_t dl_ch_estimates_ext[][sz2],
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c16_t rxdataF_comp[][arraySz],
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int antRx,
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uint8_t output_shift)
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{
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for (int aarx = 0; aarx < antRx; aarx++) {
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// multiply by conjugated channel, this function require size in _m128i, else it doesn't process all samples
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mult_cpx_conj_vector(dl_ch_estimates_ext[aarx], rxdataF_ext[aarx], rxdataF_comp[aarx], arraySz, output_shift);
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}
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}
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static void nr_pdcch_detection_mrc(int nb_ant, int sz, c16_t rxdataF_comp[][sz])
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{
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c16_t *rx0 = rxdataF_comp[0];
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// MRC on each re of rb
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// input always aligned and accepting tail padding to process all actual samples
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for (int a = 1; a < nb_ant; a++) {
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c16_t *rx = rxdataF_comp[a];
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for (int i = 0; i < sz; i += 4) {
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*(simde__m128i *)(rx0 + i) = simde_mm_adds_epi16(simde_mm_srai_epi16(*(simde__m128i *)(rx0 + i), 1),
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simde_mm_srai_epi16(*(simde__m128i *)(rx + i), 1));
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}
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}
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}
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/* Produce LLRs from received PDCCH signal */
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static void nr_rx_pdcch_symbol(PHY_VARS_NR_UE *ue,
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const UE_nr_rxtx_proc_t *proc,
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int symbol,
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int rel_symb_monOcc,
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int ss_idx,
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nr_phy_data_t *phy_data,
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int llr_size_symbol,
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c16_t rxdataF[ue->frame_parms.nb_antennas_rx][ue->frame_parms.ofdm_symbol_size],
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c16_t llr[llr_size_symbol])
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{
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NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
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NR_UE_PDCCH_CONFIG *phy_pdcch_config = &phy_data->phy_pdcch_config;
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fapi_nr_coreset_t *coreset = &phy_pdcch_config->pdcch_config[ss_idx].coreset;
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int32_t pdcch_est_size = ceil_mod(fp->ofdm_symbol_size + LTE_CE_FILTER_LENGTH, 16);
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__attribute__((aligned(16))) c16_t pdcch_dl_ch_estimates[fp->nb_antennas_rx][pdcch_est_size];
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int n_rb, cset_start;
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get_coreset_rballoc(coreset->frequency_domain_resource, &n_rb, &cset_start);
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int rb_offset = cset_start + coreset->rb_offset;
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unsigned short scrambling_id = coreset->pdcch_dmrs_scrambling_id;
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int dmrs_ref = 0;
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if (coreset->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
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dmrs_ref = phy_pdcch_config->pdcch_config[ss_idx].BWPStart;
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// generate pilot
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c16_t pilot[(n_rb + dmrs_ref) * 3] __attribute__((aligned(16)));
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// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
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const uint32_t *gold =
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nr_gold_pdcch(ue->frame_parms.N_RB_DL, ue->frame_parms.symbols_per_slot, scrambling_id, proc->nr_slot_rx, symbol);
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nr_pdcch_dmrs_ref(gold, pilot, n_rb + dmrs_ref);
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nr_pdcch_channel_estimation(ue,
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n_rb,
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rb_offset,
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dmrs_ref,
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fp->first_carrier_offset,
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phy_pdcch_config->pdcch_config[ss_idx].BWPStart,
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pdcch_est_size,
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pdcch_dl_ch_estimates,
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rxdataF,
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pilot);
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const int32_t rx_size = ceil_mod(fp->N_RB_DL * 12, 32);
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__attribute__((aligned(32))) c16_t rxdataF_ext[fp->nb_antennas_rx][rx_size];
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__attribute__((aligned(32))) c16_t pdcch_dl_ch_estimates_ext[fp->nb_antennas_rx][rx_size];
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nr_pdcch_extract_rbs_single(ue->frame_parms.ofdm_symbol_size,
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rxdataF,
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pdcch_est_size,
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pdcch_dl_ch_estimates,
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rx_size,
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rxdataF_ext,
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|
pdcch_dl_ch_estimates_ext,
|
|
fp,
|
|
coreset->frequency_domain_resource,
|
|
coreset->rb_offset,
|
|
n_rb,
|
|
phy_pdcch_config->pdcch_config[ss_idx].BWPStart);
|
|
|
|
LOG_D(NR_PHY_DCI, "in channel level function (dl_ch_estimates_ext -> dl_ch_estimates_ext)\n");
|
|
int avg[fp->nb_antennas_rx];
|
|
nr_channel_level(0, rx_size, pdcch_dl_ch_estimates_ext, fp->nb_antennas_rx, 1, avg, n_rb * RE_PER_RB_OUT_DMRS);
|
|
int avgs = avg[0];
|
|
for (int i = 1; i < fp->nb_antennas_rx; i++)
|
|
avgs = cmax(avgs, avg[i]);
|
|
const int log2_maxh = (log2_approx(avgs) / 2) + 5; //+frame_parms->nb_antennas_rx;
|
|
int rx_comp_sz = ceil_mod(llr_size_symbol, 4);
|
|
__attribute__((aligned(32))) c16_t rxdataF_comp[fp->nb_antennas_rx][rx_comp_sz];
|
|
memset(rxdataF_comp, 0, sizeof(rxdataF_comp));
|
|
nr_pdcch_channel_compensation(rx_comp_sz,
|
|
rx_size,
|
|
rxdataF_ext,
|
|
pdcch_dl_ch_estimates_ext,
|
|
rxdataF_comp,
|
|
fp->nb_antennas_rx,
|
|
log2_maxh); // log2_maxh+I0_shift
|
|
|
|
if (fp->nb_antennas_rx > 1) {
|
|
nr_pdcch_detection_mrc(fp->nb_antennas_rx, rx_comp_sz, rxdataF_comp);
|
|
}
|
|
UEscopeCopy(ue, pdcchRxdataF_comp, rxdataF_comp[0], sizeof(c16_t), 1, llr_size_symbol, 0);
|
|
nr_pdcch_llr(llr_size_symbol, rxdataF_comp[0], llr);
|
|
}
|
|
|
|
bool is_start_symbol_in_ss(const fapi_nr_dl_config_dci_dl_pdu_rel15_t *ss, const int symbol)
|
|
{
|
|
return ((ss->coreset.StartSymbolBitmap >> (NR_SYMBOLS_PER_SLOT - 1 - symbol)) & 1);
|
|
}
|
|
|
|
int get_pdcch_mon_occasions_slot(const fapi_nr_dl_config_dci_dl_pdu_rel15_t *ss, uint8_t start_symb[NR_SYMBOLS_PER_SLOT])
|
|
{
|
|
int sum = 0;
|
|
for (int s = 0; s < NR_SYMBOLS_PER_SLOT; s++) {
|
|
if (is_start_symbol_in_ss(ss, s)) {
|
|
if (start_symb != NULL)
|
|
start_symb[sum] = s;
|
|
sum++;
|
|
}
|
|
}
|
|
|
|
return sum;
|
|
}
|
|
|
|
int get_max_pdcch_monOcc(const NR_UE_PDCCH_CONFIG *phy_pdcch_config)
|
|
{
|
|
int monOcc = 0;
|
|
for (int ss = 0; ss < phy_pdcch_config->nb_search_space; ss++) {
|
|
monOcc = max(monOcc, get_pdcch_mon_occasions_slot(&phy_pdcch_config->pdcch_config[ss], NULL));
|
|
}
|
|
return monOcc;
|
|
}
|
|
|
|
static void nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
|
|
const UE_nr_rxtx_proc_t *proc,
|
|
c16_t *pdcch_e_rx,
|
|
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
|
|
fapi_nr_dci_indication_t *dci_ind);
|
|
|
|
void set_first_last_pdcch_symb(const NR_UE_PDCCH_CONFIG *phy_pdcch_config, int *first_symb, int *last_symb)
|
|
{
|
|
*first_symb = NR_SYMBOLS_PER_SLOT; // max first pdcch symbol
|
|
*last_symb = 0; // min last pdcch symbol
|
|
for (int ss = 0; ss < phy_pdcch_config->nb_search_space; ss++) {
|
|
for (int symb = 0; symb < NR_SYMBOLS_PER_SLOT; symb++) {
|
|
if (is_start_symbol_in_ss(&phy_pdcch_config->pdcch_config[ss], symb)) {
|
|
const int duration = phy_pdcch_config->pdcch_config[ss].coreset.duration;
|
|
*first_symb = min(*first_symb, symb);
|
|
*last_symb = max(*last_symb, symb + duration - 1);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Generates PDCCH LLRs from received symbol for each Search-Space */
|
|
void nr_pdcch_generate_llr(PHY_VARS_NR_UE *ue,
|
|
const UE_nr_rxtx_proc_t *proc,
|
|
int symbol,
|
|
nr_phy_data_t *phy_data,
|
|
int llr_size_symbol,
|
|
int num_monitoring_occ,
|
|
int max_symb,
|
|
c16_t rxdataF[ue->frame_parms.nb_antennas_rx][ue->frame_parms.ofdm_symbol_size],
|
|
c16_t pdcch_llr[phy_data->phy_pdcch_config.nb_search_space][num_monitoring_occ][max_symb * llr_size_symbol])
|
|
{
|
|
const NR_UE_PDCCH_CONFIG *phy_pdcch_config = &phy_data->phy_pdcch_config;
|
|
|
|
// Loop over search spaces
|
|
for (int ss_idx = 0; ss_idx < phy_pdcch_config->nb_search_space; ss_idx++) {
|
|
uint8_t start_symb[NR_SYMBOLS_PER_SLOT] = {0};
|
|
const int num_monOcc = get_pdcch_mon_occasions_slot(&phy_pdcch_config->pdcch_config[ss_idx], start_symb);
|
|
// Loop over monitoring occations within the slot in this ss
|
|
for (int occ = 0; occ < num_monOcc; occ++) {
|
|
const int first_symb = start_symb[occ];
|
|
const int last_symb = first_symb + phy_pdcch_config->pdcch_config[ss_idx].coreset.duration;
|
|
// Decode PDCCH and generate LLR for each ss in this OFDM symbol
|
|
if ((symbol >= first_symb) && (symbol < last_symb)) {
|
|
const int rel_symb_monOcc = symbol - first_symb;
|
|
nr_rx_pdcch_symbol(ue,
|
|
proc,
|
|
symbol,
|
|
rel_symb_monOcc,
|
|
ss_idx,
|
|
phy_data,
|
|
llr_size_symbol,
|
|
rxdataF,
|
|
&pdcch_llr[ss_idx][occ][rel_symb_monOcc * llr_size_symbol]);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Decode DCI from LLRs for each Search-Space and send to MAC */
|
|
void nr_pdcch_dci_indication(const UE_nr_rxtx_proc_t *proc,
|
|
int llr_size,
|
|
int max_monOcc,
|
|
PHY_VARS_NR_UE *ue,
|
|
nr_phy_data_t *phy_data,
|
|
c16_t llr[phy_data->phy_pdcch_config.nb_search_space][max_monOcc][llr_size])
|
|
{
|
|
NR_UE_PDCCH_CONFIG *phy_pdcch_config = &phy_data->phy_pdcch_config;
|
|
|
|
nr_downlink_indication_t dl_indication;
|
|
fapi_nr_dci_indication_t dci_ind = {.SFN = proc->frame_rx, .slot = proc->nr_slot_rx};
|
|
|
|
for (int ss_idx = 0; ss_idx < phy_pdcch_config->nb_search_space; ss_idx++) {
|
|
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &phy_pdcch_config->pdcch_config[ss_idx];
|
|
uint8_t unused_start_symb[NR_SYMBOLS_PER_SLOT] = {0};
|
|
const int num_monitoring_occ = get_pdcch_mon_occasions_slot(rel15, unused_start_symb);
|
|
const int llr_stride = llr_size / rel15->coreset.duration;
|
|
int n_rb, cset_start;
|
|
get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &cset_start);
|
|
|
|
for (int m = 0; m < num_monitoring_occ; m++) {
|
|
/// PDCCH/DCI e-sequence (input to rate matching).
|
|
c16_t pdcch_e_rx[NR_MAX_PDCCH_SIZE];
|
|
|
|
nr_pdcch_demapping_deinterleaving(n_rb,
|
|
llr[ss_idx][m],
|
|
pdcch_e_rx,
|
|
rel15->coreset.duration,
|
|
rel15->coreset.RegBundleSize,
|
|
rel15->coreset.InterleaverSize,
|
|
rel15->coreset.ShiftIndex,
|
|
rel15->number_of_candidates,
|
|
rel15->CCE,
|
|
rel15->L,
|
|
llr_stride);
|
|
|
|
nr_dci_decoding_procedure(ue, proc, pdcch_e_rx, rel15, &dci_ind);
|
|
}
|
|
}
|
|
|
|
for (int i = 0; i < dci_ind.number_of_dcis; i++) {
|
|
LOG_D(PHY,
|
|
"Frame.slot: %d.%d: DCI %i of %d total DCIs found --> rnti %x : format %d\n",
|
|
proc->frame_rx,
|
|
proc->nr_slot_rx,
|
|
i + 1,
|
|
dci_ind.number_of_dcis,
|
|
dci_ind.dci_list[i].rnti,
|
|
dci_ind.dci_list[i].dci_format);
|
|
}
|
|
|
|
/* Send to MAC */
|
|
nr_fill_dl_indication(&dl_indication, &dci_ind, NULL, proc, ue, phy_data);
|
|
ue->if_inst->dl_indication(&dl_indication);
|
|
phy_pdcch_config->nb_search_space = 0;
|
|
}
|
|
|
|
static void nr_pdcch_unscrambling(c16_t *e_rx,
|
|
uint16_t scrambling_RNTI,
|
|
uint32_t length,
|
|
uint16_t pdcch_DMRS_scrambling_id,
|
|
int16_t *z2)
|
|
{
|
|
uint32_t rnti = (uint32_t) scrambling_RNTI;
|
|
uint16_t n_id = pdcch_DMRS_scrambling_id;
|
|
uint32_t *seq = gold_cache(((rnti << 16) + n_id) % (1U << 31), length / 32); // this is c_init in 38.211 v15.1.0 Section 7.3.2.3
|
|
LOG_D(NR_PHY_DCI, "PDCCH Unscrambling: scrambling_RNTI %x\n", rnti);
|
|
int16_t *ptr = &e_rx[0].r;
|
|
for (int i = 0; i < length; i++) {
|
|
if (seq[i / 32] & (1UL << (i % 32)))
|
|
z2[i] = -ptr[i];
|
|
else
|
|
z2[i] = ptr[i];
|
|
}
|
|
}
|
|
|
|
static void nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
|
|
const UE_nr_rxtx_proc_t *proc,
|
|
c16_t *pdcch_e_rx,
|
|
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
|
|
fapi_nr_dci_indication_t *dci_ind)
|
|
{
|
|
int e_rx_cand_idx = 0;
|
|
// if DCI for SIB we don't break after finding 1st DCI with that RNTI
|
|
// there might be SIB1 and otherSIB in the same slot with the same length
|
|
bool is_SI = rel15->rnti == SI_RNTI;
|
|
|
|
for (int j = 0; j < rel15->number_of_candidates; j++) {
|
|
int CCEind = rel15->CCE[j];
|
|
int L = rel15->L[j];
|
|
|
|
// Loop over possible DCI lengths
|
|
|
|
for (int k = 0; k < rel15->num_dci_options; k++) {
|
|
// skip this candidate if we've already found one with the
|
|
// same rnti and size at a different aggregation level
|
|
int dci_length = rel15->dci_length_options[k];
|
|
int ind;
|
|
for (ind = 0; ind < dci_ind->number_of_dcis; ind++) {
|
|
if (!is_SI && rel15->rnti == dci_ind->dci_list[ind].rnti && dci_length == dci_ind->dci_list[ind].payloadSize) {
|
|
break;
|
|
}
|
|
}
|
|
if (ind < dci_ind->number_of_dcis)
|
|
continue;
|
|
|
|
uint64_t dci_estimation[2] = {0};
|
|
LOG_D(NR_PHY_DCI,
|
|
"(%i.%i) Trying DCI candidate %d of %d number of candidates, CCE %d (%d), L %d, length %d, format %d\n",
|
|
proc->frame_rx,
|
|
proc->nr_slot_rx,
|
|
j,
|
|
rel15->number_of_candidates,
|
|
CCEind,
|
|
e_rx_cand_idx,
|
|
L,
|
|
dci_length,
|
|
rel15->dci_format_options[k]);
|
|
|
|
int16_t tmp_e[16 * 108];
|
|
nr_pdcch_unscrambling(&pdcch_e_rx[e_rx_cand_idx],
|
|
rel15->coreset.scrambling_rnti,
|
|
L * 108,
|
|
rel15->coreset.pdcch_dmrs_scrambling_id,
|
|
tmp_e);
|
|
|
|
const uint32_t crc = polar_decoder_int16(tmp_e, dci_estimation, 1, NR_POLAR_DCI_MESSAGE_TYPE, dci_length, L);
|
|
|
|
rnti_t n_rnti = rel15->rnti;
|
|
if (crc == n_rnti) {
|
|
LOG_D(NR_PHY_DCI,
|
|
"(%i.%i) Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
|
|
proc->frame_rx,
|
|
proc->nr_slot_rx,
|
|
n_rnti,
|
|
rel15->dci_format_options[k],
|
|
CCEind,
|
|
dci_length,
|
|
*(unsigned long long *)dci_estimation);
|
|
AssertFatal(dci_ind->number_of_dcis < sizeofArray(dci_ind->dci_list), "Fix allocation\n");
|
|
fapi_nr_dci_indication_pdu_t *dci = dci_ind->dci_list + dci_ind->number_of_dcis;
|
|
*dci = (fapi_nr_dci_indication_pdu_t){
|
|
.rnti = n_rnti,
|
|
.n_CCE = CCEind,
|
|
.N_CCE = L,
|
|
.dci_format = rel15->dci_format_options[k],
|
|
.ss_type = rel15->ss_type_options[k],
|
|
.coreset_type = rel15->coreset.CoreSetType,
|
|
};
|
|
int n_rb, cset_start;
|
|
get_coreset_rballoc(rel15->coreset.frequency_domain_resource, &n_rb, &cset_start);
|
|
dci->cset_start = rel15->BWPStart + cset_start + rel15->coreset.rb_offset;
|
|
dci->payloadSize = dci_length;
|
|
memcpy(dci->payloadBits, dci_estimation, (dci_length + 7) / 8);
|
|
dci_ind->number_of_dcis++;
|
|
break; // If DCI is found, no need to check for remaining DCI lengths
|
|
} else {
|
|
LOG_D(NR_PHY_DCI,
|
|
"(%i.%i) Decoded crc %x does not match rnti %x for DCI format %d\n",
|
|
proc->frame_rx,
|
|
proc->nr_slot_rx,
|
|
crc,
|
|
n_rnti,
|
|
rel15->dci_format_options[k]);
|
|
}
|
|
}
|
|
e_rx_cand_idx += RE_PER_RB_OUT_DMRS * L * 6; // e_rx index for next candidate (L CCEs, 6 REGs per CCE and 9 REs per REG )
|
|
}
|
|
}
|