improvements in handling tdd structure
This commit is contained in:
@@ -257,6 +257,48 @@ void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset) {
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*n_rb = 6*count;
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}
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int get_nb_periods_per_frame(uint8_t tdd_period) {
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int nb_periods_per_frame;
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switch(tdd_period) {
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case 0:
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nb_periods_per_frame = 20; // 10ms/0p5ms
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break;
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case 1:
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nb_periods_per_frame = 16; // 10ms/0p625ms
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break;
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case 2:
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nb_periods_per_frame = 10; // 10ms/1ms
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break;
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case 3:
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nb_periods_per_frame = 8; // 10ms/1p25ms
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break;
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case 4:
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nb_periods_per_frame = 5; // 10ms/2ms
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break;
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case 5:
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nb_periods_per_frame = 4; // 10ms/2p5ms
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break;
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case 6:
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nb_periods_per_frame = 2; // 10ms/5ms
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break;
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case 7:
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nb_periods_per_frame = 1; // 10ms/10ms
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break;
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default:
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AssertFatal(1==0,"Undefined tdd period %d\n", tdd_period);
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}
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return nb_periods_per_frame;
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}
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int get_dmrs_port(int nl, uint16_t dmrs_ports) {
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@@ -71,6 +71,7 @@ uint32_t nr_get_code_rate(uint8_t Imcs, uint8_t table_idx);
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int get_subband_size(int NPRB,int size);
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void SLIV2SL(int SLIV,int *S,int *L);
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int get_dmrs_port(int nl, uint16_t dmrs_ports);
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int get_nb_periods_per_frame(uint8_t tdd_period);
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#define CEILIDIV(a,b) ((a+b-1)/b)
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#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
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@@ -492,16 +492,25 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
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find_SSB_and_RO_available(Mod_idP);
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
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const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
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const int nr_dlmix_slots = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0) : 0;
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const int nr_dl_slots = tdd ? nr_dlmix_slots : n;
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const int nr_ulstart_slot = tdd ? tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0) : 1;
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int nr_slots_period = n;
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int nr_dl_slots = n;
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int nr_ulstart_slot = 0;
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if (tdd) {
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nr_dl_slots = tdd->nrofDownlinkSlots + (tdd->nrofDownlinkSymbols != 0);
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nr_ulstart_slot = tdd->nrofDownlinkSlots + (tdd->nrofUplinkSymbols == 0);
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nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
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}
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else{
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if(RC.nrmac[Mod_idP]->common_channels[0].frame_type == TDD)
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AssertFatal(1==0,"Dynamic TDD not handled yet\n");
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}
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for (int slot = 0; slot < n; ++slot) {
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/* FIXME: it seems there is a problem with slot 0/10/slots right after UL:
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* we just get retransmissions. Thus, do not schedule such slots in DL */
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if (slot % nr_slots_period != 0){
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* we just get retransmissions. Thus, do not schedule such slots in DL in TDD */
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if (RC.nrmac[Mod_idP]->common_channels[0].frame_type == FDD ||
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(slot % nr_slots_period != 0)){
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RC.nrmac[Mod_idP]->dlsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) < nr_dl_slots) << (slot % 64);
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}
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RC.nrmac[Mod_idP]->ulsch_slot_bitmap[slot / 64] |= (uint64_t)((slot % nr_slots_period) >= nr_ulstart_slot) << (slot % 64);
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@@ -36,6 +36,7 @@
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#include "NR_MAC_gNB/mac_proto.h"
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#include "common/utils/LOG/log.h"
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#include "common/utils/nr/nr_common.h"
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#include "common/utils/LOG/vcd_signal_dumper.h"
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#include "UTIL/OPT/opt.h"
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#include "OCG.h"
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@@ -284,13 +285,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) {
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//FR2
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const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
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const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
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const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
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const int nb_periods_per_frame = n / nr_slots_period;
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// re-initialization of tdd_beam_association at beginning of frame (only for FR2)
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AssertFatal(tdd,"Dynamic TDD not handled yet\n");
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const int nb_periods_per_frame = get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
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// re-initialization of tdd_beam_association at beginning of frame
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for (int i=0; i<nb_periods_per_frame; i++)
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gNB->tdd_beam_association[i] = -1;
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}
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@@ -397,6 +397,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
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void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
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uint16_t *msg2_frame, uint16_t *msg2_slot,
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NR_ServingCellConfigCommon_t *scc,
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lte_frame_type_t frame_type,
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uint16_t monitoring_slot_period,
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uint16_t monitoring_offset,uint8_t beam_index,
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uint8_t num_active_ssb,
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@@ -411,17 +412,20 @@ void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
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const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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// number of mixed slot or of last dl slot if there is no mixed slot
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uint8_t last_dl_slot_period = tdd ? tdd->nrofDownlinkSlots : 0;
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uint8_t last_dl_slot_period = n_slots_frame-1;
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// lenght of tdd period in slots
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uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame;
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uint8_t tdd_period_slot = n_slots_frame;
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if (tdd && (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols == 0)) {
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last_dl_slot_period--;
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if (tdd) {
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last_dl_slot_period = tdd->nrofDownlinkSymbols == 0? (tdd->nrofDownlinkSlots-1) : tdd->nrofDownlinkSlots;
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tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
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}
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if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) {
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tdd_period_slot++;
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else{
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if(frame_type == TDD)
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AssertFatal(1==0,"Dynamic TDD not handled yet\n");
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}
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switch(response_window){
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case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1:
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slot_window = 1;
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@@ -515,6 +519,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
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gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
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NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
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NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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lte_frame_type_t frame_type = cc->frame_type;
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uint8_t total_RApreambles = MAX_NUM_NR_PRACH_PREAMBLES;
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uint8_t num_ssb_per_RO = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present;
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@@ -619,6 +624,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
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&msg2_frame,
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&msg2_slot,
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scc,
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frame_type,
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monitoring_slot_period,
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monitoring_offset,
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beam_index,
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@@ -728,15 +734,11 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
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// beam association for FR2
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int16_t *tdd_beam_association = nr_mac->tdd_beam_association;
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if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
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// FR2
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const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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uint8_t tdd_period_slot = tdd ? scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots + scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots : n_slots_frame;
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if (tdd && ((scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols > 0) || (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols > 0))) {
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tdd_period_slot++;
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}
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AssertFatal(tdd,"Dynamic TDD not handled yet\n");
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uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
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int num_tdd_period = sched_slot/tdd_period_slot;
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if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id))
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@@ -886,6 +888,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
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uint16_t msg3_nb_rb = 8; // sdu has 6 or 8 bytes
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lte_frame_type_t frame_type = RC.nrmac[module_id]->common_channels->frame_type;
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int mu = ubwp ?
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ubwp->bwp_Common->genericParameters.subcarrierSpacing :
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scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
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@@ -901,7 +905,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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const int n_slots_frame = nr_slots_per_frame[mu];
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const int nrofUplinkSymbols = tdd ? tdd->nrofUplinkSymbols : 4;
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const int nrofUplinkSymbols = (frame_type==TDD) ? tdd->nrofUplinkSymbols : 11; // TODO change in favor of harmonization branch
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uint8_t k2 = 0;
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for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
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startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
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@@ -927,10 +931,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
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// beam association for FR2
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if (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0] >= 257) {
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uint8_t tdd_period_slot = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots : n_slots_frame;
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if (tdd && ((tdd->nrofDownlinkSymbols > 0) || (tdd->nrofUplinkSymbols > 0))) {
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tdd_period_slot++;
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}
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AssertFatal(tdd,"Dynamic TDD not handled yet\n");
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uint8_t tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
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int num_tdd_period = ra->Msg3_slot/tdd_period_slot;
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if((tdd_beam_association[num_tdd_period]!=-1)&&(tdd_beam_association[num_tdd_period]!=ra->beam_id))
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AssertFatal(1==0,"Cannot schedule MSG3\n");
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@@ -268,8 +268,8 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
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fill_ssb_vrb_map(cc, offset_pointa, ssb_start_symbol, CC_id);
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const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
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const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
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const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame;
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// FR2 is only TDD, to be fixed for flexible TDD
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const int nr_slots_period = tdd ? n_slots_frame/get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity) : n_slots_frame;
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num_tdd_period = rel_slot/nr_slots_period;
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gNB->tdd_beam_association[num_tdd_period]=i_ssb;
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num_ssb++;
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@@ -62,9 +62,23 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
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/* there is a mixed slot only when in TDD */
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NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon;
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lte_frame_type_t frame_type = nrmac->common_channels->frame_type;
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const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const NR_TDD_UL_DL_Pattern_t *tdd =
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scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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const int symb_dlMixed = tdd ? (1 << tdd->nrofDownlinkSymbols) - 1 : 0;
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int symb_dlMixed = 0;
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int nr_mix_slots = 0;
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int nr_slots_period = n;
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if (tdd) {
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symb_dlMixed = (1 << tdd->nrofDownlinkSymbols) - 1;
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nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
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nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
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}
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else{
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if(frame_type == TDD)
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AssertFatal(1==0,"Dynamic TDD not handled yet\n");
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}
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int target_ss;
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if (bwp) {
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@@ -97,7 +111,7 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
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/* check that TDA index 1 fits into DL part of mixed slot, if it exists */
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int tdaMi = -1;
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if (tdd && tdaList->list.count > 1) {
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if (frame_type == TDD && tdaList->list.count > 1) {
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const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1];
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AssertFatal(!tdaP_Mi->k0 || *tdaP_Mi->k0 == 0,
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"TimeDomainAllocation at index 1: non-null k0 (%ld) is not supported by the scheduler\n",
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@@ -120,16 +134,13 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
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}
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}
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const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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nrmac->preferred_dl_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_dl_tda[bwp_id]));
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const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
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const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
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for (int i = 0; i < n; ++i) {
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nrmac->preferred_dl_tda[bwp_id][i] = -1;
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if (!tdd || i % nr_slots_period < tdd->nrofDownlinkSlots)
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if (frame_type == FDD || i % nr_slots_period < tdd->nrofDownlinkSlots)
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nrmac->preferred_dl_tda[bwp_id][i] = 0;
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else if (tdd && nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots)
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else if (nr_mix_slots && i % nr_slots_period == tdd->nrofDownlinkSlots)
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nrmac->preferred_dl_tda[bwp_id][i] = tdaMi;
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LOG_D(MAC, "slot %d preferred_dl_tda %d\n", i, nrmac->preferred_dl_tda[bwp_id][i]);
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}
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@@ -32,6 +32,7 @@
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#include "NR_MAC_COMMON/nr_mac_extern.h"
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#include "NR_MAC_gNB/mac_proto.h"
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#include "common/ran_context.h"
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#include "common/utils/nr/nr_common.h"
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#include "nfapi/oai_integration/vendor_ext.h"
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extern RAN_CONTEXT_t RC;
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@@ -1182,26 +1183,27 @@ int nr_acknack_scheduling(int mod_id,
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int r_pucch,
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int is_common) {
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const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon;
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const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
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const int nr_mix_slots = tdd? (tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0) : 0;
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const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n_slots_frame;
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const int first_ul_slot_tdd = tdd? tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period) : 0;
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const int first_ul_slot_period = tdd? tdd->nrofDownlinkSlots : 0;
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const int CC_id = 0;
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const int minfbtime = RC.nrmac[mod_id]->minRXTXTIMEpdsch;
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const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels[CC_id].ServingCellConfigCommon;
|
||||
const int n_slots_frame = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
|
||||
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
|
||||
// initializing the values for FDD
|
||||
int nr_slots_period = n_slots_frame;
|
||||
int first_ul_slot_tdd = slot + minfbtime;
|
||||
int first_ul_slot_period = 0;
|
||||
if(tdd){
|
||||
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
|
||||
first_ul_slot_tdd = tdd->nrofDownlinkSlots + nr_slots_period * (slot / nr_slots_period);
|
||||
first_ul_slot_period = tdd->nrofDownlinkSlots;
|
||||
}
|
||||
else{
|
||||
if(RC.nrmac[mod_id]->common_channels[CC_id].frame_type == TDD)
|
||||
AssertFatal(1==0,"Dynamic TDD not handled yet\n");
|
||||
}
|
||||
|
||||
NR_sched_pucch_t *csi_pucch;
|
||||
|
||||
if (tdd) {
|
||||
AssertFatal(slot < first_ul_slot_tdd + (tdd->nrofUplinkSymbols != 0),
|
||||
"cannot handle multiple TDD periods (yet): slot %d first_ul_slot_tdd %d nrofUplinkSlots %ld\n",
|
||||
slot,
|
||||
first_ul_slot_tdd,
|
||||
tdd->nrofUplinkSlots);
|
||||
}
|
||||
|
||||
/* for the moment, we consider:
|
||||
* * only pucch_sched[0] holds HARQ (and SR)
|
||||
* * we do not multiplex with CSI, which is always in pucch_sched[2]
|
||||
@@ -1320,7 +1322,7 @@ int nr_acknack_scheduling(int mod_id,
|
||||
AssertFatal(pucch->sr_flag + pucch->dai_c == 0,
|
||||
"expected no SR/AckNack for UE %d in %4d.%2d, but has %d/%d for %4d.%2d\n",
|
||||
UE_id, frame, slot, pucch->sr_flag, pucch->dai_c, pucch->frame, pucch->ul_slot);
|
||||
const int s = tdd ? first_ul_slot_tdd : slot + minfbtime;
|
||||
const int s = first_ul_slot_tdd;
|
||||
pucch->frame = (s < n_slots_frame - 1) ? frame : (frame + 1) % 1024;
|
||||
pucch->ul_slot = s % n_slots_frame;
|
||||
}
|
||||
|
||||
@@ -59,11 +59,24 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
|
||||
|
||||
/* there is a mixed slot only when in TDD */
|
||||
NR_ServingCellConfigCommon_t *scc = nrmac->common_channels->ServingCellConfigCommon;
|
||||
lte_frame_type_t frame_type = nrmac->common_channels->frame_type;
|
||||
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
|
||||
const int mu = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
|
||||
const NR_TDD_UL_DL_Pattern_t *tdd =
|
||||
scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
|
||||
/* Uplink symbols are at the end of the slot */
|
||||
const int symb_ulMixed = tdd ? ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols) : 0;
|
||||
int symb_ulMixed = 0;
|
||||
int nr_mix_slots = 0;
|
||||
int nr_slots_period = n;
|
||||
if (tdd) {
|
||||
symb_ulMixed = ((1 << tdd->nrofUplinkSymbols) - 1) << (14 - tdd->nrofUplinkSymbols);
|
||||
nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
|
||||
nr_slots_period /= get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
|
||||
}
|
||||
else{
|
||||
if(frame_type == TDD)
|
||||
AssertFatal(1==0,"Dynamic TDD not handled yet\n");
|
||||
}
|
||||
|
||||
const struct NR_PUCCH_Config__resourceToAddModList *resList = ubwp->bwp_Dedicated->pucch_Config->choice.setup->resourceToAddModList;
|
||||
// for the moment, just block any symbol that might hold a PUCCH, regardless
|
||||
@@ -117,7 +130,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
|
||||
|
||||
// get largest time domain allocation (TDA) for UL slot and UL in mixed slot
|
||||
int tdaMi = -1;
|
||||
if (tdd) {
|
||||
if (nr_mix_slots>0) {
|
||||
const NR_PUSCH_TimeDomainResourceAllocation_t *tdaP_Mi = tdaList->list.array[1];
|
||||
AssertFatal(k2 == get_K2(scc, (NR_BWP_Uplink_t*)ubwp, 1, mu),
|
||||
"scheduler cannot handle different k2 for UL slot (%d) and UL Mixed slot (%ld)\n",
|
||||
@@ -139,16 +152,15 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
|
||||
symb_tda_mi);
|
||||
}
|
||||
}
|
||||
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
|
||||
|
||||
nrmac->preferred_ul_tda[bwp_id] = malloc(n * sizeof(*nrmac->preferred_ul_tda[bwp_id]));
|
||||
const int nr_mix_slots = tdd ? tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0 : 0;
|
||||
const int nr_slots_period = tdd ? tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots : n;
|
||||
|
||||
for (int slot = 0; slot < n; ++slot) {
|
||||
const int sched_slot = (slot + k2) % n;
|
||||
nrmac->preferred_ul_tda[bwp_id][slot] = -1;
|
||||
if (!tdd || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots)
|
||||
if (frame_type == FDD || sched_slot % nr_slots_period >= tdd->nrofDownlinkSlots + nr_mix_slots)
|
||||
nrmac->preferred_ul_tda[bwp_id][slot] = 0;
|
||||
else if (tdd && nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots)
|
||||
else if (nr_mix_slots && sched_slot % nr_slots_period == tdd->nrofDownlinkSlots)
|
||||
nrmac->preferred_ul_tda[bwp_id][slot] = tdaMi;
|
||||
LOG_D(MAC, "DL slot %d UL slot %d preferred_ul_tda %d\n", slot, sched_slot, nrmac->preferred_ul_tda[bwp_id][slot]);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user