Rewrite PUCCH allocation (simplified, restricted)
- No dynamic allocation of PUCCH structures - Use first PUCCH for HARQ (can only allocate for up to two slots in single PUCCH, simplistic nr_acknack_scheduling!) - Use second PUCCH for CSI, do not multiplex!
This commit is contained in:
@@ -203,10 +203,6 @@ void nr_dlsim_preprocessor(module_id_t module_id,
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sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
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sched_ctrl->cce_index = 0;
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/* set "any" value for PUCCH (simulator evaluates PDSCH only) */
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sched_ctrl->pucch_sched_idx = 0;
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sched_ctrl->pucch_occ_idx = 0;
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sched_ctrl->rbStart = g_rbStart;
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sched_ctrl->rbSize = g_rbSize;
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sched_ctrl->mcs = g_mcsIndex;
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@@ -442,15 +442,10 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
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UE_info->num_pdcch_cand[UE_id][cid]++;
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/* Find PUCCH occasion */
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nr_acknack_scheduling(module_id,
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UE_id,
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frame,
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slot,
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num_slots_per_tdd,
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&sched_ctrl->pucch_sched_idx,
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&sched_ctrl->pucch_occ_idx);
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AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
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const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot);
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AssertFatal(alloc,
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"could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n",
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rnti, frame, slot);
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uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
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// for now HARQ PID is fixed and should be the same as in post-processor
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@@ -595,7 +590,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
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const int current_harq_pid = slot % num_slots_per_tdd;
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NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
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NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx][sched_ctrl->pucch_occ_idx];
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NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
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harq->feedback_slot = pucch->ul_slot;
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harq->is_waiting = 1;
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UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
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@@ -328,14 +328,10 @@ void nr_preprocessor_phytest(module_id_t module_id,
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__func__,
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UE_id);
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nr_acknack_scheduling(module_id,
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UE_id,
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frame,
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slot,
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num_slots_per_tdd,
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&sched_ctrl->pucch_sched_idx,
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&sched_ctrl->pucch_occ_idx);
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AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
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const bool alloc = nr_acknack_scheduling(module_id, UE_id, frame, slot);
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AssertFatal(alloc,
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"could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n",
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rnti, frame, slot);
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sched_ctrl->rbStart = rbStart;
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sched_ctrl->rbSize = rbSize;
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@@ -1894,16 +1894,6 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
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UE_info->UE_sched_ctrl[UE_id].ul_rssi = 0;
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/* set illegal time domain allocation to force recomputation of all fields */
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UE_info->UE_sched_ctrl[UE_id].pusch_save.time_domain_allocation = -1;
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UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch_t **)malloc(num_slots_ul*sizeof(NR_sched_pucch_t *));
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for (int s=0; s<num_slots_ul;s++)
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UE_info->UE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch_t *)malloc(2*sizeof(NR_sched_pucch_t));
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for (int k=0; k<num_slots_ul; k++) {
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for (int l=0; l<2; l++)
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memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
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0,
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sizeof(NR_sched_pucch_t));
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}
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LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n",
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mod_idP,
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UE_id,
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@@ -1943,7 +1933,6 @@ void mac_remove_nr_ue(module_id_t mod_id, rnti_t rnti)
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UE_info->active[UE_id] = FALSE;
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UE_info->rnti[UE_id] = 0;
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remove_nr_ue_list(&UE_info->list, UE_id);
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free(UE_info->UE_sched_ctrl[UE_id].sched_pucch);
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memset((void *) &UE_info->UE_sched_ctrl[UE_id],
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0,
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sizeof(NR_UE_sched_ctrl_t));
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@@ -42,57 +42,54 @@ void nr_schedule_pucch(int Mod_idP,
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NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
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AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id);
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for (int k=0; k<nr_ulmix_slots; k++) {
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for (int l=0; l<2; l++) {
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NR_sched_pucch_t *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
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const uint16_t O_ack = curr_pucch->dai_c;
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const uint16_t O_csi = curr_pucch->csi_bits;
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const uint8_t O_sr = 0; // no SR in PUCCH implemented for now
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if (O_ack + O_csi + O_sr == 0
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|| frameP != curr_pucch->frame
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|| slotP != curr_pucch->ul_slot)
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continue;
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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const int n = sizeof(sched_ctrl->sched_pucch) / sizeof(*sched_ctrl->sched_pucch);
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for (int i = 0; i < n; i++) {
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NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[i];
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const uint16_t O_ack = curr_pucch->dai_c;
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const uint16_t O_csi = curr_pucch->csi_bits;
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const uint8_t O_sr = 0; // no SR in PUCCH implemented for now
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if (O_ack + O_csi + O_sr == 0
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|| frameP != curr_pucch->frame
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|| slotP != curr_pucch->ul_slot)
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continue;
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nfapi_nr_ul_tti_request_t *future_ul_tti_req =
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&RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][curr_pucch->ul_slot];
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AssertFatal(future_ul_tti_req->SFN == curr_pucch->frame
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&& future_ul_tti_req->Slot == curr_pucch->ul_slot,
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"future UL_tti_req's frame.slot %d.%d does not match PUCCH %d.%d\n",
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future_ul_tti_req->SFN,
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future_ul_tti_req->Slot,
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curr_pucch->frame,
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curr_pucch->ul_slot);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
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nfapi_nr_pucch_pdu_t *pucch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pucch_pdu;
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memset(pucch_pdu, 0, sizeof(nfapi_nr_pucch_pdu_t));
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future_ul_tti_req->n_pdus += 1;
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nfapi_nr_ul_tti_request_t *future_ul_tti_req =
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&RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][curr_pucch->ul_slot];
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AssertFatal(future_ul_tti_req->SFN == curr_pucch->frame
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&& future_ul_tti_req->Slot == curr_pucch->ul_slot,
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"future UL_tti_req's frame.slot %d.%d does not match PUCCH %d.%d\n",
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future_ul_tti_req->SFN,
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future_ul_tti_req->Slot,
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curr_pucch->frame,
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curr_pucch->ul_slot);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
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nfapi_nr_pucch_pdu_t *pucch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pucch_pdu;
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memset(pucch_pdu, 0, sizeof(nfapi_nr_pucch_pdu_t));
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future_ul_tti_req->n_pdus += 1;
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LOG_I(MAC,
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"%4d.%2d Scheduling pucch reception in %4d.%2d: bits SR %d, ACK %d, CSI %d, k %d l %d\n",
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frameP,
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slotP,
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curr_pucch->frame,
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curr_pucch->ul_slot,
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O_sr,
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O_ack,
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O_csi,
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k, l);
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LOG_I(MAC,
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"%4d.%2d Scheduling pucch reception in %4d.%2d: bits SR %d, ACK %d, CSI %d\n",
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frameP,
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slotP,
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curr_pucch->frame,
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curr_pucch->ul_slot,
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O_sr,
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O_ack,
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O_csi);
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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nr_configure_pucch(pucch_pdu,
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scc,
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UE_info->UE_sched_ctrl[UE_id].active_ubwp,
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UE_info->rnti[UE_id],
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curr_pucch->resource_indicator,
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O_csi,
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O_ack,
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O_sr);
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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nr_configure_pucch(pucch_pdu,
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scc,
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UE_info->UE_sched_ctrl[UE_id].active_ubwp,
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UE_info->rnti[UE_id],
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curr_pucch->resource_indicator,
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O_csi,
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O_ack,
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O_sr);
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memset(&UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
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0,
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sizeof(NR_sched_pucch_t));
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}
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memset(curr_pucch, 0, sizeof(*curr_pucch));
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}
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}
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@@ -221,7 +218,8 @@ void nr_csi_meas_reporting(int Mod_idP,
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if ( (frame%(period/n_slots_frame)==(offset/n_slots_frame)) && (slot==((sched_slot/slots_per_tdd)*slots_per_tdd))) {
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// we are scheduling pucch for csi in the first pucch occasion (this comes before ack/nack)
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curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[(sched_slot%slots_per_tdd)-slots_per_tdd+ul_slots][0];
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// FIXME: for the moment, we statically put it into the second sched_pucch!
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curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[1];
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NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0];
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@@ -408,76 +406,82 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
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// function to update pucch scheduling parameters in UE list when a USS DL is scheduled
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void nr_acknack_scheduling(int Mod_idP,
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bool nr_acknack_scheduling(int mod_id,
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int UE_id,
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frame_t frameP,
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sub_frame_t slotP,
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int slots_per_tdd,
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int *pucch_id,
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int *pucch_occ) {
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frame_t frame,
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sub_frame_t slot)
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{
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/* FIXME: for the moment, we consider that
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* * only pucch_sched[0] holds HARQ
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* * a UE is not scheduled in more than two slots, and their ACKs come in the same slot!
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* * we do not multiplex with CSI
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* * we do not mux two UEs in the same PUCCH slot (on the two symbols)
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* * we only use the first TDD period (5/10ms) */
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NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id];
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NR_sched_pucch_t *curr_pucch = &sched_ctrl->sched_pucch[0];
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AssertFatal(curr_pucch->csi_bits == 0,
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"%s(): csi_bits %d in sched_pucch[0]\n",
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__func__,
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curr_pucch->csi_bits);
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
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NR_sched_pucch_t *curr_pucch;
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int max_acknacks,pucch_res,first_ul_slot_tdd,k,i,l;
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uint8_t pdsch_to_harq_feedback[8];
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int found = 0;
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int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
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if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
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nr_ulmix_slots++;
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const int max_acknacks = 2;
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AssertFatal(curr_pucch->dai_c <= max_acknacks,
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"%s() called but already %d dai_c in sched_pucch[0]\n",
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__func__,
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curr_pucch->dai_c);
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bool csi_pres=false;
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for (k=0; k<nr_ulmix_slots; k++) {
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if(UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][0].csi_bits>0)
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csi_pres=true;
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}
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// As a preference always schedule ack nacks in PUCCH0 (max 2 per slots)
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// Unless there is CSI meas reporting scheduled in the period to avoid conflicts in the same slot
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if (csi_pres)
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max_acknacks=10;
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else
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max_acknacks=2;
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const NR_ServingCellConfigCommon_t *scc = RC.nrmac[mod_id]->common_channels->ServingCellConfigCommon;
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const NR_TDD_UL_DL_Pattern_t *tdd_pattern = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
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//const int nr_ulmix_slots = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols != 0);
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const int first_ul_slot_tdd = tdd_pattern->nrofDownlinkSlots;
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const int CC_id = 0;
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// this is hardcoded for now as ue specific
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NR_SearchSpace__searchSpaceType_PR ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
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get_pdsch_to_harq_feedback(Mod_idP,UE_id,ss_type,pdsch_to_harq_feedback);
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uint8_t pdsch_to_harq_feedback[8];
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get_pdsch_to_harq_feedback(mod_id, UE_id, ss_type, pdsch_to_harq_feedback);
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// for each possible ul or mixed slot
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for (k=0; k<nr_ulmix_slots; k++) {
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for (l=0; l<1; l++) { // scheduling 2 PUCCH in a single slot does not work with the phone, currently
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curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
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//if it is possible to schedule acknack in current pucch (no exclusive csi pucch)
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if ((curr_pucch->csi_bits == 0) || (curr_pucch->simultaneous_harqcsi==true)) {
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// if there is free room in current pucch structure
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if (curr_pucch->dai_c<max_acknacks) {
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pucch_res = get_pucch_resource(UE_info,UE_id,k,l);
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if (pucch_res>-1){
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curr_pucch->resource_indicator = pucch_res;
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curr_pucch->frame = frameP;
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// first pucch occasion in first UL or MIXED slot
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first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
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i = 0;
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while (i<8 && found == 0) { // look if timing indicator is among allowed values
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if (pdsch_to_harq_feedback[i]==(first_ul_slot_tdd+k)-(slotP % slots_per_tdd))
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found = 1;
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if (found == 0) i++;
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}
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if (found == 1) {
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// computing slot in which pucch is scheduled
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curr_pucch->dai_c++;
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curr_pucch->ul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd));
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curr_pucch->timing_indicator = i; // index in the list of timing indicators
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*pucch_id = k;
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*pucch_occ = l;
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return;
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}
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}
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}
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}
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}
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NR_PUCCH_Config_t *pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
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DevAssert(pucch_Config->resourceToAddModList->list.count > 0);
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curr_pucch->frame = frame;
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curr_pucch->dai_c++;
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if (curr_pucch->dai_c == 1) {
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/* FIXME for first allocation: find free resource, here assume first PUCCH
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* resource and first_ul_slot_tdd */
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const int pucch_res = 0;
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curr_pucch->resource_indicator = pucch_res;
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curr_pucch->ul_slot = first_ul_slot_tdd;
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/* verify that at that slot and symbol, resources are free.
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* Note: this does not handle potential mux of PUCCH in the same symbol! */
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const NR_PUCCH_Resource_t *resource =
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pucch_Config->resourceToAddModList->list.array[pucch_res];
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DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
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uint16_t *vrb_map_UL =
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&RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[first_ul_slot_tdd * 275];
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const uint16_t symb = 1 << resource->format.choice.format0->startingSymbolIndex;
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AssertFatal((vrb_map_UL[resource->startingPRB] & symb) == 0,
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"symbol %x is not free for PUCCH alloc in vrb_map_UL at RB %ld and slot %d\n",
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symb, resource->startingPRB, first_ul_slot_tdd);
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vrb_map_UL[resource->startingPRB] |= symb;
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}
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AssertFatal(1==0,"No Uplink slot available in accordance to allowed timing indicator\n");
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/* Find the right timing_indicator value. FIXME: if previously ul_slot is not
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* possible (anymore), we need to allocate previous HARQ feedback (since we
|
||||
* cannot "reach" it anymore) and search a new one! */
|
||||
int i = 0;
|
||||
while (i < 8) {
|
||||
if (pdsch_to_harq_feedback[i] == curr_pucch->ul_slot - slot)
|
||||
break;
|
||||
++i;
|
||||
}
|
||||
AssertFatal(i < 8,
|
||||
"could not find pdsch_to_harq_feedback: slot %d, ack slot %d\n",
|
||||
slot, first_ul_slot_tdd);
|
||||
curr_pucch->timing_indicator = i; // index in the list of timing indicators
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
@@ -532,24 +536,6 @@ void csi_period_offset(NR_CSI_ReportConfig_t *csirep,
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int get_pucch_resource(NR_UE_info_t *UE_info,int UE_id,int k,int l) {
|
||||
|
||||
// to be updated later, for now simple implementation
|
||||
// use the second allocation just in case there is csi in the first
|
||||
// in that case use second resource (for a different symbol) see 9.2 in 38.213
|
||||
if (l==1) {
|
||||
if (UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][0].csi_bits==0)
|
||||
return -1;
|
||||
else
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
return 0;
|
||||
|
||||
}
|
||||
|
||||
|
||||
uint16_t compute_pucch_prb_size(uint8_t format,
|
||||
uint8_t nr_prbs,
|
||||
uint16_t O_tot,
|
||||
|
||||
@@ -224,15 +224,10 @@ void nr_csi_meas_reporting(int Mod_idP,
|
||||
int ul_slots,
|
||||
int n_slots_frame);
|
||||
|
||||
void nr_acknack_scheduling(int Mod_idP,
|
||||
bool nr_acknack_scheduling(int Mod_idP,
|
||||
int UE_id,
|
||||
frame_t frameP,
|
||||
sub_frame_t slotP,
|
||||
int slots_per_tdd,
|
||||
int *pucch_id,
|
||||
int *pucch_occ);
|
||||
|
||||
int get_pucch_resource(NR_UE_info_t *UE_info,int UE_id,int k,int l);
|
||||
sub_frame_t slotP);
|
||||
|
||||
void get_pdsch_to_harq_feedback(int Mod_idP,
|
||||
int UE_id,
|
||||
|
||||
@@ -387,10 +387,12 @@ typedef struct {
|
||||
/// the currently active BWP in UL
|
||||
NR_BWP_Uplink_t *active_ubwp;
|
||||
|
||||
NR_sched_pucch_t **sched_pucch;
|
||||
/// selected PUCCH index, if scheduled
|
||||
int pucch_sched_idx;
|
||||
int pucch_occ_idx;
|
||||
/// PUCCH scheduling information. Array of two, we assume for the moment:
|
||||
/// HARQ (and SR) in the first field, CSI in second (as fixed by RRC conf.,
|
||||
/// i.e. if actually present). The order is important for
|
||||
/// nr_acknack_scheduling()!
|
||||
NR_sched_pucch_t sched_pucch[2];
|
||||
|
||||
NR_sched_pusch_save_t pusch_save;
|
||||
NR_sched_pusch_t sched_pusch;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user