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schedule_control_sib1(): Refactor NR_sched_pdsch usage

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Similarly to parent commit(s), refactor the use of NR_sched_pdsch.
Instead of using nr_mac->sched_ctrlCommon, put the NR_sched_pdsch_t on
the stack.

This also refactors update_rb_mcs_tbs() to update the existing
NR_sched_pdsch instead of updating individual fields.

This also reduces the extend to which sched_ctrlCommon is used.
This commit is contained in:
Robert Schmidt
2025-10-30 19:14:06 +01:00
parent 8205503496
commit 1900edb56d
1 changed files with 53 additions and 67 deletions
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openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+53 -67
View File
@@ -274,35 +274,32 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi
}
}
static uint32_t get_tbs_bch(NR_sched_pdsch_t *pdsch,
uint32_t num_total_bytes,
uint16_t *vrb_map)
static void update_rb_mcs_tbs(NR_sched_pdsch_t *pdsch, uint32_t num_total_bytes, uint16_t *vrb_map)
{
NR_tda_info_t *tda_info = &pdsch->tda_info;
const NR_tda_info_t *tda_info = &pdsch->tda_info;
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = pdsch->dmrs_parms.N_PRB_DMRS;
LOG_D(MAC, "dlDmrsSymbPos %x\n", pdsch->dmrs_parms.dl_dmrs_symb_pos);
int mcsTableIdx = 0;
uint32_t TBS = 0;
const uint16_t slbitmap = SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
int bwpSize = pdsch->bwp_info.bwpSize;
int bwpStart = pdsch->bwp_info.bwpStart;
int rbStop = bwpSize - 1;
int rbStart = 0;
uint16_t rbSize = 0;
while (rbStart < rbStop) {
if (vrb_map[rbStart + bwpStart] & slbitmap)
rbStart++;
while (pdsch->rbStart < rbStop) {
if (vrb_map[pdsch->rbStart + bwpStart] & slbitmap)
pdsch->rbStart++;
else {
int max_rbSize = 0;
while (rbStart + max_rbSize <= rbStop && !(vrb_map[rbStart + max_rbSize + bwpStart] & slbitmap))
while (pdsch->rbStart + max_rbSize <= rbStop && !(vrb_map[pdsch->rbStart + max_rbSize + bwpStart] & slbitmap))
max_rbSize++;
bool res = false;
while (res == false && pdsch->mcs < 10) {
res = nr_find_nb_rb(nr_get_Qm_dl(pdsch->mcs, mcsTableIdx),
nr_get_code_rate_dl(pdsch->mcs, mcsTableIdx),
pdsch->Qm = nr_get_Qm_dl(pdsch->mcs, mcsTableIdx);
pdsch->R = nr_get_code_rate_dl(pdsch->mcs, mcsTableIdx);
res = nr_find_nb_rb(pdsch->Qm,
pdsch->R,
1, // no transform precoding for DL
1, // single layer
tda_info->nrOfSymbols,
@@ -310,59 +307,56 @@ static uint32_t get_tbs_bch(NR_sched_pdsch_t *pdsch,
num_total_bytes,
1, // min_rbSize
max_rbSize,
&TBS,
&rbSize);
&pdsch->tb_size,
&pdsch->rbSize);
if (!res)
pdsch->mcs++;
}
break;
}
}
AssertFatal(TBS >= num_total_bytes,
AssertFatal(pdsch->tb_size >= num_total_bytes,
"Couldn't allocate enough resources for %d bytes in SIB PDSCH (rbStart %d, rbSize %d, bwpSize %d)\n",
num_total_bytes,
rbStart,
rbSize,
pdsch->rbStart,
pdsch->rbSize,
bwpSize);
pdsch->rbSize = rbSize;
pdsch->rbStart = rbStart;
LOG_D(NR_MAC,
"mcs=%i, startSymbolIndex = %i, nrOfSymbols = %i, rbSize = %i, TBS = %i, dmrs_length %d, N_PRB_DMRS = %d, mappingtype = %d\n",
pdsch->mcs,
tda_info->startSymbolIndex,
tda_info->nrOfSymbols,
rbSize,
TBS,
pdsch->rbSize,
pdsch->tb_size,
pdsch->dmrs_parms.N_DMRS_SLOT,
N_PRB_DMRS,
tda_info->mapping_type);
return TBS;
}
static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
int CC_id,
NR_sched_pdcch_t *pdcch,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
NR_pdsch_dmrs_t *dmrs_parms,
NR_tda_info_t *tda_info,
uint8_t candidate_idx,
int beam,
uint16_t num_total_bytes)
static NR_sched_pdsch_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
int CC_id,
NR_sched_pdcch_t *pdcch,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
NR_pdsch_dmrs_t *dmrs_parms,
NR_tda_info_t *tda_info,
uint8_t candidate_idx,
int beam,
uint16_t num_total_bytes)
{
AssertFatal(gNB_mac->sched_ctrlCommon, "sched_ctrlCommon is NULL\n");
NR_COMMON_channels_t *cc = &gNB_mac->common_channels[CC_id];
uint16_t *vrb_map = cc->vrb_map[beam];
NR_sched_pdsch_t *pdsch = &gNB_mac->sched_ctrlCommon->sched_pdsch;
pdsch->bwp_info = get_pdsch_bwp_start_size(gNB_mac, NULL);
pdsch->time_domain_allocation = time_domain_allocation;
pdsch->dmrs_parms = *dmrs_parms;
pdsch->tda_info = *tda_info;
pdsch->nrOfLayers = 1;
pdsch->pm_index = 0;
pdsch->mcs = 0; // starting from mcs 0
NR_sched_pdsch_t pdsch = {
.bwp_info = get_pdsch_bwp_start_size(gNB_mac, NULL),
.time_domain_allocation = time_domain_allocation,
.dmrs_parms = *dmrs_parms,
.tda_info = *tda_info,
.nrOfLayers = 1,
.pm_index = 0,
.mcs = 0, // starting from mcs 0
};
gNB_mac->sched_ctrlCommon->num_total_bytes = num_total_bytes;
uint8_t nr_of_candidates = 0;
@@ -383,12 +377,7 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
AssertFatal(gNB_mac->sched_ctrlCommon->cce_index >= 0, "Could not find CCE for coreset0\n");
uint32_t TBS = get_tbs_bch(&gNB_mac->sched_ctrlCommon->sched_pdsch,
gNB_mac->sched_ctrlCommon->num_total_bytes,
vrb_map);
pdsch->R = nr_get_code_rate_dl(pdsch->mcs, 0);
pdsch->Qm = nr_get_Qm_dl(pdsch->mcs, 0);
update_rb_mcs_tbs(&pdsch, gNB_mac->sched_ctrlCommon->num_total_bytes, vrb_map);
// Mark the corresponding RBs as used
fill_pdcch_vrb_map(gNB_mac,
@@ -397,10 +386,10 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
gNB_mac->sched_ctrlCommon->cce_index,
gNB_mac->sched_ctrlCommon->aggregation_level,
beam);
for (int rb = 0; rb < pdsch->rbSize; rb++) {
for (int rb = 0; rb < pdsch.rbSize; rb++) {
vrb_map[rb + type0_PDCCH_CSS_config->cset_start_rb] |= SL_to_bitmap(tda_info->startSymbolIndex, tda_info->nrOfSymbols);
}
return TBS;
return pdsch;
}
static void nr_fill_nfapi_dl_SIB_pdu(gNB_MAC_INST *gNB_mac,
@@ -578,22 +567,21 @@ void schedule_nr_sib1(module_id_t module_idP,
NR_COMMON_channels_t *cc = &gNB_mac->common_channels[0];
// Configure sched_ctrlCommon for SIB1
uint32_t TBS = schedule_control_sib1(gNB_mac,
CC_id,
&sched_pdcch,
type0_PDCCH_CSS_config,
time_domain_allocation,
&dmrs_parms,
&tda_info,
candidate_idx,
beam.idx,
cc->sib1_bcch_length);
NR_sched_pdsch_t sched_pdsch = schedule_control_sib1(gNB_mac,
CC_id,
&sched_pdcch,
type0_PDCCH_CSS_config,
time_domain_allocation,
&dmrs_parms,
&tda_info,
candidate_idx,
beam.idx,
cc->sib1_bcch_length);
gNB_mac->sched_ctrlCommon->sched_pdsch.tb_size = TBS;
nfapi_nr_dl_tti_request_body_t *dl_req = &DL_req->dl_tti_request_body;
int pdu_index = gNB_mac->pdu_index[0]++;
nr_fill_nfapi_dl_SIB_pdu(gNB_mac,
&gNB_mac->sched_ctrlCommon->sched_pdsch,
&sched_pdsch,
&sched_pdcch,
gNB_mac->sched_ctrlCommon->search_space,
gNB_mac->sched_ctrlCommon->coreset,
@@ -609,11 +597,11 @@ void schedule_nr_sib1(module_id_t module_idP,
nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[ntx_req];
// Data to be transmitted
memcpy(tx_req->TLVs[0].value.direct, cc->sib1_bcch_pdu, TBS);
memcpy(tx_req->TLVs[0].value.direct, cc->sib1_bcch_pdu, sched_pdsch.tb_size);
tx_req->PDU_index = pdu_index;
tx_req->num_TLV = 1;
tx_req->TLVs[0].length = TBS;
tx_req->TLVs[0].length = sched_pdsch.tb_size;
tx_req->PDU_length = compute_PDU_length(tx_req->num_TLV, tx_req->TLVs[0].length);
TX_req->Number_of_PDUs++;
TX_req->SFN = frameP;
@@ -718,9 +706,7 @@ static void other_sib_sched_control(module_id_t module_idP,
uint16_t *vrb_map = cc->vrb_map[beam.idx];
uint8_t *sib_bcch_pdu = cc->other_sib_bcch_pdu[payload_idx];
int num_total_bytes = cc->other_sib_bcch_length[payload_idx];
sched_pdsch_otherSI.tb_size = get_tbs_bch(&sched_pdsch_otherSI, num_total_bytes, vrb_map);
sched_pdsch_otherSI.R = nr_get_code_rate_dl(sched_pdsch_otherSI.mcs, 0);
sched_pdsch_otherSI.Qm = nr_get_Qm_dl(sched_pdsch_otherSI.mcs, 0);
update_rb_mcs_tbs(&sched_pdsch_otherSI, num_total_bytes, vrb_map);
for (int rb = 0; rb < sched_pdsch_otherSI.rbSize; rb++) {
vrb_map[rb + type0_PDCCH_CSS_config->cset_start_rb] |= SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);