nr_preprocessor_phytest(): Refactor NR_sched_pdsch usage
As in parent commit(s).
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@@ -86,9 +86,6 @@ void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot)
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if(!tda_info.valid_tda)
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return;
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sched_ctrl->sched_pdsch.tda_info = tda_info;
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sched_ctrl->sched_pdsch.time_domain_allocation = tda;
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/* find largest unallocated chunk */
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const int bwpSize = dl_bwp->BWPSize;
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const int BWPStart = dl_bwp->BWPStart;
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@@ -142,12 +139,11 @@ void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot)
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0);
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AssertFatal(CCEIndex >= 0, "Could not find CCE for UE %04x\n", UE->rnti);
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NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
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if (sched_pdsch->dl_harq_pid == -1)
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sched_pdsch->dl_harq_pid = sched_ctrl->available_dl_harq.head;
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int alloc = -1;
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if (!get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, sched_pdsch->dl_harq_pid)) {
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int harq_pid = sched_ctrl->retrans_dl_harq.head;
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if (harq_pid < 0)
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harq_pid = sched_ctrl->available_dl_harq.head;
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if (!get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, harq_pid)) {
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int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, UE->current_UL_BWP.pucch_Config, CCEIndex);
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alloc = nr_acknack_scheduling(mac, UE, frame, slot, 0, r_pucch, 0);
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if (alloc < 0) {
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@@ -165,42 +161,38 @@ void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot)
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sched_ctrl->aggregation_level,
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beam);
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//AssertFatal(alloc,
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// "could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n",
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// rnti, frame, slot);
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sched_pdsch->pucch_allocation = alloc;
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sched_pdsch->rbStart = rbStart;
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sched_pdsch->rbSize = rbSize;
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sched_pdsch->bwp_info = get_pdsch_bwp_start_size(mac, UE);
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sched_pdsch->dmrs_parms = get_dl_dmrs_params(scc,
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dl_bwp,
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&tda_info,
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target_dl_Nl);
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sched_pdsch->mcs = target_dl_mcs;
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sched_pdsch->nrOfLayers = target_dl_Nl;
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sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
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sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, dl_bwp->mcsTableIdx);
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NR_sched_pdsch_t sched_pdsch = {
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.rbSize = rbSize,
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.rbStart = rbStart,
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.mcs = target_dl_mcs,
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.R = nr_get_code_rate_dl(target_dl_mcs, dl_bwp->mcsTableIdx),
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.Qm = nr_get_Qm_dl(target_dl_mcs, dl_bwp->mcsTableIdx),
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// tbSize further below
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.dl_harq_pid = sched_ctrl->retrans_dl_harq.head, // PID of HARQ awaiting retransmission, or -1 otherwise
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.pucch_allocation = alloc,
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.pm_index = 0,
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.nrOfLayers = target_dl_Nl,
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.bwp_info = get_pdsch_bwp_start_size(mac, UE),
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.dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, target_dl_Nl),
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.time_domain_allocation = tda,
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.tda_info = tda_info,
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};
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sched_ctrl->dl_bler_stats.mcs = target_dl_mcs; /* for logging output */
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sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
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sched_pdsch->R,
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sched_pdsch->rbSize,
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tda_info.nrOfSymbols,
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sched_pdsch->dmrs_parms.N_PRB_DMRS * sched_pdsch->dmrs_parms.N_DMRS_SLOT,
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* tb_scaling */,
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sched_pdsch->nrOfLayers)
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>> 3;
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sched_pdsch.tb_size = nr_compute_tbs(sched_pdsch.Qm,
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sched_pdsch.R,
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sched_pdsch.rbSize,
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tda_info.nrOfSymbols,
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sched_pdsch.dmrs_parms.N_PRB_DMRS * sched_pdsch.dmrs_parms.N_DMRS_SLOT,
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0 /* N_PRB_oh, 0 for initialBWP */,
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0 /* tb_scaling */,
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target_dl_Nl)
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>> 3;
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/* get the PID of a HARQ process awaiting retransmission, or -1 otherwise */
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sched_pdsch->dl_harq_pid = sched_ctrl->retrans_dl_harq.head;
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sched_ctrl->sched_pdsch = sched_pdsch;
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/* mark the corresponding RBs as used */
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for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
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vrb_map[rb + sched_pdsch->rbStart + BWPStart] = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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if ((frame&127) == 0) LOG_D(MAC,"phytest: %d.%d DL mcs %d, DL rbStart %d, DL rbSize %d\n", frame, slot, sched_pdsch->mcs, rbStart,rbSize);
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for (int rb = 0; rb < sched_pdsch.rbSize; rb++)
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vrb_map[rb + sched_pdsch.rbStart + BWPStart] = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
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}
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uint32_t target_ul_mcs = 9;
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