fix in calling get_ul_tda
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@@ -436,18 +436,25 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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const int tda = get_ul_tda(nr_mac, scc, slot);
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if (tda < 0)
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return false;
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const struct NR_PUSCH_TimeDomainResourceAllocationList *tdaList =
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sched_ctrl->active_ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
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const int temp_tda = get_ul_tda(nr_mac, scc, slot);
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if (temp_tda < 0)
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return false;
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AssertFatal(temp_tda < tdaList->list.count,
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"time domain assignment %d >= %d\n",
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temp_tda,
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tdaList->list.count);
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int K2 = get_K2(scc,NULL,sched_ctrl->active_ubwp, temp_tda, mu);
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const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
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const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
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const int tda = get_ul_tda(nr_mac, scc, sched_slot);
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if (tda < 0)
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return false;
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AssertFatal(tda < tdaList->list.count,
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"time domain assignment %d >= %d\n",
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tda,
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tdaList->list.count);
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int K2 = get_K2(scc,NULL,sched_ctrl->active_ubwp, tda, mu);
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const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
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const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
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/* check if slot is UL, and that slot is 8 (assuming K2=6 because of UE
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* limitations). Note that if K2 or the TDD configuration is changed, below
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* conditions might exclude each other and never be true */
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@@ -54,7 +54,7 @@ const int get_ul_tda(const gNB_MAC_INST *nrmac, const NR_ServingCellConfigCommon
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if (tdd && tdd->nrofUplinkSymbols > 1) { // if there is uplink symbols in mixed slot
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const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + 1;
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if ((slot%nr_slots_period) == tdd->nrofUplinkSlots)
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if ((slot%nr_slots_period) == tdd->nrofDownlinkSlots)
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return 1;
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}
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return 0; // if FDD or not mixed slot in TDD, for now use default TDA (TODO handle CSI-RS slots)
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@@ -860,7 +860,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
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const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
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const uint8_t nrOfLayers = 1;
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const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_bwp || ubwpd) ? 1 : 2;
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const int tda = get_ul_tda(nr_mac, scc, slot);
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const int tda = get_ul_tda(nr_mac, scc, retInfo->slot);
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LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
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LOG_D(NR_MAC,"num_dmrs_cdm_grps_no_data %d, tbs %d\n",num_dmrs_cdm_grps_no_data, retInfo->tb_size);
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if (tda == retInfo->time_domain_allocation) {
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@@ -1129,7 +1129,7 @@ void pf_ul(module_id_t module_id,
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const uint8_t nrOfLayers = 1;
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const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2;
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int dci_format = get_dci_format(sched_ctrl);
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const int tda = get_ul_tda(nrmac, scc, slot);
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const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot);
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if (ps->time_domain_allocation != tda
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|| ps->dci_format != dci_format
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|| ps->nrOfLayers != nrOfLayers
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@@ -1269,7 +1269,7 @@ void pf_ul(module_id_t module_id,
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const uint8_t nrOfLayers = 1;
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const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2;
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int dci_format = get_dci_format(sched_ctrl);
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const int tda = get_ul_tda(nrmac, scc, slot);
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const int tda = get_ul_tda(nrmac, scc, sched_pusch->slot);
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if (ps->time_domain_allocation != tda
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|| ps->dci_format != dci_format
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|| ps->nrOfLayers != nrOfLayers
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@@ -1362,12 +1362,14 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
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* schedule now (slot + k2 is not UL slot) */
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int UE_id = UE_info->list.head;
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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const int tda = get_ul_tda(nr_mac, scc, slot);
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if (tda < 0)
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return false;
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int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu);
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const int temp_tda = get_ul_tda(nr_mac, scc, slot);
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int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, temp_tda, mu);
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const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023;
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const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
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const int tda = get_ul_tda(nr_mac, scc, sched_slot);
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if (tda < 0)
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return false;
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DevAssert(K2 == get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu));
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if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot))
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return false;
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