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Merge remote-tracking branch 'origin/lte_uplink_improvement' into integration_2021_wk04_b

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This commit is contained in:
hardy
2021-01-29 07:41:47 +01:00
parent 4a263eb69d bbaef50932
commit 5db5657df7
30 changed files with 1084 additions and 252 deletions
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nfapi/oai_integration/nfapi_vnf.c
+29 -9
View File
@@ -333,11 +333,11 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf) {
// wake up TX for subframe n+sf_ahead
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt );
exit_fun( "error locking mutex_rxtx" );
return(-1);
}
//if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) {
// LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt );
// exit_fun( "error locking mutex_rxtx" );
// return(-1);
//}
{
static uint16_t old_sf = 0;
@@ -358,8 +358,31 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf) {
proc->frame_rx,
proc->subframe_rx);
}
// wake up TX for subframe n+sf_ahead
// lock the TX mutex and make sure the thread is ready
if (pthread_mutex_timedlock(&L1_proc->mutex,&wait) != 0) {
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB RXTX thread %d (IC %d)\n", L1_proc->subframe_rx&1,L1_proc->instance_cnt );
//exit_fun( "error locking mutex_rxtx" );
return(-1);
}
static int busy_log_cnt=0;
if(L1_proc->instance_cnt < 0){
++L1_proc->instance_cnt;
if(busy_log_cnt!=0){
LOG_E(MAC,"RCC singal to rxtx frame %d subframe %d busy end %d (frame %d subframe %d)\n",L1_proc->frame_rx,L1_proc->subframe_rx,busy_log_cnt,proc->frame_rx,proc->subframe_rx);
}
busy_log_cnt=0;
}else{
if(busy_log_cnt==0){
LOG_E(MAC,"RCC singal to rxtx frame %d subframe %d busy %d (frame %d subframe %d)\n",L1_proc->frame_rx,L1_proc->subframe_rx,L1_proc->instance_cnt,proc->frame_rx,proc->subframe_rx);
}
pthread_mutex_unlock( &L1_proc->mutex );
busy_log_cnt++;
return(0);
}
pthread_mutex_unlock( &L1_proc->mutex );
++L1_proc->instance_cnt;
//LOG_D( PHY,"[VNF-subframe_ind] sfn/sf:%d:%d proc[frame_rx:%d subframe_rx:%d] L1_proc->instance_cnt_rxtx:%d \n", sfn, sf, proc->frame_rx, proc->subframe_rx, L1_proc->instance_cnt_rxtx);
// We have just received and processed the common part of a subframe, say n.
// TS_rx is the last received timestamp (start of 1st slot), TS_tx is the desired
@@ -382,9 +405,6 @@ int wake_eNB_rxtx(PHY_VARS_eNB *eNB, uint16_t sfn, uint16_t sf) {
return(-1);
}
//LOG_D(PHY,"%s() About to attempt pthread_mutex_unlock\n", __FUNCTION__);
pthread_mutex_unlock( &L1_proc->mutex );
//LOG_D(PHY,"%s() UNLOCKED pthread_mutex_unlock\n", __FUNCTION__);
return(0);
}
openair1/PHY/LTE_ESTIMATION/lte_ul_channel_estimation.c
+22 -17
View File
@@ -786,33 +786,38 @@ int16_t lte_ul_freq_offset_estimation(LTE_DL_FRAME_PARMS *frame_parms,
Ravg[0]=0;
Ravg[1]=0;
int16_t iv, rv, phase_idx = 0;
__m128i avg128U1, avg128U2, R[3], mmtmpD0, mmtmpD1, mmtmpD2, mmtmpD3;
__m128i R[3], mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3;
__m128 avg128U1, avg128U2;
// round(tan((pi/4)*[1:1:N]/N)*pow2(15))
int16_t alpha[128] = {201, 402, 603, 804, 1006, 1207, 1408, 1610, 1811, 2013, 2215, 2417, 2619, 2822, 3024, 3227, 3431, 3634, 3838, 4042, 4246, 4450, 4655, 4861, 5066, 5272, 5479, 5686, 5893, 6101, 6309, 6518, 6727, 6937, 7147, 7358, 7570, 7782, 7995, 8208, 8422, 8637, 8852, 9068, 9285, 9503, 9721, 9940, 10160, 10381, 10603, 10825, 11049, 11273, 11498, 11725, 11952, 12180, 12410, 12640, 12872, 13104, 13338, 13573, 13809, 14046, 14285, 14525, 14766, 15009, 15253, 15498, 15745, 15993, 16243, 16494, 16747, 17001, 17257, 17515, 17774, 18035, 18298, 18563, 18829, 19098, 19368, 19640, 19915, 20191, 20470, 20750, 21033, 21318, 21605, 21895, 22187, 22481, 22778, 23078, 23380, 23685, 23992, 24302, 24615, 24931, 25250, 25572, 25897, 26226, 26557, 26892, 27230, 27572, 27917, 28266, 28618, 28975, 29335, 29699, 30067, 30440, 30817, 31198, 31583, 31973, 32368, 32767};
// compute log2_maxh (output_shift)
avg128U1 = _mm_setzero_si128();
avg128U2 = _mm_setzero_si128();
avg128U1 = _mm_setzero_ps();
avg128U2 = _mm_setzero_ps();
for (rb=0; rb<nb_rb; rb++) {
avg128U1 = _mm_add_epi32(avg128U1,_mm_madd_epi16(ul_ch1[0],ul_ch1[0]));
avg128U1 = _mm_add_epi32(avg128U1,_mm_madd_epi16(ul_ch1[1],ul_ch1[1]));
avg128U1 = _mm_add_epi32(avg128U1,_mm_madd_epi16(ul_ch1[2],ul_ch1[2]));
avg128U2 = _mm_add_epi32(avg128U2,_mm_madd_epi16(ul_ch2[0],ul_ch2[0]));
avg128U2 = _mm_add_epi32(avg128U2,_mm_madd_epi16(ul_ch2[1],ul_ch2[1]));
avg128U2 = _mm_add_epi32(avg128U2,_mm_madd_epi16(ul_ch2[2],ul_ch2[2]));
avg128U1 = _mm_add_ps(avg128U1,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch1[0],ul_ch1[0])));
avg128U1 = _mm_add_ps(avg128U1,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch1[1],ul_ch1[1])));
avg128U1 = _mm_add_ps(avg128U1,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch1[2],ul_ch1[2])));
avg128U2 = _mm_add_ps(avg128U2,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch2[0],ul_ch2[0])));
avg128U2 = _mm_add_ps(avg128U2,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch2[1],ul_ch2[1])));
avg128U2 = _mm_add_ps(avg128U2,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch2[2],ul_ch2[2])));
ul_ch1+=3;
ul_ch2+=3;
}
avg[0] = (((int *)&avg128U1)[0] +
((int *)&avg128U1)[1] +
((int *)&avg128U1)[2] +
((int *)&avg128U1)[3])/(nb_rb*12);
avg[1] = (((int *)&avg128U2)[0] +
((int *)&avg128U2)[1] +
((int *)&avg128U2)[2] +
((int *)&avg128U2)[3])/(nb_rb*12);
avg[0] = (int)( (((float*)&avg128U1)[0] +
((float*)&avg128U1)[1] +
((float*)&avg128U1)[2] +
((float*)&avg128U1)[3])/(float)(nb_rb*12) );
avg[1] = (int)( (((float*)&avg128U2)[0] +
((float*)&avg128U2)[1] +
((float*)&avg128U2)[2] +
((float*)&avg128U2)[3])/(float)(nb_rb*12) );
// msg("avg0 = %d, avg1 = %d\n",avg[0],avg[1]);
avg[0] = cmax(avg[0],avg[1]);
avg[1] = log2_approx(avg[0]);
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+2
View File
@@ -2071,6 +2071,8 @@ void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu
ulsch->harq_processes[harq_pid]->round++;
ulsch->harq_processes[harq_pid]->TBS = ulsch_pdu->ulsch_pdu_rel8.size<<3;
ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks;
ulsch->harq_processes[harq_pid]->Or1 = 0;
ulsch->harq_processes[harq_pid]->Or2 = 0;
}
ulsch->rnti = ulsch_pdu->ulsch_pdu_rel8.rnti;
openair1/PHY/LTE_TRANSPORT/phich.c
+8 -3
View File
@@ -716,6 +716,7 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
uint8_t NSF_PHICH = 4;
uint8_t pusch_subframe=-1;
uint8_t i;
uint8_t harq_pid = 0;
int subframe = proc->subframe_tx;
phich_config_t *phich;
@@ -748,16 +749,20 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
nseq_PHICH = ((phich->first_rb/Ngroup_PHICH) +
phich->n_DMRS)%(2*NSF_PHICH);
harq_pid = subframe2harq_pid(frame_parms,phich_frame2_pusch_frame(frame_parms,proc->frame_tx,subframe),pusch_subframe);
if (harq_pid == 255) {
LOG_E(PHY,"FATAL ERROR: illegal harq_pid, returning\n");
return;
}
LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, AMP %d ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d)\n",
eNB->Mod_id,subframe2harq_pid(frame_parms,
phich_frame2_pusch_frame(frame_parms,proc->frame_tx,subframe),pusch_subframe),proc->frame_tx,
eNB->Mod_id,harq_pid,proc->frame_tx,
subframe,amp,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,
phich->hi,
phich->first_rb);
T(T_ENB_PHY_PHICH, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(subframe),
T_INT(-1 /* TODO: rnti */),
T_INT(subframe2harq_pid(frame_parms,phich_frame2_pusch_frame(frame_parms,proc->frame_tx,subframe),pusch_subframe)),
T_INT(harq_pid),
T_INT(Ngroup_PHICH), T_INT(NSF_PHICH),
T_INT(ngroup_PHICH), T_INT(nseq_PHICH),
T_INT(phich->hi),
openair1/PHY/LTE_TRANSPORT/phich_common.c
+28
View File
@@ -102,6 +102,34 @@ unsigned char subframe2_ul_harq(LTE_DL_FRAME_PARMS *frame_parms,unsigned char su
return(subframe&7);
switch (frame_parms->tdd_config) {
case 1:
if (subframe == 6) {
return(0);
} else if (subframe==9){
return(1);
} else if (subframe==1){
return(2);
} else if (subframe==4){
return(3);
} else {
LOG_E(PHY,"phich.c: subframe2_ul_harq, illegal subframe %d for tdd_config %d\n",
subframe,frame_parms->tdd_config);
return(0);
}
break;
case 2:
if (subframe == 3) {
return(1);
} else if (subframe==8){
return(0);
} else {
LOG_E(PHY,"phich.c: subframe2_ul_harq, illegal subframe %d for tdd_config %d\n",
subframe,frame_parms->tdd_config);
return(0);
}
break;
case 3:
if ( (subframe == 8) || (subframe == 9) ) {
return(subframe-8);
openair1/PHY/LTE_TRANSPORT/prach.c
+1 -1
View File
@@ -626,7 +626,7 @@ void rx_prach0(PHY_VARS_eNB *eNB,
for (i=0; i<NCS2; i++) {
lev = (int32_t)prach_ifft[(preamble_shift2+i)];
avg_en += lev;
levdB = dB_fixed_times10(lev);
levdB = dB_fixed_x10(lev);
if (levdB>*max_preamble_energy) {
*max_preamble_energy = levdB;
openair1/PHY/LTE_TRANSPORT/pucch.c
+150 -7
View File
@@ -721,6 +721,137 @@ int16_t pucchfmt3_Decode( int16_t b[48],
}
}
uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB,
int frame,
uint8_t subframe,
uint8_t shortened_format
)
//-----------------------------------------------------------------------------
{
LTE_eNB_COMMON *common_vars = &eNB->common_vars;
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
uint32_t u,v,n,aa;
uint32_t z[12*14];
int16_t *zptr;
int16_t rxcomp[NB_ANTENNAS_RX][2*12*14];
uint8_t ns,N_UL_symb,nsymb,n_cs_base;
uint16_t i,j,re_offset;
uint8_t m,l;
uint8_t n_cs,alpha_ind;
int16_t tmp_re,tmp_im,W_re=0,W_im=0;
int16_t W4_nouse[4]={32767,32767,-32768,-32768};
int32_t n0_IQ[2];
double interference_power;
int16_t *rxptr;
uint32_t symbol_offset;
uint32_t u0 = (frame_parms->pucch_config_common.grouphop[subframe<<1]) % 30;
uint32_t u1 = (frame_parms->pucch_config_common.grouphop[1+(subframe<<1)]) % 30;
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
int calc_cnt;
zptr = (int16_t *)z;
N_UL_symb = (frame_parms->Ncp==NORMAL) ? 7 : 6;
interference_power=0.0;
calc_cnt=0;
// loop over 2 slots
for (n_cs_base=0; n_cs_base<12; n_cs_base++) {
zptr = (int16_t *)z;
for (ns=(subframe<<1),u=u0,v=v0; ns<(2+(subframe<<1)); ns++,u=u1,v=v1) {
//loop over symbols in slot
for (l=0; l<N_UL_symb; l++) {
n_cs = eNB->ncs_cell[ns][l]+n_cs_base;
if(((l>1)&&(l<N_UL_symb-2)) || ((ns==(1+(subframe<<1))) && (shortened_format==1)) ){
zptr+=24;
continue;
}
if (l<2) { // data
W_re=W4_nouse[l];
W_im=0;
} else if ((l>=N_UL_symb-2)) { // data
W_re=W4_nouse[l-N_UL_symb+4];
W_im=0;
}
alpha_ind=0;
// compute output sequence
for (n=0; n<12; n++) {
// this is r_uv^alpha(n)
tmp_re = (int16_t)(((int32_t)alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][n<<1] - (int32_t)alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)])>>15);
tmp_im = (int16_t)(((int32_t)alpha_re[alpha_ind] * ul_ref_sigs[u][v][0][1+(n<<1)] + (int32_t)alpha_im[alpha_ind] * ul_ref_sigs[u][v][0][n<<1])>>15);
// this is S(ns)*w_noc(m)*r_uv^alpha(n)
zptr[n<<1] = (tmp_re*W_re - tmp_im*W_im)>>15;
zptr[1+(n<<1)] = -(tmp_re*W_im + tmp_im*W_re)>>15;
alpha_ind = (alpha_ind + n_cs)%12;
} // n
zptr+=24;
} // l
} // ns
m = 1;
nsymb = N_UL_symb<<1;
zptr = (int16_t*)z;
// Do detection
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
n0_IQ[0]=0;
n0_IQ[1]=0;
for (j=0,l=0; l<nsymb; l++) {
if((((l%N_UL_symb)>1)&&((l%N_UL_symb)<N_UL_symb-2)) || ((nsymb>=N_UL_symb) && (shortened_format==1)) ){
j+=24;
continue;
}
if ((l<(nsymb>>1)) && ((m&1) == 0))
re_offset = (m*6) + frame_parms->first_carrier_offset;
else if ((l<(nsymb>>1)) && ((m&1) == 1))
re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
else if ((m&1) == 0)
re_offset = frame_parms->first_carrier_offset + (frame_parms->N_RB_DL - (m>>1) - 1)*12;
else
re_offset = ((m-1)*6) + frame_parms->first_carrier_offset;
if (re_offset > frame_parms->ofdm_symbol_size)
re_offset -= (frame_parms->ofdm_symbol_size);
symbol_offset = (unsigned int)frame_parms->ofdm_symbol_size*l;
rxptr = (int16_t *)&common_vars->rxdataF[aa][symbol_offset];
for (i=0; i<12; i++,j+=2,re_offset++) {
if (re_offset==frame_parms->ofdm_symbol_size)
re_offset = 0;
rxcomp[aa][j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[j])>>15) - ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[1+j])>>15);
rxcomp[aa][1+j] = (int16_t)((rxptr[re_offset<<1]*(int32_t)zptr[1+j])>>15) + ((rxptr[1+(re_offset<<1)]*(int32_t)zptr[j])>>15);
n0_IQ[0]+=rxcomp[aa][j];
n0_IQ[1]+=rxcomp[aa][1+j];
} //re
calc_cnt++;
} // symbol
n0_IQ[0]/=12;
n0_IQ[1]/=12;
interference_power+= (double)(n0_IQ[0]*n0_IQ[0]+n0_IQ[1]*n0_IQ[1]);
} // antenna
}
interference_power /= calc_cnt;
eNB->measurements.n0_pucch_dB = dB_fixed_x10((int)interference_power)/10;
LOG_D(PHY,"estimate pucch noise %lf %d %d\n",interference_power,calc_cnt,eNB->measurements.n0_pucch_dB);
return 0;
}
/* PUCCH format3 << */
uint32_t rx_pucch(PHY_VARS_eNB *eNB,
@@ -740,7 +871,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
static int first_call = 1;
LTE_eNB_COMMON *common_vars = &eNB->common_vars;
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
int8_t sigma2_dB = max(eNB->measurements.n0_subband_power_tot_dB[0], eNB->measurements.n0_subband_power_tot_dB[eNB->frame_parms.N_RB_UL-1]);
int8_t sigma2_dB = eNB->measurements.n0_pucch_dB;
uint32_t u,v,n,aa;
uint32_t z[12*14];
int16_t *zptr;
@@ -765,8 +897,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
uint8_t deltaPUCCH_Shift = frame_parms->pucch_config_common.deltaPUCCH_Shift;
uint8_t NRB2 = frame_parms->pucch_config_common.nRB_CQI;
uint8_t Ncs1_div_deltaPUCCH_Shift = frame_parms->pucch_config_common.nCS_AN;
uint32_t u0 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[subframe<<1]) % 30;
uint32_t u1 = (frame_parms->Nid_cell + frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.grouphop[1+(subframe<<1)]) % 30;
uint32_t u0 = (frame_parms->pucch_config_common.grouphop[subframe<<1]) % 30;
uint32_t u1 = (frame_parms->pucch_config_common.grouphop[1+(subframe<<1)]) % 30;
uint32_t v0=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[subframe<<1];
uint32_t v1=frame_parms->pusch_config_common.ul_ReferenceSignalsPUSCH.seqhop[1+(subframe<<1)];
int chL;
@@ -1141,8 +1274,13 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
}
// this is total energy received, summed over data and reference
stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) +
((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb);
if (fmt==pucch_format1a){
stat += ((((stat_re*stat_re)) + ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb);
}else{
stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) +
((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb);
}
// now second slot
stat_re=0;
stat_im=0;
@@ -1170,8 +1308,13 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
#ifdef DEBUG_PUCCH_RX
printf("aa%d re %d : phase %d : stat %d\n",aa,re,phase,stat);
#endif
stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) +
((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb);
if (fmt==pucch_format1a){
stat += ((((stat_re*stat_re)) + ((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb);
}else{
stat += ((((stat_re*stat_re)) + ((stat_im*stat_im)) +
((stat_ref_re*stat_ref_re)) + ((stat_ref_im*stat_ref_im)))/nsymb);
}
} //re
} // aa
openair1/PHY/LTE_TRANSPORT/transport_proto.h
+5 -1
View File
@@ -621,7 +621,11 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
uint16_t frame,
uint8_t Ns);
uint32_t calc_pucch_1x_interference(PHY_VARS_eNB *eNB,
int frame,
uint8_t subframe,
uint8_t shortened_format
);
uint32_t rx_pucch(PHY_VARS_eNB *phy_vars_eNB,
PUCCH_FMT_t fmt,
openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c
+36 -11
View File
@@ -755,6 +755,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
__m128i *ul_ch128,*ul_ch_mag128,*ul_ch_mag128b,*rxdataF128,*rxdataF_comp128;
uint8_t aarx;//,symbol_mod;
__m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3;
#elif defined(__arm__)
int16x4_t *ul_ch128,*rxdataF128;
int16x8_t *ul_ch_mag128,*ul_ch_mag128b,*rxdataF_comp128;
@@ -762,6 +763,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
int32x4_t mmtmpU0,mmtmpU1,mmtmpU0b,mmtmpU1b;
int16_t conj[4]__attribute__((aligned(16))) = {1,-1,1,-1};
int32x4_t output_shift128 = vmovq_n_s32(-(int32_t)output_shift);
#endif
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
@@ -872,6 +874,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
rxdataF_comp128[0] = _mm_add_epi16(rxdataF_comp128[0],(*(__m128i *)&jitter[0]));
rxdataF_comp128[1] = _mm_add_epi16(rxdataF_comp128[1],(*(__m128i *)&jitter[0]));
rxdataF_comp128[2] = _mm_add_epi16(rxdataF_comp128[2],(*(__m128i *)&jitter[0]));
ul_ch128+=3;
ul_ch_mag128+=3;
ul_ch_mag128b+=3;
@@ -918,9 +921,10 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
mmtmpU1 = vqshlq_s32(mmtmpU1,-output_shift128);
rxdataF_comp128[2] = vcombine_s16(vmovn_s32(mmtmpU0),vmovn_s32(mmtmpU1));
// Add a jitter to compensate for the saturation in "packs" resulting in a bias on the DC after IDFT
rxdataF_comp128[0] = vqaddq_s16(rxdataF_comp128[0],(*(int16x8_t *)&jitter[0]));
rxdataF_comp128[1] = vqaddq_s16(rxdataF_comp128[1],(*(int16x8_t *)&jitter[0]));
rxdataF_comp128[2] = vqaddq_s16(rxdataF_comp128[2],(*(int16x8_t *)&jitter[0]));
rxdataF_comp128[0] = vqaddq_s16(rxdataF_comp128[0],(*(int16x8_t*)&jitter[0]));
rxdataF_comp128[1] = vqaddq_s16(rxdataF_comp128[1],(*(int16x8_t*)&jitter[0]));
rxdataF_comp128[2] = vqaddq_s16(rxdataF_comp128[2],(*(int16x8_t*)&jitter[0]));
ul_ch128+=6;
ul_ch_mag128+=3;
ul_ch_mag128b+=3;
@@ -1031,6 +1035,7 @@ void rx_ulsch(PHY_VARS_eNB *eNB,
AssertFatal(ulsch[UE_id]->harq_processes[harq_pid]->nb_rb > 0,
"PUSCH (%d/%x) nb_rb=0!\n", harq_pid,ulsch[UE_id]->rnti);
for (l=0; l<(frame_parms->symbols_per_tti-ulsch[UE_id]->harq_processes[harq_pid]->srs_active); l++) {
if(LOG_DEBUGFLAG(DEBUG_ULSCH)) {
LOG_I(PHY,"rx_ulsch : symbol %d (first_rb %d,nb_rb %d), rxdataF %p, rxdataF_ext %p\n",l,
@@ -1064,18 +1069,38 @@ void rx_ulsch(PHY_VARS_eNB *eNB,
if (deltaMCS==1) {
// Note we're using TBS instead of sumKr, since didn't run segmentation yet!
MPR_times_100Ks = 500*ulsch[UE_id]->harq_processes[harq_pid]->TBS/(ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*4*ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch);
AssertFatal(MPR_times_100Ks < 750 && MPR_times_100Ks >= 0,"Impossible value for MPR_times_100Ks %d (TBS %d,Nre %d)\n",
MPR_times_100Ks,ulsch[UE_id]->harq_processes[harq_pid]->TBS,
(ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12*4*ulsch[UE_id]->harq_processes[harq_pid]->Nsymb_pusch));
if (MPR_times_100Ks > 0) correction_factor = ulsch_power_LUT[MPR_times_100Ks];
if ((MPR_times_100Ks > 0)&&(MPR_times_100Ks < 750)){
correction_factor = ulsch_power_LUT[MPR_times_100Ks];
}else{
correction_factor = 1;
}
}
for (i=0; i<frame_parms->nb_antennas_rx; i++) {
pusch_vars->ulsch_power[i] = signal_energy_nodc(pusch_vars->drs_ch_estimates[i],
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12)/correction_factor;
LOG_D(PHY,"%4.4d.%d power harq_pid %d rb %2.2d TBS %2.2d (MPR_times_Ks %d correction %d) power %d dBtimes10\n", proc->frame_rx, proc->subframe_rx, harq_pid,
ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, ulsch[UE_id]->harq_processes[harq_pid]->TBS,MPR_times_100Ks,correction_factor,dB_fixed_times10(pusch_vars->ulsch_power[i]));
//symbol 3
int symbol_offset = frame_parms->N_RB_UL*12*(3 - frame_parms->Ncp);
pusch_vars->ulsch_interference_power[i] = interference_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12);
pusch_vars->ulsch_power[i] = signal_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12);
//symbol 3+7
symbol_offset = frame_parms->N_RB_UL*12*((3 - frame_parms->Ncp)+(7-frame_parms->Ncp));
pusch_vars->ulsch_interference_power[i] += interference_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12);
pusch_vars->ulsch_power[i] += signal_power(&pusch_vars->drs_ch_estimates[i][symbol_offset],ulsch[UE_id]->harq_processes[harq_pid]->nb_rb*12);
pusch_vars->ulsch_interference_power[i] = pusch_vars->ulsch_interference_power[i]/correction_factor;
pusch_vars->ulsch_power[i] = pusch_vars->ulsch_power[i]/correction_factor;
if(pusch_vars->ulsch_power[i]>0x20000000){
pusch_vars->ulsch_power[i] = 0x20000000;
pusch_vars->ulsch_interference_power[i] = 1;
}else{
pusch_vars->ulsch_power[i] -= pusch_vars->ulsch_interference_power[i];
if(pusch_vars->ulsch_power[i]<1) pusch_vars->ulsch_power[i] = 1;
if(pusch_vars->ulsch_interference_power[i]<1)pusch_vars->ulsch_interference_power[i] = 1;
}
LOG_D(PHY,"%4.4d.%d power harq_pid %d rb %2.2d TBS %2.2d (MPR_times_Ks %d correction %d) power %d dBtimes10\n", proc->frame_rx, proc->subframe_rx, harq_pid, ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, ulsch[UE_id]->harq_processes[harq_pid]->TBS,MPR_times_100Ks,correction_factor,dB_fixed_x10(pusch_vars->ulsch_power[i]));
}
ulsch_channel_level(pusch_vars->drs_ch_estimates,
openair1/PHY/TOOLS/dB_routines.c
+315
View File
@@ -540,6 +540,289 @@ int16_t dB_table_times10[256] = {
240,
240
};
uint32_t bit_seach_mask[32] = {
0x80000000, 0x40000000, 0x20000000, 0x10000000,
0x08000000, 0x04000000, 0x02000000, 0x01000000,
0x00800000, 0x00400000, 0x00200000, 0x00100000,
0x00080000, 0x00040000, 0x00020000, 0x00010000,
0x00008000, 0x00004000, 0x00002000, 0x00001000,
0x00000800, 0x00000400, 0x00000200, 0x00000100,
0x00000080, 0x00000040, 0x00000020, 0x00000010,
0x00000008, 0x00000004, 0x00000002, 0x00000001
};
uint32_t bit_seach_res[32] = {
31, 30, 29, 28,
27, 26, 25, 24,
23, 22, 21, 20,
19, 18, 17, 16,
15, 14, 13, 12,
11, 10, 9, 8,
7, 6, 5, 4,
3, 2, 1, 0
};
uint32_t dB_fix_x10_tbl[128] = {
0 ,
0 ,
1 ,
1 ,
1 ,
2 ,
2 ,
2 ,
3 ,
3 ,
3 ,
4 ,
4 ,
4 ,
5 ,
5 ,
5 ,
5 ,
6 ,
6 ,
6 ,
7 ,
7 ,
7 ,
7 ,
8 ,
8 ,
8 ,
9 ,
9 ,
9 ,
9 ,
10 ,
10 ,
10 ,
10 ,
11 ,
11 ,
11 ,
12 ,
12 ,
12 ,
12 ,
13 ,
13 ,
13 ,
13 ,
14 ,
14 ,
14 ,
14 ,
15 ,
15 ,
15 ,
15 ,
16 ,
16 ,
16 ,
16 ,
16 ,
17 ,
17 ,
17 ,
17 ,
18 ,
18 ,
18 ,
18 ,
19 ,
19 ,
19 ,
19 ,
19 ,
20 ,
20 ,
20 ,
20 ,
20 ,
21 ,
21 ,
21 ,
21 ,
22 ,
22 ,
22 ,
22 ,
22 ,
23 ,
23 ,
23 ,
23 ,
23 ,
24 ,
24 ,
24 ,
24 ,
24 ,
24 ,
25 ,
25 ,
25 ,
25 ,
25 ,
26 ,
26 ,
26 ,
26 ,
26 ,
27 ,
27 ,
27 ,
27 ,
27 ,
27 ,
28 ,
28 ,
28 ,
28 ,
28 ,
29 ,
29 ,
29 ,
29 ,
29 ,
29 ,
30 ,
30 ,
30
};
uint32_t dB_fix_x10_tbl_low[128] = {
0 ,
0 ,
30 ,
48 ,
60 ,
70 ,
78 ,
85 ,
90 ,
95 ,
100 ,
104 ,
108 ,
111 ,
115 ,
118 ,
120 ,
123 ,
126 ,
128 ,
130 ,
132 ,
134 ,
136 ,
138 ,
140 ,
141 ,
143 ,
145 ,
146 ,
148 ,
149 ,
151 ,
152 ,
153 ,
154 ,
156 ,
157 ,
158 ,
159 ,
160 ,
161 ,
162 ,
163 ,
164 ,
165 ,
166 ,
167 ,
168 ,
169 ,
170 ,
171 ,
172 ,
172 ,
173 ,
174 ,
175 ,
176 ,
176 ,
177 ,
178 ,
179 ,
179 ,
180 ,
181 ,
181 ,
182 ,
183 ,
183 ,
184 ,
185 ,
185 ,
186 ,
186 ,
187 ,
188 ,
188 ,
189 ,
189 ,
190 ,
190 ,
191 ,
191 ,
192 ,
192 ,
193 ,
193 ,
194 ,
194 ,
195 ,
195 ,
196 ,
196 ,
197 ,
197 ,
198 ,
198 ,
199 ,
199 ,
200 ,
200 ,
200 ,
201 ,
201 ,
202 ,
202 ,
203 ,
203 ,
203 ,
204 ,
204 ,
205 ,
205 ,
205 ,
206 ,
206 ,
206 ,
207 ,
207 ,
208 ,
208 ,
208 ,
209 ,
209 ,
209 ,
210 ,
210 ,
210
};
/*
int8_t dB_fixed(int x) {
@@ -571,6 +854,38 @@ int8_t dB_fixed(int x) {
}
*/
int16_t dB_fixed_x10(uint32_t x) {
int16_t dB_power = 0;
//for new algorithm
uint32_t cnt;
uint32_t Exponent;
uint32_t Mantissa;
uint32_t shift_right;
uint32_t tbl_resolution = 7;
uint32_t tbl_addr_mask;
if (x < 128){ //OAI alogrithm
dB_power = dB_fix_x10_tbl_low[x];
}
else { //new algorithm
tbl_addr_mask = 0x0000007Fu; // (1 << tbl_resolution) - 1;//i.e. 0x0000007F
Mantissa = 0;
Exponent = 0;
for (cnt = 0; cnt < 32; cnt++) {
if ((bit_seach_mask[cnt] & x) != 0) {
Exponent = bit_seach_res[cnt];
Mantissa = x & (~bit_seach_mask[cnt]);
break;
}
}
shift_right = Exponent - tbl_resolution;
Mantissa = (Mantissa >> shift_right) & tbl_addr_mask;
dB_power = dB_fix_x10_tbl[Mantissa] + Exponent * 30u;
}
return dB_power;
}
int16_t dB_fixed_times10(uint32_t x)
{
int16_t dB_power=0;
openair1/PHY/TOOLS/dB_routines.h
+1
View File
@@ -30,5 +30,6 @@
#define DB_ROUTINES_H_
int16_t dB_fixed_times10(uint32_t x);
int16_t dB_fixed_x10(uint32_t x);
#endif /* DB_ROUTINES_H_ */
openair1/PHY/TOOLS/signal_energy.c
+106 -89
View File
@@ -29,6 +29,7 @@
#define shift 4
//#define shift_DC 0
#define SHRT_MIN -32768
#if defined(__x86_64__) || defined(__i386__)
#ifdef LOCALIZATION
@@ -67,52 +68,39 @@ int32_t subcarrier_energy(int32_t *input,uint32_t length, int32_t *subcarrier_en
}
#endif
//-----------------------------------------------------------------
// Average Power calculation with DC removing
//-----------------------------------------------------------------
int32_t signal_energy(int32_t *input,uint32_t length)
{
uint32_t i;
int32_t temp;
__m128i in, in_clp, i16_min, coe1;
__m128 num0, num1, num2, num3, recp1;
int32_t i;
int32_t temp,temp2;
register __m64 mm0,mm1,mm2,mm3;
__m64 *in = (__m64 *)input;
//init
num0 = _mm_setzero_ps();
num1 = _mm_setzero_ps();
i16_min = _mm_set1_epi16(SHRT_MIN);
coe1 = _mm_set1_epi16(1);
recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length)));
mm0 = _mm_setzero_si64();//pxor(mm0,mm0);
mm3 = _mm_setzero_si64();//pxor(mm3,mm3);
for (i=0; i<length>>1; i++) {
mm1 = in[i];
mm2 = mm1;
mm1 = _m_pmaddwd(mm1,mm1);
mm1 = _m_psradi(mm1,shift);// shift any 32 bits blocs of the word by the value shift
mm0 = _m_paddd(mm0,mm1);// add the two 64 bits words 4 bytes by 4 bytes
// mm2 = _m_psrawi(mm2,shift_DC);
mm3 = _m_paddw(mm3,mm2);// add the two 64 bits words 2 bytes by 2 bytes
//Acc
for (i = 0; i < (length >> 2); i++) {
in = _mm_loadu_si128((__m128i *)input);
in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in
num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp)));
num1 = _mm_add_ps(num1, _mm_cvtepi32_ps(_mm_madd_epi16(in, coe1)));//DC
input += 4;
}
//Ave
num2 = _mm_dp_ps(num0, recp1, 0xFF);//AC power
num3 = _mm_dp_ps(num1, recp1, 0xFF);//DC
num3 = _mm_mul_ps(num3, num3); //DC power
//remove DC
temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(_mm_sub_ps(num2, num3)));
mm1 = mm0;
mm0 = _m_psrlqi(mm0,32);
mm0 = _m_paddd(mm0,mm1);
temp = _m_to_int(mm0);
temp/=length;
temp<<=shift; // this is the average of x^2
// now remove the DC component
mm2 = _m_psrlqi(mm3,32);
mm2 = _m_paddw(mm2,mm3);
mm2 = _m_pmaddwd(mm2,mm2);
temp2 = _m_to_int(mm2);
temp2/=(length*length);
// temp2<<=(2*shift_DC);
temp -= temp2;
_mm_empty();
_m_empty();
return((temp>0)?temp:1);
return temp;
}
int32_t signal_energy_amp_shift(int32_t *input,uint32_t length)
@@ -163,61 +151,27 @@ int32_t signal_energy_amp_shift(int32_t *input,uint32_t length)
int32_t signal_energy_nodc(int32_t *input,uint32_t length)
{
int32_t i;
int32_t temp;
register __m64 mm0,mm1;//,mm2,mm3;
__m64 *in = (__m64 *)input;
#ifdef MAIN
int16_t *printb;
#endif
mm0 = _mm_setzero_si64();//_pxor(mm0,mm0);
// mm3 = _mm_setzero_si64();//pxor(mm3,mm3);
for (i=0; i<length>>1; i++) {
mm1 = in[i];
mm1 = _m_pmaddwd(mm1,mm1);// SIMD complex multiplication
mm1 = _m_psradi(mm1,shift);
mm0 = _m_paddd(mm0,mm1);
// temp2 = mm0;
// printf("%d %d\n",((int *)&in[i])[0],((int *)&in[i])[1]);
// printb = (int16_t *)&mm2;
// printf("mm2 %d : %d %d %d %d\n",i,printb[0],printb[1],printb[2],printb[3]);
__m128i in;
__m128 mm0;
//init
mm0 = _mm_setzero_ps();
//Acc
for (i=0; i<(length>>2); i++) {
in = _mm_loadu_si128((__m128i *)input);
mm0 = _mm_add_ps(mm0,_mm_cvtepi32_ps(_mm_madd_epi16(in,in)));
input += 4;
}
//Ave
temp = (int)((((float*)&mm0)[0] +
((float*)&mm0)[1] +
((float*)&mm0)[2] +
((float*)&mm0)[3])/(float)length);
/*
#ifdef MAIN
printb = (int16_t *)&mm3;
printf("%d %d %d %d\n",printb[0],printb[1],printb[2],printb[3]);
#endif
*/
mm1 = mm0;
mm0 = _m_psrlqi(mm0,32);
mm0 = _m_paddd(mm0,mm1);
temp = _m_to_int(mm0);
temp/=length;
temp<<=shift; // this is the average of x^2
#ifdef MAIN
printf("E x^2 = %d\n",temp);
#endif
_mm_empty();
_m_empty();
return((temp>0)?temp:1);
return temp;
}
#elif defined(__arm__)
@@ -364,3 +318,66 @@ main(int argc,char **argv)
}
#endif
#define SHRT_MIN -32768
int32_t signal_power(int32_t *input, uint32_t length)
{
uint32_t i;
int32_t temp;
__m128i in, in_clp, i16_min;
__m128 num0, num1;
__m128 recp1;
//init
num0 = _mm_setzero_ps();
i16_min = _mm_set1_epi16(SHRT_MIN);
recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length)));
//Acc
for (i = 0; i < (length >> 2); i++) {
in = _mm_loadu_si128((__m128i *)input);
in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min));//if in=SHRT_MIN in+1, else in
num0 = _mm_add_ps(num0, _mm_cvtepi32_ps(_mm_madd_epi16(in_clp, in_clp)));
input += 4;
}
//Ave
num1 = _mm_dp_ps(num0, recp1, 0xFF);
temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num1));
return temp;
}
int32_t interference_power(int32_t *input, uint32_t length)
{
uint32_t i;
int32_t temp;
__m128i in, in_clp, i16_min;
__m128i num0, num1, num2, num3;
__m128 num4, num5, num6;
__m128 recp1;
//init
i16_min = _mm_set1_epi16(SHRT_MIN);
num5 = _mm_setzero_ps();
recp1 = _mm_rcp_ps(_mm_cvtepi32_ps(_mm_set1_epi32(length>>2)));// 1/n, n= length/4
//Acc
for (i = 0; i < (length >> 2); i++) {
in = _mm_loadu_si128((__m128i *)input);
in_clp = _mm_subs_epi16(in, _mm_cmpeq_epi16(in, i16_min)); //if in=SHRT_MIN, in+1, else in
num0 = _mm_cvtepi16_epi32(in_clp); //lower 2 complex [0], [1]
num1 = _mm_cvtepi16_epi32(_mm_shuffle_epi32(in_clp, 0x4E)); //upper 2 complex [2], [3]
num2 = _mm_srai_epi32(_mm_add_epi32(num0, num1), 0x01); //average A=complex( [0] + [2] ) / 2, B=complex( [1] + [3] ) / 2
num3 = _mm_sub_epi32(num2, _mm_shuffle_epi32(num2, 0x4E)); //complexA-complexB, B-A
num4 = _mm_dp_ps(_mm_cvtepi32_ps(num3), _mm_cvtepi32_ps(num3), 0x3F);//C = num3 lower complex power, C, C, C
num5 = _mm_add_ps(num5, num4); //Acc Cn, Cn, Cn, Cn,
input += 4;
}
//Interference ve
num6 = _mm_mul_ps(num5, recp1); //Cn / n
temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num6));
return temp;
}
openair1/PHY/TOOLS/tools_defs.h
+4
View File
@@ -431,6 +431,9 @@ int32_t subcarrier_energy(int32_t *,uint32_t, int32_t* subcarrier_energy, uint16
*/
int32_t signal_energy_nodc(int32_t *,uint32_t);
int32_t signal_power(int32_t *,uint32_t);
int32_t interference_power(int32_t *,uint32_t);
/*!\fn double signal_energy_fp(double *s_re[2], double *s_im[2],uint32_t, uint32_t,uint32_t);
\brief Computes the signal energy per subcarrier
*/
@@ -469,6 +472,7 @@ uint8_t dB_fixed64(uint64_t x);
int8_t dB_fixed2(uint32_t x,uint32_t y);
int16_t dB_fixed_times10(uint32_t x);
int16_t dB_fixed_x10(uint32_t x);
int32_t phy_phase_compensation_top(uint32_t pilot_type,
uint32_t initial_pilot,
openair1/PHY/defs_eNB.h
+5
View File
@@ -166,6 +166,8 @@ typedef struct {
int32_t **ul_ch_magb;
/// measured RX power based on DRS
int ulsch_power[2];
/// measured Interference power based on DRS
int ulsch_interference_power[2];
/// \brief llr values.
/// - first index: ? [0..1179743] (hard coded)
int16_t *llr;
@@ -419,6 +421,8 @@ typedef struct {
int subband_cqi_tot_dB[NUMBER_OF_UE_MAX][100];
/// PRACH background noise level
int prach_I0;
/// PUCCH background noise level
int n0_pucch_dB;
} PHY_MEASUREMENTS_eNB;
@@ -667,6 +671,7 @@ typedef struct PHY_VARS_eNB_s {
int32_t pusch_stats_bsr[NUMBER_OF_UE_MAX][10240];
int32_t pusch_stats_BO[NUMBER_OF_UE_MAX][10240];
uint8_t *FS6bufferZone;
int32_t pusch_signal_threshold;
} PHY_VARS_eNB;
openair1/SCHED/fapi_l1.c
+26 -5
View File
@@ -992,11 +992,32 @@ void schedule_response(Sched_Rsp_t *Sched_INFO, L1_rxtx_proc_t *proc) {
if (NFAPI_MODE!=NFAPI_MONOLITHIC) {
if (number_ul_pdu>0) {
//LOG_D(PHY, "UL_CONFIG to send to PNF\n");
UL_req->sfn_sf = frame << 4 | subframe;
oai_nfapi_ul_config_req(UL_req);
UL_req->ul_config_request_body.number_of_pdus=0;
number_ul_pdu=0;
uint8_t ulsch_pdu_num = 0;
for (i=0; i<number_ul_pdu; i++) {
if((UL_req->ul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_PDU_TYPE) ||
(UL_req->ul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_RI_PDU_TYPE) ||
(UL_req->ul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE) ||
(UL_req->ul_config_request_body.ul_config_pdu_list[i].pdu_type == NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE)){
ulsch_pdu_num++;
}
}
if (RC.mac[Mod_id]->scheduler_mode == SCHED_MODE_DEFAULT) {
//LOG_D(PHY, "UL_CONFIG to send to PNF\n");
UL_req->sfn_sf = frame << 4 | subframe;
oai_nfapi_ul_config_req(UL_req);
UL_req->ul_config_request_body.number_of_pdus=0;
number_ul_pdu=0;
}else if (RC.mac[Mod_id]->scheduler_mode == SCHED_MODE_FAIR_RR) {
if(ulsch_pdu_num <= RC.rrc[Mod_id]->configuration.radioresourceconfig[CC_id].ue_multiple_max){
UL_req->sfn_sf = frame << 4 | subframe;
oai_nfapi_ul_config_req(UL_req);
UL_req->ul_config_request_body.number_of_pdus=0;
number_ul_pdu=0;
}else{
LOG_E(MAC,"NFAPI: frame %d subframe %d ul_req num %d ul pdu %d\n",
frame,subframe,number_ul_pdu,ulsch_pdu_num);
}
}
}
} else {
for (i=0; i<number_ul_pdu; i++) {
openair1/SCHED/phy_procedures_lte_common.c
+1 -1
View File
@@ -1146,7 +1146,7 @@ int16_t estimate_ue_tx_power(uint32_t tbs, uint32_t nb_rb, uint8_t control_only,
//(beta_offset_pusch_x8=ue->ulsch[eNB_id]->harq_processes[harq_pid]->control_only == 1) ? ue->ulsch[eNB_id]->beta_offset_cqi_times8:8;
// if deltamcs_enabledm
delta_mcs = ((hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_times10((beta_offset_pusch_x8)>>3))/100.0);
delta_mcs = ((hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_x10((beta_offset_pusch_x8)>>3))/100.0);
bw_factor = (hundred_times_log10_NPRB[nb_rb-1]/100.0);
#ifdef DEBUG_SEGMENTATION
printf("estimated ue tx power %d (num_re %d, sumKr %d, mpr_x100 %d, delta_mcs %f, bw_factor %f)\n",
openair1/SCHED/phy_procedures_lte_eNb.c
+8 -6
View File
@@ -87,9 +87,9 @@ int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint16_t UE_id,uint8_t
// This is the formula from Section 5.1.1.1 in 36.213 10*log10(deltaIF_PUSCH = (2^(MPR*Ks)-1)*beta_offset_pusch)
if (bw_factor == 1) {
uint8_t nb_rb = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb;
return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_times10((beta_offset_pusch)>>3)) + hundred_times_log10_NPRB[nb_rb-1];
return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_x10((beta_offset_pusch)>>3)) + hundred_times_log10_NPRB[nb_rb-1];
} else
return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_times10((beta_offset_pusch)>>3));
return(hundred_times_delta_TF[MPR_x100/6]+10*dB_fixed_x10((beta_offset_pusch)>>3));
} else {
return(0);
}
@@ -757,8 +757,8 @@ void fill_sr_indication(int UEid, PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int
// pdu->rx_ue_information.handle = handle;
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = rnti;
int SNRtimes10 = dB_fixed_times10(stat) - 10 * eNB->measurements.n0_subband_power_avg_dB;
LOG_D(PHY,"stat %d subband n0 %d, SNRtimes10 %d\n", stat, eNB->measurements.n0_subband_power_avg_dB, SNRtimes10);
int SNRtimes10 = dB_fixed_x10(stat) - 10 * eNB->measurements.n0_pucch_dB;
LOG_D(PHY,"stat %d n0 %d, SNRtimes10 %d\n", stat, eNB->measurements.n0_subband_power_dB[0][0], SNRtimes10);
pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG;
if (SNRtimes10 < -640) pdu->ul_cqi_information.ul_cqi=0;
@@ -791,6 +791,8 @@ uci_procedures(PHY_VARS_eNB *eNB,
LTE_eNB_UCI *uci = NULL;
LTE_DL_FRAME_PARMS *fp = &(eNB->frame_parms);
calc_pucch_1x_interference(eNB, frame, subframe, 0);
for (int i = 0; i < NUMBER_OF_UCI_VARS_MAX; i++) {
uci = &(eNB->uci_vars[i]);
@@ -1605,7 +1607,7 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,
pdu->rx_indication_rel8.timing_advance = timing_advance_update;
// estimate UL_CQI for MAC
int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0] + ((eNB->frame_parms.nb_antennas_rx>1) ?eNB->pusch_vars[UE_id]->ulsch_power[1] : 0 )) - 10 * eNB->measurements.n0_subband_power_avg_dB;
int SNRtimes10 = dB_fixed_x10(eNB->pusch_vars[UE_id]->ulsch_power[0] + ((eNB->frame_parms.nb_antennas_rx>1) ?eNB->pusch_vars[UE_id]->ulsch_power[1] : 0 ) ) - dB_fixed_x10(eNB->pusch_vars[UE_id]->ulsch_interference_power[0]+((eNB->frame_parms.nb_antennas_rx>1) ?eNB->pusch_vars[UE_id]->ulsch_interference_power[1] : 0 ) );
if (SNRtimes10 < -640)
pdu->rx_indication_rel8.ul_cqi = 0;
@@ -1919,7 +1921,7 @@ void fill_uci_harq_indication (int UEid, PHY_VARS_eNB *eNB, LTE_eNB_UCI *uci, in
pdu->rx_ue_information.rnti = uci->rnti;
// estimate UL_CQI for MAC (from antenna port 0 only)
pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG;
int SNRtimes10 = dB_fixed_times10(uci->stat) - 10 * eNB->measurements.n0_subband_power_avg_dB;
int SNRtimes10 = dB_fixed_x10(uci->stat) - 10 * eNB->measurements.n0_pucch_dB;
if (SNRtimes10 < -100)
LOG_I (PHY, "uci->stat %d \n", uci->stat);
openair1/SCHED/ru_procedures.c
-1
View File
@@ -775,7 +775,6 @@ void fep_full(RU_t *ru,
if ((fp->frame_type == TDD) &&
(subframe_select(fp,subframe) != SF_UL)) return;
start_meas(&ru->ofdm_demod_stats);
if (ru->idx == 0) VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+ru->idx, 1 );
openair2/ENB_APP/L1_paramdef.h
+4 -1
View File
@@ -61,6 +61,7 @@
#define CONFIG_STRING_L1_PRACH_DTX_EMTC3_THRESHOLD "prach_dtx_emtc3_threshold"
#define CONFIG_STRING_L1_PUCCH1_DTX_EMTC3_THRESHOLD "pucch1_dtx_emtc3_threshold"
#define CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD "pucch1ab_dtx_emtc3_threshold"
#define CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD "pusch_signal_threshold"
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
/* L1 configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
@@ -89,7 +90,8 @@
{CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC2_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PRACH_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PUCCH1_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0} \
{CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD, NULL, 0, iptr:NULL, defintval:635, TYPE_INT, 0} \
}
#define L1_CC_IDX 0
#define L1_TRANSPORT_N_PREFERENCE_IDX 1
@@ -115,6 +117,7 @@
#define L1_PRACH_DTX_EMTC3_THRESHOLD_IDX 21
#define L1_PUCCH1_DTX_EMTC3_THRESHOLD_IDX 22
#define L1_PUCCH1AB_DTX_EMTC3_THRESHOLD_IDX 23
#define L1_PUSCH_SIGNAL_THRESHOLD_IDX 24
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
#endif
openair2/ENB_APP/enb_config.c
+4
View File
@@ -169,6 +169,10 @@ void RCconfig_L1(void) {
RC.eNB[j][0]->pucch1_DTX_threshold_emtc[ce_level] = *(L1_ParamList.paramarray[j][L1_PUCCH1_DTX_EMTC0_THRESHOLD_IDX+ce_level].iptr);
RC.eNB[j][0]->pucch1ab_DTX_threshold_emtc[ce_level] = *(L1_ParamList.paramarray[j][L1_PUCCH1AB_DTX_EMTC0_THRESHOLD_IDX+ce_level].iptr);
}
RC.eNB[j][0]->pusch_signal_threshold = *(L1_ParamList.paramarray[j][L1_PUSCH_SIGNAL_THRESHOLD_IDX].iptr);
LOG_I(ENB_APP,"PUSCH singal threshold = %d \n",RC.eNB[j][0]->pusch_signal_threshold);
}// j=0..num_inst
LOG_I(ENB_APP,"Initializing northbound interface for L1\n");
openair2/LAYER2/MAC/eNB_scheduler.c
+31 -3
View File
@@ -596,13 +596,41 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
UE_scheduling_control = &(UE_info->UE_sched_ctrl[UE_id]);
if (((frameP & 127) == 0) && (subframeP == 0)) {
LOG_I(MAC,"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
double total_bler;
if(UE_scheduling_control->pusch_rx_num[CC_id] == 0 && UE_scheduling_control->pusch_rx_error_num[CC_id] == 0) {
total_bler = 0;
}
else {
total_bler = (double)UE_scheduling_control->pusch_rx_error_num[CC_id] / (double)(UE_scheduling_control->pusch_rx_error_num[CC_id] + UE_scheduling_control->pusch_rx_num[CC_id]) * 100;
}
LOG_I(MAC,"UE %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf mcsoff %d bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d\n",
rnti,
UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync",
UE_info->UE_template[CC_id][UE_id].phr_info,
UE_scheduling_control->dl_cqi[CC_id],
(5 * UE_scheduling_control->pusch_snr[CC_id] - 640) / 10,
(5 * UE_scheduling_control->pucch1_snr[CC_id] - 640) / 10);
UE_scheduling_control->pusch_snr_avg[CC_id],
UE_scheduling_control->pucch1_snr[CC_id],
UE_scheduling_control->rlc_out_of_resources_cnt,
UE_scheduling_control->pusch_rx_num[CC_id],
UE_scheduling_control->pusch_rx_error_num[CC_id],
total_bler,
UE_scheduling_control->mcs_offset[CC_id],
UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer,
UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes,
UE_info->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes_rx,
UE_info->eNB_UE_stats[CC_id][UE_id].total_num_pdus_rx,
UE_info->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes,
UE_info->eNB_UE_stats[CC_id][UE_id].total_num_pdus,
UE_info->eNB_UE_stats[CC_id][UE_id].total_rbs_used,
#if defined(PRE_SCD_THREAD)
UE_info->UE_template[CC_id][UE_id].dl_buffer_total,
#else
0,
#endif
UE_scheduling_control->first_cnt[CC_id],
UE_scheduling_control->ret_cnt[CC_id],
UE_scheduling_control->aperiodic_ri_received[CC_id]
);
}
RC.eNB[module_idP][CC_id]->pusch_stats_bsr[UE_id][(frameP * 10) + subframeP] = -63;
openair2/LAYER2/MAC/eNB_scheduler_RA.c
-7
View File
@@ -212,13 +212,6 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t *ra, frame_t frameP,
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
if (NFAPI_MODE != NFAPI_MONOLITHIC) {
oai_nfapi_hi_dci0_req(hi_dci0_req);
hi_dci0_req_body->number_of_hi=0;
}
LOG_D(MAC, "MSG3: HI_DCI0 SFN/SF:%d number_of_dci:%d number_of_hi:%d\n", NFAPI_SFNSF2DEC(hi_dci0_req->sfn_sf), hi_dci0_req_body->number_of_dci, hi_dci0_req_body->number_of_hi);
// save UL scheduling information for preprocessor
for (j = 0; j < ra->msg3_nb_rb; j++)
cc->vrb_map_UL[ra->msg3_first_rb + j] = 1;
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+4 -2
View File
@@ -821,6 +821,7 @@ schedule_ue_spec(module_id_t module_idP,
/* reset ta_update */
ue_sched_ctrl->ta_update = 31;
ue_sched_ctrl->ta_update_f = 31.0;
}
int ta_len = (ta_update != 31) ? 2 : 0;
@@ -1050,7 +1051,7 @@ schedule_ue_spec(module_id_t module_idP,
// this is the snr
// unit is not dBm, it's special from nfapi
// converting to dBm
int snr = (5 * ue_sched_ctrl->pucch1_snr[CC_id] - 640) / 10;
int snr = ue_sched_ctrl->pucch1_snr[CC_id];
int target_snr = eNB->puCch10xSnr / 10;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
@@ -1366,6 +1367,7 @@ schedule_ue_spec_br(module_id_t module_idP,
/* Reset ta_update */
ue_sched_ctl->ta_update = 31;
ue_sched_ctl->ta_update_f = 31.0;
} else {
ta_update = 31;
}
@@ -1684,7 +1686,7 @@ schedule_ue_spec_br(module_id_t module_idP,
/* Do PUCCH power control */
/* This is the snr */
/* unit is not dBm, it's special from nfapi, convert to dBm */
snr = (5 * ue_sched_ctl->pucch1_snr[CC_id] - 640) / 10;
snr = ue_sched_ctl->pucch1_snr[CC_id];
target_snr = mac->puCch10xSnr / 10;
/* This assumes accumulated tpc */
/* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
+139 -36
View File
@@ -61,7 +61,9 @@ extern void add_subframe(uint16_t *frameP, uint16_t *subframeP, int offset);
/* internal vars */
DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs];
int last_dlsch_ue_id[MAX_NUM_CCs] = {-1};
int last_dlsch_ue_id_volte[MAX_NUM_CCs] = {-1};
int last_ulsch_ue_id[MAX_NUM_CCs] = {-1};
int last_ulsch_ue_id_volte[MAX_NUM_CCs] = {-1};
#if defined(PRE_SCD_THREAD)
uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
@@ -1567,6 +1569,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
ue_sched_ctl->ta_update_f = 31.0;
} else {
ta_update = 31;
}
@@ -1998,14 +2001,15 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
// this is the snr
eNB_UE_stats = &UE_info->eNB_UE_stats[CC_id][UE_id];
/* Unit is not dBm, it's special from nfapi */
snr = (5 * ue_sched_ctl->pucch1_snr[CC_id] - 640) / 10;
target_snr = eNB->puCch10xSnr / 10;
snr = ue_sched_ctl->pucch1_snr[CC_id];
target_snr = eNB->puCch10xSnr/10;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
int32_t framex10psubframe = UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_frame*10+UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe;
int pucch_tpc_interval=10;
if (((framex10psubframe+10)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=10)))) //frame wrap-around
if (((framex10psubframe+pucch_tpc_interval)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pucch_tpc_interval)))) //frame wrap-around
if (ue_sched_ctl->pucch1_cqi_update[CC_id] == 1) {
ue_sched_ctl->pucch1_cqi_update[CC_id] = 0;
UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_frame=frameP;
@@ -2300,6 +2304,18 @@ void ulsch_scheduler_pre_ue_select_fairRR(
}
}
if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) {
aggregation = 4;
if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4)
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
}else{
//aggregation = 2;
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),
UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],
format0);
}
cc = &eNB->common_channels[CC_id];
//harq_pid
harq_pid = subframe2harqpid(cc,(frameP+(sched_subframeP<subframeP ? 1 : 0)),sched_subframeP);
@@ -2331,7 +2347,10 @@ void ulsch_scheduler_pre_ue_select_fairRR(
//
int bytes_to_schedule = UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer - UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0;
}
if ( UE_id > last_ulsch_ue_id[CC_id] && ((ulsch_ue_select[CC_id].ue_num+ue_first_num[CC_id]) < ulsch_ue_max_num[CC_id]) ) {
if ( bytes_to_schedule > 0 ) {
@@ -2351,9 +2370,9 @@ void ulsch_scheduler_pre_ue_select_fairRR(
UE_sched_ctl = &UE_info->UE_sched_ctrl[UE_id];
rrc_status = mac_eNB_get_rrc_status(module_idP, rnti);
if ( ((UE_sched_ctl->ul_inactivity_timer>20)&&(UE_sched_ctl->ul_scheduled==0)) ||
if ( ((UE_sched_ctl->ul_inactivity_timer>64)&&(UE_sched_ctl->ul_scheduled==0)) ||
((UE_sched_ctl->ul_inactivity_timer>10)&&(UE_sched_ctl->ul_scheduled==0)&&(rrc_status < RRC_CONNECTED)) ||
((UE_sched_ctl->cqi_req_timer>300)&&((rrc_status >= RRC_CONNECTED))) ) {
((UE_sched_ctl->cqi_req_timer>64)&&((rrc_status >= RRC_CONNECTED))) ) {
first_ue_id[CC_id][ue_first_num[CC_id]]= UE_id;
first_ue_total[CC_id] [ue_first_num[CC_id]] = 0;
ue_first_num[CC_id]++;
@@ -2457,16 +2476,28 @@ void ulsch_scheduler_pre_ue_select_fairRR(
UE_sched_ctl = &UE_info->UE_sched_ctrl[UE_id];
int bytes_to_schedule = UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer - UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0;
}
rrc_status = mac_eNB_get_rrc_status(module_idP, rnti);
if ( (bytes_to_schedule > 0) || (UE_info->UE_template[CC_id][UE_id].ul_SR > 0) ||
((UE_sched_ctl->ul_inactivity_timer>20)&&(UE_sched_ctl->ul_scheduled==0)) ||
((UE_sched_ctl->ul_inactivity_timer>64)&&(UE_sched_ctl->ul_scheduled==0)) ||
((UE_sched_ctl->ul_inactivity_timer>10)&&(UE_sched_ctl->ul_scheduled==0)&&(rrc_status < RRC_CONNECTED)) ||
((UE_sched_ctl->cqi_req_timer>300)&&((rrc_status >= RRC_CONNECTED))) ) {
((UE_sched_ctl->cqi_req_timer>64)&&((rrc_status >= RRC_CONNECTED))) ) {
hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi];
format_flag = 2;
aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) {
aggregation = 4;
if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4)
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
}else {
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),
UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],
format0);
}
if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) {
cc_id_flag[CC_id] = 1;
@@ -2569,7 +2600,10 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
uint8_t total_rbs=0;
uint8_t average_rbs;
uint16_t first_rb[MAX_NUM_CCs];
uint8_t mcs;
int8_t mcs;
uint8_t snr;
double bler_filter=0.9;
double bler;
uint8_t rb_table_index;
uint8_t num_pucch_rb;
uint32_t tbs;
@@ -2663,33 +2697,74 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
} else {
UE_template = &UE_info->UE_template[CC_id][UE_id];
if ( UE_info->UE_sched_ctrl[UE_id].phr_received == 1 ) {
mcs = 20;
} else {
mcs = 10;
int32_t framex10psubframe = UE_template->pusch_bler_calc_frame*10+UE_template->pusch_bler_calc_subframe;
int pusch_bler_interval=50;
double total_bler;
if(UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id] == 0 && UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] == 0) {
total_bler = 0;
}
else {
total_bler = (double)UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] / (double)(UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] + UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id]) * 100;
}
if (((framex10psubframe+pusch_bler_interval)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pusch_bler_interval)))) { //frame wrap-around
UE_template->pusch_bler_calc_frame=frameP;
UE_template->pusch_bler_calc_subframe=subframeP;
int pusch_rx_num_diff = UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id] - UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[CC_id];
int pusch_rx_error_num_diff = UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] - UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[CC_id];
if((pusch_rx_num_diff == 0) && (pusch_rx_error_num_diff == 0)) { /* first rx case or no rx among interval time */
bler = UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id];
}
else {
bler = (double)pusch_rx_error_num_diff / (double)(pusch_rx_num_diff + pusch_rx_error_num_diff) * 100;
}
UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id] * bler_filter + bler * (1.0-bler_filter);
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id];
UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id];
if(bler < 0.5) {
if(UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] !=0) {
UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]--;
}
}
if(bler >= 2) {
UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]++;
if(UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] >= 20) {
UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]=20;
}
}
}
snr = UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[CC_id];
mcs = 20 - UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id];
if(mcs < 6) {
mcs = 6;
}
if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_FIRST ) {
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_template->scheduled_ul_bytes = 0;
}
if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ul_total_buffer > 0 ) {
rb_table_index = 2;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
while ( (((UE_template->phr_info - tx_power) < 0 ) || (tbs > bytes_to_schedule)) && (mcs > 3) ) {
mcs--;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
}
tx_power = (int8_t)(hundred_times_log10_NPRB[rb_table[rb_table_index] - 1] / 100);
while ( (tbs < bytes_to_schedule) && (rb_table[rb_table_index]<(frame_parms->N_RB_UL-num_pucch_rb-first_rb[CC_id])) &&
((UE_template->phr_info - tx_power) > 0) && (rb_table_index < 32 )) {
rb_table_index++;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
tx_power = (int8_t)(hundred_times_log10_NPRB[rb_table[rb_table_index] - 1] / 100);
}
if ( rb_table[rb_table_index]<3 ) {
@@ -2719,6 +2794,10 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = rb_table_index;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs;
}
LOG_D(MAC,"[eNB %hu] frame %u subframe %u, UE %d/%x CC %d snr %hhu snr_inst %hhu mcs %hhd mcs_offset %hhu bler %lf total_bler %lf ( %lu %lu ) rb_num %hhu phr_info %hhd tx_power %hd bsr %d estimated_ul_buffer %d scheduled_ul_bytes %d\n",
module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id, snr, UE_info->UE_sched_ctrl[UE_id].pusch_snr[CC_id], mcs, UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id], UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id],
total_bler, UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id], UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id], rb_table[rb_table_index-1], UE_template->phr_info, tx_power, bytes_to_schedule, UE_template->estimated_ul_buffer, UE_template->scheduled_ul_bytes);
} else {
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) {
// assigne RBS( 6 RBs)
@@ -3032,12 +3111,24 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
UE_sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
harq_pid = subframe2harqpid(cc,sched_frame,sched_subframeP);
rnti = UE_RNTI(CC_id,UE_id);
aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) {
aggregation = 4;
if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4)
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
}else{
//aggregation = 2;
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),
UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],
format0);
}
LOG_D(MAC,"[eNB %d] frame %d subframe %d,Checking PUSCH %d for UE %d/%x CC %d : aggregation level %d, N_RB_UL %d\n",
module_idP,frameP,subframeP,harq_pid,UE_id,rnti,CC_id, aggregation,N_RB_UL);
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_template->scheduled_ul_bytes = 0;
}
RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = bytes_to_schedule;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO,RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP]);
@@ -3051,7 +3142,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
UE_sched_ctrl->cqi_received = 0;
UE_sched_ctrl->cqi_req_timer = 0;
cqi_req = 0;
}else if (UE_sched_ctrl->cqi_req_timer>30) {
}else if (UE_sched_ctrl->cqi_req_timer>64) {
cqi_req = 1;
// To be safe , do not ask CQI in special SFs:36.213/7.2.3 CQI definition
@@ -3082,14 +3173,15 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
//power control
//compute the expected ULSCH RX power (for the stats)
// this is the normalized RX power and this should be constant (regardless of mcs
snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10;
snr = UE_sched_ctrl->pusch_snr_avg[CC_id];
target_snr = eNB->puSch10xSnr / 10;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
int32_t framex10psubframe = UE_template->pusch_tpc_tx_frame*10+UE_template->pusch_tpc_tx_subframe;
int pusch_tpc_interval=500;
if (((framex10psubframe+10)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=10)))) { //frame wrap-around
if (((framex10psubframe+pusch_tpc_interval)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pusch_tpc_interval)))) { //frame wrap-around
UE_template->pusch_tpc_tx_frame=frameP;
UE_template->pusch_tpc_tx_subframe=subframeP;
@@ -3133,6 +3225,17 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
UE_template->mcs_UL[harq_pid]=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs);
rb_table_index=5; // for PHR
}
if( (UE_sched_ctrl->ul_scheduled | (1<<harq_pid))>0 ){
UE_template->scheduled_ul_bytes -= UE_template->TBS_UL[harq_pid];
if (UE_template->scheduled_ul_bytes < 0) {
UE_template->scheduled_ul_bytes = 0;
}
UE_template->estimated_ul_buffer -= UE_template->TBS_UL[harq_pid];
if (UE_template->estimated_ul_buffer < 0) {
UE_template->estimated_ul_buffer = 0;
}
}
UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=UE_template->mcs_UL[harq_pid];
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],rb_table[rb_table_index]);
@@ -3194,8 +3297,8 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
nfapi_hi_dci0_request_t *nfapi_hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP];
nfapi_hi_dci0_req->sfn_sf = frameP<<4|subframeP; // sfnsf_add_subframe(sched_frame, sched_subframeP, 0); // sunday!
nfapi_hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,UE_template->mcs_UL[harq_pid],first_rb[CC_id],rb_table[rb_table_index],0,UE_template->mcs_UL[harq_pid],UE_sched_ctrl->pusch_snr_avg[CC_id],UE_sched_ctrl->pusch_bler[CC_id]);
ul_req_index = 0;
dlsch_flag = 0;
@@ -3309,7 +3412,6 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
mcs_rv = 31;
}
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb);
UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid];
if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED)
@@ -3345,8 +3447,9 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.harq_pid = harq_pid;
hi_dci0_req->number_of_dci++;
// Add UL_config PDUs
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,mcs_rv,ulsch_ue_select[CC_id].list[ulsch_ue_num].start_rb,ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb,UE_sched_ctrl->round_UL[CC_id][harq_pid],UE_template->mcs_UL[harq_pid],UE_sched_ctrl->pusch_snr_avg[CC_id],UE_sched_ctrl->pusch_bler[CC_id]);
ul_req_index = 0;
dlsch_flag = 0;
openair2/LAYER2/MAC/eNB_scheduler_phytest.c
+1 -1
View File
@@ -238,7 +238,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
//power control
//compute the expected ULSCH RX power (for the stats)
// this is the snr and this should be constant (regardless of mcs)
snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10;
snr = UE_sched_ctrl->pusch_snr[CC_id];
// new transmission
ndi = 1-UE_template->oldNDI_UL[harq_pid];
UE_template->oldNDI_UL[harq_pid]=ndi;
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+17 -3
View File
@@ -2173,6 +2173,7 @@ add_new_ue(module_id_t mod_idP,
)
//------------------------------------------------------------------------------
{
eNB_MAC_INST *eNB = RC.mac[mod_idP];
int UE_id;
int i, j;
UE_info_t *UE_info = &RC.mac[mod_idP]->UE_info;
@@ -2215,7 +2216,19 @@ add_new_ue(module_id_t mod_idP,
0,
sizeof(eNB_UE_STATS));
UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0;
UE_info->UE_sched_ctrl[UE_id].ta_update_f = 31.0;
UE_info->UE_sched_ctrl[UE_id].ta_update = 31;
UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_cqi_f[cc_idP] = (eNB->puSch10xSnr+640)/5;
UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (eNB->puSch10xSnr+640)/5;
UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = eNB->puSch10xSnr/10;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_bler[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].ret_cnt[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].first_cnt[cc_idP] = 0;
for (j = 0; j < 8; j++) {
UE_info->UE_template[cc_idP][UE_id].oldNDI[j] = 0;
@@ -4934,6 +4947,7 @@ cqi_indication(module_id_t mod_idP,
{
int UE_id = find_UE_id(mod_idP, rntiP);
UE_info_t *UE_info = &RC.mac[mod_idP]->UE_info;
uint64_t pdu_val = *(uint64_t *) pdu;
if (UE_id == -1) {
LOG_W(MAC, "cqi_indication: UE %x not found\n", rntiP);
@@ -4973,10 +4987,10 @@ cqi_indication(module_id_t mod_idP,
subframeP,
pdu,
rel9->length);
LOG_D(MAC,"Frame %d Subframe %d update CQI:%d\n",
LOG_D(MAC,"Frame %d Subframe %d update CQI:%d pdu 0x%016"PRIx64"\n",
frameP,
subframeP,
sched_ctl->dl_cqi[CC_idP]);
sched_ctl->dl_cqi[CC_idP],pdu_val);
sched_ctl->cqi_req_flag &= (~(1 << subframeP));
sched_ctl->cqi_received = 1;
}
@@ -5164,7 +5178,7 @@ harq_indication(module_id_t mod_idP,
/* don't care about cqi reporting if NACK/DTX is there */
if (channel == 0 && !nack_or_dtx_reported(cc,
harq_pdu)) {
sched_ctl->pucch1_snr[CC_idP] = ul_cqi;
sched_ctl->pucch1_snr[CC_idP] = (5 * ul_cqi - 640) / 10;
sched_ctl->pucch1_cqi_update[CC_idP] = 1;
}
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+108 -26
View File
@@ -160,13 +160,29 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_scheduling_control->ul_inactivity_timer = 0;
UE_scheduling_control->ul_failure_timer = 0;
UE_scheduling_control->ul_scheduled &= (~(1 << harq_pid));
UE_scheduling_control->pusch_rx_num[CC_idP]++;
/* Update with smoothing: 3/4 of old value and 1/4 of new.
* This is the logic that was done in the function
* lte_est_timing_advance_pusch, maybe it's not necessary?
* maybe it's even not correct at all?
*/
UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4;
UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi;
UE_scheduling_control->ta_update_f = ((double)UE_scheduling_control->ta_update_f * 3 + (double)timing_advance) / 4;
UE_scheduling_control->ta_update = (int)UE_scheduling_control->ta_update_f;
int tmp_snr = (5 * ul_cqi - 640) / 10;
UE_scheduling_control->pusch_snr[CC_idP] = tmp_snr;
if(tmp_snr > 0 && tmp_snr < 63) {
double snr_filter_tpc=0.7;
int snr_thres_tpc=30;
int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP];
if(abs(diff) < snr_thres_tpc) {
UE_scheduling_control->pusch_cqi_f[CC_idP] = ((double)UE_scheduling_control->pusch_cqi_f[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc));
UE_scheduling_control->pusch_cqi[CC_idP] = (int)UE_scheduling_control->pusch_cqi_f[CC_idP];
UE_scheduling_control->pusch_snr_avg[CC_idP] = (5 * UE_scheduling_control->pusch_cqi[CC_idP] - 640) / 10;
}
}
UE_scheduling_control->ul_consecutive_errors = 0;
first_rb = UE_template_ptr->first_rb_ul[harq_pid];
@@ -182,6 +198,7 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_template_ptr->scheduled_ul_bytes = 0;
}
} else { // sduP == NULL => error
UE_scheduling_control->pusch_rx_error_num[CC_idP]++;
LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n",
enb_mod_idP,
harq_pid,
@@ -195,7 +212,7 @@ rx_sdu(const module_id_t enb_mod_idP,
sdu_lenP);
if (ul_cqi > 200) { // too high energy pattern
UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi;
UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10;
LOG_W(MAC, "[MAC] Too high energy pattern\n");
}
@@ -290,6 +307,23 @@ rx_sdu(const module_id_t enb_mod_idP,
if (ra->msg3_round >= mac->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx - 1) {
cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti);
nfapi_hi_dci0_request_t *hi_dci0_req = NULL;
uint8_t sf_ahead_dl = ul_subframe2_k_phich(&mac->common_channels[CC_idP], subframeP);
hi_dci0_req = &mac->HI_DCI0_req[CC_idP][(subframeP + sf_ahead_dl) % 10];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
memset((void *) hi_dci0_pdu, 0, sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_hi_pdu);
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.tl.tag = NFAPI_HI_DCI0_REQUEST_HI_PDU_REL8_TAG;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = first_rb;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req_body->number_of_hi++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP, subframeP, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
} else {
if (ra->rach_resource_type > 0) {
cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti); // TODO: Currently we don't support retransmission of Msg3 ( If in error Cancel RA procedure and reattach)
@@ -638,7 +672,7 @@ rx_sdu(const module_id_t enb_mod_idP,
switch (rx_lcids[i]) {
case CCCH:
if (rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) {
if ((rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) {
LOG_E(MAC, "[eNB %d/%d] frame %d received CCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n",
enb_mod_idP,
CC_idP,
@@ -759,6 +793,17 @@ rx_sdu(const module_id_t enb_mod_idP,
LOG_T(MAC, "\n");
#endif
if ((rx_lengths[i] > DCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) {
LOG_E(MAC, "[eNB %d/%d] frame %d received DCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lengths[i],
DCH_PAYLOAD_SIZE_MAX,
sdu_lenP);
break;
}
if (UE_id != -1) {
if (lcgid_updated[UE_template_ptr->lcgidmap[rx_lcids[i]]] == 0) {
/* Adjust buffer occupancy of the correponding logical channel group */
@@ -803,8 +848,18 @@ rx_sdu(const module_id_t enb_mod_idP,
LOG_T(MAC, "\n");
#endif
if (rx_lcids[i] < NB_RB_MAX) {
if ((rx_lengths[i] > SCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) {
LOG_E(MAC, "[eNB %d/%d] frame %d received DTCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lengths[i],
DCH_PAYLOAD_SIZE_MAX,
sdu_lenP);
UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1;
break;
}
LOG_D(MAC, "[eNB %d] CC_id %d Frame %d : ULSCH -> UL-DTCH, received %d bytes from UE %d for lcid %d\n",
enb_mod_idP,
CC_idP,
@@ -814,6 +869,25 @@ rx_sdu(const module_id_t enb_mod_idP,
rx_lcids[i]);
if (UE_id != -1) {
ue_contextP = rrc_eNB_get_ue_context(RC.rrc[enb_mod_idP], current_rnti);
if (ue_contextP != NULL) {
if (ue_contextP->ue_context.DRB_active[rx_lcids[i] - 2] == 0) {
LOG_E(MAC, "[eNB %d/%d] frame %d received non active DTCH of size %d ( sdu_len %d, lcid %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lengths[i],
sdu_lenP,rx_lcids[i]);
UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1;
break;
}
}else{
LOG_E(MAC, "[eNB %d] CC_id %d Couldn't find the context associated to UE (RNTI %d) and reset RRC inactivity timer\n",
enb_mod_idP,
CC_idP,
current_rnti);
break;
}
/* Adjust buffer occupancy of the correponding logical channel group */
LOG_D(MAC, "[eNB %d] CC_id %d Frame %d : ULSCH -> UL-DTCH, received %d bytes from UE %d for lcid %d, removing from LCGID %ld, %d\n",
enb_mod_idP,
@@ -837,48 +911,45 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_template_ptr->ul_buffer_info[1] +
UE_template_ptr->ul_buffer_info[2] +
UE_template_ptr->ul_buffer_info[3];
if (UE_template_ptr->estimated_ul_buffer == 0) {
UE_template_ptr->scheduled_ul_bytes = 0;
}
}
if ((rx_lengths[i] < SCH_PAYLOAD_SIZE_MAX) && (rx_lengths[i] > 0)) { // MAX SIZE OF transport block
mac_rlc_data_ind(enb_mod_idP, current_rnti, enb_mod_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, rx_lcids[i], (char *) payload_ptr, rx_lengths[i], 1, NULL);
UE_info->eNB_UE_stats[CC_idP][UE_id].num_pdu_rx[rx_lcids[i]] += 1;
UE_info->eNB_UE_stats[CC_idP][UE_id].num_bytes_rx[rx_lcids[i]] += rx_lengths[i];
/* Clear uplane_inactivity_timer */
UE_scheduling_control->uplane_inactivity_timer = 0;
/* Reset RRC inactivity timer after uplane activity */
ue_contextP = rrc_eNB_get_ue_context(RC.rrc[enb_mod_idP], current_rnti);
if (ue_contextP != NULL) {
ue_contextP->ue_context.ue_rrc_inactivity_timer = 1;
} else {
LOG_E(MAC, "[eNB %d] CC_id %d Couldn't find the context associated to UE (RNTI %d) and reset RRC inactivity timer\n",
enb_mod_idP,
CC_idP,
current_rnti);
}
} else { /* rx_length[i] Max size */
UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1;
LOG_E(MAC, "[eNB %d] CC_id %d Frame %d : Max size of transport block reached LCID %d from UE %d ",
} else { // end if (UE_id != -1)
LOG_E(MAC,"[eNB %d] CC_id %d Frame %d : received unsupported or unknown LCID %d from UE %d ",
enb_mod_idP,
CC_idP,
frameP,
rx_lcids[i],
UE_id);
}
} else { // end if (UE_id != -1)
LOG_E(MAC,"[eNB %d] CC_id %d Frame %d : received unsupported or unknown LCID %d from UE %d ",
}else {
LOG_E(MAC, "[eNB %d/%d] frame %d received a invalid LCID of size %d ( sdu_len %d, lcid %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lcids[i],
UE_id);
}
rx_lengths[i],
sdu_lenP,rx_lcids[i]);
}
break;
}
if((sdu_lenP - (payload_ptr - sduP)) >= rx_lengths[i]){
payload_ptr += rx_lengths[i];
}else{
LOG_E(MAC,"[eNB %d/%d] frame %d subframe %d rnti %x sdu_len %d remain_len %d rx_lengths %d\n",
enb_mod_idP,CC_idP,frameP,subframeP,rntiP,sdu_lenP,(uint16_t)(sdu_lenP - (payload_ptr - sduP)), rx_lengths[i]);
return;
}
}
/* CDRX UL HARQ timers */
@@ -1031,6 +1102,10 @@ parse_ulsch_header(unsigned char *mac_header,
tb_length,
length,
mac_header_ptr - mac_header);
if(num_sdus >= NB_RB_MAX){
LOG_E(MAC,"parse_ulsch_header: num_sdus(%d) reach max\n",num_sdus);
return NULL;
}
rx_lcids[num_sdus] = lcid;
rx_lengths[num_sdus] = length;
num_sdus++;
@@ -1038,6 +1113,10 @@ parse_ulsch_header(unsigned char *mac_header,
if (lcid == SHORT_PADDING) {
mac_header_ptr++;
} else {
if(num_ces >= MAX_NUM_CE){
LOG_E(MAC,"parse_ulsch_header: num_ces(%d) reach max\n",num_ces);
return NULL;
}
rx_ces[num_ces] = lcid;
num_ces++;
mac_header_ptr++;
@@ -1284,6 +1363,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
eNB_MAC_INST *mac = RC.mac[module_idP];
COMMON_channels_t *cc = mac->common_channels;
UE_info_t *UE_info = &mac->UE_info;
//uint8_t aggregation = 2;
int sched_frame = frameP;
@@ -1404,7 +1484,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
* This is the normalized RX snr and this should be constant (regardless
* of mcs) Is not in dBm, unit from nfapi, converting to dBm
*/
const int32_t snr = (5 * UE_sched_ctrl_ptr->pusch_snr[CC_id] - 640) / 10;
const int32_t snr = UE_sched_ctrl_ptr->pusch_snr[CC_id];
const int32_t target_snr = mac->puSch10xSnr / 10;
/*
@@ -1562,8 +1642,10 @@ schedule_ulsch_rnti(module_id_t module_idP,
UE_template_ptr->cshift[harq_pid] = cshift;
/* Setting DCI0 NFAPI struct */
hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[dci_ul_pdu_idx];
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_dci_pdu);
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dci_format = NFAPI_UL_DCI_FORMAT_0;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = UE_template_ptr->pre_first_nb_rb_ul;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block =
@@ -1985,7 +2067,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP,
cqi_req = 0;
/* Power control: compute the expected ULSCH RX snr (for the stats) */
/* This is the normalized snr and this should be constant (regardless of mcs) */
snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10;
snr = UE_sched_ctrl->pusch_snr[CC_id];
target_snr = eNB->puSch10xSnr / 10; /* TODO: target_rx_power was 178, what to put? */
/* This assumes accumulated tpc */
/* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */
openair2/LAYER2/MAC/mac.h
+26 -7
View File
@@ -469,6 +469,7 @@ typedef struct {
#define BSR_TRIGGER_PADDING (4) /* For Padding BSR Trigger */
/*! \brief Downlink SCH PDU Structure */
typedef struct {
uint8_t payload[8][SCH_PAYLOAD_SIZE_MAX];
@@ -906,6 +907,11 @@ typedef struct {
uint32_t pucch_tpc_tx_frame;
uint32_t pucch_tpc_tx_subframe;
/// stores the frame where the last bler was calculated
uint32_t pusch_bler_calc_frame;
uint32_t pusch_bler_calc_subframe;
uint8_t rach_resource_type;
uint16_t mpdcch_repetition_cnt;
frame_t Msg2_frame;
@@ -928,6 +934,8 @@ typedef struct {
/// Current DL harq round per harq_pid on each CC
uint8_t round[NFAPI_CC_MAX][10];
uint32_t ret_cnt[NFAPI_CC_MAX];
uint32_t first_cnt[NFAPI_CC_MAX];
/// Current Active TBs per harq_pid on each CC
uint8_t tbcnt[NFAPI_CC_MAX][10];
/// Current UL harq round per harq_pid on each CC
@@ -937,6 +945,7 @@ typedef struct {
unsigned char rballoc_sub_UE[NFAPI_CC_MAX][N_RBG_MAX];
int pre_dci_dl_pdu_idx;
uint16_t ta_timer;
double ta_update_f;
int16_t ta_update;
uint16_t ul_consecutive_errors;
int32_t context_active_timer;
@@ -954,13 +963,22 @@ typedef struct {
int32_t phr_received;
uint8_t periodic_ri_received[NFAPI_CC_MAX];
uint8_t aperiodic_ri_received[NFAPI_CC_MAX];
uint8_t pucch1_cqi_update[NFAPI_CC_MAX];
uint8_t pucch1_snr[NFAPI_CC_MAX];
uint8_t pucch2_cqi_update[NFAPI_CC_MAX];
uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX];
int16_t pucch1_cqi_update[NFAPI_CC_MAX];
int16_t pucch1_snr[NFAPI_CC_MAX];
int16_t pucch2_cqi_update[NFAPI_CC_MAX];
int16_t pucch2_snr[NFAPI_CC_MAX];
int16_t pucch3_cqi_update[NFAPI_CC_MAX];
int16_t pucch3_snr[NFAPI_CC_MAX];
double pusch_cqi_f[NFAPI_CC_MAX];
int16_t pusch_cqi[NFAPI_CC_MAX];
int16_t pusch_snr[NFAPI_CC_MAX];
int16_t pusch_snr_avg[NFAPI_CC_MAX];
uint64_t pusch_rx_num[NFAPI_CC_MAX];
uint64_t pusch_rx_num_old[NFAPI_CC_MAX];
uint64_t pusch_rx_error_num[NFAPI_CC_MAX];
uint64_t pusch_rx_error_num_old[NFAPI_CC_MAX];
double pusch_bler[NFAPI_CC_MAX];
uint8_t mcs_offset[NFAPI_CC_MAX];
uint16_t feedback_cnt[NFAPI_CC_MAX];
uint16_t timing_advance;
uint16_t timing_advance_r9;
@@ -1039,6 +1057,7 @@ typedef struct {
/// DRX UL retransmission timer, one per UL HARQ process
/* Not implemented yet */
/* End of C-DRX related timers */
uint32_t rlc_out_of_resources_cnt;
} UE_sched_ctrl_t;
/*! \brief eNB template for the Random access information */
openair2/RRC/LTE/rrc_defs.h
+1 -1
View File
@@ -554,7 +554,7 @@ typedef struct eNB_RRC_UE_s {
LTE_DRB_ToAddModList_t *DRB_configList;
LTE_DRB_ToAddModList_t *DRB_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER];
LTE_DRB_ToReleaseList_t *DRB_Release_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER];
uint8_t DRB_active[8];
uint8_t DRB_active[NB_RB_MAX -2];
struct LTE_PhysicalConfigDedicated *physicalConfigDedicated;
struct LTE_SPS_Config *sps_Config;
LTE_MeasObjectToAddMod_t *MeasObj[MAX_MEAS_OBJ];
openair2/RRC/LTE/rrc_eNB.c
+2 -14
View File
@@ -6711,22 +6711,10 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
);
}
} else { // remove LCHAN from MAC/PHY
if (ue_context_pP->ue_context.DRB_active[drb_id] == 1) {
// DRB has just been removed so remove RLC + PDCP for DRB
/* rrc_pdcp_config_req (ctxt_pP->module_id, frameP, 1, CONFIG_ACTION_REMOVE,
(ue_mod_idP * NB_RB_MAX) + DRB2LCHAN[i],UNDEF_SECURITY_MODE);
*/
if (!NODE_IS_CU(RC.rrc[ctxt_pP->module_id]->node_type)) {
rrc_rlc_config_req(ctxt_pP,
SRB_FLAG_NO,
MBMS_FLAG_NO,
CONFIG_ACTION_REMOVE,
DRB2LCHAN[i],
Rlc_info_um);
}
if (DRB_configList->list.array[i]->logicalChannelIdentity) {
DRB2LCHAN[i] = (uint8_t) * DRB_configList->list.array[i]->logicalChannelIdentity;
}
ue_context_pP->ue_context.DRB_active[drb_id] = 0;
LOG_D(RRC, PROTOCOL_RRC_CTXT_UE_FMT" RRC_eNB --- MAC_CONFIG_REQ (DRB) ---> MAC_eNB\n",
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP));