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Merge remote-tracking branch 'origin/lte_uplink_improvement' into integration_2021_wk04_b

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This commit is contained in:
hardy
2021-01-29 07:41:47 +01:00
parent 4a263eb69d bbaef50932
commit 5db5657df7
30 changed files with 1084 additions and 252 deletions
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openair2/ENB_APP/L1_paramdef.h
+4 -1
View File
@@ -61,6 +61,7 @@
#define CONFIG_STRING_L1_PRACH_DTX_EMTC3_THRESHOLD "prach_dtx_emtc3_threshold"
#define CONFIG_STRING_L1_PUCCH1_DTX_EMTC3_THRESHOLD "pucch1_dtx_emtc3_threshold"
#define CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD "pucch1ab_dtx_emtc3_threshold"
#define CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD "pusch_signal_threshold"
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
/* L1 configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
@@ -89,7 +90,8 @@
{CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC2_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PRACH_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PUCCH1_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:0, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0} \
{CONFIG_STRING_L1_PUCCH1AB_DTX_EMTC3_THRESHOLD, NULL, 0, iptr:NULL, defintval:4, TYPE_INT, 0}, \
{CONFIG_STRING_L1_PUSCH_SIGNAL_THRESHOLD, NULL, 0, iptr:NULL, defintval:635, TYPE_INT, 0} \
}
#define L1_CC_IDX 0
#define L1_TRANSPORT_N_PREFERENCE_IDX 1
@@ -115,6 +117,7 @@
#define L1_PRACH_DTX_EMTC3_THRESHOLD_IDX 21
#define L1_PUCCH1_DTX_EMTC3_THRESHOLD_IDX 22
#define L1_PUCCH1AB_DTX_EMTC3_THRESHOLD_IDX 23
#define L1_PUSCH_SIGNAL_THRESHOLD_IDX 24
/*----------------------------------------------------------------------------------------------------------------------------------------------------*/
#endif
openair2/ENB_APP/enb_config.c
+4
View File
@@ -169,6 +169,10 @@ void RCconfig_L1(void) {
RC.eNB[j][0]->pucch1_DTX_threshold_emtc[ce_level] = *(L1_ParamList.paramarray[j][L1_PUCCH1_DTX_EMTC0_THRESHOLD_IDX+ce_level].iptr);
RC.eNB[j][0]->pucch1ab_DTX_threshold_emtc[ce_level] = *(L1_ParamList.paramarray[j][L1_PUCCH1AB_DTX_EMTC0_THRESHOLD_IDX+ce_level].iptr);
}
RC.eNB[j][0]->pusch_signal_threshold = *(L1_ParamList.paramarray[j][L1_PUSCH_SIGNAL_THRESHOLD_IDX].iptr);
LOG_I(ENB_APP,"PUSCH singal threshold = %d \n",RC.eNB[j][0]->pusch_signal_threshold);
}// j=0..num_inst
LOG_I(ENB_APP,"Initializing northbound interface for L1\n");
openair2/LAYER2/MAC/eNB_scheduler.c
+31 -3
View File
@@ -596,13 +596,41 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
UE_scheduling_control = &(UE_info->UE_sched_ctrl[UE_id]);
if (((frameP & 127) == 0) && (subframeP == 0)) {
LOG_I(MAC,"UE rnti %x : %s, PHR %d dB DL CQI %d PUSCH SNR %d PUCCH SNR %d\n",
double total_bler;
if(UE_scheduling_control->pusch_rx_num[CC_id] == 0 && UE_scheduling_control->pusch_rx_error_num[CC_id] == 0) {
total_bler = 0;
}
else {
total_bler = (double)UE_scheduling_control->pusch_rx_error_num[CC_id] / (double)(UE_scheduling_control->pusch_rx_error_num[CC_id] + UE_scheduling_control->pusch_rx_num[CC_id]) * 100;
}
LOG_I(MAC,"UE %x : %s, PHR %d DLCQI %d PUSCH %d PUCCH %d RLC disc %d UL-stat rcv %lu err %lu bler %lf mcsoff %d bsr %u sched %u tbs %lu cnt %u , DL-stat tbs %lu cnt %u rb %u buf %u 1st %u ret %u ri %d\n",
rnti,
UE_scheduling_control->ul_out_of_sync == 0 ? "in synch" : "out of sync",
UE_info->UE_template[CC_id][UE_id].phr_info,
UE_scheduling_control->dl_cqi[CC_id],
(5 * UE_scheduling_control->pusch_snr[CC_id] - 640) / 10,
(5 * UE_scheduling_control->pucch1_snr[CC_id] - 640) / 10);
UE_scheduling_control->pusch_snr_avg[CC_id],
UE_scheduling_control->pucch1_snr[CC_id],
UE_scheduling_control->rlc_out_of_resources_cnt,
UE_scheduling_control->pusch_rx_num[CC_id],
UE_scheduling_control->pusch_rx_error_num[CC_id],
total_bler,
UE_scheduling_control->mcs_offset[CC_id],
UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer,
UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes,
UE_info->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes_rx,
UE_info->eNB_UE_stats[CC_id][UE_id].total_num_pdus_rx,
UE_info->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes,
UE_info->eNB_UE_stats[CC_id][UE_id].total_num_pdus,
UE_info->eNB_UE_stats[CC_id][UE_id].total_rbs_used,
#if defined(PRE_SCD_THREAD)
UE_info->UE_template[CC_id][UE_id].dl_buffer_total,
#else
0,
#endif
UE_scheduling_control->first_cnt[CC_id],
UE_scheduling_control->ret_cnt[CC_id],
UE_scheduling_control->aperiodic_ri_received[CC_id]
);
}
RC.eNB[module_idP][CC_id]->pusch_stats_bsr[UE_id][(frameP * 10) + subframeP] = -63;
openair2/LAYER2/MAC/eNB_scheduler_RA.c
-7
View File
@@ -212,13 +212,6 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t *ra, frame_t frameP,
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
if (NFAPI_MODE != NFAPI_MONOLITHIC) {
oai_nfapi_hi_dci0_req(hi_dci0_req);
hi_dci0_req_body->number_of_hi=0;
}
LOG_D(MAC, "MSG3: HI_DCI0 SFN/SF:%d number_of_dci:%d number_of_hi:%d\n", NFAPI_SFNSF2DEC(hi_dci0_req->sfn_sf), hi_dci0_req_body->number_of_dci, hi_dci0_req_body->number_of_hi);
// save UL scheduling information for preprocessor
for (j = 0; j < ra->msg3_nb_rb; j++)
cc->vrb_map_UL[ra->msg3_first_rb + j] = 1;
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+4 -2
View File
@@ -821,6 +821,7 @@ schedule_ue_spec(module_id_t module_idP,
/* reset ta_update */
ue_sched_ctrl->ta_update = 31;
ue_sched_ctrl->ta_update_f = 31.0;
}
int ta_len = (ta_update != 31) ? 2 : 0;
@@ -1050,7 +1051,7 @@ schedule_ue_spec(module_id_t module_idP,
// this is the snr
// unit is not dBm, it's special from nfapi
// converting to dBm
int snr = (5 * ue_sched_ctrl->pucch1_snr[CC_id] - 640) / 10;
int snr = ue_sched_ctrl->pucch1_snr[CC_id];
int target_snr = eNB->puCch10xSnr / 10;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
@@ -1366,6 +1367,7 @@ schedule_ue_spec_br(module_id_t module_idP,
/* Reset ta_update */
ue_sched_ctl->ta_update = 31;
ue_sched_ctl->ta_update_f = 31.0;
} else {
ta_update = 31;
}
@@ -1684,7 +1686,7 @@ schedule_ue_spec_br(module_id_t module_idP,
/* Do PUCCH power control */
/* This is the snr */
/* unit is not dBm, it's special from nfapi, convert to dBm */
snr = (5 * ue_sched_ctl->pucch1_snr[CC_id] - 640) / 10;
snr = ue_sched_ctl->pucch1_snr[CC_id];
target_snr = mac->puCch10xSnr / 10;
/* This assumes accumulated tpc */
/* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */
openair2/LAYER2/MAC/eNB_scheduler_fairRR.c
+139 -36
View File
@@ -61,7 +61,9 @@ extern void add_subframe(uint16_t *frameP, uint16_t *subframeP, int offset);
/* internal vars */
DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs];
int last_dlsch_ue_id[MAX_NUM_CCs] = {-1};
int last_dlsch_ue_id_volte[MAX_NUM_CCs] = {-1};
int last_ulsch_ue_id[MAX_NUM_CCs] = {-1};
int last_ulsch_ue_id_volte[MAX_NUM_CCs] = {-1};
#if defined(PRE_SCD_THREAD)
uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
@@ -1567,6 +1569,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
ue_sched_ctl->ta_update_f = 31.0;
} else {
ta_update = 31;
}
@@ -1998,14 +2001,15 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
// this is the snr
eNB_UE_stats = &UE_info->eNB_UE_stats[CC_id][UE_id];
/* Unit is not dBm, it's special from nfapi */
snr = (5 * ue_sched_ctl->pucch1_snr[CC_id] - 640) / 10;
target_snr = eNB->puCch10xSnr / 10;
snr = ue_sched_ctl->pucch1_snr[CC_id];
target_snr = eNB->puCch10xSnr/10;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
int32_t framex10psubframe = UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_frame*10+UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe;
int pucch_tpc_interval=10;
if (((framex10psubframe+10)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=10)))) //frame wrap-around
if (((framex10psubframe+pucch_tpc_interval)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pucch_tpc_interval)))) //frame wrap-around
if (ue_sched_ctl->pucch1_cqi_update[CC_id] == 1) {
ue_sched_ctl->pucch1_cqi_update[CC_id] = 0;
UE_info->UE_template[CC_id][UE_id].pucch_tpc_tx_frame=frameP;
@@ -2300,6 +2304,18 @@ void ulsch_scheduler_pre_ue_select_fairRR(
}
}
if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) {
aggregation = 4;
if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4)
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
}else{
//aggregation = 2;
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),
UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],
format0);
}
cc = &eNB->common_channels[CC_id];
//harq_pid
harq_pid = subframe2harqpid(cc,(frameP+(sched_subframeP<subframeP ? 1 : 0)),sched_subframeP);
@@ -2331,7 +2347,10 @@ void ulsch_scheduler_pre_ue_select_fairRR(
//
int bytes_to_schedule = UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer - UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0;
}
if ( UE_id > last_ulsch_ue_id[CC_id] && ((ulsch_ue_select[CC_id].ue_num+ue_first_num[CC_id]) < ulsch_ue_max_num[CC_id]) ) {
if ( bytes_to_schedule > 0 ) {
@@ -2351,9 +2370,9 @@ void ulsch_scheduler_pre_ue_select_fairRR(
UE_sched_ctl = &UE_info->UE_sched_ctrl[UE_id];
rrc_status = mac_eNB_get_rrc_status(module_idP, rnti);
if ( ((UE_sched_ctl->ul_inactivity_timer>20)&&(UE_sched_ctl->ul_scheduled==0)) ||
if ( ((UE_sched_ctl->ul_inactivity_timer>64)&&(UE_sched_ctl->ul_scheduled==0)) ||
((UE_sched_ctl->ul_inactivity_timer>10)&&(UE_sched_ctl->ul_scheduled==0)&&(rrc_status < RRC_CONNECTED)) ||
((UE_sched_ctl->cqi_req_timer>300)&&((rrc_status >= RRC_CONNECTED))) ) {
((UE_sched_ctl->cqi_req_timer>64)&&((rrc_status >= RRC_CONNECTED))) ) {
first_ue_id[CC_id][ue_first_num[CC_id]]= UE_id;
first_ue_total[CC_id] [ue_first_num[CC_id]] = 0;
ue_first_num[CC_id]++;
@@ -2457,16 +2476,28 @@ void ulsch_scheduler_pre_ue_select_fairRR(
UE_sched_ctl = &UE_info->UE_sched_ctrl[UE_id];
int bytes_to_schedule = UE_info->UE_template[CC_id][UE_id].estimated_ul_buffer - UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_info->UE_template[CC_id][UE_id].scheduled_ul_bytes = 0;
}
rrc_status = mac_eNB_get_rrc_status(module_idP, rnti);
if ( (bytes_to_schedule > 0) || (UE_info->UE_template[CC_id][UE_id].ul_SR > 0) ||
((UE_sched_ctl->ul_inactivity_timer>20)&&(UE_sched_ctl->ul_scheduled==0)) ||
((UE_sched_ctl->ul_inactivity_timer>64)&&(UE_sched_ctl->ul_scheduled==0)) ||
((UE_sched_ctl->ul_inactivity_timer>10)&&(UE_sched_ctl->ul_scheduled==0)&&(rrc_status < RRC_CONNECTED)) ||
((UE_sched_ctl->cqi_req_timer>300)&&((rrc_status >= RRC_CONNECTED))) ) {
((UE_sched_ctl->cqi_req_timer>64)&&((rrc_status >= RRC_CONNECTED))) ) {
hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi];
format_flag = 2;
aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) {
aggregation = 4;
if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4)
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
}else {
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),
UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],
format0);
}
if (CCE_allocation_infeasible(module_idP,CC_id,format_flag,subframeP,aggregation,rnti) == 1) {
cc_id_flag[CC_id] = 1;
@@ -2569,7 +2600,10 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
uint8_t total_rbs=0;
uint8_t average_rbs;
uint16_t first_rb[MAX_NUM_CCs];
uint8_t mcs;
int8_t mcs;
uint8_t snr;
double bler_filter=0.9;
double bler;
uint8_t rb_table_index;
uint8_t num_pucch_rb;
uint32_t tbs;
@@ -2663,33 +2697,74 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
} else {
UE_template = &UE_info->UE_template[CC_id][UE_id];
if ( UE_info->UE_sched_ctrl[UE_id].phr_received == 1 ) {
mcs = 20;
} else {
mcs = 10;
int32_t framex10psubframe = UE_template->pusch_bler_calc_frame*10+UE_template->pusch_bler_calc_subframe;
int pusch_bler_interval=50;
double total_bler;
if(UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id] == 0 && UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] == 0) {
total_bler = 0;
}
else {
total_bler = (double)UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] / (double)(UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] + UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id]) * 100;
}
if (((framex10psubframe+pusch_bler_interval)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pusch_bler_interval)))) { //frame wrap-around
UE_template->pusch_bler_calc_frame=frameP;
UE_template->pusch_bler_calc_subframe=subframeP;
int pusch_rx_num_diff = UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id] - UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[CC_id];
int pusch_rx_error_num_diff = UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id] - UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[CC_id];
if((pusch_rx_num_diff == 0) && (pusch_rx_error_num_diff == 0)) { /* first rx case or no rx among interval time */
bler = UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id];
}
else {
bler = (double)pusch_rx_error_num_diff / (double)(pusch_rx_num_diff + pusch_rx_error_num_diff) * 100;
}
UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id] * bler_filter + bler * (1.0-bler_filter);
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id];
UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[CC_id] = UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id];
if(bler < 0.5) {
if(UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] !=0) {
UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]--;
}
}
if(bler >= 2) {
UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]++;
if(UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id] >= 20) {
UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id]=20;
}
}
}
snr = UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[CC_id];
mcs = 20 - UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id];
if(mcs < 6) {
mcs = 6;
}
if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ue_priority == SCH_UL_FIRST ) {
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_template->scheduled_ul_bytes = 0;
}
if ( ulsch_ue_select[CC_id].list[ulsch_ue_num].ul_total_buffer > 0 ) {
rb_table_index = 2;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
while ( (((UE_template->phr_info - tx_power) < 0 ) || (tbs > bytes_to_schedule)) && (mcs > 3) ) {
mcs--;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
}
tx_power = (int8_t)(hundred_times_log10_NPRB[rb_table[rb_table_index] - 1] / 100);
while ( (tbs < bytes_to_schedule) && (rb_table[rb_table_index]<(frame_parms->N_RB_UL-num_pucch_rb-first_rb[CC_id])) &&
((UE_template->phr_info - tx_power) > 0) && (rb_table_index < 32 )) {
rb_table_index++;
tbs = get_TBS_UL(mcs,rb_table[rb_table_index]);
tx_power= estimate_ue_tx_power(tbs*8,rb_table[rb_table_index],0,frame_parms->Ncp,0);
tx_power = (int8_t)(hundred_times_log10_NPRB[rb_table[rb_table_index] - 1] / 100);
}
if ( rb_table[rb_table_index]<3 ) {
@@ -2719,6 +2794,10 @@ void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
UE_info->UE_template[CC_id][UE_id].pre_allocated_rb_table_index_ul = rb_table_index;
UE_info->UE_template[CC_id][UE_id].pre_assigned_mcs_ul = mcs;
}
LOG_D(MAC,"[eNB %hu] frame %u subframe %u, UE %d/%x CC %d snr %hhu snr_inst %hhu mcs %hhd mcs_offset %hhu bler %lf total_bler %lf ( %lu %lu ) rb_num %hhu phr_info %hhd tx_power %hd bsr %d estimated_ul_buffer %d scheduled_ul_bytes %d\n",
module_idP,frameP,subframeP,UE_id,UE_RNTI(CC_id,UE_id),CC_id, snr, UE_info->UE_sched_ctrl[UE_id].pusch_snr[CC_id], mcs, UE_info->UE_sched_ctrl[UE_id].mcs_offset[CC_id], UE_info->UE_sched_ctrl[UE_id].pusch_bler[CC_id],
total_bler, UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[CC_id], UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[CC_id], rb_table[rb_table_index-1], UE_template->phr_info, tx_power, bytes_to_schedule, UE_template->estimated_ul_buffer, UE_template->scheduled_ul_bytes);
} else {
if (mac_eNB_get_rrc_status(module_idP,UE_RNTI(module_idP, UE_id)) < RRC_CONNECTED) {
// assigne RBS( 6 RBs)
@@ -3032,12 +3111,24 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
UE_sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
harq_pid = subframe2harqpid(cc,sched_frame,sched_subframeP);
rnti = UE_RNTI(CC_id,UE_id);
aggregation=get_aggregation(get_bw_index(module_idP,CC_id),UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
if (mac_eNB_get_rrc_status(module_idP, rnti) == RRC_HO_EXECUTION) {
aggregation = 4;
if(get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0)>4)
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],format0);
}else{
//aggregation = 2;
aggregation = get_aggregation(get_bw_index(module_idP, CC_id),
UE_info->UE_sched_ctrl[UE_id].dl_cqi[CC_id],
format0);
}
LOG_D(MAC,"[eNB %d] frame %d subframe %d,Checking PUSCH %d for UE %d/%x CC %d : aggregation level %d, N_RB_UL %d\n",
module_idP,frameP,subframeP,harq_pid,UE_id,rnti,CC_id, aggregation,N_RB_UL);
int bytes_to_schedule = UE_template->estimated_ul_buffer - UE_template->scheduled_ul_bytes;
if (bytes_to_schedule < 0) bytes_to_schedule = 0;
if (bytes_to_schedule < 0) {
bytes_to_schedule = 0;
UE_template->scheduled_ul_bytes = 0;
}
RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP] = bytes_to_schedule;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_BO,RC.eNB[module_idP][CC_id]->pusch_stats_BO[UE_id][(frameP*10)+subframeP]);
@@ -3051,7 +3142,7 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
UE_sched_ctrl->cqi_received = 0;
UE_sched_ctrl->cqi_req_timer = 0;
cqi_req = 0;
}else if (UE_sched_ctrl->cqi_req_timer>30) {
}else if (UE_sched_ctrl->cqi_req_timer>64) {
cqi_req = 1;
// To be safe , do not ask CQI in special SFs:36.213/7.2.3 CQI definition
@@ -3082,14 +3173,15 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
//power control
//compute the expected ULSCH RX power (for the stats)
// this is the normalized RX power and this should be constant (regardless of mcs
snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10;
snr = UE_sched_ctrl->pusch_snr_avg[CC_id];
target_snr = eNB->puSch10xSnr / 10;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
int32_t framex10psubframe = UE_template->pusch_tpc_tx_frame*10+UE_template->pusch_tpc_tx_subframe;
int pusch_tpc_interval=500;
if (((framex10psubframe+10)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=10)))) { //frame wrap-around
if (((framex10psubframe+pusch_tpc_interval)<=(frameP*10+subframeP)) || //normal case
((framex10psubframe>(frameP*10+subframeP)) && (((10240-framex10psubframe+frameP*10+subframeP)>=pusch_tpc_interval)))) { //frame wrap-around
UE_template->pusch_tpc_tx_frame=frameP;
UE_template->pusch_tpc_tx_subframe=subframeP;
@@ -3133,6 +3225,17 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
UE_template->mcs_UL[harq_pid]=10;//cmin (10, openair_daq_vars.target_ue_ul_mcs);
rb_table_index=5; // for PHR
}
if( (UE_sched_ctrl->ul_scheduled | (1<<harq_pid))>0 ){
UE_template->scheduled_ul_bytes -= UE_template->TBS_UL[harq_pid];
if (UE_template->scheduled_ul_bytes < 0) {
UE_template->scheduled_ul_bytes = 0;
}
UE_template->estimated_ul_buffer -= UE_template->TBS_UL[harq_pid];
if (UE_template->estimated_ul_buffer < 0) {
UE_template->estimated_ul_buffer = 0;
}
}
UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=UE_template->mcs_UL[harq_pid];
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],rb_table[rb_table_index]);
@@ -3194,8 +3297,8 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
nfapi_hi_dci0_request_t *nfapi_hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP];
nfapi_hi_dci0_req->sfn_sf = frameP<<4|subframeP; // sfnsf_add_subframe(sched_frame, sched_subframeP, 0); // sunday!
nfapi_hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,UE_template->mcs_UL[harq_pid],first_rb[CC_id],rb_table[rb_table_index],0,UE_template->mcs_UL[harq_pid],UE_sched_ctrl->pusch_snr_avg[CC_id],UE_sched_ctrl->pusch_bler[CC_id]);
ul_req_index = 0;
dlsch_flag = 0;
@@ -3309,7 +3412,6 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
mcs_rv = 31;
}
UE_template->TBS_UL[harq_pid] = get_TBS_UL(UE_template->mcs_UL[harq_pid],ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb);
UE_info->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=UE_template->TBS_UL[harq_pid];
if (mac_eNB_get_rrc_status(module_idP,rnti) < RRC_CONNECTED)
@@ -3345,8 +3447,9 @@ void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.harq_pid = harq_pid;
hi_dci0_req->number_of_dci++;
// Add UL_config PDUs
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d mcs %d first_rb %d num_rb %d round %d mcs %d sinr %d bler %lf\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP,mcs_rv,ulsch_ue_select[CC_id].list[ulsch_ue_num].start_rb,ulsch_ue_select[CC_id].list[ulsch_ue_num].nb_rb,UE_sched_ctrl->round_UL[CC_id][harq_pid],UE_template->mcs_UL[harq_pid],UE_sched_ctrl->pusch_snr_avg[CC_id],UE_sched_ctrl->pusch_bler[CC_id]);
ul_req_index = 0;
dlsch_flag = 0;
openair2/LAYER2/MAC/eNB_scheduler_phytest.c
+1 -1
View File
@@ -238,7 +238,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
//power control
//compute the expected ULSCH RX power (for the stats)
// this is the snr and this should be constant (regardless of mcs)
snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10;
snr = UE_sched_ctrl->pusch_snr[CC_id];
// new transmission
ndi = 1-UE_template->oldNDI_UL[harq_pid];
UE_template->oldNDI_UL[harq_pid]=ndi;
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+17 -3
View File
@@ -2173,6 +2173,7 @@ add_new_ue(module_id_t mod_idP,
)
//------------------------------------------------------------------------------
{
eNB_MAC_INST *eNB = RC.mac[mod_idP];
int UE_id;
int i, j;
UE_info_t *UE_info = &RC.mac[mod_idP]->UE_info;
@@ -2215,7 +2216,19 @@ add_new_ue(module_id_t mod_idP,
0,
sizeof(eNB_UE_STATS));
UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0;
UE_info->UE_sched_ctrl[UE_id].ta_update_f = 31.0;
UE_info->UE_sched_ctrl[UE_id].ta_update = 31;
UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_cqi_f[cc_idP] = (eNB->puSch10xSnr+640)/5;
UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (eNB->puSch10xSnr+640)/5;
UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = eNB->puSch10xSnr/10;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num_old[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_bler[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].ret_cnt[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].first_cnt[cc_idP] = 0;
for (j = 0; j < 8; j++) {
UE_info->UE_template[cc_idP][UE_id].oldNDI[j] = 0;
@@ -4934,6 +4947,7 @@ cqi_indication(module_id_t mod_idP,
{
int UE_id = find_UE_id(mod_idP, rntiP);
UE_info_t *UE_info = &RC.mac[mod_idP]->UE_info;
uint64_t pdu_val = *(uint64_t *) pdu;
if (UE_id == -1) {
LOG_W(MAC, "cqi_indication: UE %x not found\n", rntiP);
@@ -4973,10 +4987,10 @@ cqi_indication(module_id_t mod_idP,
subframeP,
pdu,
rel9->length);
LOG_D(MAC,"Frame %d Subframe %d update CQI:%d\n",
LOG_D(MAC,"Frame %d Subframe %d update CQI:%d pdu 0x%016"PRIx64"\n",
frameP,
subframeP,
sched_ctl->dl_cqi[CC_idP]);
sched_ctl->dl_cqi[CC_idP],pdu_val);
sched_ctl->cqi_req_flag &= (~(1 << subframeP));
sched_ctl->cqi_received = 1;
}
@@ -5164,7 +5178,7 @@ harq_indication(module_id_t mod_idP,
/* don't care about cqi reporting if NACK/DTX is there */
if (channel == 0 && !nack_or_dtx_reported(cc,
harq_pdu)) {
sched_ctl->pucch1_snr[CC_idP] = ul_cqi;
sched_ctl->pucch1_snr[CC_idP] = (5 * ul_cqi - 640) / 10;
sched_ctl->pucch1_cqi_update[CC_idP] = 1;
}
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+108 -26
View File
@@ -160,13 +160,29 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_scheduling_control->ul_inactivity_timer = 0;
UE_scheduling_control->ul_failure_timer = 0;
UE_scheduling_control->ul_scheduled &= (~(1 << harq_pid));
UE_scheduling_control->pusch_rx_num[CC_idP]++;
/* Update with smoothing: 3/4 of old value and 1/4 of new.
* This is the logic that was done in the function
* lte_est_timing_advance_pusch, maybe it's not necessary?
* maybe it's even not correct at all?
*/
UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4;
UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi;
UE_scheduling_control->ta_update_f = ((double)UE_scheduling_control->ta_update_f * 3 + (double)timing_advance) / 4;
UE_scheduling_control->ta_update = (int)UE_scheduling_control->ta_update_f;
int tmp_snr = (5 * ul_cqi - 640) / 10;
UE_scheduling_control->pusch_snr[CC_idP] = tmp_snr;
if(tmp_snr > 0 && tmp_snr < 63) {
double snr_filter_tpc=0.7;
int snr_thres_tpc=30;
int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP];
if(abs(diff) < snr_thres_tpc) {
UE_scheduling_control->pusch_cqi_f[CC_idP] = ((double)UE_scheduling_control->pusch_cqi_f[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc));
UE_scheduling_control->pusch_cqi[CC_idP] = (int)UE_scheduling_control->pusch_cqi_f[CC_idP];
UE_scheduling_control->pusch_snr_avg[CC_idP] = (5 * UE_scheduling_control->pusch_cqi[CC_idP] - 640) / 10;
}
}
UE_scheduling_control->ul_consecutive_errors = 0;
first_rb = UE_template_ptr->first_rb_ul[harq_pid];
@@ -182,6 +198,7 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_template_ptr->scheduled_ul_bytes = 0;
}
} else { // sduP == NULL => error
UE_scheduling_control->pusch_rx_error_num[CC_idP]++;
LOG_D(MAC, "[eNB %d][PUSCH %d] CC_id %d %d.%d ULSCH in error in round %d, ul_cqi %d, UE_id %d, RNTI %x (len %d)\n",
enb_mod_idP,
harq_pid,
@@ -195,7 +212,7 @@ rx_sdu(const module_id_t enb_mod_idP,
sdu_lenP);
if (ul_cqi > 200) { // too high energy pattern
UE_scheduling_control->pusch_snr[CC_idP] = ul_cqi;
UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10;
LOG_W(MAC, "[MAC] Too high energy pattern\n");
}
@@ -290,6 +307,23 @@ rx_sdu(const module_id_t enb_mod_idP,
if (ra->msg3_round >= mac->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx - 1) {
cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti);
nfapi_hi_dci0_request_t *hi_dci0_req = NULL;
uint8_t sf_ahead_dl = ul_subframe2_k_phich(&mac->common_channels[CC_idP], subframeP);
hi_dci0_req = &mac->HI_DCI0_req[CC_idP][(subframeP + sf_ahead_dl) % 10];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
memset((void *) hi_dci0_pdu, 0, sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_HI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_hi_pdu);
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.tl.tag = NFAPI_HI_DCI0_REQUEST_HI_PDU_REL8_TAG;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.resource_block_start = first_rb;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.cyclic_shift_2_for_drms = 0;
hi_dci0_pdu->hi_pdu.hi_pdu_rel8.hi_value = 0;
hi_dci0_req_body->number_of_hi++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP, subframeP, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
} else {
if (ra->rach_resource_type > 0) {
cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti); // TODO: Currently we don't support retransmission of Msg3 ( If in error Cancel RA procedure and reattach)
@@ -638,7 +672,7 @@ rx_sdu(const module_id_t enb_mod_idP,
switch (rx_lcids[i]) {
case CCCH:
if (rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) {
if ((rx_lengths[i] > CCCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) {
LOG_E(MAC, "[eNB %d/%d] frame %d received CCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n",
enb_mod_idP,
CC_idP,
@@ -759,6 +793,17 @@ rx_sdu(const module_id_t enb_mod_idP,
LOG_T(MAC, "\n");
#endif
if ((rx_lengths[i] > DCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) {
LOG_E(MAC, "[eNB %d/%d] frame %d received DCCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lengths[i],
DCH_PAYLOAD_SIZE_MAX,
sdu_lenP);
break;
}
if (UE_id != -1) {
if (lcgid_updated[UE_template_ptr->lcgidmap[rx_lcids[i]]] == 0) {
/* Adjust buffer occupancy of the correponding logical channel group */
@@ -803,8 +848,18 @@ rx_sdu(const module_id_t enb_mod_idP,
LOG_T(MAC, "\n");
#endif
if (rx_lcids[i] < NB_RB_MAX) {
if ((rx_lengths[i] > SCH_PAYLOAD_SIZE_MAX) || (rx_lengths[i] < 0) || (rx_lengths[i] > (sdu_lenP - (payload_ptr - sduP)))) {
LOG_E(MAC, "[eNB %d/%d] frame %d received DTCH of size %d (too big, maximum allowed is %d, sdu_len %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lengths[i],
DCH_PAYLOAD_SIZE_MAX,
sdu_lenP);
UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1;
break;
}
LOG_D(MAC, "[eNB %d] CC_id %d Frame %d : ULSCH -> UL-DTCH, received %d bytes from UE %d for lcid %d\n",
enb_mod_idP,
CC_idP,
@@ -814,6 +869,25 @@ rx_sdu(const module_id_t enb_mod_idP,
rx_lcids[i]);
if (UE_id != -1) {
ue_contextP = rrc_eNB_get_ue_context(RC.rrc[enb_mod_idP], current_rnti);
if (ue_contextP != NULL) {
if (ue_contextP->ue_context.DRB_active[rx_lcids[i] - 2] == 0) {
LOG_E(MAC, "[eNB %d/%d] frame %d received non active DTCH of size %d ( sdu_len %d, lcid %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lengths[i],
sdu_lenP,rx_lcids[i]);
UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1;
break;
}
}else{
LOG_E(MAC, "[eNB %d] CC_id %d Couldn't find the context associated to UE (RNTI %d) and reset RRC inactivity timer\n",
enb_mod_idP,
CC_idP,
current_rnti);
break;
}
/* Adjust buffer occupancy of the correponding logical channel group */
LOG_D(MAC, "[eNB %d] CC_id %d Frame %d : ULSCH -> UL-DTCH, received %d bytes from UE %d for lcid %d, removing from LCGID %ld, %d\n",
enb_mod_idP,
@@ -837,48 +911,45 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_template_ptr->ul_buffer_info[1] +
UE_template_ptr->ul_buffer_info[2] +
UE_template_ptr->ul_buffer_info[3];
if (UE_template_ptr->estimated_ul_buffer == 0) {
UE_template_ptr->scheduled_ul_bytes = 0;
}
}
if ((rx_lengths[i] < SCH_PAYLOAD_SIZE_MAX) && (rx_lengths[i] > 0)) { // MAX SIZE OF transport block
mac_rlc_data_ind(enb_mod_idP, current_rnti, enb_mod_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, rx_lcids[i], (char *) payload_ptr, rx_lengths[i], 1, NULL);
UE_info->eNB_UE_stats[CC_idP][UE_id].num_pdu_rx[rx_lcids[i]] += 1;
UE_info->eNB_UE_stats[CC_idP][UE_id].num_bytes_rx[rx_lcids[i]] += rx_lengths[i];
/* Clear uplane_inactivity_timer */
UE_scheduling_control->uplane_inactivity_timer = 0;
/* Reset RRC inactivity timer after uplane activity */
ue_contextP = rrc_eNB_get_ue_context(RC.rrc[enb_mod_idP], current_rnti);
if (ue_contextP != NULL) {
ue_contextP->ue_context.ue_rrc_inactivity_timer = 1;
} else {
LOG_E(MAC, "[eNB %d] CC_id %d Couldn't find the context associated to UE (RNTI %d) and reset RRC inactivity timer\n",
enb_mod_idP,
CC_idP,
current_rnti);
}
} else { /* rx_length[i] Max size */
UE_info->eNB_UE_stats[CC_idP][UE_id].num_errors_rx += 1;
LOG_E(MAC, "[eNB %d] CC_id %d Frame %d : Max size of transport block reached LCID %d from UE %d ",
} else { // end if (UE_id != -1)
LOG_E(MAC,"[eNB %d] CC_id %d Frame %d : received unsupported or unknown LCID %d from UE %d ",
enb_mod_idP,
CC_idP,
frameP,
rx_lcids[i],
UE_id);
}
} else { // end if (UE_id != -1)
LOG_E(MAC,"[eNB %d] CC_id %d Frame %d : received unsupported or unknown LCID %d from UE %d ",
}else {
LOG_E(MAC, "[eNB %d/%d] frame %d received a invalid LCID of size %d ( sdu_len %d, lcid %d), dropping packet\n",
enb_mod_idP,
CC_idP,
frameP,
rx_lcids[i],
UE_id);
}
rx_lengths[i],
sdu_lenP,rx_lcids[i]);
}
break;
}
if((sdu_lenP - (payload_ptr - sduP)) >= rx_lengths[i]){
payload_ptr += rx_lengths[i];
}else{
LOG_E(MAC,"[eNB %d/%d] frame %d subframe %d rnti %x sdu_len %d remain_len %d rx_lengths %d\n",
enb_mod_idP,CC_idP,frameP,subframeP,rntiP,sdu_lenP,(uint16_t)(sdu_lenP - (payload_ptr - sduP)), rx_lengths[i]);
return;
}
}
/* CDRX UL HARQ timers */
@@ -1031,6 +1102,10 @@ parse_ulsch_header(unsigned char *mac_header,
tb_length,
length,
mac_header_ptr - mac_header);
if(num_sdus >= NB_RB_MAX){
LOG_E(MAC,"parse_ulsch_header: num_sdus(%d) reach max\n",num_sdus);
return NULL;
}
rx_lcids[num_sdus] = lcid;
rx_lengths[num_sdus] = length;
num_sdus++;
@@ -1038,6 +1113,10 @@ parse_ulsch_header(unsigned char *mac_header,
if (lcid == SHORT_PADDING) {
mac_header_ptr++;
} else {
if(num_ces >= MAX_NUM_CE){
LOG_E(MAC,"parse_ulsch_header: num_ces(%d) reach max\n",num_ces);
return NULL;
}
rx_ces[num_ces] = lcid;
num_ces++;
mac_header_ptr++;
@@ -1284,6 +1363,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
eNB_MAC_INST *mac = RC.mac[module_idP];
COMMON_channels_t *cc = mac->common_channels;
UE_info_t *UE_info = &mac->UE_info;
//uint8_t aggregation = 2;
int sched_frame = frameP;
@@ -1404,7 +1484,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
* This is the normalized RX snr and this should be constant (regardless
* of mcs) Is not in dBm, unit from nfapi, converting to dBm
*/
const int32_t snr = (5 * UE_sched_ctrl_ptr->pusch_snr[CC_id] - 640) / 10;
const int32_t snr = UE_sched_ctrl_ptr->pusch_snr[CC_id];
const int32_t target_snr = mac->puSch10xSnr / 10;
/*
@@ -1562,8 +1642,10 @@ schedule_ulsch_rnti(module_id_t module_idP,
UE_template_ptr->cshift[harq_pid] = cshift;
/* Setting DCI0 NFAPI struct */
hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[dci_ul_pdu_idx];
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2 + sizeof(nfapi_hi_dci0_dci_pdu);
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dci_format = NFAPI_UL_DCI_FORMAT_0;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.transmission_power = 6000;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.resource_block_start = UE_template_ptr->pre_first_nb_rb_ul;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.number_of_resource_block =
@@ -1985,7 +2067,7 @@ void schedule_ulsch_rnti_emtc(module_id_t module_idP,
cqi_req = 0;
/* Power control: compute the expected ULSCH RX snr (for the stats) */
/* This is the normalized snr and this should be constant (regardless of mcs) */
snr = (5 * UE_sched_ctrl->pusch_snr[CC_id] - 640) / 10;
snr = UE_sched_ctrl->pusch_snr[CC_id];
target_snr = eNB->puSch10xSnr / 10; /* TODO: target_rx_power was 178, what to put? */
/* This assumes accumulated tpc */
/* Make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out */
openair2/LAYER2/MAC/mac.h
+26 -7
View File
@@ -469,6 +469,7 @@ typedef struct {
#define BSR_TRIGGER_PADDING (4) /* For Padding BSR Trigger */
/*! \brief Downlink SCH PDU Structure */
typedef struct {
uint8_t payload[8][SCH_PAYLOAD_SIZE_MAX];
@@ -906,6 +907,11 @@ typedef struct {
uint32_t pucch_tpc_tx_frame;
uint32_t pucch_tpc_tx_subframe;
/// stores the frame where the last bler was calculated
uint32_t pusch_bler_calc_frame;
uint32_t pusch_bler_calc_subframe;
uint8_t rach_resource_type;
uint16_t mpdcch_repetition_cnt;
frame_t Msg2_frame;
@@ -928,6 +934,8 @@ typedef struct {
/// Current DL harq round per harq_pid on each CC
uint8_t round[NFAPI_CC_MAX][10];
uint32_t ret_cnt[NFAPI_CC_MAX];
uint32_t first_cnt[NFAPI_CC_MAX];
/// Current Active TBs per harq_pid on each CC
uint8_t tbcnt[NFAPI_CC_MAX][10];
/// Current UL harq round per harq_pid on each CC
@@ -937,6 +945,7 @@ typedef struct {
unsigned char rballoc_sub_UE[NFAPI_CC_MAX][N_RBG_MAX];
int pre_dci_dl_pdu_idx;
uint16_t ta_timer;
double ta_update_f;
int16_t ta_update;
uint16_t ul_consecutive_errors;
int32_t context_active_timer;
@@ -954,13 +963,22 @@ typedef struct {
int32_t phr_received;
uint8_t periodic_ri_received[NFAPI_CC_MAX];
uint8_t aperiodic_ri_received[NFAPI_CC_MAX];
uint8_t pucch1_cqi_update[NFAPI_CC_MAX];
uint8_t pucch1_snr[NFAPI_CC_MAX];
uint8_t pucch2_cqi_update[NFAPI_CC_MAX];
uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX];
int16_t pucch1_cqi_update[NFAPI_CC_MAX];
int16_t pucch1_snr[NFAPI_CC_MAX];
int16_t pucch2_cqi_update[NFAPI_CC_MAX];
int16_t pucch2_snr[NFAPI_CC_MAX];
int16_t pucch3_cqi_update[NFAPI_CC_MAX];
int16_t pucch3_snr[NFAPI_CC_MAX];
double pusch_cqi_f[NFAPI_CC_MAX];
int16_t pusch_cqi[NFAPI_CC_MAX];
int16_t pusch_snr[NFAPI_CC_MAX];
int16_t pusch_snr_avg[NFAPI_CC_MAX];
uint64_t pusch_rx_num[NFAPI_CC_MAX];
uint64_t pusch_rx_num_old[NFAPI_CC_MAX];
uint64_t pusch_rx_error_num[NFAPI_CC_MAX];
uint64_t pusch_rx_error_num_old[NFAPI_CC_MAX];
double pusch_bler[NFAPI_CC_MAX];
uint8_t mcs_offset[NFAPI_CC_MAX];
uint16_t feedback_cnt[NFAPI_CC_MAX];
uint16_t timing_advance;
uint16_t timing_advance_r9;
@@ -1039,6 +1057,7 @@ typedef struct {
/// DRX UL retransmission timer, one per UL HARQ process
/* Not implemented yet */
/* End of C-DRX related timers */
uint32_t rlc_out_of_resources_cnt;
} UE_sched_ctrl_t;
/*! \brief eNB template for the Random access information */
openair2/RRC/LTE/rrc_defs.h
+1 -1
View File
@@ -554,7 +554,7 @@ typedef struct eNB_RRC_UE_s {
LTE_DRB_ToAddModList_t *DRB_configList;
LTE_DRB_ToAddModList_t *DRB_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER];
LTE_DRB_ToReleaseList_t *DRB_Release_configList2[RRC_TRANSACTION_IDENTIFIER_NUMBER];
uint8_t DRB_active[8];
uint8_t DRB_active[NB_RB_MAX -2];
struct LTE_PhysicalConfigDedicated *physicalConfigDedicated;
struct LTE_SPS_Config *sps_Config;
LTE_MeasObjectToAddMod_t *MeasObj[MAX_MEAS_OBJ];
openair2/RRC/LTE/rrc_eNB.c
+2 -14
View File
@@ -6711,22 +6711,10 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
);
}
} else { // remove LCHAN from MAC/PHY
if (ue_context_pP->ue_context.DRB_active[drb_id] == 1) {
// DRB has just been removed so remove RLC + PDCP for DRB
/* rrc_pdcp_config_req (ctxt_pP->module_id, frameP, 1, CONFIG_ACTION_REMOVE,
(ue_mod_idP * NB_RB_MAX) + DRB2LCHAN[i],UNDEF_SECURITY_MODE);
*/
if (!NODE_IS_CU(RC.rrc[ctxt_pP->module_id]->node_type)) {
rrc_rlc_config_req(ctxt_pP,
SRB_FLAG_NO,
MBMS_FLAG_NO,
CONFIG_ACTION_REMOVE,
DRB2LCHAN[i],
Rlc_info_um);
}
if (DRB_configList->list.array[i]->logicalChannelIdentity) {
DRB2LCHAN[i] = (uint8_t) * DRB_configList->list.array[i]->logicalChannelIdentity;
}
ue_context_pP->ue_context.DRB_active[drb_id] = 0;
LOG_D(RRC, PROTOCOL_RRC_CTXT_UE_FMT" RRC_eNB --- MAC_CONFIG_REQ (DRB) ---> MAC_eNB\n",
PROTOCOL_RRC_CTXT_UE_ARGS(ctxt_pP));