sched_pdcch not a pointer in structures
This commit is contained in:
@@ -799,7 +799,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
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ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
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pdcch_pdu_rel15 = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
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ul_dci_req->numPdus += 1;
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch);
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch);
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nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
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}
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@@ -815,7 +815,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
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CC_id,
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aggregation_level,
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nr_of_candidates,
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ra->sched_pdcch,
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&ra->sched_pdcch,
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coreset,
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0);
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if (CCEIndex < 0) {
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@@ -861,7 +861,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
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fill_pdcch_vrb_map(nr_mac,
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CC_id,
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ra->sched_pdcch,
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&ra->sched_pdcch,
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CCEIndex,
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aggregation_level);
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@@ -1211,7 +1211,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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CC_id,
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aggregation_level,
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nr_of_candidates,
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ra->sched_pdcch,
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&ra->sched_pdcch,
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coreset,
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0);
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@@ -1236,7 +1236,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
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dl_req->nPDUs += 1;
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pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch);
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch);
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nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
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}
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@@ -1397,7 +1397,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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// Mark the corresponding symbols RBs as used
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fill_pdcch_vrb_map(nr_mac,
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CC_id,
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ra->sched_pdcch,
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&ra->sched_pdcch,
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CCEIndex,
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aggregation_level);
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for (int rb = 0; rb < rbSize; rb++) {
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@@ -1500,7 +1500,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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CC_id,
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aggregation_level,
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nr_of_candidates,
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ra->sched_pdcch,
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&ra->sched_pdcch,
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coreset,
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0);
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@@ -1642,7 +1642,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
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dl_req->nPDUs += 1;
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pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, ra->sched_pdcch);
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nr_configure_pdcch(pdcch_pdu_rel15, coreset, genericParameters, &ra->sched_pdcch);
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nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
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}
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@@ -1786,7 +1786,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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// Mark the corresponding symbols and RBs as used
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fill_pdcch_vrb_map(nr_mac,
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CC_id,
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ra->sched_pdcch,
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&ra->sched_pdcch,
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CCEIndex,
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aggregation_level);
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for (int rb = 0; rb < pdsch_pdu_rel15->rbSize; rb++) {
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@@ -366,7 +366,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
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CC_id,
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gNB_mac->sched_ctrlCommon->aggregation_level,
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nr_of_candidates,
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gNB_mac->sched_ctrlCommon->sched_pdcch,
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&gNB_mac->sched_ctrlCommon->sched_pdcch,
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gNB_mac->sched_ctrlCommon->coreset,
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0);
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@@ -422,7 +422,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,
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// Mark the corresponding RBs as used
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fill_pdcch_vrb_map(gNB_mac,
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CC_id,
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gNB_mac->sched_ctrlCommon->sched_pdcch,
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&gNB_mac->sched_ctrlCommon->sched_pdcch,
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gNB_mac->sched_ctrlCommon->cce_index,
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gNB_mac->sched_ctrlCommon->aggregation_level);
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for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
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@@ -452,7 +452,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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nr_configure_pdcch(pdcch_pdu_rel15,
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gNB_mac->sched_ctrlCommon->coreset,
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NULL,
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gNB_mac->sched_ctrlCommon->sched_pdcch);
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&gNB_mac->sched_ctrlCommon->sched_pdcch);
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
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memset((void*)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
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@@ -628,7 +628,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
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/* CC_id = */ 0,
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sched_ctrl->aggregation_level,
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nr_of_candidates,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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sched_ctrl->coreset,
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Y);
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@@ -657,7 +657,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
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fill_pdcch_vrb_map(RC.nrmac[module_id],
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/* CC_id = */ 0,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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CCEIndex,
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sched_ctrl->aggregation_level);
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@@ -785,7 +785,7 @@ void pf_dl(module_id_t module_id,
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/* CC_id = */ 0,
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sched_ctrl->aggregation_level,
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nr_of_candidates,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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sched_ctrl->coreset,
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Y);
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@@ -816,7 +816,7 @@ void pf_dl(module_id_t module_id,
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fill_pdcch_vrb_map(mac,
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/* CC_id = */ 0,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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CCEIndex,
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sched_ctrl->aggregation_level);
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@@ -1073,7 +1073,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
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pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
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LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid);
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NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
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nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch);
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nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch);
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gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu;
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}
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@@ -351,7 +351,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
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CC_id,
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sched_ctrl->aggregation_level,
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nr_of_candidates,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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sched_ctrl->coreset,
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Y);
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@@ -377,7 +377,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
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fill_pdcch_vrb_map(RC.nrmac[module_id],
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CC_id,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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CCEIndex,
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sched_ctrl->aggregation_level);
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@@ -517,7 +517,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
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CC_id,
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sched_ctrl->aggregation_level,
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nr_of_candidates,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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sched_ctrl->coreset,
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Y);
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@@ -556,7 +556,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
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/* mark the corresponding RBs as used */
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fill_pdcch_vrb_map(nr_mac,
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CC_id,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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CCEIndex,
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sched_ctrl->aggregation_level);
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@@ -209,41 +209,41 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc,
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AssertFatal(0, "Couldn't find an adequate searchspace bwp_Dedicated %p\n",bwp_Dedicated);
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}
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NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac,
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NR_SearchSpace_t *ss,
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NR_ControlResourceSet_t *coreset,
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NR_ServingCellConfigCommon_t *scc,
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NR_BWP_t *bwp,
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) {
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NR_sched_pdcch_t *pdcch = calloc(1,sizeof(NR_sched_pdcch_t));
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NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac,
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NR_SearchSpace_t *ss,
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NR_ControlResourceSet_t *coreset,
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NR_ServingCellConfigCommon_t *scc,
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NR_BWP_t *bwp,
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NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config) {
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int sps;
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NR_sched_pdcch_t pdcch;
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AssertFatal(*ss->controlResourceSetId == coreset->controlResourceSetId,
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"coreset id in SS %ld does not correspond to the one in coreset %ld",
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*ss->controlResourceSetId, coreset->controlResourceSetId);
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if (bwp) { // This is not for SIB1
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if(coreset->controlResourceSetId == 0){
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pdcch->BWPSize = gNB_mac->cset0_bwp_size;
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pdcch->BWPStart = gNB_mac->cset0_bwp_start;
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pdcch.BWPSize = gNB_mac->cset0_bwp_size;
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pdcch.BWPStart = gNB_mac->cset0_bwp_start;
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}
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else {
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pdcch->BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE);
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pdcch->BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE);
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pdcch.BWPSize = NRRIV2BW(bwp->locationAndBandwidth, MAX_BWP_SIZE);
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pdcch.BWPStart = NRRIV2PRBOFFSET(bwp->locationAndBandwidth, MAX_BWP_SIZE);
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}
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pdcch->SubcarrierSpacing = bwp->subcarrierSpacing;
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pdcch->CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix;
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pdcch.SubcarrierSpacing = bwp->subcarrierSpacing;
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pdcch.CyclicPrefix = (bwp->cyclicPrefix==NULL) ? 0 : *bwp->cyclicPrefix;
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//AssertFatal(pdcch_scs==kHz15, "PDCCH SCS above 15kHz not allowed if a symbol above 2 is monitored");
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sps = bwp->cyclicPrefix == NULL ? 14 : 12;
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}
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else {
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AssertFatal(type0_PDCCH_CSS_config!=NULL,"type0_PDCCH_CSS_config is null,bwp %p\n",bwp);
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pdcch->BWPSize = type0_PDCCH_CSS_config->num_rbs;
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pdcch->BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
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pdcch->SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch;
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pdcch->CyclicPrefix = 0;
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pdcch.BWPSize = type0_PDCCH_CSS_config->num_rbs;
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pdcch.BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
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pdcch.SubcarrierSpacing = type0_PDCCH_CSS_config->scs_pdcch;
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pdcch.CyclicPrefix = 0;
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sps = 14;
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}
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@@ -256,29 +256,29 @@ NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac,
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for (int i=0; i<sps; i++) {
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if ((monitoringSymbolsWithinSlot>>(sps-1-i))&1) {
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pdcch->StartSymbolIndex=i;
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pdcch.StartSymbolIndex=i;
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break;
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}
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}
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pdcch->DurationSymbols = coreset->duration;
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pdcch.DurationSymbols = coreset->duration;
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//cce-REG-MappingType
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pdcch->CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved?
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pdcch.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved?
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NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED : NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED;
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if (pdcch->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
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pdcch->RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize ==
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if (pdcch.CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
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pdcch.RegBundleSize = (coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize ==
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NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->reg_BundleSize);
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pdcch->InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize ==
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pdcch.InterleaverSize = (coreset->cce_REG_MappingType.choice.interleaved->interleaverSize ==
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NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n6) ? 6 : (2+coreset->cce_REG_MappingType.choice.interleaved->interleaverSize);
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AssertFatal(scc->physCellId != NULL,"scc->physCellId is null\n");
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pdcch->ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId;
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pdcch.ShiftIndex = coreset->cce_REG_MappingType.choice.interleaved->shiftIndex != NULL ? *coreset->cce_REG_MappingType.choice.interleaved->shiftIndex : *scc->physCellId;
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}
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else {
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pdcch->RegBundleSize = 6;
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pdcch->InterleaverSize = 0;
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pdcch->ShiftIndex = 0;
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pdcch.RegBundleSize = 6;
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pdcch.InterleaverSize = 0;
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pdcch.ShiftIndex = 0;
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}
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int N_rb = 0; // nb of rbs of coreset per symbol
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@@ -287,7 +287,7 @@ NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac,
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N_rb+=((coreset->frequencyDomainResources.buf[i]>>t)&1);
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}
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}
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pdcch->n_rb = N_rb*=6; // each bit of frequencyDomainResources represents 6 PRBs
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pdcch.n_rb = N_rb*=6; // each bit of frequencyDomainResources represents 6 PRBs
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return pdcch;
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}
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@@ -1024,7 +1024,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
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CC_id,
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sched_ctrl->aggregation_level,
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nr_of_candidates,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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sched_ctrl->coreset,
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Y);
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@@ -1036,7 +1036,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
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sched_ctrl->cce_index = CCEIndex;
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fill_pdcch_vrb_map(RC.nrmac[module_id],
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CC_id,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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CCEIndex,
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sched_ctrl->aggregation_level);
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@@ -1170,7 +1170,7 @@ void pf_ul(module_id_t module_id,
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CC_id,
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sched_ctrl->aggregation_level,
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nr_of_candidates,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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sched_ctrl->coreset,
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Y);
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@@ -1194,7 +1194,7 @@ void pf_ul(module_id_t module_id,
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sched_ctrl->cce_index = CCEIndex;
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fill_pdcch_vrb_map(RC.nrmac[module_id],
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CC_id,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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CCEIndex,
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sched_ctrl->aggregation_level);
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@@ -1280,7 +1280,7 @@ void pf_ul(module_id_t module_id,
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CC_id,
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sched_ctrl->aggregation_level,
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nr_of_candidates,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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sched_ctrl->coreset,
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Y);
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if (CCEIndex<0) {
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@@ -1350,7 +1350,7 @@ void pf_ul(module_id_t module_id,
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sched_ctrl->cce_index = CCEIndex;
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fill_pdcch_vrb_map(RC.nrmac[module_id],
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CC_id,
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sched_ctrl->sched_pdcch,
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&sched_ctrl->sched_pdcch,
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CCEIndex,
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sched_ctrl->aggregation_level);
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||||
|
||||
@@ -1754,7 +1754,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
|
||||
ul_dci_request_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
|
||||
pdcch_pdu = &ul_dci_request_pdu->pdcch_pdu.pdcch_pdu_rel15;
|
||||
ul_dci_req->numPdus += 1;
|
||||
nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, sched_ctrl->sched_pdcch);
|
||||
nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch);
|
||||
nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu;
|
||||
}
|
||||
|
||||
|
||||
@@ -253,12 +253,12 @@ void nr_configure_pdcch(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu,
|
||||
NR_BWP_t *bwp,
|
||||
NR_sched_pdcch_t *pdcch);
|
||||
|
||||
NR_sched_pdcch_t *set_pdcch_structure(gNB_MAC_INST *gNB_mac,
|
||||
NR_SearchSpace_t *ss,
|
||||
NR_ControlResourceSet_t *coreset,
|
||||
NR_ServingCellConfigCommon_t *scc,
|
||||
NR_BWP_t *bwp,
|
||||
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
|
||||
NR_sched_pdcch_t set_pdcch_structure(gNB_MAC_INST *gNB_mac,
|
||||
NR_SearchSpace_t *ss,
|
||||
NR_ControlResourceSet_t *coreset,
|
||||
NR_ServingCellConfigCommon_t *scc,
|
||||
NR_BWP_t *bwp,
|
||||
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
|
||||
|
||||
uint8_t find_pdcch_candidate(gNB_MAC_INST *mac,
|
||||
int cc_id,
|
||||
|
||||
@@ -181,7 +181,7 @@ typedef struct {
|
||||
NR_SearchSpace_t *ra_ss;
|
||||
/// RA Coreset
|
||||
NR_ControlResourceSet_t *coreset;
|
||||
NR_sched_pdcch_t *sched_pdcch;
|
||||
NR_sched_pdcch_t sched_pdcch;
|
||||
// Beam index
|
||||
uint8_t beam_id;
|
||||
/// CellGroup for UE that is to come (NSA is non-null, null for SA)
|
||||
@@ -551,7 +551,7 @@ typedef struct {
|
||||
/// CCE index and aggregation, should be coherent with cce_list
|
||||
NR_SearchSpace_t *search_space;
|
||||
NR_ControlResourceSet_t *coreset;
|
||||
NR_sched_pdcch_t *sched_pdcch;
|
||||
NR_sched_pdcch_t sched_pdcch;
|
||||
|
||||
/// CCE index and Aggr. Level are shared for PUSCH/PDSCH allocation decisions
|
||||
/// corresponding to the sched_pusch/sched_pdsch structures below
|
||||
|
||||
Reference in New Issue
Block a user