fixed cce indexing to allow multiple pdcch on single coreset
This commit is contained in:
committed by
Sakthivel Velumani
parent
4074db8515
commit
6b3ddcc799
@@ -64,37 +64,23 @@ void nr_pdcch_scrambling(uint32_t *in,
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}
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}
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uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
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nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
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nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu,
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uint32_t **gold_pdcch_dmrs,
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int32_t *txdataF,
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int16_t amp,
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NR_DL_FRAME_PARMS frame_parms) {
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uint8_t nr_generate_dci(PHY_VARS_gNB *gNB,
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
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uint32_t **gold_pdcch_dmrs,
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int32_t *txdataF,
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int16_t amp,
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NR_DL_FRAME_PARMS frame_parms) {
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int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
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uint16_t cset_start_sc;
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uint8_t cset_start_symb, cset_nsymb;
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int k,l,k_prime,dci_idx, dmrs_idx;
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/*First iteration: single DCI*/
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15=NULL;
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// find coreset descriptor
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int rb_offset;
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int n_rb;
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AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n");
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AssertFatal(pdcch_pdu==NULL || ul_dci_pdu==NULL,"Can't handle both DL and UL DCI in same slot\n");
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if (pdcch_pdu) pdcch_pdu_rel15 = &pdcch_pdu->pdcch_pdu_rel15;
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else if (ul_dci_pdu) pdcch_pdu_rel15 = &ul_dci_pdu->pdcch_pdu_rel15;
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nr_fill_cce_list(gNB,0,pdcch_pdu_rel15);
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get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
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@@ -244,3 +230,23 @@ uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
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return 0;
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}
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uint8_t nr_generate_dci_top(PHY_VARS_gNB *gNB,
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nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
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nfapi_nr_dl_tti_pdcch_pdu *ul_dci_pdu,
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uint32_t **gold_pdcch_dmrs,
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int32_t *txdataF,
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int16_t amp,
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NR_DL_FRAME_PARMS frame_parms) {
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AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n");
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if (pdcch_pdu && ul_dci_pdu)
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return (nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms) ||
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nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms));
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else if (pdcch_pdu)
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return nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
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else if (ul_dci_pdu)
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return nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
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}
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@@ -440,6 +440,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
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memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1
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for (int i=0; i<MAX_NUM_CORESET; i++)
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RC.nrmac[module_idP]->UE_info.num_pdcch_cand[UE_id][i] = 0;
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for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
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//mbsfn_status[CC_id] = 0;
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@@ -469,6 +471,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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// This schedule RA procedure if not in phy_test mode
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// Otherwise already consider 5G already connected
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RC.nrmac[module_idP]->current_slot=slot;
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if (get_softmodem_params()->phy_test == 0) {
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nr_schedule_RA(module_idP, frame, slot);
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nr_schedule_reception_msg3(module_idP, 0, frame, slot);
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@@ -674,13 +674,13 @@ void nr_generate_Msg2(module_id_t module_idP,
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uint8_t nr_of_candidates, aggregation_level;
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find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss);
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NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 0 /* common */);
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int CCEIndex = allocate_nr_CCEs(
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nr_mac,
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bwp,
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coreset,
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aggregation_level,
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0, /* n_RNTI 0: common search space */
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0); // m
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int CCEIndex = allocate_nr_CCEs(nr_mac,
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bwp,
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coreset,
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aggregation_level,
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0, // Y
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0, // m
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nr_of_candidates);
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if (CCEIndex < 0) {
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LOG_E(MAC, "%s(): cannot find free CCE for RA RNTI %04x!\n", __func__, ra->rnti);
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@@ -488,16 +488,21 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
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sched_ctrl->search_space);
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sched_ctrl->coreset = get_coreset(
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sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
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int cid = sched_ctrl->coreset->controlResourceSetId;
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const uint16_t Y = UE_info->Y[UE_id][cid][slot];
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const int m = UE_info->num_pdcch_cand[UE_id][cid];
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sched_ctrl->cce_index = allocate_nr_CCEs(RC.nrmac[module_id],
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sched_ctrl->active_bwp,
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sched_ctrl->coreset,
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sched_ctrl->aggregation_level,
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UE_info->rnti[UE_id],
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0); // m
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sched_ctrl->active_bwp,
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sched_ctrl->coreset,
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sched_ctrl->aggregation_level,
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Y,
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m,
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nr_of_candidates);
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if (sched_ctrl->cce_index < 0) {
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LOG_E(MAC, "%s(): could not find CCE for UE %d\n", __func__, UE_id);
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return;
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}
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UE_info->num_pdcch_cand[UE_id][cid]++;
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/* Find PUCCH occasion */
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nr_update_pucch_scheduling(
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@@ -417,18 +417,23 @@ int configure_fapi_dl_pdu_phytest(int Mod_idP,
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uint8_t nr_of_candidates, aggregation_level;
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find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss);
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NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */);
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int CCEIndex = allocate_nr_CCEs(
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nr_mac,
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bwp,
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coreset,
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aggregation_level,
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UE_info->rnti[UE_id],
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0); // m
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const int cid = coreset->controlResourceSetId;
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const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot];
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const int m = UE_info->num_pdcch_cand[UE_id][cid];
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int CCEIndex = allocate_nr_CCEs(nr_mac,
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bwp,
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coreset,
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aggregation_level,
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Y,
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m,
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nr_of_candidates);
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if (CCEIndex < 0) {
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LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PDSCH\n", __func__);
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free(dci_pdu_rel15);
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return 0;
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}
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UE_info->num_pdcch_cand[UE_id][cid]++;
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nr_configure_pdcch(nr_mac,
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pdcch_pdu_rel15,
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UE_info->rnti[UE_id],
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@@ -1126,19 +1131,23 @@ void schedule_fapi_ul_pdu(int Mod_idP,
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uint8_t nr_of_candidates, aggregation_level;
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find_aggregation_candidates(&aggregation_level, &nr_of_candidates, ss);
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NR_ControlResourceSet_t *coreset = get_coreset(bwp, ss, 1 /* dedicated */);
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int CCEIndex = allocate_nr_CCEs(
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nr_mac,
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bwp,
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coreset,
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aggregation_level,
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UE_info->rnti[UE_id],
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0); // m
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const int cid = coreset->controlResourceSetId;
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const uint16_t Y = UE_info->Y[UE_id][cid][nr_mac->current_slot];
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const int m = UE_info->num_pdcch_cand[UE_id][cid];
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int CCEIndex = allocate_nr_CCEs(nr_mac,
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bwp,
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coreset,
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aggregation_level,
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Y,
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m,
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nr_of_candidates);
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if (CCEIndex < 0) {
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LOG_E(MAC, "%s(): CCE list not empty, couldn't schedule PUSCH\n", __func__);
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pusch_sched->active = false;
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return;
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}
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else {
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UE_info->num_pdcch_cand[UE_id][cid]++;
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nr_configure_pdcch(nr_mac,
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pdcch_pdu_rel15,
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UE_info->rnti[UE_id],
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@@ -172,8 +172,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
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NR_BWP_Downlink_t *bwp,
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NR_ControlResourceSet_t *coreset,
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int aggregation,
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uint16_t n_RNTI,
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int m) {
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uint16_t Y,
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int m,
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int nr_of_candidates) {
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// uncomment these when we allocate for common search space
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// NR_COMMON_channels_t *cc = nr_mac->common_channels;
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// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
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@@ -189,15 +190,19 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
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n_rb*=6;
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uint16_t N_reg = n_rb * coreset->duration;
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uint16_t n_CI=0;
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const uint32_t A[3]={39827,39829,39839};
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/* if n_RNTI is zero, this results in zero, too! */
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uint16_t Y = (A[0]*n_RNTI)%65537; // Candidate 0, antenna port 0
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uint16_t n_CI = 0;
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uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE;
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const uint16_t N_cce = N_reg / NR_NB_REG_PER_CCE;
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const uint16_t M_s_max = nr_of_candidates;
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uint16_t M_s_max = (aggregation==4)?4:(aggregation==8)?2:1;
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int first_cce = aggregation * (( Y + (m*N_cce)/(aggregation*M_s_max) + n_CI ) % CEILIDIV(N_cce,aggregation));
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AssertFatal(m < nr_of_candidates,
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"PDCCH candidate index %d in CORESET %d exceeds the maximum "
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"number of PDCCH candidates (%d)\n",
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m,
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coreset_id,
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nr_of_candidates);
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int first_cce = aggregation * (( Y + CEILIDIV((m*N_cce),(aggregation*M_s_max)) + n_CI ) % CEILIDIV(N_cce,aggregation));
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for (int i=0;i<aggregation;i++)
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if (cce_list[first_cce+i] != 0) return(-1);
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@@ -1619,6 +1624,22 @@ int find_nr_UE_id(module_id_t mod_idP, rnti_t rntiP)
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return -1;
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}
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void set_Y(NR_UE_list_t *UE_list, int UE_id) {
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int A[3] = {39827,39829,39839};
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int D = 65537;
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int s = 0;
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UE_list->Y[UE_id][0][s] = (A[0]*UE_list->rnti[UE_id]) % D;
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UE_list->Y[UE_id][1][s] = (A[1]*UE_list->rnti[UE_id]) % D;
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UE_list->Y[UE_id][2][s] = (A[2]*UE_list->rnti[UE_id]) % D;
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for (s=1; s<160; s++) {
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UE_list->Y[UE_id][0][s] = (A[0]*UE_list->Y[UE_id][0][s-1]) % D;
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UE_list->Y[UE_id][1][s] = (A[1]*UE_list->Y[UE_id][1][s-1]) % D;
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UE_list->Y[UE_id][2][s] = (A[2]*UE_list->Y[UE_id][2][s-1]) % D;
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}
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}
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int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
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NR_UE_info_t *UE_info = &RC.nrmac[mod_idP]->UE_info;
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@@ -1642,6 +1663,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
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UE_info->active[UE_id] = true;
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UE_info->rnti[UE_id] = rntiP;
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add_nr_ue_list(&UE_info->list, UE_id);
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set_Y(UE_info, UE_id);
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memset((void *) &UE_info->UE_sched_ctrl[UE_id],
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0,
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sizeof(NR_UE_sched_ctrl_t));
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@@ -314,8 +314,9 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
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NR_BWP_Downlink_t *bwp,
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NR_ControlResourceSet_t *coreset,
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int aggregation,
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uint16_t n_RNTI,
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int m);
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uint16_t Y,
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int m,
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int nr_of_candidates);
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int get_dlscs(nfapi_nr_config_request_t *cfg);
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@@ -380,6 +380,10 @@ typedef struct {
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bool active[MAX_MOBILES_PER_GNB];
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rnti_t rnti[MAX_MOBILES_PER_GNB];
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NR_CellGroupConfig_t *secondaryCellGroup[MAX_MOBILES_PER_GNB];
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/// CCE indexing
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int Y[MAX_MOBILES_PER_GNB][3][160];
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int m[MAX_MOBILES_PER_GNB];
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int num_pdcch_cand[MAX_MOBILES_PER_GNB][MAX_NUM_CORESET];
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} NR_UE_info_t;
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/*! \brief top level eNB MAC structure */
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@@ -442,6 +446,8 @@ typedef struct gNB_MAC_INST_s {
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time_stats_t schedule_pch;
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/// CCE lists
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int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE];
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/// current slot
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int current_slot;
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} gNB_MAC_INST;
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#endif /*__LAYER2_NR_MAC_GNB_H__ */
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