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usrp 20 MHz on 30.72 master clock. fixed memory leak in prach.c for 20 MHz with 3/4 sampling. added default attributes to threads in lte-enb.c

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This commit is contained in:
Raymond Knopp
2016-08-08 00:08:43 +02:00
parent 018fb07187
commit 857af54015
3 changed files with 29 additions and 7 deletions
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openair1/PHY/LTE_TRANSPORT/prach.c
+20 -6
View File
@@ -1161,6 +1161,9 @@ void rx_prach(PHY_VARS_eNB *eNB,
break;
}
if (eNB->frame_parms.threequarter_fs == 1)
Ncp=(Ncp*3)>>2;
switch (eNB->frame_parms.N_RB_UL) {
case 6:
Ncp>>=4;
@@ -1258,13 +1261,24 @@ void rx_prach(PHY_VARS_eNB *eNB,
break;
case 100:
if (prach_fmt == 4) {
dft4096(prach2,rxsigF[aa],1);
if (eNB->frame_parms.threequarter_fs==0) {
if (prach_fmt == 4) {
dft4096(prach2,rxsigF[aa],1);
} else {
dft24576(prach2,rxsigF[aa]);
if (prach_fmt>1)
dft24576(prach2+49152,rxsigF[aa]+49152);
}
} else {
dft24576(prach2,rxsigF[aa]);
if (prach_fmt>1)
dft24576(prach2+49152,rxsigF[aa]+49152);
if (prach_fmt == 4) {
dft3072(prach2,rxsigF[aa]);
} else {
dft18432(prach2,rxsigF[aa]);
if (prach_fmt>1)
dft18432(prach2+36864,rxsigF[aa]+36864);
}
}
break;
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+1 -1
View File
@@ -610,7 +610,7 @@ extern "C" {
switch ((int)openair0_cfg[0].sample_rate) {
case 30720000:
s->usrp->set_master_clock_rate(61.44e6);
s->usrp->set_master_clock_rate(30.72e6);
openair0_cfg[0].tx_sample_advance = 115;
openair0_cfg[0].tx_bw = 20e6;
openair0_cfg[0].rx_bw = 20e6;
targets/RT/USER/lte-enb.c
+8
View File
@@ -1371,6 +1371,14 @@ void init_eNB_proc(int inst) {
pthread_cond_init( &proc->cond_prach, NULL);
pthread_cond_init( &proc->cond_FH, NULL);
pthread_cond_init( &proc->cond_asynch_rxtx, NULL);
pthread_attr_init( &proc->attr_FH);
pthread_attr_init( &proc->attr_prach);
pthread_attr_init( &proc->attr_asynch_rxtx);
pthread_attr_init( &proc->attr_single);
pthread_attr_init( &proc->attr_fep);
pthread_attr_init( &proc_rxtx[0].attr_rxtx);
pthread_attr_init( &proc_rxtx[1].attr_rxtx);
#ifndef DEADLINE_SCHEDULER
attr0 = &proc_rxtx[0].attr_rxtx;
attr1 = &proc_rxtx[1].attr_rxtx;