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Additions for TM3 in eNB and partially in UE - RK

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git-svn-id: http://svn.eurecom.fr/openair4G/trunk@6183 818b1a75-f10b-46b9-bf7c-635c3b92a50f
This commit is contained in:
Raymond Knopp
2014-12-08 07:40:40 +00:00
parent 669c8eb903
commit d787525c93
4 changed files with 210 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+202 -1
View File
@@ -392,7 +392,7 @@ void schedule_ue_spec(module_id_t module_idP,
uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX]; unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX];
uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
int mcs; int mcs,mcs2;
uint16_t min_rb_unit[MAX_NUM_CCs]; uint16_t min_rb_unit[MAX_NUM_CCs];
short ta_update = 0; short ta_update = 0;
eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP]; eNB_MAC_INST *eNB = &eNB_mac_inst[module_idP];
@@ -1093,6 +1093,122 @@ void schedule_ue_spec(module_id_t module_idP,
} }
} }
break; break;
case 3:
if (frame_parms[CC_id]->frame_type == TDD) {
switch (frame_parms[CC_id]->N_RB_DL) {
case 6:
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
// deactivate TB2
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rv2 = 1;
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
break;
case 25:
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
// deactivate TB2
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rv2 = 1;
LOG_D(MAC,"Format1 DCI: harq_pid %d, ndi %d\n",harq_pid,((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1);
break;
case 50:
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
// deactivate TB2
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rv2 = 1;
break;
case 100:
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
// deactivate TB2
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rv2 = 1;
break;
default:
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rv1 = 0;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->dai = (UE_list->UE_template[CC_id][UE_id].DAI-1)&3;
// deactivate TB2
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rv2 = 1;
break;
}
}
else {
switch (frame_parms[CC_id]->N_RB_DL) {
case 6:
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
// deactivate TB2
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rv2 = 1;
break;
case 25:
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
// deactivate TB2
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rv2 = 1;
break;
case 50:
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
// deactivate TB2
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rv2 = 1;
break;
case 100:
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
// deactivate TB2
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rv2 = 1;
break;
default:
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->mcs1 = mcs;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->ndi1 = 1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rv1 = 0;
// deactivate TB2
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->mcs2 = 0;
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rv2 = 1;
break;
}
}
break;
case 4: case 4:
// if (nb_rb>10) { // if (nb_rb>10) {
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs; ((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
@@ -1860,6 +1976,91 @@ void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP
0); 0);
break; break;
case 3:
LOG_D(MAC,"[eNB %d] Adding Format 2A UE %d spec DCI for %d PRBS (rb alloc: %x) \n",module_idP, UE_id, nb_rb,rballoc);
if (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.frame_type == TDD) {
switch (PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
case 6:
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
size_bytes = sizeof(DCI2A_1_5MHz_2A_TDD_t);
size_bits = sizeof_DCI2A_1_5MHz_2A_TDD_t;
break;
case 25:
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
size_bytes = sizeof(DCI2A_5MHz_2A_TDD_t);
size_bits = sizeof_DCI2A_5MHz_2A_TDD_t;
break;
case 50:
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
size_bytes = sizeof(DCI2A_10MHz_2A_TDD_t);
size_bits = sizeof_DCI2A_10MHz_2A_TDD_t;
break;
case 100:
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
size_bytes = sizeof(DCI2A_20MHz_2A_TDD_t);
size_bits = sizeof_DCI2A_20MHz_2A_TDD_t;
break;
default:
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
size_bytes = sizeof(DCI2A_5MHz_2A_TDD_t);
size_bits = sizeof_DCI2A_5MHz_2A_TDD_t;
break;
}
}
else {
switch(PHY_vars_eNB_g[module_idP][CC_id]->lte_frame_parms.N_RB_DL) {
case 6:
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
size_bytes=sizeof(DCI2A_1_5MHz_2A_FDD_t);
size_bits=sizeof_DCI2A_1_5MHz_2A_FDD_t;
break;
case 25:
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
size_bytes=sizeof(DCI2A_5MHz_2A_FDD_t);
size_bits=sizeof_DCI2A_5MHz_2A_FDD_t;
break;
case 50:
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
size_bytes=sizeof(DCI2A_10MHz_2A_FDD_t);
size_bits=sizeof_DCI2A_10MHz_2A_FDD_t;
break;
case 100:
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
size_bytes=sizeof(DCI2A_20MHz_2A_FDD_t);
size_bits=sizeof_DCI2A_20MHz_2A_FDD_t;
break;
default:
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
size_bytes=sizeof(DCI2A_5MHz_2A_FDD_t);
size_bits=sizeof_DCI2A_5MHz_2A_FDD_t;
break;
}
}
add_ue_spec_dci(DCI_pdu,
DLSCH_dci,
rnti,
size_bytes,
process_ue_cqi (module_idP,UE_id),//aggregation,
size_bits,
format2A,
0);
break;
case 4: case 4:
//if (nb_rb>10) { //if (nb_rb>10) {
openair2/LAYER2/MAC/main.c
+1 -1
View File
@@ -432,7 +432,7 @@ int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, uint8_t cba_group_
mac_xface->get_transmission_mode = get_transmission_mode; mac_xface->get_transmission_mode = get_transmission_mode;
mac_xface->get_rballoc = get_rballoc; mac_xface->get_rballoc = get_rballoc;
mac_xface->get_nb_rb = conv_nprb; mac_xface->get_nb_rb = conv_nprb;
mac_xface->get_SB_size = Get_SB_size; // mac_xface->get_SB_size = Get_SB_size;
mac_xface->get_subframe_direction = get_subframe_direction; mac_xface->get_subframe_direction = get_subframe_direction;
mac_xface->Msg3_transmitted = Msg3_tx; mac_xface->Msg3_transmitted = Msg3_tx;
mac_xface->Msg1_transmitted = Msg1_tx; mac_xface->Msg1_transmitted = Msg1_tx;
openair2/RRC/LITE/MESSAGES/asn1_msg.c
+6 -1
View File
@@ -1530,6 +1530,9 @@ uint8_t do_RRCConnectionSetup(uint8_t Mod_id,
case 2: case 2:
physicalConfigDedicated2->antennaInfo->choice.explicitValue.transmissionMode= AntennaInfoDedicated__transmissionMode_tm2; physicalConfigDedicated2->antennaInfo->choice.explicitValue.transmissionMode= AntennaInfoDedicated__transmissionMode_tm2;
break; break;
case 3:
physicalConfigDedicated2->antennaInfo->choice.explicitValue.transmissionMode= AntennaInfoDedicated__transmissionMode_tm3;
break;
case 4: case 4:
physicalConfigDedicated2->antennaInfo->choice.explicitValue.transmissionMode= AntennaInfoDedicated__transmissionMode_tm4; physicalConfigDedicated2->antennaInfo->choice.explicitValue.transmissionMode= AntennaInfoDedicated__transmissionMode_tm4;
break; break;
@@ -1932,7 +1935,7 @@ uint8_t do_RRCConnectionRelease(uint8_t Mod_id,
memset(&dl_dcch_msg,0,sizeof(DL_DCCH_Message_t)); memset(&dl_dcch_msg,0,sizeof(DL_DCCH_Message_t));
dl_dcch_msg.message.present = DL_DCCH_MessageType_PR_c1; dl_dcch_msg.message.present = DL_DCCH_MessageType_PR_c1;
dl_dcch_msg.message.choice.c1.present = DL_DCCH_MessageType__c1_PR_rrcConnectionReconfiguration; dl_dcch_msg.message.choice.c1.present = DL_DCCH_MessageType__c1_PR_rrcConnectionRelease;
rrcConnectionRelease = &dl_dcch_msg.message.choice.c1.choice.rrcConnectionRelease; rrcConnectionRelease = &dl_dcch_msg.message.choice.c1.choice.rrcConnectionRelease;
// RRCConnectionRelease // RRCConnectionRelease
@@ -1950,6 +1953,8 @@ uint8_t do_RRCConnectionRelease(uint8_t Mod_id,
(void*)&dl_dcch_msg, (void*)&dl_dcch_msg,
buffer, buffer,
RRC_BUF_SIZE); RRC_BUF_SIZE);
return((enc_rval.encoded+7)/8);
} }
uint8_t TMGI[5] = {4,3,2,1,0};//TMGI is a string of octet, ref. TS 24.008 fig. 10.5.4a uint8_t TMGI[5] = {4,3,2,1,0};//TMGI is a string of octet, ref. TS 24.008 fig. 10.5.4a
openair2/RRC/LITE/rrc_eNB.c
+1 -1
View File
@@ -2577,7 +2577,7 @@ void rrc_eNB_generate_RRCConnectionSetup(
eNB_rrc_inst[enb_mod_idP].Srb0.Tx_buffer.payload_size = eNB_rrc_inst[enb_mod_idP].Srb0.Tx_buffer.payload_size =
do_RRCConnectionSetup(enb_mod_idP, do_RRCConnectionSetup(enb_mod_idP,
(uint8_t *) eNB_rrc_inst[enb_mod_idP].Srb0.Tx_buffer.Payload, (uint8_t *) eNB_rrc_inst[enb_mod_idP].Srb0.Tx_buffer.Payload,
(mac_xface->lte_frame_parms->nb_antennas_tx==2)?2:1, (mac_xface->lte_frame_parms->nb_antennas_tx==2)?3:1,
ue_mod_idP, ue_mod_idP,
rrc_eNB_get_next_transaction_identifier(enb_mod_idP), rrc_eNB_get_next_transaction_identifier(enb_mod_idP),
mac_xface->lte_frame_parms, mac_xface->lte_frame_parms,