Commit Graph
13591 Commits
Author SHA1 Message Date
Sakthivel Velumani 0db13a3801 Added UL harq handling
Also fixed bugs in ulsim and dlsim harq tests
2020-07-24 14:00:55 +02:00
Francesco Mani d94f4cdae0 fixing again pusch ok when no data 2020-07-24 11:03:31 +02:00
Raymond Knopp d8bbfdbdda bugfix in eNB_scheduler.c. Code still to be moved to L1. 2020-07-23 22:24:55 +02:00
Francesco Mani 1f74524d0d fix for prepare dci 0_1 2020-07-23 11:48:25 +02:00
Francesco Mani 483b601c54 Merge branch 'NR_UL_scheduling' of https://gitlab.eurecom.fr/oai/openairinterface5g into NR_UL_scheduling 2020-07-23 10:10:51 +02:00
Francesco Mani 05e6ebe24b fix for prepare dci 0_1 2020-07-23 10:10:19 +02:00
cig bc243cee47 Bugfix in DMRS configuration at UE side:
- DM-RS type {1,2} was wrongly assigned to {1,2} instead of {0,1}
- Num DM-RS CDM groups without data is now taken into account in mthread
  decoding function
- number of DM-RS CDM groups without data for format 1_0 according to 5.1.6.2
  3GPP TS 38.214 version 15.9.0 Release 15:
-- the UE shall assume the number of DM-RS CDM groups without data is:
-- 1 (CDM group 0) for the case of PDSCH with allocation duration of 2 symb
-- 2 (CDM group {0,1}) for all other cases.
2020-07-22 23:52:16 +02:00
cig ea86120c4b Restructured UE DCI configuration function:
- moved RRC structs checks and mac configuration to config_ue.c
- new implementation of DCI configuration according to 3GPP TS 38.331
  version 15.9.0 Release 15 and 3GPP TS 38.213 version 15.9.0 Release 15
2020-07-22 23:52:08 +02:00
Sakthivel Velumani 5f80474114 Merge branch 'ul_harq' into NR_UL_scheduling 2020-07-22 18:21:54 +02:00
Sakthivel Velumani 2cd3c0b7bb harq put in ulsim 2020-07-22 18:08:27 +02:00
Raymond Knopp 3d8e5e11ef fixes for buffer overrun when L1 information is cleared upon UE removal in RRC. This is a temporary fix to solve a stability issue for Benetel pending more significant changes along the same lines in several places. 2020-07-22 17:56:51 +02:00
Remi Hardy 220445f157 wip : fr1 set up automation / fixing issues from recent changes 2020-07-22 17:53:28 +02:00
Francesco Mani 390c648a81 bugfix in time domain assigment 2020-07-22 15:15:50 +02:00
Francesco Mani 39b22f17b3 calloc for dci_pdu 2020-07-22 15:11:17 +02:00
Francesco Mani 5331189c8b bugfixes 2020-07-22 15:07:04 +02:00
Francesco Mani ac6aae9dde fix in allocation of segments 2020-07-22 14:53:16 +02:00
Francesco Mani c949170a28 calloc for dci_pdu in ul 2020-07-22 14:01:47 +02:00
Francesco Mani 9bd139246b bugfix in time domain assigment 2020-07-22 09:13:04 +02:00
hardy 4b48e457ba WIP : yaml config files for multiple eNB or gNB nodes 2020-07-21 23:55:20 +02:00
Remi Hardy 3d365b0d8e WIP fr1 set up 2020-07-21 17:04:23 +02:00
Francesco Mani e76593f73f bugfixes 2020-07-21 16:25:19 +02:00
Remi Hardy 2d1b7f78ad Merge branch 'oai_integration_week29' into 'develop'
Oai integration week29

See merge request oai/openairinterface5g!858
2020-07-21 11:38:00 +02:00
Francesco Mani ce846e6f7f fix in fapi function in dci for ul 2020-07-21 10:38:39 +02:00
hardy d244ea4b99 slight reformatiing of main.py ; introducing yaml for xml class definition 2020-07-20 22:45:24 +02:00
Francesco Mani 60b82248a1 first version of reworking scheduling function, including UL scheduling 2020-07-20 18:07:54 +02:00
Remi Hardy dfe6278ee1 fixing issues for CI integration 2020-07-20 18:06:02 +02:00
hardy 87dccea43f integrating cots ue control into CI 2020-07-20 16:44:51 +02:00
Francesco Mani 0f0ede038d removing a printf in pusch scheduling 2020-07-20 16:25:04 +02:00
Remi Hardy 331c74af2a fixing execution issues following recent changes 2020-07-20 14:21:11 +02:00
Robert Schmidt 6eb00a0895 Enable multi-module support in pdcp_fifo_flush_sdus() 2020-07-20 09:33:35 +02:00
Robert Schmidt 33b860f1b4 FlexRAN: use lock-free ringbuffers for slice conf
Use LFDS 7.0.0 Ringbuffer implementation to handle
* Slice Configuration
* UE slice association
which is then uploaded through MAC scheduling thread
2020-07-20 09:13:19 +02:00
Robert Schmidt 07313fd96d FlexRAN Bugfix: Free Ringbuffer on exit 2020-07-20 09:13:19 +02:00
Robert Schmidt 4901daf759 FlexRAN: New protobuf slice structure + Static Slice handling 2020-07-20 09:13:19 +02:00
Robert Schmidt 872cfc03fe Implement Static Slicing 2020-07-20 09:13:19 +02:00
Robert Schmidt 9956b96049 Use fptr for preproc and align UL PP definition 2020-07-20 09:13:19 +02:00
Robert Schmidt 2b4e529068 Simplify add_ue_list(), remove_ue_list(); add init_ue_list() 2020-07-20 09:13:19 +02:00
Robert Schmidt a74f4c1238 Delete old protobuf slice types flex_slice_{dl,ul} 2020-07-20 09:13:19 +02:00
Robert Schmidt 714a2df097 Remove any slice-related information from OAI 2020-07-20 09:13:19 +02:00
Robert Schmidt da09d63acd Default pre-processor: efficiently build UE list 2020-07-20 09:13:19 +02:00
Robert Schmidt 6fcc4f5970 Format to dynamically handle UL SCHED 2020-07-20 09:13:19 +02:00
Robert Schmidt af89a6b780 Configurable Default Scheduler DL Algo 2020-07-20 09:13:19 +02:00
Robert Schmidt fe7236d9c4 Add Maximum Throughput scheduler, wbCqi
Selects the UE with the highest CQI. If two UEs have the same CQI,
choses the one with highest number of bytes in RLC queue. Allocates as
many RBGs as possible, and potentially continues with the next UE.
2020-07-20 09:13:19 +02:00
Robert Schmidt 2de57fbc36 Add Proportional Fair scheduler, wbCqi
Selects UE with highest coefficient. Allocates until there are no more
RBGs to allocate, or UE has no more data. In the latter case, continues
with the next UE (second-highest coefficient).
2020-07-20 09:13:19 +02:00
Robert Schmidt 18a6961fcd Format to dynamically handle default DL SCHED algo 2020-07-20 09:13:19 +02:00
Robert Schmidt 8c7d94133f Bugfix RR DL: a retx UE might not be allocated again 2020-07-20 09:13:19 +02:00
Robert Schmidt 864fa84ba8 Default SCHED RR algo: optimize algo and defer RB calc.
- Loop only to next UE instead of jumping multiple

- mark used RBGs in rbg_mask

- Only calculate number of RBs based on CQI when UE is selected, instead
of calculating for all UEs which might be unnecessary.

- When looping the list of UEs for RB allocation, remove UEs that have
no data anymore instead of skipping them.
2020-07-20 09:13:19 +02:00
Robert Schmidt 82194319cf Bugfix DLSCH: only warn when retx with less RB
The preprocessor pre-allocates a CCE. Thus, when arriving at the check
for the number of RBs for retransmission, it is too late to skip the UE.
Therefore, only print a warning.

The default schedulers allocate a correct amount of RBs for
retransmissions, therefore it is ok.
2020-07-20 09:13:19 +02:00
Robert Schmidt d0baab6ed3 DLSCH: limit LC bytes according to preprocessor 2020-07-20 09:13:19 +02:00
Robert Schmidt a96c3761cc Log TBS in every window 2020-07-20 09:13:19 +02:00
Robert Schmidt 19c2856bbe UE: Set correct selected PLMN Identity 2020-07-20 09:13:19 +02:00