Sakthivel Velumani
4b15a77ab7
Fix build issue
2023-07-25 09:19:04 +02:00
Sakthivel Velumani
b8a5183b75
Update LLR & IQ plot with correct number of elements
2023-07-25 09:18:29 +02:00
Sakthivel Velumani
227d21ee5c
code review
2023-05-30 20:09:43 +02:00
Sakthivel Velumani
9825842e97
Adjust samples in time only when valid PBCH is present
2023-05-22 12:40:51 -04:00
Sakthivel Velumani
1f6d111f6a
Num wait idication as Tpool message field
2023-04-03 10:25:13 -04:00
Sakthivel Velumani
2bfe9ba229
Remove dead code
2023-04-03 10:25:13 -04:00
Sakthivel Velumani
c8a61331ea
Update UE design doc
2023-04-03 10:25:13 -04:00
Sakthivel Velumani
0004626ac7
Fix bug in QT scope
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The UE copies scope data not in a single buffer to avoid overwiring in case of multiple slots processing in parallel. But the scope upates data from single buffer thats assigned during selection. A getPlotValue() method is created to update the data pointer on every timerEvent.
2023-04-03 10:25:13 -04:00
Sakthivel Velumani
9e4d522937
Make kpi variables atomic
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Mutex for phy scope: Repeating this change again. My earlier change in commit 06ef311975 was erased by someone during merge of QT scope.
2023-04-03 10:25:13 -04:00
Sakthivel Velumani
e45a051c80
Perform CRC check for whole TB
2023-04-03 10:25:11 -04:00
Sakthivel Velumani
5c6778be0c
Fixed Harq stats print
2023-04-03 10:24:26 -04:00
Sakthivel Velumani
7d23ec27b5
Changed NR_UE_CAPABILITY_SLOT_RX_TO_TX to 3
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Tested with X300 and there was no real-time problems.
Could get the same throughput as when NR_UE_CAPABILITY_SLOT_RX_TO_TX is 4.
2023-04-03 10:24:26 -04:00
Sakthivel Velumani
f1841639f5
Updated documentation
2023-04-03 10:24:26 -04:00
Sakthivel Velumani
a03864ee8c
Fix printing help message
2023-04-03 10:24:26 -04:00
Sakthivel Velumani
f3be849904
Delete job data when no response FIFO
2023-04-03 10:24:26 -04:00
Sakthivel Velumani
1d9a4a42e7
Corrected thread pool help message
2023-04-03 10:24:26 -04:00
Sakthivel Velumani
15c12caa37
Contains MAC changes to run || DLSCH
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DL config as array in MAC
Run RX slot processing in Tpool thread
Fixed race in phy config
Changed mac_IF_mutex
Proc Tx: Lets wait for Proc Rx to get ACK/NACK
-(only on slots that carry ACK/NACK)
Fix problem with rfsim
Separated PDCCH and PDSCH decoding functions. Run PDCCH decoding in main UE_thread.
Fixed race in MAC dci config struct
needed for parallel processing of slots
Moved DLSCH transport block buffer to stack
rx_ind as static allocation
L2sim: Fixed calling of MAC sched in wrong slot
Fix DCI extract bug for RA procedure
2023-04-03 10:24:24 -04:00
Sakthivel Velumani
44906a236c
Changed buffer alloc and symb rotaion logs to debug
2023-03-07 16:54:25 -05:00
Sakthivel Velumani
37b808d171
Updated 5G L2sim tutorial
2023-02-16 17:22:53 +00:00
Sakthivel Velumani
4d2093e765
Updated doc, spell checked
2022-12-20 19:49:59 +05:30
Sakthivel Velumani
c0f03f2960
Reduced scope of llr_buffer
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Direct check on dlsim buffer
2022-12-18 11:33:54 +05:30
Sakthivel Velumani
d487666995
No need to set rxdataF to 0
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full symbol buffer will be written bt DFT
2022-12-18 10:08:12 +05:30
Sakthivel Velumani
c31fe381f8
Simplified function args
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removed gNB_id and slot from function calls where proc is used.
2022-12-18 10:08:12 +05:30
Sakthivel Velumani
573e7fd98a
Changed rxdataF from int32_t to c16_t
2022-12-18 10:08:12 +05:30
Sakthivel Velumani
06ef311975
Moved PDSCH, rxdataF to stack
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--Removed NR_UE_PDSCH global structure
--Changed UE scope to accomodate local PDSCH data
--Removed common_vars.rxdataF from global structure
2022-12-18 10:08:08 +05:30
Sakthivel Velumani
b80f2a2eb8
Moved nr_ue_design.md to doc/
2022-12-16 19:10:47 +05:30
Sakthivel Velumani
4fe3599a43
PDCP config as two functions
2022-12-14 15:12:29 +01:00
Sakthivel Velumani
ec21db63eb
GTP PDCP change rnti to ue id
2022-12-13 12:42:32 +01:00
Sakthivel Velumani
7da2ed309a
Fix code indentation
2022-12-07 00:45:46 +05:30
Sakthivel Velumani
161ef33963
Free ASN1 decoder memory for BCCH
2022-12-07 00:42:13 +05:30
Sakthivel Velumani
b3092a45fd
Added documentation for UE_thread design
2022-11-28 11:30:41 -05:00
Sakthivel Velumani
6d7afb014f
Moved writing samples to RU inside TX function
2022-11-28 11:30:41 -05:00
Sakthivel Velumani
a01ade336f
Start TX slot after receiving slot samples from RU
2022-11-28 11:30:36 -05:00
Sakthivel Velumani
3c8478f785
Moved PHY ULSCH struct to stack
2022-11-22 11:54:18 -05:00
Sakthivel Velumani
662897e0c5
Remove mlock
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Modern hardware have large RAM and don't need mlock.
2022-11-03 16:27:25 -04:00
Sakthivel Velumani
ea72306c38
Moved DLSCH PHY structure to stack
2022-10-31 18:22:27 -04:00
Sakthivel Velumani
d18813b867
Native AVX intrensic call as macro
2022-10-21 18:47:58 -04:00
Sakthivel Velumani
f3ee87416d
Remove old decoder R computations
2022-10-04 16:40:12 +02:00
Sakthivel Velumani
5a7f227513
Change LDPC decoder rate based on round/rv
2022-10-04 16:40:12 +02:00
Sakthivel Velumani
8a71877eec
Remove thread id and make slot processing in series
2022-09-29 13:43:16 -04:00
Sakthivel Velumani
c6fd2419d4
Remove ue->pucch_vars and scheduler call cleanup
2022-09-26 11:20:32 -04:00
Sakthivel Velumani
0248bf2ee5
AMF and NGU mode config cleanup
2022-09-25 13:06:58 -04:00
Sakthivel Velumani
0fe3a775c4
Remove ue->pdcch_vars
2022-09-15 16:03:10 -04:00
Sakthivel Velumani
18b3189d4e
Fix to support subscribing event from external thread
2022-09-05 15:51:50 -04:00
Sakthivel Velumani
f95c636a6b
Improved help for ulsim
2022-06-09 20:07:23 +05:30
Sakthivel Velumani
0d9e548f39
Minor fixes in ulsim and dlsim
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
80ad5df367
Removed unused 256QAM table option
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
933ad3dcf4
Removed duplicate definition and other errors
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left during rebase
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
8a8bacead9
Set default cmd values in UE
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It looked like the default command line option were not set in case the options were not passed. The right function was not called.
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
e8d91d642e
fixed nr_dlsim -q parameter bug
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
0cea80c8fa
changing PUSCH dmrs symbol pos to 0
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
1afdc298e9
Interpolation chest default in UE
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
7c47420da7
Making interpolation ch estimation as default
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
b2b84caeb5
Made PRB averaging channel est as default
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fixed indendation
updated ulsim CI test parameters
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
93e6bd26da
Made channel estimation techniques configurable
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
0960aa3d00
Updating ulsim CI test parameters
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
ab899c3a08
fix CI test parameters
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
da8d3037df
fixed bugs in phy sims
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
8f79ae0ea7
A bug fix in DMRS averaging
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
689ecf5ae1
Enable additional DMRS symbol in UL
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
e36a2b483a
Added 3GPP TS 38104 8.2.1.2-13 16QAM CI test cases
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
1d99c8e695
LDPC iterations as command line parameter
2022-06-08 21:32:07 +05:30
Sakthivel Velumani
b29f92c1d6
Add MCS table option to ulsim
2022-06-08 21:31:17 +05:30
Sakthivel Velumani
36190b1c7d
Logging changes to ulsim
2022-06-08 21:31:17 +05:30
Sakthivel Velumani
ac58460b6e
Time averaging PUSCH channel estimates
2022-06-08 21:31:17 +05:30
Sakthivel Velumani
382b2c41e3
Fixed ulsim to test 8 Rx antennas
2022-06-08 21:31:17 +05:30
Sakthivel Velumani
454dc0cfab
Fixed memory leaks identified by address san
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There is still a leak that needs to be fixed in rrc_UE.c
Should properly free NR_BCCH_BCH_Message_t *bcch_message after asn decoder using ASN_STRUCT_FREE()
2022-04-28 18:53:42 +05:30
Sakthivel Velumani
2c23b28ba6
Merge branch 'develop' into ldpc-decoder-memory
2022-04-05 16:02:35 +05:30
Sakthivel Velumani
a4c8fe029a
Fixing bad memory allocation and initialization
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This (sometimes) corrupts PBCH channel estimates leading to false time synchronization of received samples.
2022-04-05 15:28:23 +05:30
Sakthivel Velumani
f305b486dd
Merge branch 'develop' into ldpc-decoder-memory
2022-03-24 17:02:46 +05:30
Sakthivel Velumani
91426a08bd
Merge branch 'develop' into ldpc-decoder-memory
2022-03-11 12:39:26 +05:30
Sakthivel Velumani
0c28328986
Fixed merge errors
2022-03-10 15:19:42 +05:30
Sakthivel Velumani
57c480a8a3
Merged the two thread stats into a global one
2022-02-25 17:21:17 +01:00
Sakthivel Velumani
866311ac15
enabled second tx thread stats
2022-02-25 17:21:17 +01:00
Sakthivel Velumani
f6e25c0e15
code cleanup ldpctest.c
2022-02-21 16:41:18 +05:30
Sakthivel Velumani
f448f8021f
removed init function
2022-02-21 15:28:38 +05:30
Sakthivel Velumani
9b4a7526ad
Fix incorrect merge
2022-02-21 15:26:00 +05:30
Sakthivel Velumani
1c49caddc8
Merge branch 'develop' into ldpc-decoder-memory
2022-02-21 13:53:06 +05:30
Sakthivel Velumani
5c9c2783a5
removed crc from ldpctest
2022-02-14 09:49:54 +05:30
Sakthivel Velumani
ba891206e5
fixed stacksmashing error
2022-02-14 09:47:34 +05:30
Sakthivel Velumani
3a22b99869
Merge branch 'develop' into ldpc-decoder-memory
2022-02-14 09:44:15 +05:30
Sakthivel Velumani
e7441d5a03
Merge branch 'tx-thread-fix' of https://gitlab.eurecom.fr/oai/openairinterface5g into tx-thread-fix
2022-01-31 22:44:26 +05:30
Sakthivel Velumani
d1836d0656
Merge branch 'develop' into tx-thread-fix
2022-01-31 22:28:30 +05:30
Sakthivel Velumani
d263f19935
Making Tx thread count to 2
2022-01-31 22:27:47 +05:30
Sakthivel Velumani
f211d26d6f
Code cleanup
2022-01-31 22:27:27 +05:30
Sakthivel Velumani
9934aed3cf
Fix PUSCH/PDSCH parallel proc bug
2022-01-31 18:23:23 +05:30
Sakthivel Velumani
f43a69c5dc
Removed reuse of txdataF buffer on 2 slot basis
2022-01-28 10:39:44 +01:00
Sakthivel Velumani
a3123aae29
Removed global variables
2022-01-28 10:39:44 +01:00
Sakthivel Velumani
aa4db6057b
updated ldpctest
2022-01-21 17:34:34 +05:30
Sakthivel Velumani
a8a5897a98
Cherry pick ldpc-decoder-crc-check
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commit: 3cfefe3c6f7b2854a14d94fb7072ece2ff4c5c0a
2022-01-20 21:08:44 +05:30
Sakthivel Velumani
391a5eee71
Removed reuse of txdataF buffer on 2 slot basis
2022-01-12 14:50:33 +05:30
Sakthivel Velumani
6c7b71bbd4
Removed global variables
2022-01-11 14:15:53 +05:30
Sakthivel Velumani
23b3a18fe8
Removed conflict header and fixed dlsim
2022-01-11 14:14:44 +05:30
Sakthivel Velumani
348c4ed36f
Changing a log msg to debug
2021-12-05 20:26:24 +05:30
Sakthivel Velumani
1af5a89dd1
Removed active waiting loop
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which could block threads. Instead used a separate thread to reorder the finished the job messages
2021-12-05 17:48:32 +05:30
Sakthivel Velumani
3799aeb86b
Merge branch 'develop' into NR_MAC_statisticsthread
2021-11-04 15:54:37 +05:30
Sakthivel Velumani
b749ebcf11
Fix for blocked process in FR2
2021-11-02 14:39:27 +05:30
Sakthivel Velumani
35d150771e
L1 perf logging changes
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Moved the L1 timing stats logs from stdout to nrL1_stats.log
2021-10-02 14:02:29 +05:30
Sakthivel Velumani
4a93a8220f
Fix ulsim segfault
2021-09-28 17:55:56 +05:30
Sakthivel Velumani
6443cedd6a
Updated nfapi PNF to use the thread message buffers
2021-09-15 14:52:24 +05:30